WO2021183077A1 - A new space vector modulation method for multi-level converters - Google Patents

A new space vector modulation method for multi-level converters Download PDF

Info

Publication number
WO2021183077A1
WO2021183077A1 PCT/TR2020/051318 TR2020051318W WO2021183077A1 WO 2021183077 A1 WO2021183077 A1 WO 2021183077A1 TR 2020051318 W TR2020051318 W TR 2020051318W WO 2021183077 A1 WO2021183077 A1 WO 2021183077A1
Authority
WO
WIPO (PCT)
Prior art keywords
triangle
sector
vector
int
determined
Prior art date
Application number
PCT/TR2020/051318
Other languages
French (fr)
Inventor
Mustafa Cem OZKILIC
Atiye Hulya OBDAN
Selin OZCIRA OZKILIC
Original Assignee
Yildiz Teknik Universitesi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yildiz Teknik Universitesi filed Critical Yildiz Teknik Universitesi
Priority to EP20923987.0A priority Critical patent/EP4118492A4/en
Publication of WO2021183077A1 publication Critical patent/WO2021183077A1/en

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H02M7/53876—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0012—Control circuits using digital or numerical techniques
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4837—Flying capacitor converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Rectifiers (AREA)

Abstract

The invention is a method performed by a multi-level space vector modulation controller (100) of a system comprising one multi-level space vector modulation controller (100) in connection with a multi-level converter (300) controlling said multi-level converter (300) to perform space vector modulation according to its position in a space vector diagram (500) comprising six sectors (15) in the form of an equilateral hexagon whose center is the center of α-β space vector space center in the two-axis α-β (alpha-beta) coincident with the origin of said coordinate system and in the form of equilateral triangle and lower triangles in equilateral triangle structure provided within said sectors (15) of a multi-level converter (300) with level number "s" provided between an AC end and a DC end, a rotating reference voltage vector (522) in a three-axial A, B, C three-phase coordinate system.

Description

A NEW SPACE VECTOR MODULATION METHOD FOR MULTI-LEVEL CONVERTERS TECHNICAL FIELD
The invention relates to multi-level power converters used in power electronics applications and a multi-level space vector modulation method used in the control of these multi-level power converters.
PRIOR ART
Two-level converters for power electronics applications are the most basic and generally the first preferred converter type encountered in power electronics circuits thanks to their easy control. Total harmonic distortion (THD) formed by this type of converters causes decreasing of the operating quality of peripheral systems in network connected systems and increasing of harmonic losses in loads such as motors. Therefore, system design with a low THD value is important. In order to decrease the THD value, it is necessary to increase the switching frequency of the two-level converters. In this case, the system efficiency decreases. However, in order to increase the efficiency without increasing the THD value of a load such as a network connected system or motor is possible by using a multi-level converter. Increasing number of the power electronic elements that need to be controlled against this advantage provided by multi-level converters increases the system complexity.
Methods such as multi-level carrier-based SPWM (sinusoidal PWM), selective harmonic elimination (SHE), and multi-level space vector modulation are used for the control of multi- level converters. Compared to other methods, the advantage of multi-level space vector modulation is that it increases the system security because the state variables required for the applicability of the method become interchangeable (voltage spectrum improvement, switching frequency optimization, capacitor voltage balance, etc.). As the converter level increases, the mathematical operations required for the application of space vector modulation increase and the selection of suitable state components based on increasing number of backup state vectors and calculation of vector periods become more complicated, and thus multi-level space vector modulation becomes hard to apply. In the multi-level space vector diagram, in which sector the end point of the reference voltage vector is first in and then which lower triangle is in the sector should be found. This lower triangle is used for two purposes. The first purpose is to use the periods of the vectors corresponding to the lower triangle comers to calculate the residence time of the switching elements required to form the reference voltage vector.
The second purpose is to use capacitor voltage balance depending on the selection of the order of the state components corresponding to these corners. By providing the capacitor voltage balance in multi-level converters, it is important to prevent the multi-level converters to rise such that they endanger the breakdown voltages of the switches to which they are connected.
Considering the above-mentioned information, increase in the amount of mathematical calculation causes overuse of the microprocessor, digital signal processor etc. resources depending on the increase in the number of converter levels during the application of space vector modulation to multi-level converters. This situation causes the use of high- performance microprocessors with higher processing speeds and thus to an increase in costs. In order to avoid this, methods to facilitate the application of space vector modulation to multi-level converters are known in the art.
In the documents Seo, J.H., Choi, C.H., and Hyun, D.S., (2001). “A New Simplified Space- Vector PWM Method for Three-level Inverters", IEEE Transactions on Power Electronics, (16)4, 545-550 and Han, Y., Fan, X., and Zhao, Z., (2011). “A New Flux Observer Based on Voltage Reconstruction for Three-Level DTC Inverter", Power Electronics and Drive Systems (PEDS), Singapore, 5-8 December 2011 , 72-76, they developed the method of reforming the three-level converter phase voltages over the two-level phase voltage reformation method. In the study, six two-level converter state diagrams are placed at the comers of one two-level converter state diagram. By adding compensation voltage values to the centers of each hexagon, the transition from two-level converter vector plane to three-level converter vector plane was provided. In this method, the location of the reference voltage vector and the period of the space vectors new calculated. Information was given on how the developed neutral point potential balance was provided and information was given about the application of this method to multi-level converters. It has been noted that it can be applied to high-level converters by using lower level converter space vector diagrams, but the mathematical calculation load increases as the converter level increases. With document Hu, L., Wang, H., Deng Y., & He, X.N., (2004). With the document "A Simple SVPWM Algorithm for Multilevel Inverters", IEEE 35th Annual Power Electronics Specialists Conference (PESO 04), 20-25 June 2004, Aachen, 3476 - 3480, they defined a new two-axis coordinate system from the perpendicular coordinate system with an angle of 60° between them. In this coordinate system, the voltage vectors are defined on the basis of coordinates. The reference voltage was calculated in terms of axis voltages with the help of the law of cosine, and the dependent vector periods new obtained. The developed algorithm was experimentally performed on the three-level converter, and information was given on how the neutral point potential balance was performed and about the application of this method to multi-level converters. It has not been noted how to determine the state variables corresponding to the lower triangle corners in multi-level converters.
For the two-level space vector modulation application that can be applied to multi-level converters, they divided the reference voltage vector into two parts as offset and two-level reference vector with the document Song, Q., Liu, W., Yan, G., and Chen, Y., (2003). “DSP- Based Universal Space Vector Modulator for Multilevel Voltage-source Inverters", The 29th Annual Conference of the IEEE Industrial Electronics Society (IECON'03), Roanoke, 2-6 November 2003, 1727 - 1732. Offset voltage vectors were obtained by taking the integer component of the three phase voltage vectors. The remaining two-level reference vector was used to calculate the vector time periods and related two-level space vectors with the help of standard two-level space vector modulation formulas. Finally, the multilevel converter reference vector synthesis was obtained by collecting the offset voltage vectors and the two- level space vectors. The developed algorithm was experimentally performed on the five-level converter. It has been noted that the study related to providing the neutral point potential balance was carried out, but the method does not include the selection of reserve vectors required for the neutral point balance.
With the document Wan, Y., and Jiang J., (2009). “The Study of FPGA-based Three-Level SVM NPC Inverter”, IEEE 6th International Power Electronics and Motion Control Conference IPEMC '09, 17-20 May 2009, Wuhan, 1470 - 1474, they used the inequalities obtained by lines drawn to coincide with the edges of the equilateral triangle in a sector in order to find the reference vector end point in the three-level space vector diagram. According to the triangle number, the voltage vectors were determined and their periods were calculated. The results were given by simulating the three-level converter of the developed algorithm. There has been no mention of a study to provide neutral point balance. The study was carried out for the three-level inverters, but applying it to multi-level inverters will increase the complexity. With the document Shu, Z., Tang, J., and Lian, J., (2007). “An Efficient SVPWM Algorithm with Low Computational Overhead for Three-Phase Inverters", IEEE Transactions on Power Electronics, 22(5), 1797-1805, they defined new intermediate values instead of using α-β axis voltages directly due to the irregular coefficients in the standard sector finding and vector time calculation formulas used for SVPWM. These intermediate values were used in the process of finding a sector from a ready table. It has been also noted that these values can be used in the application of space vector modulation to the multi-level converter in calculating vector periods depending on the type of triangle within any sector. The developed algorithm has been experimentally performed on the two-level converter. It has been said that it can also be used for the multi-level converter application. Information was given about the application of the proposed method to the multi-level converters. However, in the case of multi-level converter application, no information was given to provide the neutral point potential balance.
With the document Yang, R., Wang, G., and Yu, Y. (2010). “A Fast Generalized Multilevel Voltage SVPWM Algorithm Based on Voltage Decomposition", 5th IEEE Conference on Industrial Electronics and Applications (ICIEA), 15-17 June 2010, Taichung, 1220 - 1224 they proposed a generalizable, fast SVPWM control method based on phase voltage projection in order to speed up the SVPWM algorithm, facilitate its analysis and form a general switching sequence. As well as the reference voltage projection, they made calculations of space vector periods. The reference voltage was formed with two phase voltages, the voltage of the other phase was assumed to be zero and simplification was provided by repeating the space vector diagram for an angle of 120°. The switching sequence and the selection of the backup vectors related to it were performed. The simulation results of the developed algorithm were given, but the study was not transferred to the application.
With the document Shu, Z., Ding, N., Chen, J., Zhu, H., and He, X., (2013). “Multilevel SVPWM with DC-Link Capacitor voltage Balancing Control for Diode-Clamped Multilevel Converter Based STATCOM", IEEE Transactions on Industrial Electronics, (60)5, 1884 - 1896., instead of switching to circular axis coordinates where α-β axis voltages are formed, it was switched to an elliptical coordinate system where α'-β 'axis voltages are formed. In elliptic coordinates, it has been shown that the hypotenuses of the obtained triangle structures are two common types of isosceles right triangles. By using the integer parts of the values obtained during the transition to the new coordinate system, in which the type of triangle there is the reference vector end point was found and the vector periods were calculated according to this triangle type. The developed algorithm was experimentally performed on the five-level converter, and a study related to providing the neutral point potential balance was carried out. With the document Trabelsi, M., Ben-Brahmin, L., Yokoyama, T., Kawamura, A., Kurosawa, R., and Yoshino T., (2012). “An Improved SVPWM Method for Multilevel Inverters", 15th International Power Electronics and Motion Control Conference (EPE/PEMC), 4-6 September 2012, Novi Sad, LS5c.1-1 - LS5c.1-7, the two-level space vector modulation based multi-level space vector modulation method that can be applied to the multi-level converters was proposed. In this method, sector finding process was performed by using α-β axis voltages and the angle θ made by the reference voltage with the α-axis was found. Triangles in a sector were divided into two types by using α-β axis voltages. By using angle and trigonometric magnitudes, two variables were defined so that the space vector plane is cut by nested hexagons and horizontal planes depending on the number of levels. By using θ angle and trigonometric magnitudes with these variables, vector periods were calculated for each triangle type mentioned above. The results were given by simulating the developed algorithm with the multi-level cascade connected full bridge converter.
With the document Gupta, A.K., and Khambadkone, A.M., (2006). “A Space Vector PWM Scheme for Multilevel Inverters Based on Two-Level Vector PWM", IEEE Transactions on Industrial Applications, 53(5), 1631-1639, they determined in which sector and which triangle in that sector the end point of the reference voltage vector is located by the parameters defined using α-β axis voltages and algebraic formulas formed with the help of quadratic formulas. Vector periods were obtained depending on the triangle type. The developed algorithm was experimentally performed on the three-level converter. Information was given about the application of the proposed method to the multi-level converters. The method suggested by [1-2] to provide neutral point potential balance was taken as reference.
With the document Zhu, R., Wu, X., and Tang, Y., (2015). “Duty Cycle-Based Three-Level Space-Vector Pulse-Width-Modulation with Over modulation and Neutral-Point Balancing Capabilities for Three-Phase Neutral-Point Clamped Inverters", IET Power Electronics, (8)10, 1931-1940 they indicated that they made the three-level transformer space vector modulation with reference to the two-level space vector modulation. Comparison depending on the size of the phase voltages relative to each other was performed. With the results, space vector modulation duty cycle calculation was performed by using phase voltage values. The developed algorithm was shown by applying it to the three levels converter. A study was carried out for the neutral point voltage balance. With the document Holtz, J., Holtgen, M., and Krah, J.O., (2013). “A Space Vector Modulator for the High-Switching Frequency Control of Three-Level SiC Inverters", IEEE Transactions on Power Electronics, 29(5), 2618-2626, they performed a conversion from the two-level space vector diagram consisting of equilateral triangles to the flat two-level space vector diagram consisting of isosceles right triangles. With the new flattened hexagonal plane components obtained after conversion, sector finding and calculation of vector periods were provided. During the application to the three-level converter, the three-level space vector diagram was grouped as two hexagons with their centers at the center of the inner hexagon and six hexagons at their comers. The hexagons coming to the corners were defined as being shifted by pivot vectors according to the center. Depending on the magnitude of the reference voltage, one of the inner two hexagons or one of the hexagons shifted by pivot vector was chosen. The selection of the hexagon shifted according to the pivot vector was performed by comparing the conversion result values obtained initially according to specific criteria. Performing the developed algorithm was provided by applying it to the three-level converter. A study was carried out for the neutral point voltage balance.
With the document Shiny, G., and Baiju,M.R., (2010). “A fractal based space vector PWM scheme for general n- level inverters", The 2010 International Power Electronics Conference - ECCE ASIA -, 21-24 June 2010, Sapporo, Japan, 847-854, it was aimed to find the reference vector end point by using the triangulation principle. In the triangularization method, the number of levels is increased by dividing the basic sector into equilateral triangles. Three levels determined for the multi-level topology do not include all levels, but levels such as 3,5,9,17 etc. and includes intermediate level, since during this division process, each divided triangle would have an equal length of sides. In the related study, the proportionality formula was added to cover the intermediate levels proportionally. With the triangularization formula, after finding the triangle in which the vector end point is found, the lower hexagon that this triangle is included in is found. Calculation of vector periods is performed so that these hexagonal two-level switching vectors are found.
With the document Hou.X., Li,Y., and Liu.L., (2003). “A novel general space vector modulation algorithm for multilevel inverter based on imaginary coordination", The Fifth International Conference on Power Electronics and Drive Systems, 2003. PEDS 2003, 17-20 November 2003, 392-396 space vector modulation algorithm was formed by using imaginary coordinate system and peak vector process. First, it was passed to the imaginary coordinate system from the phase coordinate system. With this process, triangle peaks are reduced to only one type value. After finding the triangle corners in the reference vector, the transition to the state components in the phase coordinate system is performed with the formulas used in the first step by using the values obtained. Since the formulas used in the first stage are not independent from each other, the results correspond to more than one different state component. Which state variable will be chosen is chosen depending on the operating conditions. Finally, the calculation of the periods of the reference vector components is performed.
With the document Mohamed,A.S.A., Gopinath, A, and Baiju.M.R., (2009), “A Simple Space Vector PWM Formation Scheme for Any General n-Level Inverter”, IEEE Transactions on Industrial Electronics, 56(5), 1649-1656, finding the center of the lower hexagon where the reference vector endpoint will be located is performed in the first step. For this purpose, sector selection is performed in the multi-level space vector diagram. Then, a new axis set is defined and the level (layer) that the vector end point is in is determined with the help of this axis set. Depending on the found layer, state variables are calculated with the suggested formulas considering that the center of the innermost layer is the zero vector. In the calculated values, the closest one desired to be found to the reference vector is the center of the desired lower hexagon. After finding the lower hexagonal center, the closest state components required to form the reference vector and the relevant vector periods are calculated.
With the document Lalili.D., Lourci.N., Berkouk.E.M., Boudjema.F., Petzoldt.J., and Dali.M.Y., (2006), “A simplified space vector pulse width modulation algorithm for five level diode clamping inverter", International Symposium on Power Electronics, Electrical Drives, Automation and Motion, 2006. SPEEDAM 2006, 23-26 May 2006, Taormina, S13-21 - S13- 26 pace vector modulation application has been developed for the five-level inverter. Development started with the process of dividing the five-level space vector diagram into 6 three-level space vector diagrams. Each three-level space vector diagram was subsequently divided into the two-level space vector diagrams.
With the document Sabah, V.S., Baby.T.C., Lall.K.P., Balamurungan.M., Sahoo.S.K., Chitra.A., Karthikeyan.P., and Raglend.I.J., (2015), “A simplified space vector pulse width modulation technique for multilevel inverter fed induction motor drive", 2015 International Conference on Circuits, Power and Computing Technologies, 19-20 March 2015, Nagercoil in the multi-level space vector modulation application, the space vector diagram was not used, and the αβ axis voltages were directly compared with the triangular wave. This comparison was performed according to the capacitor voltages depending on the number of levels and the time offset values required for the multi-level application were added. With the document Alonso, O., Marroyo, L., Sanchis, P., (2001), "A Generalized Methodology to Calculate Switching Periods and Regions in SVPWM Modulation of Multilevel Converters", European Power Electron, and Drives Assoc., August 2001, 1-8, transition was performed from the αβ axis to 60 degree axes. By defining two types of adjacent lower triangles, the lower triangles in which the reference vector will be found were provided. After the lower triangle selection was completed, starting from these lower triangles from the vertices that are not adjacent to each other (after the lower triangle selection was completed), the vector periods that the reference vector can be defined by the neighbouring vectors were calculated. The quadratic polynomial and the lower triangular number are calculated so that the parameters used for the calculation are the polynomial coefficient.
With the documents Celanovic, N., and Boroyevich, D., (2001). “A Fast Space-Vector Modulation Algorithm for Multilevel Three Phase Converters", IEEE Transactions on Industry Applications, 37(2), 637-641 ; Lauttamus.P., and Tuusa,H., (2007), “Unified Space-Vector Modulation Scheme for Multilevel Inverters", 2007 Power Conversion Conference - Nagoya, 2-5 April 2007, Nagoya, 1464-1471 ; Yao.W., Hu,H., and Lu,Z., (2008), “Comparisons of Space-Vector Modulation and Carrier-Based Modulation of Multilevel Inverter", IEEE Transactions on Power Electronics, 23(1), 45-51 ; Wei.S., Wu,B., Li, F.,Liu,C., (2003)," A general space vector PWM control algorithm for multilevel inverters", Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, 9-13 February 2003, Miami Beach, 562-568 and Wei.S., Wu,B., and Cheung, R., (2003), “A novel SVM algorithm for reducing oscillations in cascaded H-bridge multilevel inverters", IECON'03. 29th Annual Conference of the IEEE Industrial Electronics Society (IEEE Cat. NO.03CH37468), 2-6 November 2003, Roanoke, they showed the switching states with the three-dimensional axis considering the phase-phase voltages and reduced this representation to the two- dimensional hexagonal coordinate system. Integer values of the values obtained during reduction were used to find the location of the reference vector end point. After determining the vectors, their periods were calculated. The inverse transformation matrix was used for the transition from the two-dimensional vector diagram to the three-dimensional vector diagram and the appropriate switching state was selected. The application of the developed algorithm to three, four and five level converter was given with simulation results. There has been no mention of a study for the neutral point balance. In the application No US7558089, the method of space vector modulation of the multi-level converter is described with reference to the method given by [19]. In the application No US8976556, in the multi-level inverter space vector diagram, the two- level space vector diagram in which the residual vectors remain, and a method performing calculation of vector periods and selection of the order of state components by finding the level of the end point of the reference vector in the multi-level inverter was described.
In the application No US9559610, parameters dependent to the reference vector were defined in the Cartesian coordinate system to calculate the coordinates of the triangle in which the reference vector is located in order to find the three closest vectors to the reference vector. By using these parameters, the borders of the lower triangle, required to be found, were determined. Starting from this, a method based on calculation of average voltage value equal to the closest vectors and the pulse periods to be applied to the desired output voltage was described.
As a result, all the problems mentioned above made it necessary to make an innovation in the related technical field.
BRIEF DESCRIPTION OF THE INVENTION
The object of the present invention is to provide a method providing space vector modulation applied in the control of multi-level converters used in power electronics applications by making less use of system resources compared to the methods in the present art.
Another object of the invention is to provide a method providing the detection that whether the multilevel converter is operating in the linear modulation region or the over modulation region.
In order to perform all the objects that are mentioned above and will be clear from the detailed description below, the present invention is a method performed by said multi-level space vector modulation controller of a system comprising one multi-level space vector modulation controller in connection with the multi-level converter controlling said multi-level converter to perform space vector modulation according to its position in a space vector diagram comprising six sectors in the form of an equilateral hexagon whose center is the center of α-β space vector space center in the two-axis α-β (alpha-beta) coincident with the origin of said coordinate system and in the form of equilateral triangle and lower triangles in equilateral triangle structure provided within said sectors of a multi-level converter with level number "s" provided between an AC end and a DC end, a rotating reference voltage vector in the three-axial A.B.C three-phase coordinate system. Accordingly, the innovation comprises the following steps: wherein, each sector of the space vector diagram is assigned a reference pointer and a sector guide recorded in a memory unit is assigned the number 1 for each sector to a first lower triangle whose corner is directly connected to the origin and each lower triangle is given numbers so that the other lower triangles are assigned successive values following the number 1 in a first direction parallel to a first edge directly connected with the first lower triangle, and increasing consecutive values and a lower triangle guide recorded in said memory unit is accessed, wherein, Vα and Vβ are the components of said reference voltage vector and Vdc is the total DC voltage value applied to the multi-level converter,
Figure imgf000012_0001
a II 'and a III' values are calculated from the above equations and it is determined in which sector the reference voltage vector is located in the space vector diagram, considering that the Vβ component value and the II 'and III' values are positive or negative, the value 1' is determined by the following formula
Figure imgf000012_0002
or if the sector is known, the value 1' is determined by the following formula,
Figure imgf000012_0003
a value is calculated from the above equations, integer components of I , II ' and III' values are determined as lint, IIint, IIIint each line of the first_triangular [x] in the sector refers to the sequence in which the first triangles that directly contacts with said first edge are ordered according to the increasing numbers, the number assigned to the lower triangle where the end of the reference voltage vector is located is determined by using the equations triangle number= first_triangle [ lint]+ lllint + IIint - lint for sector 1 and 4, triangle number = first_triangle [llint]+ lllint + lint - IIint for sector 2 and 5, triangle number = first_triangle [lllint]+ IIint + lint- lllint for sector 3 and 6. Therefore, the end location of the reference voltage vector in the triangles previously numbered is detected by performing empiric processes and it enables the multi-level space vector modulation controller performing these processes to use less source.
A characteristic of a possible embodiment of the invention is that it comprises determining whether lint value for sector 1 and sector 4, IIint for sector 2 and 5, IIIint for sector 3 and sector 6 are equal to (s-2) value to determine whether the converter operates in the linear modulation region or the over modulation region, if equal, determining a deviation value different from first_triangle[lint] number for sector 1 and 4, first_triangle[llint] number for sector 2 and 5, first_triangle[lllint] number for sector 3 and 6 of a number assigned to the determined lower triangle, if not equal, determining a deviation value different from first_triangle[lint+1]-1)] number for sector 1 and 4, first_triangle[llint+1]-1)] number for sector 2 and 5, first_triangle[lllint+1]-1)] number for sector 3 and 6 of the number assigned to the determined lower triangle, determining over modulation if the deviation number is a positive integer and the state of the linear modulation if it is zero or negative integer.
A characteristic of a possible embodiment of the invention comprises the following steps: the lower triangle type is determined as type 1 or type 2 depending on whether the offset values lllint + IIint - lint added to the first_triangle [lint], lllint + lint - IIint added to the first_triangle [IIint] and IIint + lint - lllint added to the first_triangle [lllint] are double or single or not according to the sector where the reference voltage vector is located if there is an operation in the linear modulation region, Ts is the total period considering the sector where the reference voltage value is located in case of the lower triangle type is determined as type 1 ,
Figure imgf000013_0001
Figure imgf000014_0001
According to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated, a characteristic of a possible embodiment of the invention is that in case "type 2" triangle is selected, "type 2" triangle is selected as "2.type.a" or "2.type.b", if the type of the lower triangle is determined as the 2.type.a, considering the sector in which the reference voltage vector is in, Ts is the total period,
Figure imgf000014_0002
According to the formulas above, to determine the period of transmission of key elements, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated, if the type of the lower triangle is determined as the 2.type.b, considering the sector in which the reference voltage vector is in, Ts is the total period,
Figure imgf000015_0001
According to the formulas above, to determine the period of transmission of key elements, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated, for the linear modulation state, it is calculated as tz=Ts- tx-ty.
A characteristic of a possible embodiment of the invention comprises the following steps: when an operation in the over modulation region is determined, the reference vector is re- placed in the vector diagram so that the end of the reference vector is within the space vector diagram boundaries of the orbit rotating around the origin, if the deviation value determined is odd, the state 1 triangle is determined, if it is double, the state 2 triangle is determined, depending on the initial position of the reference vector, it is determined which type of "type 1 " lower triangle will be selected to place the end of the reference voltage vector in the new orbit, in case of determining the state 1 triangle, the tx' and ty' periods of the Vx' and Vy' vectors are calculated using the following equations,
Figure imgf000016_0001
Figure imgf000016_0002
Figure imgf000016_0003
Figure imgf000017_0001
in case of determining the state 2 triangle, tx and ty periods are compared and if ty‘ is greater than tx’, the 2.state.a triangle is selected, in case of determining the triangle 2.state.a, tx ' and ty periods of Vx' and Vy' vectors are calculated by using the following equations:
Figure imgf000017_0002
Figure imgf000018_0001
in the case of determining the state 2 triangle, ty and tx periods are compared, and if tx is greater than ty and if the triangle 2.state.b is determined, tx' and ty’ periods of the Vx' and Vy’ vectors are calculated by using the following equations:
Figure imgf000018_0002
Figure imgf000019_0001
for the over modulation state, tz equals zero due to the absence of zero vectors, depending on the sector in which the reference vector is located in the space vector diagram and depending on the lower triangle type in which the reference vector end point is located, the key element periods required for the formation of phase voltages are calculated and applied to the multi-level converter.
With the method used, the process power falling to the controller is reduced compared to the systems and methods in the present technique, and the multi-level converter is easily controlled by using less system resources. BRIEF DESCRIPTION OF DRAWINGS
In Figure 1 , the representative view of a system to which the invention is applied is given. In Figure 2, the representative view of the single phase arm of the three-phase diode clamped multi-level converter is given.
In Figure 3, the representative view of the single phase arm of the three-phase capacitor/condenser clamped multi-level converter is given.
In Figure 4, the representative view of single phase arm of the multi-level converter in a three-phase cascade connected full bridge type is given.
In Figure 5, a representative view of the multi-level space vector diagram is given. A, B, C three-phase coordinate system and the common α-β coordinate system of origin are shown. State variables corresponding to the corners of the lower triangles are shown. Various circular directions of the reference voltage vector are presented in a representative view, including both the linear modulation region and the over modulation region. Six sectors are shown separately. The lower triangles for the first sector and the first and last triangles in the line within each sector are shown.
In Figure 5.2, the first lines in 6 sectors are given for the basic embodiment depending on the selection of the first line structure. In Figure 5.3, the first lines in 6 sectors are given for the second embodiment depending on the selection of the first line structure.
In Figure 6, a representative view of the multi-level space vector diagram is given. A, B, C three-phase coordinate system and the common α-β coordinate system of origin are shown. State variables corresponding to the comers of the lower triangles are shown.
In Figure 7, the representation of the lower triangles in the sector 1 as "m2" type 1, "m2 + 1" type 2 (2.type.a and 2.type.b) is given. The selection order of the state variables is shown for the formation of A, B and C output phase voltages. In Sectors 1 , 3 and 5, the selection order of state variables is the same. Only state variables change. In Sectors 2, 4 and 6, the selection order of state variables is performed in the opposite direction of the selection in Sectors 1 , 3 and 5. In Figure 8, for the "m2" type 1 lower triangle shown in Figure 7, an example is given to obtain the switching order of A phase, B phase and C phase outputs by using the state variables 110 - 210-220-221-221-220-210-110, which are a group from present state variables. In Figure 9, in case "m2 + 1 " 2.type.a triangle is selected as shown in Figure 7, an example is given to obtain the switching order of A phase, B phase and C phase outputs by using the state variables 220 - 320 - 321 - 321 - 320 - 220 - 210, which are a group from present state variables.
In Figure 10, in case "m2+ 1" 2.type.a triangle is selected as shown in Figure 7, an example is given to obtain the switching order of A phase, B phase and C phase outputs by using the state variables 220 - 320 - 321 - 321 - 320 - 220, which are a group from present state variables. In Figure 11 , sector 1 of the space vector diagram of the 4-level converter is given in order to crosscheck the formulas given in Table 1.
In Figure 12, in case the end point of the reference vector is in "1.type" triangles, the representative view of the Vx and Vy vectors to be selected for the calculation of the vector periods and the formation of the reference voltage vector is given.
In Figure 13, in case the end point of the reference vector is in the "2.type" triangles, for the calculation of the vector periods, the representative view of the formation of Vx and Vy vector and reference voltage vector is given to select the “2.tip.a" triangle.
In Figure 14, in case the end point of the reference vector is in the "2.type" triangles, for the calculation of the vector periods, the representative view of the formation of Vx and Vy vector and reference voltage vector is given to select the “2.tip.b" triangle.
In Figure 15, the reference voltage vector and circular orbit rotating in the space vector diagram of the five-level converter operating in the linear modulation region are given. The triangle numbers through which the circular direction passes are also shown.
In Figure 16, the sector finding and lower triangle finding results obtained by the application of the steps of finding the lower triangle during the operation in the linear modulation region in the invention are shown. In Figure 17, the five-level phase voltages obtained as a result of applying the method given in the invention to the five-level converter in the linear modulation region are given.
In Figure 18, the orbit of the reference voltage vector that will cause operation in case of over-modulation and the representative view of the orbit that needs to follow the reference voltage vector to be reformed in order to apply it to the space vector modulation are given.
In Figure 19, Figure 20 and Figure 21, the representation of three different states that may occur during the reformation of the reference voltage vector in case of over modulation is given.
In Figure 22, the switching order of the A phase, B phase and C phase outputs in Sector I is shown for the reference vectors shown in Figure 19, Figure 20 and Figure 21.
In Figure 23, reference voltage vector extending beyond the space vector diagram of the five-level converter operating in the over modulation region and its circular orbit are given. The reformed reference voltage vector and the triangle numbers through which the orbit passes are also shown.
In Figure 24, the sector finding and finding lower triangle results obtained by applying the steps of finding the lower triangle of the five-level converter operating in the over modulation region in the invention are shown.
In Figure 25, the five-level phase voltages obtained as a result of applying the method given in the invention to the five-level converter operating in the over modulation region are given.
In Figure 26, the flow diagram used to find the sector in which the reference vector is in the space vector diagram is given.
In Figure 27, the flow diagram determining whether the reference vector rotates in an orbit (linear modulation region) or outside of the space vector diagram (over modulation region) is given.
DETAILED DESCRIPTION OF THE INVENTION
In this detailed description, the subject of the invention is described only with examples that do not have any limiting effect for a better understanding of the subject. The invention is a method performed by the multi-level space vector modulation control (101) controlling by performing the space vector modulation to provide energy transfer properly from an AC end (105) to a DC end (107) or from a DC end (107) to an AC end (105) by changing the state of transmission of the switching elements of a multi-level converter circuit (100) provided between the AC end (105) and the DC end (107). By means of the method described in detail with the examples below, the system enables performing the space vector modulation by using the resources in a reduced manner.
Referring to Figure 1, when the DC end (107) is DC source and the AC end (105) is a load, the multi-level converter (103) with the level number “s" is used as inverter for energy transfer from the DC end (107) to the AC end (105). In case the DC end (107) is the load and the AC terminal (105) is the AC source, the multi-level converter (103) with the level number "s" is used as a rectifier for energy transfer from the AC end (105) to the DC end (107). The control of the multi-level converter used for both modes of operation is performed by the multi-level space vector modulation. DC line capacitors (108, 109, 110, 111, 112) are capacitors parallel to the DC end (107) and the number of these capacitors is "s-1" when the multi-level converter with the level number "s" is considered.
In Figure 2, diode clamped, in Figure 3, capacitor clamped, and in Figure 4, cascade connected full-bridge type, multi-level converter topologies with level number "s" are given. Figure 2, Figure 3 and Figure 4 are given for only one phase, therefore, whichever type of converter will be used, three phases are obtained by using three of the structure forming that topology. Multilevel space vector modulation is applied to the multilevel converter topologies shown in Figure 2, Figure 3, and Figure 4.
Referring to Figure 1, if the multi-level converter is diode clamped, "s-1" capacitor is connected to each other in series from the end to end points (116). The capacitor is connected with intermediate points (113) to the multi-level converter with the level number "s" separately (as in Figure-2).
Referring to Figure 1, if the multi-level converter is capacitor clamped, "s-1" capacitor is connected to each other in series from the end to end points (116). The capacitor is not connected with intermediate points (113) to the multi-level converter with the level number "s" separately. In order to obtain the voltages of the intermediate levels at the output of the converter, the number of capacitors is reduced by one while reaching the lower levels, until there is only one capacitor required for the innermost level (as in Figure-3). Referring to Figure 1, in case of multi-level converter cascade connected full bridge or cascade connected half bridge, "s-1" capacitors are not connected to each other from end to end points (116) in series with each other, whereas each capacitor (113) and the multi-level converter with a separate level number "s" are attached to the cells in either full-bridge type or half-bridge type. Each cell is connected to each other as cascade (as in Figure-4).
It is preferred that the voltage levels of the capacitors used in all multi-level converters of the diode clamped, capacitor clamped, and cascade connected full-bridge (or half-bridge) type are equal. In case that the total voltage of the DC end (107) is Vdc, the voltage falling on the capacitors is Vdc/(s-1 ) when the voltage on each capacitor is equal.
Depending on the multi-level converter (103) switching states, the capacitor voltages are applied to the AC end (105) according to the voltage levels 0, Vdc/(s-1), 2Vdc/(s-1) . Vdc, with an output line (106). When the AC end (105) is AC source, the DC end (107) is the load and the multi-level converter (103) operates as the rectifier, the DC line capacitors (108,109,110,112 and 111) are charged and these capacitors feed the DC end (107), that is, the load.
In both modes of operation, the multi-level space vector modulation controller (101) decides which voltage level will be applied by the multi-level converter (103) to the DC line capacitors or from the DC line capacitors (108, 109, 110, 111, 112) based on a voltage balance information of a reference voltage vector (102). The reference voltage vector (102) can be used directly as Vα and Vβ components without the need for the angle made by the reference vector with the a axis in the space vector diagram, in other words, without requiring trigonometric operation since it is obtained directly with the Vα and Vβ components of the alpha-beta space vector space in motor control systems such as direct moment control or field-oriented control methods and net-connected systems such as renewable energy converters and active filters. Referring to Figure 1.2, a space vector diagram (500) comprising six sectors (15) in the form of an equilateral hexagon whose center is the center of α-β space vector space center in the two-axis α-β (alpha-beta) coincident with the origin of the coordinate system and in the form of equilateral triangle and lower triangles provided in said sectors (15) of a rotating reference voltage vector (522) in the three-axial A.B.C three-phase coordinate system is given. The method according to the invention performs the space vector modulation according to the position of the end point (522) of the reference voltage vector in said space vector diagram (500), that is, it determines the residence time of the key elements forming the multi-level converter. The innovative aspect of the invention is that even if the number of levels of the converter increases, the position of the reference vector endpoint is reduced according to the present art in terms of the number of operations and length of the process, that is, by significantly reducing the resources used of the processor performing the operations, and subsequently finding the residence time of transmission.
The multi-level space vector diagram (500) formed for the multi-level converters with level number “s" is shown in Figure 5 in the α-β coordinate system including the a axis (501) and the β axis (502). This space vector diagram is derived from a two-level space vector diagram and divided into 6 main sectors, 1 (503), sector 2 (504), sector 3 (505), sector 4 (506), sector 5 (507) and sector 6 (508) including equilateral triangles. The numbers of the sectors are stored as a sector guide in a memory unit to be accessed while performing the method steps of the invention. For equilateral triangles forming these six sectors, the side length is given as 2/3Vdc (525). Vdc is shown as the total DC line voltage applied to the multilevel converter. Each sector is divided into (s-1)2 equilateral lower triangles. The points at the comer of each lower triangle represent the space vector diagram state variables (512).
By performing the space vector modulation, the location of end point of a reference voltage vector (522) is determined in the multi-level vector diagram (500) to control the multi-level converter circuit (100) and the switching periods are determined according to this location. The innovative aspect of the invention is that the location finding process and then the calculation of the switching periods processes are performed by the empirical mathematical processes and the system resources are provided to be used in a significantly reduced way. The calculation of the switching periods by determining the multi-level space vector diagram (500) and the location of the reference vector (522) end point are described in detail below.
As shown in Figure 5, if we identify a first triangle whose one corner is on the origin (for example, the first lower triangle (513) in the first line in Sector 1) as number 1 , it is calculated with the sequence number (Formula 1) of the triangle first encountered starting from the origin to the top levels.
Figure imgf000025_0001
Here, “k” represents the number of lines and takes values in the form of k=2,3. (s-2),(s-1).
The value "s" also indicates the level of the converter, as stated above. The value "s" also indicates the level of the converter as stated above. In m1 Sector 1 , the first lower triangle (513) in line 1 is always triangle number 1. The first lower triangle (513) in m1 line 1, the first lower triangle (514),... in line 2 in m2 sector 1, the first lower triangle (515) in (s-2) line in ms-2 sector 1, the first lower triangle (516) in (s-1) line in ms-1 sector 1 represent the first triangles in the six sectors. By the last lower triangle (517) in line 1 in m2-1 sector 1 , the last lower triangle (509),... in line 2 in m3-1 sector 1, the last lower triangle (518) in (s-2) line in ms-1-1 sector, the last lower equilateral triangles in the six sectors are shown. The first triangle numbers are written on a sequence shown with (Formula 2).
Figure imgf000026_0003
Crosschecking the above formula is given below for the seven level converter. A seven-level converter also has six lines in total, and the triangle number in each line is calculated as follows. First, the "k" values are assigned. In this case, it takes k = 2, 3, 4, 5, 6 values. (Formula 3) shows the first triangle number in each line.
Figure imgf000026_0001
These values are recorded in a sequence such as (Formula 4), respectively, depending on the lines they are located.
Figure imgf000026_0002
By using the indices (0, 1, 2, 3, 4, 5) during the drawing of the first triangle number connected to the relevant line from this sequence, a way is followed as follows: the flrst_triangle[0] element for m1, the first_triangular[1] element for m2, the first_triangle[2] element for m3, the first_triangle[3] element for m4, the first_triangle[4] element for m5, the first_triangle[5] element for m6 will be selected.
The triangle number at the beginning of each line varies according to the level number of the m1, m2 , ms-2, ms-1 converter, accordingly, since the level number of a converter to be designed is determined at the very beginning of the design, the number of the first triangle in each line will be stable for that design. Therefore, these values are recorded initially in a memory unit to be called when required in the respective control cycle as elements of a sequence. After the level number of the multi-level converter has been determined, there is no need to be recalculated unless the level number of the converter is changed.
Triangle numbers (singulars), matched with the triangles, are stored in the memory unit as triangle guides. In the multi-level space vector diagram shown in Figure 5, a reference voltage vector (522) rotates in a circular orbit (528) located in the hexagon forming the space vector diagram. The center of this circular orbit (528) and the centers of the hexagon forming the space vector diagram are common. The length of the reference vector (522) (the radius of the circular orbit (528)) can be variable. In the case of operation in the linear modulation region, the radius of the circular orbit is less than or equal to . A second circular orbit (526) of radius
Figure imgf000027_0002
Figure imgf000027_0003
is also shown in the figure. When the radius of the circular orbit is greater than
Figure imgf000027_0004
, an operating condition occurs in the over modulation region. The third circular orbit (527) showing the over modulation condition is also shown in the figure. By performing the following steps by the multi-level space vector modulation controller (101 ), when the reference vector (502) is taken as input, it is determined in which lower triangle the end of the reference vector (502) is located.
By using a Vα component (520) and a Vβ component (521) in a space vector diagram firstly to find the end point of the reference vector (522), it is found which of the six sectors in the space vector diagram the reference vector (522) is located. To do this, by using Vα component (520) and Vβ components (521 ), the variables are calculated with (Formula 5), (Formula 6), (Formula 7), (Formula 8), (Formula 9), (Formula 10) and (Formula 11). In fact, these variables will be used to find the projections (523, 524) on the vectors forming the sector in which the reference vector (522) is located, in which lower equilateral triangle (519) the end point of the reference vector (522) is located, and also in the calculation of vector periods.
Figure imgf000027_0001
Figure imgf000028_0001
If it is desired to avoid the division process used for I' shown by (Formula 9), the calculation is performed as follows according to the relationship between
Figure imgf000028_0002
and . Basically,
Figure imgf000028_0003
when it is analyzed on a sector basis, (Formula 10) is valid for sector 1 -3-4-6 (503, 505, 506, 508) and (Formula 11) for sector 2 - 5 (504, 507).
Figure imgf000028_0004
The "s" used in these equations is the number of levels of the multi-level converter and Vdc is the total DC line voltage applied to the multi-level converter.
In Figure 26, the sign flow chart is shown related to which of the six vectors in the space vector diagram the voltage vector (522) rotating in the space vector diagram shown in Figure 5 is located and how to find it depending on whether Vβ and llsign and lllsign values are positive or negative.
The first state (2601) where Vβ is greater than zero is controlled and branching occurs according to the result.
If the first state (2601) is correct (E), the second case (2602) where the llsign is greater than zero is controlled and branching occurs according to the result. If the second state (2602) is correct (E), the Sector 1 selection step (2603) is performed.
If the second state (2602) is not correct (H), the third state (2604) where the lllsign is less than zero is controlled and branching occurs according to the result.
If the third state (2604) is correct (E), the Sector 3 selection step (2606) is performed.
If the third state (2604) is not correct (H), the Sector 2 selection step (2605) is performed. If the first state (2601) is not correct (H), the fourth state (2607) where the lllsign is greater than zero is controlled and branching occurs according to the result.
If the fourth state (2607) is correct (E), the Sector 6 selection (2608) step is performed. If the fourth state (2607) is not correct (H), the fifth state (2609) where the llsign is less than zero is controlled and branching occurs according to the result.
If the fifth state (2609) is correct (E), the Sector 4 selection (2610) step is performed. If the fifth state (2609) is not correct (H), step Sector 5 selection (2611 ) is performed.
After determining the sector, it is necessary to determine it is necessary to determine in which lower triangle the end point of the reference vector (522) is located. For this purpose, an empirical formula is used. The variables used in the formula are provided by taking the full values of variables I', II' and III' by removing the decimal parts. These variables can take any natural number value up to 0,1 ,2. (s-2).
Figure imgf000029_0001
As seen in Figure 5, in the first sector (503), there is "s-1" line (516). If the lines are numbered from 0 to s-2, "s-1" line is obtained. The index number given for each first triangle also shows the number of lines drawn inside the triangle within a sector. The number of lines is also referred as a minus of the multi-level inverter level. If number of the first lower triangle (513) in m1 sector 1 in line 1 , the first lower triangle (514) in m2 sector 1 in line 2. the first lower triangle ms-2 (515) in sector 1 in (s-2) line, the first lower triangle (516) in ms-1 sector in line (s-1 ), with the offset value to be calculated, in which lower triangle the reference vector (522) end is located will be found. The calculation requirement of the offset value is valid for the remaining five sectors. This offset value is available for six sectors with various combinations to be obtained with the results of (Formula 12), (Formula 13) and (Formula 14). After the offset value is found, the offset value will be added to the first triangle number. In the case where the first triangle number is recorded in a sequence, by using one of the values obtained with (Formula 12), (Formula 13) and (Formula 14), the first triangle number is read from the sequence by using the element index for this sequence. How this calculation will be performed on the basis of sector is shown in Table 1. For example, the index value for the element to be drawn from the first triangle sequence in Sector 1 is the result of the formula (Formula 12). The triangle number in which the end point of the reference vector (522) will be found is calculated with the formula in the sequence given for Sector 1 in Table 1. Still in Table 1 , the formula for the triangle number including the vector end point in other sectors is given in the relevant sector number line.
Referring to Figure 5.2, the lower triangles are numbered in increasing numbers, (533) for sector 1 , (534) for sector 2, (535) for sector 3, (536) for sector 4, (537) for sector 5, (538) for sector 6, along one of the edges coming from the origin and when the first line is formed, Table 1 is used.
Table 1
Figure imgf000030_0001
In a possible second embodiment, the lower triangles, referring to Figure 5.2, are numbered in increasing numbers ((539) for sector 1, (540) for sector 2, (541) for sector 3, (542) for sector 4, (543) for sector 5, (544) for sector 6) along other edge of the sector according to the edge described above, coming from the origin, and when the first line is formed, table 1.1 is used. Table 1.1
Figure imgf000031_0001
Depending on the lower triangle number obtained, it is sufficient to control the comparison algorithm developed to determine whether the reference vector end point is in the linear modulation region or the over modulation region. Referring to Figure 27, this comparison includes the following steps. The versions of the steps in the second embodiment mentioned above are also given.
First step (2701): In the basic embodiment,
Comparing whether lint for Sector 1 and Sector 4, IIint for Sector 2 and 5, and IIlint for Sector 3 and 6 are equal to the value (s-2) or not. If equal (E), moving to the second step (2702), if not equal (H) moving to the third step (2703). First step (2701):
In the second embodiment,
Whether lint for Sector 1 and Sector 4, IIint for Sector 2 and 5, and IIlint for Sector 3 and 6 are equal to the value (s-2) or not is compared. If equal (E), it is moved to (2702), if not equal (H), it is moved to (2703).
Second step (2702):
In the basic embodiment,
Determining whether the triangle number (triangle_no) calculated based on the sector number according to Table 1 is greater than the first_triangle[lint] for Sector 1 and Sector 4 or than the last lower triangle of the line shown with lint, the first_triangle[lint] for Sector 2 and Sector 5 or the last lower triangle of the line shown with IIint, the first_triangle[lint] for Sector 3 and Sector 6 or the last lower triangle of the line shown with I IIint or not. If the difference is greater than 0, this value is noted as "lower triangle deviation value for over modulation operation". The noted difference value will be used in the lower triangle selection in which the reference vector to be reformed during the over modulation operation will be found. If it is great (E), moving to the fifth step (2705), if it is not (H), moving to the fourth step (2704).
Second step (2702): In the second embodiment,
Determining whether the triangle number (triangle_no) calculated based on the sector number according to Table 1.1 is greater than the first_triangle[ IIint] for Sector 1 and Sector 4 or than the last lower triangle of the line shown with IIint, the f irst_triangle[lllint] for Sector 2 and Sector 5 or the last lower triangle of the line shown with IIlint, the first_triangle[lint] for Sector 3 and Sector 6 or the last lower triangle of the line shown with lint or not. If the difference is greater than 0, this value is noted as "lower triangle deviation value for over modulation operation". The noted difference value will be used in the lower triangle selection in which the reference vector to be reformed during the over modulation operation will be found. If it is great (E), moving to the fifth step (2705), if it is not (H), moving to the fourth step (2704).
Third step 2703:
In the basic embodiment,
Whether the triangle number (triangle_no) calculated based on the sector number according to Table 1 is greater than the (first_triangle[lint+1]-1 ) for Sector 1 and Sector 4 or than the last lower triangle of the line shown with lint, the (first_triangle[llint+1 ]-1 ) for Sector 2 and Sector 5 or the last lower triangle of the line shown with IIint, the (first_triangle[lllint+1]-1) for Sector 3 and Sector 6 or the last lower triangle of the line shown with lllint or not is determined. If the difference is greater than 0, this value is recorded as "lower triangle deviation value for over modulation operation" to the memory unit. The recorded difference value will be used in the lower triangle selection in which the reference vector to be reformed during the over modulation operation will be found. If it is great (E), it is moved to the fifth step (2705), if it is not (H), it is moved the fourth step (2704). Third step (2703):
In the second embodiment,
Whether the triangle number (triangle_no) calculated based on the sector number according to Table 1.1 is greater than the (f irst_triangle[l lint+1 ]-1 ) for Sector 1 and Sector 4 or than the last lower triangle of the line shown with IIint, the (first_triangle[lllint+1]-1) for Sector 2 and Sector 5 or the last lower triangle of the line shown with lllint, the (first_triangle[lint+1]-1) for Sector 3 and Sector 6 or the last lower triangle of the line shown with lintor not is compared. If the difference is greater than 0, this value is noted as "lower triangle deviation value for over modulation operation" to the memory unit. The noted difference value will be used in the lower triangle selection in which the reference vector to be reformed during the over modulation operation will be found. If it is great (E), it is moved to the fifth step (2705), if it is not (H), it is moved the fourth step (2704).
2704: Determining the presence of operation in the linear modulation region.
2705: Determining the presence of operation in the over modulation region. Depending on the obtained lower triangle number, a multi-level converter switching sequence is formed with the state variables coming to the corners of that triangle. In Figure 6, the multi-level converter space vector diagram with the level number "s" is given. Some of the state variables in Sector 1 (601) are shown in Table 2. The selection process of the state variables is performed such that each key element for each phase in each switching period enters to the transmission once and exits once. In multi-level converters, as the center of the space vector diagram is approached, the switching states options increase depending on the level number. It is possible to select these switching states, optionally, in order to provide capacitor balance, so that the voltage level between output phases does not change.
Table 2
Figure imgf000033_0001
The lower triangles in the multi-level space vector diagram are divided into two types of lower triangles, which are shown with the 1.type lower triangle (624) “m2" and the 2.type lower triangle (625) with “m2+1" in Figure 6. These lower triangles are shown in Figure 7 by enlarging with the 1.type triangle (719) and the 1.type.a triangle (720) and the 2type.b triangle (721). 2.tip.a triangle (720) and 2.tip.b triangle (721) are the same triangles, and in this type of triangles, two different starting points are selected and the state variable is selected. In the case that the reference vector end point is within one of these lower triangles, considering the state variables coming to the comers of the lower triangles, it is performed such that each key element for each phase in each switching period enters to the transmission once in total and exits once.
Considering the 1.type triangle (719) in Figure 7, starting from the first state variable (704) selected for the 1.type triangles, counter-clockwise, a transition is performed to the second state variable (705) selected for 1.type triangles, to the third state variable (706) selected for 1.type triangles, and then again to the first state variable (704) selected for 1.type triangles.
In this case, the half-period is half of the completed switching period (812), and a transition is performed from (704) to the state variable number (706), state variable number (705) and then state variable number (704) counter-clockwise. (Considering the rotation direction here, the rotation directions for Sector1, Sector 3 and Sector 5 for the 1.type triangle are (701), (702), (703), (703), (702), (701). Considering the rotation direction here, the rotation directions for Sector 2, Sector 4 and Sector 6 for the 1.type triangle are (703), (702), (701), (701), (702), (703)).
It is possible to for the switching order of A phase (801), B phase (802) and C phase (803) for the 1.type triangle (719) in Figure 8 by selecting the 110 zero voltage vector state variable (804), 210 Vx voltage vector state variable (805), 220 Vy voltage vector state variable (806), 221 Zero voltage vector state variable (807), 221 zero voltage vector state variable (808), 220 Vy voltage vector state variable (809), 219 Vx voltage vector state variable (810), 110 zero voltage vector state variable (811) state variables. Here, the numbers 0,1,2..., (s-2), (s- 1 ) selected during switching directly affect the determination of the voltage level applied to the output. Considering Figure 8, in the output A phase (801), 1.Vdc/(s-1) , 2.Vdc/(s-1), 2.Vdc/(s-1) , 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 1.Vdc/(s-1) are applied. In the output B phase (802), 1.Vdc/(s-1), 1.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s- 1), 1.Vdc/(s-1), 1.Vdc/(s-1) are applied. In the output (803), 0.Vdc/(s-1), 0.Vdc/(s-1), 0.Vdc/(s- 1 ), 1.Vdc/(s-1 ), 1.Vdc/(s-1 ), 0.Vdc/(s-1 ), 0.Vdc/(s-1 ), 0.Vdc/(s-1 ) are applied. Considering (720) in Figure 7, starting from the first state variable (710) selected for the 2.type.a triangles, clockwise, a transition is performed to the second state variable (711) selected for 2.type.a triangles, to the third state variable (712) selected for 2.type.a triangles, and then again to the first state variable (710) selected for 2.type.a triangles. In this case, the half-period of the switching period (912) is completed and a transition is performed from the first state variable (710) for 2.type.a triangles, counter-clockwise, to the third state variable (712) selected for 2.type.a triangles, the second state variable (711) selected for 2.type.a and then the first state variable (710) selected for 2.type.a variable. (Considering the rotation direction here, the rotation directions for Sector1 , Sector 3 and Sector 5 for the 2.type.a triangle are (707), (708), (709), (709), (708), (707). Considering the rotation direction here, the rotation directions for Sector 2, Sector 4 and Sector 6 for the 2.type.a triangle are (709), (708), (707), (707), (708), (709)).
It is possible to form the switching orders of A phase (901 ), B phase (902) and C phase (903) outputs for the 2.type.a (720) in Figure 9 by selecting the state variable (904) showing the 210 zero voltage vector, the state variable (905) showing the 220 Vx voltage vector, the state variable (906) showing the 320 Vy voltage vector, the state variable (907) showing the 321 zero voltage vector, the state variable (908) showing the 321 zero voltage vector, the state variable (909) showing the 320 Vy voltage vector, the state variable (910) showing the 220 Vx voltage vector, the state variable (911) showing the 210 zero voltage vector. Considering Figure 9, to the output A phase (901), 2Vdc/(s-1), 2.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1) are applied. To the output B phase (902), 1.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 1.Vdc/(s-1) are applied. To the output C phase (903), 0.Vdc/(s-1), 0.Vdc/(s-1), 0.Vdc/(s-1), 1.Vdc/(s-1), 1.Vdc/(s-1), 0.Vdc/(s-1 ), 0.Vdc/(s-1 ) , 0.Vdc/(s-1 ) are applied.
Considering the 2.type.b triangle (721) in Figure 7, starting from the first state variable (716) selected for the 2.type.b triangles, clockwise, a transition is performed to the second state variable (717) for 2.type.b triangles, the third state variable (718) selected for 2.type.b triangles and then again the state variable shown with the first state variable (716) selected for 2.type.b triangles. In this case, the half period (1012) is completed and from (716), counter-clockwise, a transition is performed to number (718) state variable, number (717) state variable and then number (716) state variable. (Considering the rotation direction here, the rotation directions for Sector1, Sector 3 and Sector 5 for the 2.type.b triangle are (713), (714), (715), (715), (714), (713). Considering the rotation direction here, the rotation directions for Sector 2, Sector 4 and Sector 6 for the 2.type.b triangle are (715), (714), (713), (713), (714), (715)). It is possible to form the switching order (20) of the outputs A phase (1001, B phase (1002) and C phase (1003) for the 2.type.b triangle (721) in Figure 10 by selecting the state variable (1004) showing the 220 zero voltage vector, the state variable (1005) showing the 320 Vx voltage vector, the state variable (1006) showing the 321 Vy voltage vector, the state variable (1007) showing the 331 zero voltage vector, the state variable (1008) showing the 331 zero voltage vector, the state variable (1009) showing the 321 Vy voltage vector, the state variable (1010) showing the 320 Vx voltage vector, the state variable (1011) showing the 220 zero voltage vector. Considering Figure 10, in the output A phase (1001), 2Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 2.Vdc/(s-1) are applied. In the output B phase (1002), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 3.Vdc/(s-1), 3.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1), 2.Vdc/(s-1) are applied. In the output C phase (1003), O.Vdc/(s-1), O.Vdc/(s-1), 1.Vdc/(s-1), 1.Vdc/(s-1), 1.Vdc/(s-1), 1.Vdc/(s-1), O.Vdc/(s-1), O.Vdc/(s-1) are applied.
The formulas given in Table 1 are crosschecked with reference to the four-level space vector diagram given in Figure 11 for Sector 1 (1108). For example, in the coordinates α-β coordinate axis a axis and β axis (1101, 1107) of the reference vector end point selected in the first sector, with the end point of vectors Vα (1105) and Vβ (1102), the reference voltage vector Vref (1106) is shown as
Figure imgf000036_0001
The side length of the equilateral triangle forming each sector is 2/3Vdc. The first triangle is referred as a sequence with (Formula 15) by using the elements of the sequence (Formula 3) that we will define as the first triangle. (Formula 5), (Formula 6), (Formula 7), (Formula 8) and (Formula 9) are obtained as shown by the variables I', II', and III' (Formula 16). The triangle number is calculated as given by (Formula 17) by selecting the result of one of the formulas indicated in Table 1 , the appropriate sector number. The parameters to be used in the lower triangle calculation for six sectors are given in detail in Table 3.
Figure imgf000036_0002
Table 3
Figure imgf000037_0001
After finding which lower triangle the end point of the reference vector is included in, the vector periods are calculated. As shown in Figure 11 , lower triangles are defined as two types within themselves. The first one is the 1 .type lower triangle (1103) and the other one is the 2.type lower triangle (1104). The 1.type lower triangles (1103) correspond to the state that the offset values for each line is even number and the 2.type triangles (1104) correspond to the state that the offset value is odd number. After determining the lower triangle in the multi-level converter with the number of levels "s", the vectors closest to the triangle in which the reference vector is located will be reconstructed with the state variables corresponding to the lower triangle comers and the transmission periods to be applied to the key elements at the multi-level converter levels should be calculated. In Figure 12, if the reference vector is in "1.type" triangles, the vector type to be selected for calculating the vector periods is shown. As can be seen, the vector used to form the reference voltage vector provides the reference vector 1201 with the vector sums of the resultant vector 1207 for the voltage vectors Vx (1202) and Vy (1206). When the 1 .type triangle is used to form the reference voltage vector within the "1 .type" triangle, a starting state variable (1214) to be selected forms a starting point to reach the reference vector end point coming to the corresponding lower triangle by using the closest voltage vector Vx (1202) and Vy (1206). tx and ty periods should be calculated for Vx (1202) and Vy voltage vector (1206). After the calculation is performed, depending on the state variables to be selected, the relevant keys on each phase in the multi-level converter are switched on and the voltage levels are applied to the AC output ends of the multi-level inverter. The periods of the A phase (801 ), B phase (802), C phase (803) output voltages shown in Figure
8 are directly related to the calculated tx and ty periods. The effect of tx and ty periods on the output voltages is shown with half of the application time of the W2 Vx voltage vector (814), half of the application time of the ty 2 Vy voltage vector (815), half of the application time of the ty/ 2 Vy voltage vector (818), tx/2 (819). The tz zero vector effect is shown as one quarter of the application period of the zero voltage vector tz/4 (813), tz/4 (816), tz/4 (817), tz/4 (820). Ts is the total period and shown by half of the Ts/2 switching period (812) and half of the Ts/2 switching period (821). tz is obtained by removing tx and ty periods from the total period Ts. In case of “1.type" triangle is selected, considering the sector in which the reference vector is located from the formulas given in “1.type" (as an example, 719 shown in Figure 7) named triangle column in Table 4, in order to determine the residence time of the key elements, the necessary tx , and ty vector periods, thus the voltage periods to be applied to the output phases, are calculated.
The reference vector for the 2.type lower triangle (1104) mentioned in Figure 11 is formed in two different ways. These are named as "2.type.a" and "2.type.b"within themselves. In Figure 13 and Figure 14, it is shown how to form reference vectors for "2.type.a" and "2.type.b". The
"2.type.a" or "2.tip.b" is selected to form the reference vector and the selected one affects the capacitor voltage balance. Therefore, with the calculation method set forth in this invention, after the selection of the key elements in the multi-level converter that directly affects the capacitor voltage balance is completed depending on the state variables, in a simple way, the time required for the transmission periods of the switching elements is calculated.
In Figure 13, the vector type to be selected for the calculation of vector periods in case the reference vector is in the "2.type.a" triangles. The vector used to form the reference voltage vector provides the reference vector (1301) with (1305) and the vector sums of the resultant vector (1307) for the voltage vectors Vx (1302) and Vy (1306). The state variables shown with (1314) in the triangle "2.type.a" form the starting point to reach the reference vector end point in the corresponding lower triangle by using the voltage vector Vx (1302) and the voltage vector Vy(1306). For the voltage vector Vx (1302) and the voltage vector Vy (1306), the tx and ty periods should be calculated. After the calculation is performed, depending on the state variables to be selected, the relevant keys on each phase in the multi-level converter are switched on and the voltage levels of the capacitors are applied to the AC output ends of the multi-level inverter. The periods of the A phase (901 ), B phase (902), C phase (903) output voltages shown in Figure 9 are directly related to the calculated tx and ty periods. The effect of tx and ty periods on the output voltages is shown with half of the application time of the tx/2 Vx voltage vector (914), half of the application time of the t/ 2 Vy voltage vector (915), half of the application time of the t/2 Vy voltage vector (918), half of the application time of the tx/2 Vx (919). The tz zero vector effect is shown as one quarter of the application period of the zero voltage vector tz/4 (913), tz/4 (916), tz/4 (917), tz/4 (920). Ts is the total period and shown by half of the Ts/2 switching period (912) and half of the Ts/2 switching period (921). tz is obtained by removing tx and ty periods from the total period Ts. In case of “2. type” triangle is selected, considering the sector in which the reference vector is located from the formulas given in “2.type.a" (as an example, 720 shown in Figure 7) named triangle column in Table 4, in order to determine the residence time of the key elements, the necessary tx and ty vector periods, thus the voltage periods to be applied to the output phases, are calculated.
In Figure 14, the vector type to be selected for the calculation of vector periods in case the reference vector is in the "2.type.b" triangles. The vector used to form the reference voltage vector provides the reference vector (1401) with (1405) and the vector sums of the resultant vector (1407) for the voltage vectors Vx (1402) and Vy (1406). The starting state variables (1414) to be selected when the 2.type.b triangle is used to form the reference voltage vector form the starting point to reach the reference vector end point coming into the relevant lower triangle by using the voltage vector Vx (1402) and the voltage vector Vy (1406) vectors. For the voltage vector Vx (1402) and the voltage vector Vy (1346), the tx and ty periods should be calculated. After the calculation is performed, depending on the state variables to be selected, the relevant keys on each phase in the multi-level converter are switched on and the voltage levels of the capacitors are applied to the AC output ends of the multi-level inverter. The periods of the A phase (1001 ), B phase (1002), C phase (1003) output voltages shown in Figure 10 are directly related to the calculated tx and ty periods. The effect of tx and ty periods on the output voltages is shown with half of the application time of the U2 Vx voltage vector (1014), half of the application time of the ty/ 2 Vy voltage vector (1015), half of the application time of the ty/2 Vy voltage vector (1018), half of the application time of the tx/2 Vx (1019). The tz zero vector effect is shown as one quarter of the application period of the zero voltage vector tz/4 (1013), tz/4 (1016), tz/4 (1017), tz/4 (1020). Ts is the total period and shown by half of the Ts/2 switching period (1012) and half of the Ts/2 switching period (1021). tz is obtained by removing tx and ty periods from the total period Ts. In case of “2.type.b" triangle is selected, considering the sector in which the reference vector is located from the formulas given in “2.type.b" (as an example, 721 shown in Figure 7) named triangle column in Table 4, in order to determine the residence time of the key elements, the necessary tx and ty vector periods, thus the voltage periods to be applied to the output phases, are calculated.
Finding the reference vector is shown in Figure 12, Figure 13 and Figure 14 for the first sector (1212, 1312, 1412), however, it will be the same for the remaining sectors. Figure 12, Figure 13 and Figure 14 should be rotated sixty degrees counter-clockwise, so the offset vectors also rotate sixty degrees based on this rotation. For the voltage vector Vx (1202, 1302,1402) and the voltage vector Vy (1206,1306,1406) the tx and ty periods should be obtained by using the triangles where the starting points of the vectors shown with the resultant vectors (1207, 1307, 1407) for Vx and Vy voltage vectors. For each lower triangle, the calculation for tz, which is the zero vector after tx and ty values are obtained, is provided by (Formula 18). Ts corresponds to the switching period of the multi-level converter. When tx, ty, tz values, lower triangle number and state variables corresponding to their corners are determined, for the switching elements in the multi-level inverter, appropriate switching periods and switching sequence are selected.
Figure imgf000040_0001
All calculations are calculated by the multi-level space vector controller (101) in Figure 1. The capacitor voltage balance block structure (104) may or may not be included in the multi-level space vector controller (101 ). The multi-level space vector controller (101 ) may include digital signal processor, microcontroller, microprocessor, FPGA (Field programmable gate array), digital logic circuits, CPLD (complex programmable logic device, analogue circuits (operational amplifier, comparator, operational conductivity amplifier), resistor and capacitor structures with passive electronic elements. It may include all, one or some of the structures mentioned.
With a five-level diode clamped converter simulation where a new generalized space vector modulation method operates for multi-level converters is shown. In this simulation, there is an operation in the linear modulation region. In the simulation, five-level phase voltages were obtained with an output period of 20ms.
The five-level space vector diagram is given in Figure 15. It is considered that the reference voltage vector (1502) rotates in its circular orbit (1501). This circle, in sector 1 (1503), passes through the number 7 lower triangle (1509) in sector 1, the number 6 lower triangle (1510) in sector 1, the number 12 lower triangle (1511) in sector 1, the number 11 lower triangle (1512) in sector 1, the number 15 lower triangle (1513) in sector 1, the number 14 lower triangle (1514) in sector 1, the number 16 lower triangle (1515) in sector 1. The triangles through which the circle passes are shown in sector 2, 3, 4, 5 and 6. In Figure 16, the result of the triangle finding algorithm shown in the invention and summarized in Table 1 is shown. The results obtained coincide with the reference vector origin indicated in Figure 15. In Figure 17, the phase voltages obtained by the simulation result of the five-level converter operating in the linear modulation region by using the "Space Vector Modulation Method for Use in Multi-Level Converters" provided with this invention are given. The A phase output voltage is shown with (1701 ), the B phase output voltage with (1702) and the phase C output voltage with (1703).
Operation in case of over modulation is shown in Figure 18. The reference vector Vref is shown with (1802) and rotates in its circular orbit (1801). This circular orbit (1801) extends beyond the multi-level space vector diagram. One of the triangles in which the end point of the reference voltage vector, which is in the over modulation state, can be located is indicated by (1805) (1.state triangle). Another of the triangles in which the reference voltage vector, which is in the over modulation state, can be located may be the lower triangles extending beyond the space vector diagram indicated by (1806) (2.state triangle). In case of over modulation, the reference voltage vector (1802) needs to be reformed so that it does not extend beyond the space vector diagram. The reformed Reference voltage vector (Vref ') is reshaped as (1804) and the Reference voltage vector (Vref ') starts to rotate in its orbit (1803). Considering this new orbit, vector periods are calculated. In the case of over modulation, the position of the original vector Vref (1802) is important during being pulled into the space vector diagram to reform the reformed Reference voltage vector (Vref ') (1804) shown in Figure 18 (1804). Which of the triangles outside of the space vector diagram (1805 or 1806) is inside the reference voltage vector (1802), which is in the over modulation state, may be determined according to whether the "lower triangular deviation value for over modulation operation" of the difference value obtained in the second step (2702) or the third steps (2703) is odd or even. If this difference value is odd, the lower triangle (1805) in which the Vref reference vector is located (1.state triangle for over modulation operation), if the difference value is even, the lower triangle in which the Vref reference vector is located (1806) (2.state triangle for over modulation operation) are selected. The new orbit of the Vref' new reference vector is determined. Depending on this position, the lower triangle that will enter into the multi-level space vector diagram of Vref (1804) and the period of transmission of the switching elements are determined.
Considering the space vector diagram of a 5-level converter for over modulation, how to reform the reference vector in case of over modulation is shown in Figure 19, Figure 20 and Figure 21. This reformation process can be applied in the multi-level space vector diagram, regardless of the number of levels.
In Figure 19, the reference voltage vector Vref (1901), which is in the over modulation state, corresponds to the triangle of the 1.state over modulation state (1805) shown by one of the triangles (1908) in which the reference voltage vector in the over modulation state can be located. This equilateral triangle is one-to-one conjugate with the lower triangles in the multi- level space vector diagram. When the reference voltage vector Vref (1901), which is in the over modulation state, is reformed, Vref shown with the reformed reference voltage vector (1902) is obtained, and the lower triangle into which the reformed reference voltage vector is pulled becomes the lower triangle shown by (1907). This lower triangle number is (first_triangle [lint]) if (s-2) = lint for Sector 1 and Sector 4, if not it is (first_triangle[lint+1]-1), (first_triangle[llint]> if (s-2) = Ilint for Sector 2 and Sector 5, if not, (first_triangle[ IIint+1]-1), (first_triangle[lllint]> if (s-2) = IIlint for Sector 3 and Sector 6, if not (first_triangle[lIIint+1]-1). The determined triangle numbers are also the last lower triangle number of the line determined with lint for Sector 1 and Sector 4, the last triangle number of the line determined with llint for Sector 2 and Sector 5, the last triangle number of the line determined with lllintfor Sector 3 and Sector 6. For the second embodiment of the invention mentioned above, (first_triangle [IIint]) if (s-2) = IIint for Sector 1 and Sector 4, if not it is (first_triangle[llint+1]-1), (f irst_triangle[l I lint]) if (s-2) = lllint for Sector 2 and Sector 5, if not, (first_triangle[lllint+1]-1), (f irst_triang le[ lint]) if (s-2) = lint for Sector 3 and Sector 6, if not (first_triangle[lint+1]-1). The determined triangle numbers are also the last lower triangle number of the line determined with llintfor Sector 1 and Sector 4, the last triangle number of the line determined with IIlint for Sector 2 and Sector 5, the last triangle number of the line determined with lintfor Sector 3 and Sector 6.
The reformed reference voltage vector Vref’ (1902) is formed by using the vector shown with (1903) and the resultant vector (1904) for Vx’ (1906) and Vy’ (1905) voltage vectors. It provides to determine the state variables suitable for the selection of starting point switching elements of the resultant vector (1904) of Vx’ and Vy’ voltage vectors. The period of Vy’ vector is equal to the switching period defined with ty’ and Vx’ vector period tx' total Ts. The zero vector is removed and thus tx is equal to zero. The formulas to be used to calculate sector- based of the ty’ and tx‘ periods during the reformation of Vref reference vector corresponding to (1805) triangle, one of the triangles in which the reference voltage vector, which is in the 1.state over modulation state in the over modulation operation, can be located. The reference voltage vector (2001 , 2101), which is in the over modulation state in Figure 20 and Figure 21 , corresponds to the (1806) triangle from the 2.state over modulation state triangles shown with one of the triangles (2009, 2109) in which the reference voltage vector in the over modulation state can be located. While the reference voltage vector Vref (2001, 2101) in the over modulation state located in the 2.state (1806) triangle in the over modulation operation is being reformed as the reference vector Vref’, tx and ty values need to be compared to determine the lower triangle. Two cases that will occur as a result of comparing are analysed below. In the basic embodiment of the invention, if ty is greater than tx or equal, the 2.state.a in the over modulation operation occurs. When the reference voltage value Vref (2001 ) in the over modulation state is reformed, the reformed reference voltage vector Vref’ (2002) is obtained and it becomes the last triangle shown with the lower triangle (2007) where the reformed reference voltage vector is pulled inside. This lower triangle number is (first_triangle [lint]) if (s-2) = lint for Sector 1 and Sector 4, if not it is (first_triangle[lint+1]-1), (first_triangle[llint]) if (s-
2) = IIint for Sector 2 and Sector 5, if not, (first Jriangle[llint+1]-1), (first_triangle[lllint]) if (s-2) = IIlint for Sector 3 and Sector 6, if not (first_triangle[lllint+1]-1). The determined triangle numbers are also the last lower triangle number of the line determined with lint for Sector 1 and Sector 4, the last triangle number of the line determined with IIint for Sector 2 and Sector 5, the last triangle number of the line determined with lllint for Sector 3 and Sector 6.
In the second embodiment of the invention, if ty is greater than tx or equal, the 2.state.a in the over modulation operation occurs. When the reference voltage value Vref (2001 ) in the over modulation state is reformed, the reformed reference voltage vector Vref' (2002) is obtained and it becomes the last triangle shown with the lower triangle (2007) where the reformed reference voltage vector is pulled inside. This lower triangle number is (first_triangle [llint]-1> for Sector 1 and Sector 4, (first_triangle[lllint]-1) Sector 2 and Sector 5, (first_triangle[lint])-1 for Sector 3 and Sector 6. The determined triangle numbers are also the last lower triangle number of the line determined with (llint-1 ) for Sector 1 and Sector 4, the last triangle number of the line determined with (lllint-1 ) for Sector 2 and Sector 5, the last triangle number of the line determined with (lint-1) for Sector 3 and Sector 6.
The reformed reference voltage vector Vref’ (2002) is formed by using the vector shown with (2003) and the resultant vector (2004) for Vx’ (2006) and Vy’ (2005) voltage vectors. It provides to determine the state variables suitable for the selection of starting point switching elements of the resultant vector (2004) of Vx’ and Vy’ voltage vectors. The period of Vy’ vector is equal to the switching period defined with ty’ and Vx’ vector period tx‘ total Ts. The zero vector is removed and thus tz is equal to zero. The formulas to be used to calculate sector- based of the ty’ and tx‘ periods during the reformation of Vref reference vector corresponding to (1806) triangle, one of the triangles in which the reference voltage vector, which is in the 2.state.a over modulation state in the over modulation operation, can be located are shown in Table 6.
In the basic embodiment of the invention, if tx is greater than ty or equal, the 2.state.b in the over modulation operation occurs. When the reference voltage value Vref (2101) in the over modulation state is reformed, the reformed reference voltage vector Vref’ (2102) is obtained and it becomes the last triangle shown with the lower triangle (2107) where the reformed reference voltage vector is pulled inside. This lower triangle number is (first_triangle [lint]-1) for Sector 1 and Sector 4, (first_triangle[llint]-1) Sector 2 and Sector 5, (first_triangle[lllint])-1 for Sector 3 and Sector 6. The determined triangle numbers are also the last lower triangle number of the line determined with (lint-1 ) for Sector 1 and Sector 4, the last triangle number of the line determined with (llint-1 ) for Sector 2 and Sector 5, the last triangle number of the line determined with (lllint-1 ) for Sector 3 and Sector 6.
In the second embodiment of the invention, if t, is greater than ty or equal, the 2.state.b in the over modulation operation occurs. When the reference voltage value Vref (2101) in the over modulation state is reformed, the reformed reference voltage vector Vref’ (2102) is obtained and it becomes the last triangle shown with the lower triangle (2107) where the reformed reference voltage vector is pulled inside. This lower triangle number is (first_triangle [llint]) if (s-2) = IIint for Sector 1 and Sector 4, if not it is (first_triangle[llint+1]-1), (first_triangle[ IIlint]) if (s-2) = IIlint for Sector 2 and Sector 5, if not, (first_triangle[l llint+1 ]-1 ), (first_triangle[lint]> if (s-2) = lint for Sector 3 and Sector 6, if not (first_triangle[lint+1]-1). The determined triangle numbers are also the last lower triangle number of the line determined with (IIint) for Sector 1 and Sector 4, the last triangle number of the line determined with (IIlint) for Sector 2 and Sector 5, the last triangle number of the line determined with (lint) for Sector 3 and Sector 6. The reformed reference voltage vector Vref’ (2102) is formed by using the vector shown with (2103) and the resultant vector (2104) for Vx’ (2106) and Vy’ (2105) voltage vectors. It provides to determine the state variables suitable for the selection of starting point switching elements of the resultant vector (2104) of Vx’ and Vy’ voltage vectors. The period of Vy’ vector is equal to the switching period defined with ty’ and Vx’ vector period tx‘ total Ts. The zero vector is removed and thus tz is equal to zero. The formulas to be used to calculate sector- based of the ty and tx‘ periods during the reformation of Vref reference vector corresponding to (1806) triangle, one of the triangles in which the reference voltage vector, which is in the 2.state.b over modulation state in the over modulation operation, can be located are shown in Table 7.
For the reference voltage vector Vref (1901 , 2001) in over modulation state, shown in Figure 19 and Figure 20, Sector 1 is shown for the switching sequence of A phase (2201), B phase
(2202) and C phase (2203) outputs. A similar method is used for other sectors. Considering Figure 22, (4).Vdc/(4), (4).Vdc/(4), (4).Vdc/(4), (4).Vdc/(4) are applied to the phase A (2201) output. 2.Vdc/(4), 3.Vdc/(4), 3.Vdc/(4), 2.Vdc/(4) are applied to the phase B (2202) output. 0.Vdc/(4), 0.Vdc/(4), 0.Vdc/(4), 0.Vdc/(4) are applied to the phase C (2203) output.
For the reference voltage vector Vref (2101) in over modulation state, shown in Figure 21 , Sector 1 is shown for the switching sequence of A phase (2201), B phase (2202) and C phase (2203) outputs. A similar method is used for other sectors. Considering Figure 22, (4).Vdc/(4) (2206) , (4).Vdc/(4), (4).Vdc/(4), (4).Vdc/(4) are applied to the phase A (2201) output. 1.Vdc/(4), 2.Vdc/(4), 2.Vdc/(4), 1.Vdc/(4)are applied to the phase B (2202) output. 0.Vdc/(4), 0.Vdc/(4), 0.Vdc/(4), 0.Vdc/(4) are applied to the phase C (2203) output.
It is shown with the five-level diode clamped converter simulation where a new generalized space vector modulation method for the multi-level converters operates. In this simulation, there is an operation in the over modulation region. In the simulation, five-level phase voltages were obtained in such a way that an output period was 20ms.
In Figure 23, the five-level space vector diagram is given. It is considered that the reference voltage vector (2302) rotates in it circular orbit in the reference voltage vector orbit (2301). The orbit of the reference voltage vector (2302) is reconstructed so that it is pulled into the space vector diagram. Accordingly, the new reference voltage vector (2304) pulled into the space vector diagram rotates in the orbit (2303) of the new reference voltage vector pulled into the space vector diagram. This orbit passes through the (2309) in Sector 1 , the number 7 lower triangle (2305) in Sector 1 , the number 12 lower triangle (2306) in Sector 1 , the number 15 lower triangle (2307) in Sector 1 , the number 16 triangle (2308) in Sector 1. For the other triangles, it passes through the relevant triangles as can be seen similarly in Figure
23. In Figure 24, the result of the triangle finding algorithm for operation in the over modulation region. The results obtained coincide with the reference vector orbit indicated in Figure 23. In Figure 25, the phase voltages obtained by the simulation result of the five-level converter operating in the over modulation region by using "A Space Vector Modulation Method for Use in Multi-Level Converters" provided with this invention are given. The phase A is shown with the output voltage (2501), the phase B with the output voltage (2502) and the phase C with the output voltage (2503).
There is an illustration of the method steps of the generalized space vector modulation algorithm for the multi-level converters developed in the present invention below. These steps are listed as follows. During these processes, the number of levels of the multi-level inverter to be designed was determined. The balance/unbalance of the voltages of the capacitors (108, 109, 110, 111 , 112) shown in Figure 1 was determined by the capacitor voltage balance block structure (104). i) In the first stage, it is determined by using the first lower triangle number (Formula 1) in each level of the multi-level space vector diagram. In Figure 5, the lower triangles are shown with m1 (513), m2 (514) . ms-2 (515) and ms-1 (516). The values obtained are written on a sequence. The first element of the sequence is always "1". Unless the value "s", which is the level number of the designed multi-level converter, needs to be changed, it is sufficient to calculate the first triangle numbers only once. ii) Values indicated by I', II' and III' are calculated by using (Formula 4), (Formula 5), (Formula 6), (Formula 7), (Formula 8), (Formula 9), (Formula 10) and (Formula 11). These values will be used in determining which sector the reference vector is in the multi-level space vector diagram, both in calculating the offset value during the finding of the lower triangle and in calculating the residence time of the key elements. iii) It is determined in which sector the reference vector is located in the space vector diagram (503, 504, 505, 506, 507, 508 in Figure 5), considering Vβ value and II' and III' values are positive or negative. This determination process is performed by taking the steps determined in Figure 26 into consideration. iv) Integer components of I', II' and III' values calculated in "ii)" step are determined. This is shown by the formulas (Formula 12), (Formula 13) and (Formula 14). v) After determining which sector the reference vector is located in the space vector diagram, it is determined in which lower triangle the reference vector end is in the relevant sector. For this purpose, first, an offset value must be calculated and then this offset value must be added to the value calculated with the formula (Formula 1) at the beginning of each line. In the basic embodiment, necessary formulas are given in Table 1 to obtain the lower triangle number by using the offset number and the first triangle value. In the second embodiment, the necessary formulas are given in Table 1.1 to obtain the lower triangle number by using the offset number and the first triangle value. vi) Whether the reference vector end point is in the hexagon forming the space vector diagram or not, therefore whether the converter operates in the linear modulation region or in the over modulation region are determined within the instructions given in Figure 27. If there is an operation in the linear modulation region, it is passed to step “vii)". If there is an operation in the over-modulation region, it is passed to step "xi)". vii) When it is determined that the converter operates in the linear modulation region, depending on whether the offset value obtained in v) is even or odd, the triangle named as "1.type" (1103) or "2.type" (1104) in Figure 11 are selected. If the offset value is an even number, the triangle “1.type" (1103) is selected and it is passed to step “viii)". If the offset value is an odd number, then "2.type" (1104) triangle is selected and it is passed to step "ix)". viii) If the "1.type" triangle is selected, from the formulas given in the column named "1.type" (719 shown in Figure 7 as an example) in Table 4, considering the sector in which the reference vector is located, the tx and ty vector periods required to determine the residence time of the key elements, therefore the voltage periods to be applied to the output phases, are calculated. The state variables to be selected directly determine the voltage level to be applied to the output and play an important role in balancing the capacitor voltages (108, 109, 110, 111, 112). ix) If the “2.type" triangle is selected, the state components that will be most effective in balancing the capacitor voltages (108, 109, 110, 111 , 112) must be selected. "2.type" triangles are divided into "2.type.a" (720 shown in Figure 7 as an example) and "2.type.b" (721 shown in Figure 7 as an example). In order to obtain the output phase voltages by using these triangles, the zero vector varies depending on the change of the starting points. For "2.type.a", for example, it starts from 710 in 720 shown in Figure 7 and for "2.type.b" from 716 in 721 shown in Figure 7. After the decision is made for "2.type.a" or "2.type.b", the residence period of the key elements in the transmission is determined. If the "2.type.a" triangle is selected, from the formulas given in the column named "2.type.a" (720 shown in Figure 7 as an example) in Table 4, considering the sector in which the reference vector is located, the tx and ty vector periods required to determine the residence time of the key elements, therefore the voltage periods to be applied to the output phases, are calculated. If the "2.type.b" triangle is selected, from the formulas given in the line named "2.type.b" (721 shown in Figure 7 as an example) in Table 4, considering the sector in which the reference vector is located, the tx and ty vector periods required to determine the residence time of the key elements, therefore the voltage periods to be applied to the output phases, are calculated.
Table 4
Figure imgf000048_0001
x) After calculating t, and ty times, Ts is calculated by subtracting the calculated values from a period value, tz, zero vector period is calculated. In order to obtain the phase output voltages, the required key element periods are calculated. The residence time of the key elements in the transmission depending on the t,, ty and tz periods are applied to the multi-level converter (103) with the level number "s" shown in Figure 1 , with the multi-level space vector controller (101). xi) In the case of operation in the over modulation region, the reference vector orbit (1803) is reformed such that the orbit (1801) of the reference vector remains within the space vector modulation. Depending on the original (1801) position of the reference vector (1908, 2009, 2109), it is determined which "1.type" lower triangle will be selected in the new orbit. According to this result, in the over modulation operation, the over modulation state “1.state", “2.state.a", “2.state.b" is determined. The transmission periods of the switching elements are determined by calculating the tx and ty periods of the Vx' (1906, 2006, 2106) and Vy' (1905, 2005, 2105) vector components of the new created Vref 'vector. Zero vectors are not available for the over modulation state, thus tz is equal to zero. In Table-5, Table-6 and Table-7, calculation of tx' and ty' periods is shown.
Table 5
Figure imgf000049_0001
Figure imgf000050_0001
Table 6
Figure imgf000050_0002
Figure imgf000051_0001
Table 7
Figure imgf000051_0002
Figure imgf000052_0001
The scope of protection of the invention is specified in the attached claims and it cannot be limited to descriptions above in this detailed description for the purpose of example. It is clear that a person skilled in the art can present similar embodiments in the light of the above descriptions, without departing from the main idea of the invention.
REFERENCE NUMBERS GIVEN IN FIGURES
100 Multi-level converter circuit
101 Multi-level space vector modulation controller
102 Reference voltage vector source
103 Capacitor voltage balance determiner
104 Multi-level Converter
105 AC end
106 Output line
107 DC end
108, 109, 110, 111, 112 DC line capacitor
113 Capacitor connection point
114 Positive DC line
115 Negative DC line
116 Capacitor end point 15 Sector
150 Lower triangle
151 First triangle
152 First edge
153 Second edge
200 representative view of the single phase arm of the three-phase diode clamped multi-level converter
300 representative view of single phase arm of three-phase capacitor/condenser clamped multi-level converter
400 representative view of a single phase arm of a three-phase cascade connected H-bridge type multi-level converter
500 Multi-level Space Vector Diagram
501 “β" axis of two axis αβ coordinate system
502 “a" axis, “A" axis and “x" axis of two axis αβ coordinate system
503 Sector 1
504 Sector 2
505 Sector 3
506 Sector 4
507 Sector 5
508 Sector 6
509 last lower triangle in sector 1 in line 2
510 “x" axis in sector 1 511 "y" axis in sector 1
512 Space vector diagram state variables
513 first lower triangle in sector 1 in line 1
514 first lower triangle in sector 1 in line 2
515 first lower triangle in sector 1 in line (s-2)
516 first lower triangle in sector 1 in line (s-1)
517 last lower triangle in sector 1 in line 1
518 last lower triangle in sector 1 in line (s-2)
519 lower triangle in which reference voltage vector end is located in sector 1
520 Vα component
521 Vβ component
522 Reference voltage vector
523 component of reference voltage vector in x axis in Sector 1
524 component of reference voltage vector in y axis in Sector 1
525 side length of space vector diagram
526 origin of reference voltage vector for operation example in linear modulation region
527 origin of reference voltage vector for operation example in border of linear modulation region
528 circular origin
533 first line for sector 1 in basic embodiment
534 first line for sector 2 in basic embodiment
535 first line for sector 3 in basic embodiment
536 first line for sector 4 in basic embodiment
537 first line for sector 5 in basic embodiment
538 first line for sector 6 in basic embodiment
539 first line for sector 1 in second embodiment
540 first line for sector 2 in second embodiment
541 first line for sector 3 in second embodiment
542 first line for sector 4 in second embodiment
543 first line for sector 5 in second embodiment
544 first line for sector 6 in second embodiment
600 Multi-level Space Vector Diagram
601 Multi-level Space Vector Diagram for Sector 1
602 Multi-level Space Vector Diagram for Sector 2
603 Multi-level Space Vector Diagram for Sector 3
604 Multi-level Space Vector Diagram for Sector 4 605 Multi-level Space Vector Diagram for Sector 5
606 Multi-level Space Vector Diagram for Sector 6
607, 608, 609, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, state variables
624 1. Type lower triangle
6252. Type lower triangle
626 A axis in three-phase coordinate system
627 B axis in three-phase coordinate system
628 C axis in three-phase coordinate system
700 selection of state variables for 1. Type and 2. Type lower triangles
701 first step in selection of state variable selection for 1. Type triangles
702 second step in selection of state variable selection for 1. Type triangles
703 third step in selection of state variable selection for 1. Type triangles
704 first state variable selected for 1. Type triangles
705 second state variable selected for 1. Type triangles
706 third state variable selected for 1. Type triangles
707 first step in selection of state variable for 2.type.a triangles
708 second step in selection of state variable for 2.type.a triangles
709 third step in selection of state variable for 2.type.a triangles
710 first state variable selected for 2.type.a triangles
711 second state variable selected for 2.type.a triangles
712 third state variable selected for 2.type.a triangles
713 first step in selection of state variable for 2.type.b triangles
714 second step in selection of state variable for 2.type.b triangles
715 third step in selection of state variable for 2.type.b triangles
716 first state variable selected for 2.type.b triangles
717 second state variable selected for 2.type.b triangles
718 third state variable selected for 2.type.b triangles
719 1. Type triangle
7202.Type.a triangle
721 2.Type.b triangle
800 presentation of output phase order based on selection of 1.type triangle sate variables for sector 1
801 A phase
802 B phase
803 C phase
804 zero voltage vector state variable 805 Vx voltage vector state variable
806 Vy voltage vector state variable
807 zero voltage vector state variable
808 zero voltage vector state variable
809 Vy voltage vector state variable
810 Vx voltage vector state variable
811 zero voltage vector state variable
812 half of switching period
813 one quarter of zero voltage vector application period
814 half of Vx voltage vector application period
815 half of Vy voltage vector application period
816 one quarter of zero voltage vector application period
817 one quarter of zero voltage vector application period
818 half of Vy voltage vector application period
819 half of Vx voltage vector application period
820 one quarter of zero voltage vector application period
821 half of switching period
900 representation of output phase order based on selection of 2.type.a triangle state variables is Sector 1
901 A phase
902 B phase
903 C phase
904 state variable showing zero voltage vector
905 state variable showing Vx voltage vector
906 state variable showing Vy voltage vector
907 state variable showing zero voltage vector
908 state variable showing zero voltage vector
909 state variable showing Vy voltage vector
910 state variable showing Vx voltage vector
911 state variable showing zero voltage vector
912 half of switching period
913 one quarter of zero voltage vector application period
914 Half of Vx voltage vector application period
915 Half of Vy voltage vector application period
916 One quarter of zero voltage vector application period
917 One quarter of zero voltage vector application period
918 Half of Vy voltage vector application period 919 Half of Vx voltage vector application period
920 One quarter of zero voltage vector application period
921 Half of switching period
1000 representation of output phase order based on selection of 2.type.b triangle state variables is Sector 1
1001 A phase
1002 B phase
1003 C phase
1004 State variable showing zero voltage vector
1005 State variable showing Vx voltage vector
1006 State variable showing Vy voltage vector
1007 State variable showing zero voltage vector
1008 State variable showing zero voltage vector
1009 State variable showing Vy voltage vector
1010 State variable showing Vx voltage vector
1011 State variable showing zero voltage vector
1012 half period
1013 One quarter of zero voltage vector application period
1014 Half of Vx voltage vector application period
1015 Half of Vy voltage vector application period
1016 One quarter of zero voltage vector application period
1017 One quarter of zero voltage vector application period
1018 Half of Vy voltage vector application period
1019 Half of Vx voltage vector application period
1020 One quarter of zero voltage vector application period
1021 Half of switching period
1100 Sector 1 of four-level converter space vector diagram
1101 "β" axis of two axis αβ coordinate system
1102 Vβ
1103 1.type lower triangle
11042.type lower triangle
1105 Vα
1106 reference voltage vector Vref
1107 “a" axis of two axis αβ coordinate system
1108 Sector 1 in four-level converter space vector diagram
1200 formation of reference voltage vector in "1.type” triangle
1201 reference voltage vector 1202 Vx voltage vector
1205 vector used to form reference voltage vector
1206 Vy voltage vector
1207 resultant vector for Vx and Vy voltage vectors
1214 starting state variable to be selected when 1.type triangle is used to form reference voltage vector
1300 formation of reference voltage vector in "2.type.a” triangle
1301 reference voltage vector
1302 Vx voltage vector
1305 vector used to form reference voltage vector
1306 Vy voltage vector
1307 resultant vector for Vx and Vy voltage vectors
1314 starting state variable to be selected when 1.type triangle is used to form reference voltage vector
1400 formation of reference voltage vector in "2.type.b” triangle
1401 reference voltage vector
1402 Vx voltage vector
1405 vector used to form reference voltage vector
1406 Vy voltage vector
1407 resultant vector for Vx and Vy voltage vectors
1414 starting state variable to be selected when 1.type triangle is used to form reference voltage vector
1500 lower triangles through which an orbit of a reference voltage vector passes in 5- level space vector diagram operating in linear region
1501 Orbit of reference voltage vector
1502 Reference voltage vector
1503 Sector 1
1509 lower triangle number 7 in Sector 1
1510 lower triangle number 6 in Sector 1
1511 lower triangle number 12 in Sector 1
1512 lower triangle number 11 in Sector 1
1513 lower triangle number 15 in Sector 1
1514 lower triangle number 14 in Sector 1
1515 lower triangle number 16 in Sector 1
1504 Sector 2
1516 lower triangle number 7 in Sector 2
1517 lower triangle number 6 in Sector 2 1518 lower triangle number 12 in Sector 2
1519 lower triangle number 11 in Sector 2
1520 lower triangle number 15 in Sector 2
1521 lower triangle number 14 in Sector 2
1522 lower triangle number 16 in Sector 2
1505 Sector 3
1523 lower triangle number 7 in Sector 3
1524 lower triangle number 6 in Sector 3
1525 lower triangle number 12 in Sector 3
1526 lower triangle number 11 in Sector 3
1527 lower triangle number 15 in Sector 3
1528 lower triangle number 14 in Sector 3
1529 lower triangle number 16 in Sector 3
1506 Sector 4
1530 lower triangle number 7 in Sector 4
1531 lower triangle number 6 in Sector 4
1532 lower triangle number 12 in Sector 4
1533 lower triangle number 11 in Sector 4
1534 lower triangle number 15 in Sector 4
1535 lower triangle number 14 in Sector 4
1536 lower triangle number 16 in Sector 4
1507 Sector 5
1537 lower triangle number 7 in Sector 5
1538 lower triangle number 6 in Sector 5
1539 lower triangle number 12 in Sector 5
1540 lower triangle number 11 in Sector 5
1541 lower triangle number 15 in Sector 5
1542 lower triangle number 14 in Sector 5
1543 lower triangle number 16 in Sector 5
1508 Sector 6
1544 lower triangle number 7 in Sector 6
1545 lower triangle number 6 in Sector 6
1546 lower triangle number 12 in Sector 6
1547 lower triangle number 11 in Sector 6
1548 lower triangle number 15 in Sector 6
1549 lower triangle number 14 in Sector 6 1550 lower triangle number 16 in Sector 6
1600 calculation results of lower triangles through which an orbit of a reference vector passes in 5-level space vector diagram operating in linear modulation region
1601 Sector 1
1607 lower triangle number 7 in Sector 1
1608 lower triangle number 6 in Sector 1
1609 lower triangle number 12 in Sector 1
1610 lower triangle number 11 in Sector 1
1611 lower triangle number 15 in Sector 1
1612 lower triangle number 14 in Sector 1
1613 lower triangle number 16 in Sector 1
1602 Sector 2
1614 lower triangle number 7 in Sector 2
1615 lower triangle number 6 in Sector 2
1616 lower triangle number 12 in Sector 2
1617 lower triangle number 11 in Sector 2
1618 lower triangle number 15 in Sector 2
1619 lower triangle number 14 in Sector 2
1620 lower triangle number 16 in Sector 2
1603 Sector 3
1621 lower triangle number 7 in Sector 3
1622 lower triangle number 6 in Sector 3
1623 lower triangle number 12 in Sector 3
1624 lower triangle number 11 in Sector 3
1625 lower triangle number 15 in Sector 3
1626 lower triangle number 14 in Sector 3
1627 lower triangle number 16 in Sector 3
1604 Sector 4
1628 lower triangle number 7 in Sector 4
1629 lower triangle number 6 in Sector 4
1630 lower triangle number 12 in Sector 4
1631 lower triangle number 11 in Sector 4
1632 lower triangle number 15 in Sector 4
1633 lower triangle number 14 in Sector 4
1634 lower triangle number 16 in Sector 4
1605 Sector 5
1635 lower triangle number 7 in Sector 5 1636 lower triangle number 6 in Sector 5
1637 lower triangle number 12 in Sector 5
1638 lower triangle number 11 in Sector 5
1639 lower triangle number 15 in Sector 5
1640 lower triangle number 14 in Sector 5
1641 lower triangle number 16 in Sector 5 1606 Sector 6
1642 lower triangle number 7 in Sector 6
1643 lower triangle number 6 in Sector 6
1644 lower triangle number 12 in Sector 6
1645 lower triangle number 11 in Sector 6
1646 lower triangle number 15 in Sector 6
1647 lower triangle number 14 in Sector 6
1648 lower triangle number 16 in Sector 6
1700 three-phase output voltages obtained with application of the invention depending on a reference vector diagram in 5-level space vector diagram operating in linear modulation region
1701 A phase output voltage
1702 B phase output voltage
1703 C phase output voltage
1800 determining orbit of reference voltage vector again in over modulation state
1801 Reference voltage vector (Vref)
1802 Reference voltage vector (Vref) orbit
1803 Reference voltage vector (Vref) orbit
1804 Reformed Reference voltage vector (Vref’)
1805 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
1806 another of the triangles in which reference voltage vector, which is in over modulation state, can be located
1900 first of the states where reference voltage vector rotating in over modulation state can be reformed
1901 reference voltage vector Vref in over modulation state
1902 reformed reference voltage vector Vref’
1903 vector used to form reference voltage vector
1904 resultant vector for Vx and Vy
1905 Vx voltage vector
1906 Vy voltage vector 1907 lower triangle in which reformed reference vector is pulled
1908 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
1909 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
2000 second of the states where reference voltage vector rotating in over modulation state can be reformed
2001 reference voltage vector Vref in over modulation state
2002 reformed reference voltage vector Vref'
2003 vector used to form reference voltage vector
2004 resultant vector for Vx and Vy
2005 Vx voltage vector
2006 Vy voltage vector
2007 lower triangle in which reformed reference vector is pulled
2008 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
2009 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
2100 third of the states where reference voltage vector rotating in over modulation state can be reformed
2101 reference voltage vector Vref in over modulation state
2102 reformed reference voltage vector Vref'
2103 vector used to form reference voltage vector
2104 resultant vector for Vx and Vy
2105 Vx voltage vector
2106 Vy voltage vector
2107 lower triangle in which reformed reference vector is pulled
2108 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
2109 one of the triangles in which reference voltage vector, which is in over modulation state, can be located
2200 representation of output order depending on selection of state variable for Sector 1 in over modulation state
2201 A phase
2202 B phase
2203 C phase
2204 Half of switching period 2205 Half of switching period
2206 Half of Vx voltage vector application period
2207 Half of Vy voltage vector application period
2208 Half of Vy voltage vector application period
2209 Half of Vx voltage vector application period
2300 through which an orbit of a reference vector diagram passes in 5-level space vector diagram operating in over modulation region
2301 orbit of reference voltage vector
2302 reference voltage vector
2303 orbit of new reference voltage vector pulled into space vector diagram
2304 new reference voltage vector pulled into space vector diagram
2305 lower triangle number 7 in Sector 1
2306 lower triangle number 12 in Sector 1
2307 lower triangle number 15 in Sector 1
2308 lower triangle number 16 in Sector 1
2309 Sector 1
2310 Sector 2
2311 lower triangle number 7 in Sector 2
2312 lower triangle number 12 in Sector 2
2313 lower triangle number 15 in Sector 2
2314 lower triangle number 16 in Sector 2
2315 Sector 3
2316 lower triangle number 7 in Sector 3
2317 lower triangle number 12 in Sector 3
2318 lower triangle number 15 in Sector 3
2319 lower triangle number 16 in Sector 3
2320 Sector 4
2321 lower triangle number 7 in Sector 4
2322 lower triangle number 12 in Sector 4
2323 lower triangle number 15 in Sector 4
2324 lower triangle number 16 in Sector 4
2325 Sector 5
2326 lower triangle number 7 in Sector 5
2327 lower triangle number 12 in Sector 5
2328 lower triangle number 15 in Sector 5
2329 lower triangle number 16 in Sector 5
2330 Sector 6 2331 lower triangle number 7 in Sector 6
2332 lower triangle number 12 in Sector 6
2333 lower triangle number 15 in Sector 6
2334 lower triangle number 16 in Sector 6
2400 calculation results of lower triangles through which an orbit of a reference voltage vector passes in 5-level space vector diagram operating in over modulation region
2401 Sector 1
2407 lower triangle number 7 in Sector 1
2408 lower triangle number 12 in Sector 1
2409 lower triangle number 15 in Sector 1
2410 lower triangle number 16 in Sector 1
2402 Sector 2
2411 lower triangle number 7 in Sector 2
2412 lower triangle number 12 in Sector 2
2413 lower triangle number 15 in Sector 2
2414 lower triangle number 16 in Sector 2
2403 Sector 3
2415 lower triangle number 7 in Sector 3
2416 lower triangle number 12 in Sector 3
2417 lower triangle number 15 in Sector 3
2418 lower triangle number 16 in Sector 3
2404 Sector 4
2419 lower triangle number 7 in Sector 4
2420 lower triangle number 12 in Sector 4
2421 lower triangle number 15 in Sector 4
2422 lower triangle number 16 in Sector 4
2405 Sector 5
2423 lower triangle number 7 in Sector 5
2424 lower triangle number 12 in Sector 5
2425 lower triangle number 15 in Sector 5
2426 lower triangle number 16 in Sector 5
2406 Sector 6
2427 lower triangle number 7 in Sector 6
2428 lower triangle number 12 in Sector 6
2429 lower triangle number 15 in Sector 6
2430 lower triangle number 16 in Sector 6 2500 three-phase output voltages obtained with application of the invention depending on a reference voltage vector in 5-Level space vector diagram operating in over modulation region
2501 A phase output voltage
2502 B phase output voltage
2503 C phase output voltage
2501 A phase output voltage
2502 B phase output voltage
2503 C phase output voltage
2601 First state
2602 Second state
2603 Sector 1 selection
2604 Third state
2605 Sector 2 selection
2606 Sector 3 selection
2607 Fourth state
2608 Sector 6 selection
2609 Fifth state
2610 Sector 4 selection step
2611 Sector 5 selection
2701 First step
2702 Second step
2703 Third step
2704 Fourth step
2705 Fifth step

Claims

1. A method performed by a multi-level space vector modulation controller (100) of a system comprising one multi-level space vector modulation controller (100) in connection with a multi-level converter (300) controlling said multi-level converter (300) to perform space vector modulation according to its position in a space vector diagram (500) comprising six sectors (15) in the form of an equilateral hexagon whose center is the center of α-β space vector space center in the two- axis α-β (alpha-beta) coincident with the origin of said coordinate system and in the form of equilateral triangle and lower triangles (150) in equilateral triangle structure provided within said sectors (15) of a multi-level converter (300) with level number "s" provided between an AC end and a DC end, a rotating reference voltage vector (522) in a three-axial A.B.C three-phase coordinate system, wherein; it comprises the following steps: each sector (15) of the space vector diagram (500) is assigned a reference pointer and a sector guide recorded in a memory unit, the number 1 is assigned for each sector (15) to a first lower triangle (151) whose comer is directly connected to the origin and each lower triangle (150) is given numbers so that the other lower triangles (150) are assigned successive values starting from said first lower triangle (151) following the number 1 in a first direction parallel to a first edge directly connected with the first lower triangle (151), and increasing consecutive values and a lower triangle guide recorded in said memory unit is accessed, Vα and Vβ are the components of said reference voltage vector (522) and Vdc is the total voltage value applied to the multi-level converter,
Figure imgf000066_0001
a II 'and a III' values are calculated from the above equations and it is determined in which sector (15) the reference voltage vector (15) is located in the space vector diagram, considering that the Vβ component value and the II' and III' values are positive or negative,
Figure imgf000067_0001
a value I’ is determined from one of the equations. integer components of I’, II’ and III’ values are determines as lint, IIint, IIlint, a first_triangular[x] refers to a sequence in which each line in the sector is ordered according to the increasing numbers of the first triangles that directly contact with said first edge, for sector 1 and 4 triangle number= first_triangle [lint]+ IIlint + IIint - lint, for sector 2 and 5 triangle number= first_triangle [IIint]+ IIlint + lint - IIint, for sector 3 and 6 triangle number= first_triangle [lllint]+ IIint + lint - IIlint, by using the above equations, the number assigned to the lower triangle (150) in which the reference voltage vector (522) is located, is determined.
2. A method according to claim 1 , wherein; it comprises the following steps to determine whether the inverter operates in the linear modulation region or the over modulation region,
- it is determined whether lint value for sector 1 and sector 4, IIint value for sector 2 and sector 5, IIlint value for sector 3 and sector 6 are equal to (s-2) value or not, if equal, a deviation value different from first_triangle[lint] number for sector 1 and 4, first_triangle[llint] number for sector 2 and 5, first_triangle[lllint] number for sector 3 and 6 of a number assigned to the determined lower triangle is determined, if not equal, a deviation value different from first_triangle[lint+1]-1)] number for sector 1 and 4, first_triangle[llint+1 ]-1 )] number for sector 2 and 5, first_triangle[lllint+1 ]-1 )] number for sector 3 and 6 of the number assigned to the determined lower triangle is determined, over modulation if the deviation number is a positive integer and the state of the linear modulation if it is zero or negative integer are determined.
3. A method according to claim 2, wherein; it comprises the following steps:
- the lower triangle type is determined as type 1 or type 2 depending on the first_triangle [lint], the first_triangle [IIint] and the first_triangle [IIlint] are double or single or not according to the sector where the reference voltage vector is located if there is an operation in the linear modulation region,
- Ts is the total period considering the sector where the reference voltage value is located in case of the lower triangle type is determined as type 1 ,
Figure imgf000068_0001
according to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated.
4. A method according to claim 3, wherein; it comprises the following steps: in case the "2.type” triangle is selected, "2.type” triangle, "2.type.a” or "2.type.b” is determined,
- if the type of the lower triangle is determined as the 2.type.a, considering the sector in which the reference voltage vector is in, Ts is the total period,
Figure imgf000069_0001
according to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated, if the type of the lower triangle is determined as the 2.type.b, considering the sector in which the reference voltage vector is in, Ts is the total period,
Figure imgf000069_0002
according to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated for the linear modulation state, it is calculated as tz=Ts-tx-ty.
5. A method according to claim 2, wherein; it comprises the following steps:
- when an operation in the over modulation region is determined, the reference vector is re-placed in the vector diagram so that the end of the reference vector is within the space vector diagram boundaries of the orbit rotating around the origin,
- if the deviation value determined is odd, the state 1 triangle is determined, if it is double, the state 2 triangle is determined,
- depending on the initial position of the reference vector, it is determined which type of "1.type" lower triangle will be selected to place the end of the reference voltage vector in the new orbit,
- in case of determining the state 1 triangle, the V and ty' periods of the Vx' and Vy' vectors are calculated using the following equations,
Figure imgf000070_0001
Figure imgf000071_0001
in case of determining the state 2 triangle, tx and ty periods are compared and if ty‘ is greater than tx', the 2.state.a triangle is selected, in case of determining the triangle 2.state.a, tx' and ty' periods of Vx' and Vy' vectors are calculated by using the following equations:
Figure imgf000072_0001
Figure imgf000073_0001
in case of determining the state 2 triangle, ty and tx periods are compared, and if tx is greater than ty, 2.state.b triangle is selected, if the triangle 2.state.b is determined, tx’ and ty’ periods of the Vx' and Vy’ vectors are calculated by using the following equations:
Figure imgf000073_0002
Figure imgf000074_0001
for the over modulation state, tz is equal to zero, depending on the sector in which the reference vector is located in the space vector diagram and depending on the lower triangle type in which the reference vector end point is located, the key element periods required for the formation of phase voltages are calculated and applied to the multi-level converter (103).
6. A method performed by a multi-level space vector modulation controller (100) of a system comprising one multi-level space vector modulation controller (100) in connection with a multi-level converter (300) controlling said multi-level converter (300) to perform space vector modulation according to its position in a space vector diagram (500) comprising six sectors (15) in the form of an equilateral hexagon whose center is the center of α-β space vector space center in the two- axis α-β (alpha-beta) coincident with the origin of said coordinate system and in the form of equilateral triangle and lower triangles (150) in equilateral triangle structure provided within said sectors (15) of a multi-level converter (300) with level number "s" provided between an AC end and a DC end, a rotating reference voltage vector (522) in a three-axial A.B.C three-phase coordinate system, wherein; it comprises the following steps: each sector (15) of the space vector diagram (500) is assigned a reference pointer and a sector guide recorded in a memory unit, the number 1 is assigned for each sector (15) to a first lower triangle (151) whose comer is directly connected to the origin and each lower triangle (150) is given numbers so that the other lower triangles (150) are assigned successive values starting from said first lower triangle (151) following the number 1 in a first direction parallel to a first edge directly connected with the first lower triangle (151), and increasing consecutive values and a lower triangle guide recorded in said memory unit is accessed, Vα and Vβ are the components of said reference voltage vector (522) and V* is the total voltage value applied to the multi-level converter,
Figure imgf000075_0001
a II 'and a III' values are calculated from the above equations and it is determined in which sector the reference voltage vector is located in the space vector diagram, considering that the Vβ component value and the II' and III' values are positive or negative,
Figure imgf000075_0002
a value I’ is determined from one of the equations. integer components of I’, II’ and III’ values are determines as lint, IIint, IIlint, - it refers to the sequence in which each line in the sector is ordered according to the increasing number of triangles that directly contact with said first edge for sector 1 and 4 triangle number= first_triangle [llint]+ IIlint + lint - IIint, for sector 2 and 5 triangle number= first_triangle [lllint]+ lint + lint - 11 lint, for sector 3 and 6 triangle number= first_triangle [lint]+ IIint + lint - lint, by using the above equations, the number assigned to the lower triangle in which the reference voltage vector end is located, is determined.
7. A method according to claim 6, wherein; it comprises the following steps to determine whether the converter operates in the linear modulation region or the over modulation region,
- it is determined whether IIint value for sector 1 and sector 4, I IIint value for sector 2 and sector 5, lint value for sector 3 and sector 6 are equal to (s-2) value or not,
- if equal, a deviation value different from first_triangle[llint] number for sector 1 and 4, first Jriangle[lllint] number for sector 2 and 5, first_triangle[lint] number for sector 3 and 6 of a number assigned to the determined lower triangle is determined,
- if not equal, a deviation value different from first_triangle[llint+1]-1)] number for sector 1 and 4, first_triangle[lllint+1]-1)] number for sector 2 and 5, first_triangle[lint+1]-1)] number for sector 3 and 6 of the number assigned to the determined lower triangle is determined,
- over modulation if the deviation number is a positive integer and the state of the linear modulation if it is zero or negative integer are determined.
8. A method according to claim 7, wherein; it comprises the following steps:
- the lower triangle type is determined as type 1 or type 2 depending on the first_triangle [lint], the first_triangle [IIint] and the first_triangle [lllint] are double or single or not according to the sector where the reference voltage vector is located if there is an operation in the linear modulation region,
- Ts is the total period considering the sector where the reference voltage value is located in case of the lower triangle type is determined as type 1 ,
Figure imgf000077_0001
according to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated.
9. A method according to claim 8, wherein; it comprises the following steps: in case the "2.type” triangle is selected, "2.type” triangle, "2.type.a” or "2.type.b” is determined,
- if the type of the lower triangle is determined as the 2.type.a, considering the sector in which the reference voltage vector is in, Ts is the total period,
Figure imgf000077_0002
Figure imgf000078_0001
according to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated, if the type of the lower triangle is determined as the 2.type.b, considering the sector in which the reference voltage vector is in, Ts is the total period,
Figure imgf000078_0002
according to the formulas above, the period of transmission of key elements is determined, the tx and ty vector periods of the vectors Vx and Vy, which are the closest vectors to the lower triangle where the reference voltage vector is located, are calculated for the linear modulation state, it is calculated as tz=Ts-tx-ty.
10. A method according to claim 7, wherein; it comprises the following steps:
- when an operation in the over modulation region is determined, the reference vector is re-placed in the vector diagram so that the end of the reference vector is within the space vector diagram boundaries of the orbit rotating around the origin,
- if the deviation value determined is odd, the state 1 triangle is determined, if it is double, the state 2 triangle is determined, depending on the initial position of the reference vector, it is determined which type of "1.type" lower triangle will be selected to place the end of the reference voltage vector in the new orbit, in case of determining the state 1 triangle, the t,' and ty' periods of the Vx' and Vy' vectors are calculated using the following equations,
Figure imgf000079_0001
Figure imgf000080_0001
in case of determining the state 2 triangle, tx and ty periods are compared and if ty is greater than tx', the 2.state.a triangle is selected, in case of determining the triangle 2.state.a, tx' and ty' periods of Vx' and Vy' vectors are calculated by using the following equations:
Figure imgf000080_0002
Figure imgf000081_0001
in case of determining the state 2 triangle, ty and tx periods are compared, and if tx is greater than ty, 2.state.b triangle is selected, if the triangle 2.state.b is determined, tx’ and ty’ periods of the Vx' and Vy’ vectors are calculated by using the following equations:
Figure imgf000082_0001
for the over modulation state, tz is equal to zero, depending on the sector in which the reference vector is located in the space vector diagram and depending on the lower triangle type in which the reference vector end point is located, the key element periods required for the formation of phase voltages are calculated and applied to the multi-level converter (103).
PCT/TR2020/051318 2020-03-13 2020-12-17 A new space vector modulation method for multi-level converters WO2021183077A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP20923987.0A EP4118492A4 (en) 2020-03-13 2020-12-17 A new space vector modulation method for multi-level converters

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TR2020/03888 2020-03-13
TR2020/03888A TR202003888A1 (en) 2020-03-13 2020-03-13 A NEW METHOD OF SPACE VECTOR MODULATION FOR MULTI-LEVEL CONVERTERS

Publications (1)

Publication Number Publication Date
WO2021183077A1 true WO2021183077A1 (en) 2021-09-16

Family

ID=77670769

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/TR2020/051318 WO2021183077A1 (en) 2020-03-13 2020-12-17 A new space vector modulation method for multi-level converters

Country Status (3)

Country Link
EP (1) EP4118492A4 (en)
TR (1) TR202003888A1 (en)
WO (1) WO2021183077A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114039361A (en) * 2021-11-10 2022-02-11 特变电工西安电气科技有限公司 Three-level SVPWM algorithm suitable for high-power static var generator
CN116155125A (en) * 2023-04-19 2023-05-23 湖南大学 Intermittent space vector modulation method of three-phase five-level inverter
CN117424477A (en) * 2023-12-19 2024-01-19 江苏国传电气有限公司 Asymmetric double-vector prediction control method, device and system for three-level inverter

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101291118A (en) 2008-06-10 2008-10-22 株洲南车时代电气股份有限公司 Positioning method and device for space vector of voltage with multiple levels
US7558089B2 (en) 2005-12-13 2009-07-07 Advanced Energy Conversion, Llc Method and apparatus for space vector modulation in multi-level inverters
CN102355137A (en) * 2011-10-01 2012-02-15 徐州中矿大传动与自动化有限公司 Equivalent space vector carrier modulation multilevel converter control method
US20140016382A1 (en) * 2012-07-12 2014-01-16 Koon Hoo Teo Space Vector Modulation for Multilevel Inverters
US9559610B2 (en) 2014-10-01 2017-01-31 Mitsubishi Electric Research Laboratories, Inc. Method to generate multilevel inverter modulation control signals
ES2733738A1 (en) * 2019-09-26 2019-12-02 Univ Madrid Politecnica METHOD AND SYSTEM FOR PREDICTIVE CONTROL OF A DC/AC CONVERTER (Machine-translation by Google Translate, not legally binding)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8934276B2 (en) * 2012-08-16 2015-01-13 Mitsubishi Electric Research Laboratories, Inc. DC-link voltage balancing control for multilevel inverters

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7558089B2 (en) 2005-12-13 2009-07-07 Advanced Energy Conversion, Llc Method and apparatus for space vector modulation in multi-level inverters
CN101291118A (en) 2008-06-10 2008-10-22 株洲南车时代电气股份有限公司 Positioning method and device for space vector of voltage with multiple levels
CN102355137A (en) * 2011-10-01 2012-02-15 徐州中矿大传动与自动化有限公司 Equivalent space vector carrier modulation multilevel converter control method
US20140016382A1 (en) * 2012-07-12 2014-01-16 Koon Hoo Teo Space Vector Modulation for Multilevel Inverters
US8976556B2 (en) 2012-07-12 2015-03-10 Mitsubishi Electric Research Laboratories, Inc. Space vector modulation for multilevel inverters
US9559610B2 (en) 2014-10-01 2017-01-31 Mitsubishi Electric Research Laboratories, Inc. Method to generate multilevel inverter modulation control signals
ES2733738A1 (en) * 2019-09-26 2019-12-02 Univ Madrid Politecnica METHOD AND SYSTEM FOR PREDICTIVE CONTROL OF A DC/AC CONVERTER (Machine-translation by Google Translate, not legally binding)

Non-Patent Citations (24)

* Cited by examiner, † Cited by third party
Title
ALONSO, O.MARROYO, L.SANCHIS, P.: "A Generalized Methodology to Calculate Switching Periods and Regions in SVPWM Modulation of Multilevel Converters", EUROPEAN POWER ELECTRON. AND DRIVES ASSOC., August 2001 (2001-08-01), pages 1 - 8
CELANOVIC, N.BOROYEVICH, D.: "A Fast Space-Vector Modulation Algorithm for Multilevel Three Phase Converters", IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, vol. 37, no. 2, 2001, pages 637 - 641, XP011022932
GUPTA, A.K.KHAMBADKONE, A.M.: "A Space Vector PWM Scheme for Multilevel Inverters Based on Two-Level Vector PWM", IEEE TRANSACTIONS ON INDUSTRIAL APPLICATIONS, vol. 53, no. 5, 2006, pages 1631 - 1639, XP011149367, DOI: 10.1109/TIE.2006.881989
HAN, Y.FAN, X.ZHAO, Z.: "A New Flux Observer Based on Voltage Reconstruction for Three-Level DTC Inverter", POWER ELECTRONICS AND DRIVE SYSTEMS (PEDS), SINGAPORE, 5-8 DECEMBER 2011, 2011, pages 72 - 76, XP032112331, DOI: 10.1109/PEDS.2011.6147226
HOLTZ, J.HOLTGEN, M.KRAH, J.O.: "A Space Vector Modulator for the High-Switching Frequency Control of Three-Level SiC Inverters", IEEE TRANSACTIONS ON POWER ELECTRONICS, vol. 29, no. 5, 2013, pages 2618 - 2626, XP011536965, DOI: 10.1109/TPEL.2013.2280768
HOU,X., LI,Y.LIU,L.: "A novel general space vector modulation algorithm for multilevel inverter based on imaginary coordination", THE FIFTH INTERNATIONAL CONFERENCE ON POWER ELECTRONICS AND DRIVE SYSTEMS, 2003. PEDS 2003, 17-20 NOVEMBER 2003, 2003, pages 392 - 396, XP010695131, DOI: 10.1109/PEDS.2003.1282870
HU, L.WANG, H.DENG Y.HE, X.N.: "A Simple SVPWM Algorithm for Multilevel Inverters", IEEE 35TH ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE (PESC 04), 20-25 JUNE 2004, AACHEN, 2004, pages 3476 - 3480
LALILI,D.LOURCI,N.BERKOUK,E.M.BOUDJEMA,F.PETZOLDT,J.DALI,M.Y.: "A simplified space vector pulse width modulation algorithm for five level diode clamping inverter", INTERNATIONAL SYMPOSIUM ON POWER ELECTRONICS, ELECTRICAL DRIVES, AUTOMATION AND MOTION, 2006. SPEEDAM 2006, 23-26 MAY 2006, TAORMINA, 2006, pages 21 - 26
LAUTTAMUS,P.TUUSA,H.: "Unified Space-Vector Modulation Scheme for Multilevel Inverters", 2007 POWER CONVERSION CONFERENCE - NAGOYA, 2-5 APRIL 2007, NAGOYA, 2007, pages 1464 - 1471, XP031178657, DOI: 10.1109/PCCON.2007.373157
MOHAMED,A.S.A.GOPINATH, ABAIJU,M.R.: "A Simple Space Vector PWM Formation Scheme for Any General n-Level Inverter", IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, vol. 56, no. 5, 2009, pages 1649 - 1656, XP011249679
SABAH,V.S.BABY,T.C.LALL,K.P.BALAMURUNGAN,M.SAHOO,S.K.CHITRA,A.KARTHIKEYAN,P.RAGLEND,I.J.: "A simplified space vector pulse width modulation technique for multilevel inverter fed induction motor drive", 2015 INTERNATIONAL CONFERENCE ON CIRCUITS, POWER AND COMPUTING TECHNOLOGIES, 19-20 MARCH 2015, 2015
See also references of EP4118492A4
SEO, J.H.CHOI, C.H.HYUN, D.S.: "A New Simplified Space-Vector PWM Method for Three-level Inverters", IEEE TRANSACTIONS ON POWER ELECTRONICS, vol. 4, no. 16, 2001, pages 545 - 550
SHINY, G.BAIJU,M.R.: "A fractal based space vector PWM scheme for general n- level inverters", THE 2010 INTERNATIONAL POWER ELECTRONICS CONFERENCE - ECCE ASIA -, 21-24 JUNE 2010, SAPPORO, JAPAN, 2010, pages 847 - 854, XP031728516
SHU, Z.DING, N.CHEN, J.ZHU, H.HE, X.: "Multilevel SVPWM with DC-Link Capacitor voltage Balancing Control for Diode-Clamped Multilevel Converter Based STATCOM", IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, vol. 5, no. 60, 2013, pages 1884 - 1896
SHU, Z.TANG, J.LIAN, J.: "An Efficient SVPWM Algorithm with Low Computational Overhead for Three-Phase Inverters", IEEE TRANSACTIONS ON POWER ELECTRONICS, vol. 22, no. 5, 2007, pages 1797 - 1805, XP011191733, DOI: 10.1109/TPEL.2007.904228
SONG, Q.LIU, W.YAN, G.CHEN, Y.: "DSP-Based Universal Space Vector Modulator for Multilevel Voltage-source Inverters", THE 29TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY (IECON'03), ROANOKE, 2-6 NOVEMBER 2003, 2003, pages 1727 - 1732, XP010691223, DOI: 10.1109/IECON.2003.1280318
TRABELSI, M.BEN-BRAHMIN, L.YOKOYAMA, T.KAWAMURA, AKUROSAWA, R.YOSHINO T.: "An Improved SVPWM Method for Multilevel Inverters", 15TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE (EPE/PEMC), 4-6 SEPTEMBER 2012, NOVI SAD, 2012, pages 1 - 7
WAN, Y.JIANG J.: "The Study of FPGA-based Three-Level SVM NPC Inverter", IEEE 6TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE IPEMC '09, 17-20 MAY 2009, WUHAN, 2009, pages 1470 - 1474, XP031535340, DOI: 10.1109/IPEMC.2009.5157618
WEI,S.WU,B.CHEUNG,R.: "A novel SVM algorithm for reducing oscillations in cascaded H-bridge multilevel inverters", IECON'03. 29TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY (IEEE CAT. NO.03CH37468), 2-6 NOVEMBER 2003, ROANOKE, 2003
WEI,S.WU,B.LI, F.LIU,C.: "A general space vector PWM control algorithm for multilevel inverters", EIGHTEENTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, 9-13 FEBRUARY 2003, MIAMI BEACH, 2003, pages 562 - 568, XP010631564, DOI: 10.1109/APEC.2003.1179268
YANG, R.WANG, G.YU, Y: "A Fast Generalized Multilevel Voltage SVPWM Algorithm Based on Voltage Decomposition", 5TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS (ICIEA), 15-17 JUNE 2010, TAICHUNG, 2010, pages 1220 - 1224, XP031712290
YAO,W.HU,H.LU,Z.: "Comparisons of Space-Vector Modulation and Carrier-Based Modulation of Multilevel Inverter", IEEE TRANSACTIONS ON POWER ELECTRONICS, vol. 23, no. 1, 2008, pages 45 - 51, XP011198650, DOI: 10.1109/TPEL.2007.911865
ZHU, R.WU, X.TANG, Y.: "Duty Cycle-Based Three-Level Space-Vector Pulse-Width-Modulation with Over modulation and Neutral-Point Balancing Capabilities for Three-Phase Neutral-Point Clamped Inverters", IET POWER ELECTRONICS, vol. 10, no. 8, 2015, pages 1931 - 1940

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114039361A (en) * 2021-11-10 2022-02-11 特变电工西安电气科技有限公司 Three-level SVPWM algorithm suitable for high-power static var generator
CN116155125A (en) * 2023-04-19 2023-05-23 湖南大学 Intermittent space vector modulation method of three-phase five-level inverter
CN116155125B (en) * 2023-04-19 2023-07-28 湖南大学 Intermittent space vector modulation method of three-phase five-level inverter
CN117424477A (en) * 2023-12-19 2024-01-19 江苏国传电气有限公司 Asymmetric double-vector prediction control method, device and system for three-level inverter
CN117424477B (en) * 2023-12-19 2024-03-12 江苏国传电气有限公司 Asymmetric double-vector prediction control method, device and system for three-level inverter

Also Published As

Publication number Publication date
EP4118492A1 (en) 2023-01-18
TR202003888A1 (en) 2021-09-21
EP4118492A4 (en) 2023-08-02

Similar Documents

Publication Publication Date Title
EP4118492A1 (en) A new space vector modulation method for multi-level converters
Lee et al. An improved finite-set model predictive control based on discrete space vector modulation methods for grid-connected three-level voltage source inverter
Gupta et al. A space vector PWM scheme for multilevel inverters based on two-level space vector PWM
Xiang et al. Improved virtual space vector modulation for three-level neutral-point-clamped converter with feedback of neutral-point voltage
Gupta et al. A general space vector PWM algorithm for multilevel inverters, including operation in overmodulation range
JP6465782B2 (en) Method for generating a space vector modulated signal
JP6786017B1 (en) Power converter
EP2740209A1 (en) Method for balancing capacitors in an inverter description
Trabelsi et al. An improved SVPWM method for multilevel inverters
EP0652633A2 (en) Power conversion system and control device therefor
McKenzie Eliminating harmonics in a cascaded H-bridges multilevel inverter using resultant theory, symmetric polynomials, and power sums
Gupta et al. A two-level inverter based SVPWM algorithm for a multilevel inverter
Fan et al. Comparison of three different 2-D space vector PWM algorithms and their FPGA implementations
Hu et al. A simple SVPWM algorithm for multilevel inverters
Palanisamy et al. A comparative analysis of hysteresis current control SVM and 3D-SVM for 3-level NPC inverter
Woldegiorgis et al. A new DC-link capacitor voltage balancing method for three-level SVM strategies based on two-level space vector diagram
Jones et al. A five-phase multilevel space-vector PWM algorithm for a dual-inverter supplied drive
Vaezi et al. A new space vector modulation technique for reducing switching losses in induction motor DTC-SVM scheme
Poonia et al. Space phasor based improved hysteresis current controller for shunt active power filter using 3-level inverter
Massoud et al. Systematic analytical-based generalised algorithm for multilevel space vector modulation with a fixed execution time
Hamdi et al. Space vector pulse width modulation of multilevel inverters: A new method for selecting the appropriate small hexagon
Chen Multiphase pulse-width modulation considering reference order for sinusoidal wave production
Woldegiorgis et al. Simplified Space Vector Modulation Strategy for Three-level Inverters
CN115133798A (en) Discrete space vector modulation three-level inverter low common mode prediction control method
Sadigh et al. Topologies and control strategies of multilevel converters

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20923987

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2020923987

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2020923987

Country of ref document: EP

Effective date: 20221013

NENP Non-entry into the national phase

Ref country code: DE