WO2021172085A1 - Substrate processing method and substrate processing apparatus - Google Patents

Substrate processing method and substrate processing apparatus Download PDF

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Publication number
WO2021172085A1
WO2021172085A1 PCT/JP2021/005609 JP2021005609W WO2021172085A1 WO 2021172085 A1 WO2021172085 A1 WO 2021172085A1 JP 2021005609 W JP2021005609 W JP 2021005609W WO 2021172085 A1 WO2021172085 A1 WO 2021172085A1
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Prior art keywords
substrate
wafer
peripheral
layer
crack
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PCT/JP2021/005609
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French (fr)
Japanese (ja)
Inventor
隼斗 田之上
陽平 山下
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東京エレクトロン株式会社
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Publication of WO2021172085A1 publication Critical patent/WO2021172085A1/en

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/50—Working by transmitting the laser beam through or within the workpiece
    • B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping

Definitions

  • This disclosure relates to a substrate processing method and a substrate processing apparatus.
  • Patent Document 1 describes a processing apparatus for a polymerized substrate in which a first substrate and a second substrate are joined, and is inside the first substrate along a boundary between a peripheral portion and a central portion to be removed. It is disclosed that a peripheral surface modification layer extending in the thickness direction and an internal surface modification layer extending from the central portion to the peripheral edge portion along the surface direction of the first substrate are formed. According to the processing apparatus described in Patent Document 1, the peripheral edge portion of the first substrate is removed along the peripheral modified layer formed inside the first substrate and the internal surface modified layer, and the peripheral portion is removed. The back surface side of the first substrate is separated (thinning of the first substrate).
  • the technique according to the present disclosure appropriately removes the peripheral edge of the substrate and thins the substrate along the modified layer formed inside the substrate.
  • One aspect of the present disclosure is a substrate processing method for processing a substrate, which irradiates a laser beam from the back surface side of the substrate along a boundary between a peripheral portion of the substrate to be removed and a central portion of the substrate.
  • a plurality of the first peripheral modification layers are formed, and the plurality of the first peripheral modification layers are formed from the front side to the back surface inside the substrate from the radial outer side to the inner side of the substrate. They are formed at different height positions so as to face the side.
  • a peripheral portion of a wafer is removed (so-called edge trim) with respect to a semiconductor substrate (hereinafter, simply referred to as a "wafer") in which devices such as a plurality of electronic circuits are formed on the surface.
  • the wafer is separated into a device wafer on the front side and a separated wafer on the back side to be thinned.
  • Edge trimming and thinning of the wafer are performed using, for example, the substrate processing apparatus disclosed in Patent Document 1. That is, by irradiating the inside of the wafer with a laser beam, a peripheral modification layer serving as a base point for removing the peripheral edge portion and an internal surface modifying layer serving as a base point for separating the wafer are formed, and the peripheral surface modifying layer is formed. The peripheral portion is removed from the base point, and the wafer is separated (thinned) from the internal surface modification layer as the base point.
  • Patent Document 1 discloses that by forming the peripheral modification layer and the internal surface modification layer at the same height inside the wafer, the peripheral edge portion of the wafer is removed and the back surface side is separated integrally. ing. According to the description of Patent Document 1, the removed separated wafer is recovered. Since the diameter of the separated wafer to be collected is the same as the diameter of the wafer before separation, the separated wafer can be reused as, for example, a support wafer.
  • peripheral edge portion of the wafer and the separated wafer are integrally removed in this way, as shown in FIG. 1, when the peripheral edge modification layer M'which is the base point for removing the peripheral edge portion W'e is formed, the peripheral edge is formed.
  • the crack C'extending from the modified layer M' may extend to the back surface W'b of the wafer W'.
  • the peripheral edge portion W'e is removed from the separation wafer with the crack C'as the base point, and the removed peripheral edge portion W'e cannot be properly recovered.
  • the separated wafer may not be recovered in a desired shape and cannot be reused.
  • the wafer processing system 1 as a substrate processing apparatus according to the present embodiment, as shown in FIG. 2, as a polymerization substrate in which a first wafer W as a substrate and a second wafer S as another substrate are bonded. Processing is performed on the polymerized wafer T of. Then, in the wafer processing system 1, the peripheral portion We of the first wafer W is removed, and the first wafer W is thinned.
  • the surface on the side to be joined to the second wafer S is referred to as a front surface Wa
  • the surface opposite to the front surface Wa is referred to as a back surface Wb.
  • the surface on the side to be joined to the first wafer W is referred to as the front surface Sa
  • the surface opposite to the front surface Sa is referred to as the back surface Sb.
  • the radial inner side of the peripheral edge portion We as the removal target is referred to as the central portion Wc.
  • the first wafer W is a semiconductor wafer such as a silicon substrate, and a device layer D including a plurality of devices is formed on the surface Wa.
  • a surface film Fw is further formed on the device layer D, and is bonded to the surface film Fs of the second wafer S via the surface film Fw.
  • Examples of the surface film Fw include an oxide film (SiO 2 film, TEOS film), a SiC film, a SiCN film, and an adhesive.
  • the peripheral edge portion We of the first wafer W is chamfered, and the cross section of the peripheral edge portion We becomes thinner toward the tip thereof.
  • peripheral edge portion We is a portion that is removed when the first wafer W is separated, which will be described later, and is, for example, in the range of 0.5 mm to 3 mm in the radial direction from the outer end portion of the first wafer W.
  • the second wafer S is, for example, a wafer that supports the first wafer W.
  • Surface films Fs are formed on the surface Sa of the second wafer S, and the peripheral edge is chamfered.
  • the surface film Fs include an oxide film (SiO 2 film, TEOS film), a SiC film, a SiCN film, and an adhesive.
  • the second wafer S functions as a protective material (support wafer) for protecting the device layer D of the first wafer W.
  • the second wafer S does not have to be a support wafer, and may be a device wafer on which a device layer is formed as in the first wafer W. In such a case, the surface film Fs is formed on the surface Sa of the second wafer S via the device layer.
  • the separated first wafer W on the front surface Wa side is referred to as a device wafer Wd1
  • the separated first wafer W on the back surface Wb side is referred to as a separated wafer Wd2.
  • the device wafer Wd1 refers to the first wafer W in a state of being joined to the second wafer S, and may be referred to as a device wafer Wd1 including the second wafer S.
  • the separated surfaces of the device wafer Wd1 and the separated wafer Wd2 may be referred to as separation surfaces.
  • the wafer processing system 1 has a configuration in which the loading / unloading station 2 and the processing station 3 are integrally connected.
  • a cassette Ct capable of accommodating a plurality of polymerization wafers T, device wafers Wd1, and separation wafers Wd2 is loaded / unloaded from the outside.
  • the processing station 3 is provided with various processing devices that perform desired processing on the polymerized wafer T.
  • the loading / unloading station 2 is provided with a cassette mounting stand 10.
  • a cassette mounting stand 10 In the illustrated example, a plurality of, for example, three cassette Cts can be freely mounted in a row on the cassette mounting table 10 in the Y-axis direction.
  • the number of cassettes Ct mounted on the cassette mounting table 10 is not limited to this embodiment and can be arbitrarily determined.
  • the loading / unloading station 2 is provided with a wafer transfer device 20 adjacent to the cassette mounting table 10 on the X-axis negative direction side of the cassette mounting table 10.
  • the wafer transfer device 20 is configured to be movable on a transfer path 21 extending in the Y-axis direction. Further, the wafer transfer device 20 has, for example, two transfer arms 22 and 22 that hold and transfer the polymerized wafer T.
  • Each transport arm 22 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
  • the configuration of the transport arm 22 is not limited to this embodiment, and any configuration can be adopted.
  • the wafer transfer device 20 is configured to be able to transfer the polymerized wafer T to the cassette Ct of the cassette mounting table 10 and the transition device 30 described later.
  • the loading / unloading station 2 is provided with a transition device 30 for delivering the polymerized wafer T adjacent to the wafer transfer device 20 on the X-axis negative direction side of the wafer transfer device 20.
  • the processing station 3 is provided with, for example, three processing blocks B1 to B3.
  • the first processing block B1, the second processing block B2, and the third processing block B3 are arranged side by side in this order from the positive direction side of the X axis (the loading / unloading station 2 side) to the negative direction side.
  • the first processing block B1 includes an etching device 40 that etches the ground surface of the first wafer W ground by the processing device 80 described later, a cleaning device 41 that cleans the ground surface of the first wafer W, and the like.
  • a wafer transfer device 50 is provided.
  • the etching apparatus 40 and the cleaning apparatus 41 are arranged in a laminated manner. The number and arrangement of the etching apparatus 40 and the cleaning apparatus 41 are not limited to this.
  • the wafer transfer device 50 is arranged, for example, on the Y-axis negative direction side of the etching device 40 and the cleaning device 41.
  • the wafer transfer device 50 has, for example, two transfer arms 51 and 51 that hold and transfer the polymerized wafer T.
  • Each transport arm 51 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
  • the configuration of the transport arm 51 is not limited to this embodiment, and any configuration can be adopted.
  • the wafer transfer device 50 is configured to be able to transfer the polymerized wafer T to the transition device 30, the etching device 40, the cleaning device 41, the interface reformer 60 described later, and the internal reformer 61 described later. There is.
  • the second processing block B2 is provided with an interface reformer 60 as a second reformer, an internal reformer 61 as a reformer, and a wafer transfer device 70.
  • the interface reformer 60 and the internal reformer 61 are arranged in a laminated manner. The number and arrangement of the interface reformer 60 and the internal reformer 61 are not limited to this.
  • the interface reformer 60 as the second reforming portion irradiates the outer peripheral portion of the device layer D of the first wafer W with a laser beam (interfacial laser beam, for example, a CO 2 laser), and serves as a removal target.
  • a laser beam interfacial laser beam, for example, a CO 2 laser
  • the interface between the first wafer W and the device layer D at the peripheral edge We of the first wafer W is modified.
  • an unbonded region Ae in which the bonding strength between the first wafer W and the second wafer S is reduced is formed on the peripheral edge portion We of the first wafer W.
  • the internal reformer 61 as a reforming unit irradiates the inside of the first wafer W with a laser beam (internal laser beam, for example, a YAG laser) to irradiate the peripheral modifying layer M1 and the internal surface modifying layer M2.
  • a laser beam internal laser beam, for example, a YAG laser
  • the peripheral edge modification layer M1 serves as a base point when removing the peripheral edge portion We.
  • the internal surface modification layer M2 serves as a base point when the first wafer W is separated into the device wafer Wd1 and the separation wafer Wd2.
  • the wafer transfer device 70 is arranged, for example, on the Y-axis positive direction side of the interface reformer 60 and the internal reformer 61.
  • the wafer transfer device 70 has, for example, two transfer arms 71 and 71 that attract and hold the polymerized wafer T by a suction holding surface (not shown) and convey it.
  • Each transport arm 71 is supported by an articulated arm member 72, and is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
  • the configuration of the transport arm 71 is not limited to this embodiment, and any configuration can be adopted.
  • the wafer transfer device 70 is configured to be able to transfer the polymerized wafer T to the etching device 40, the cleaning device 41, the interface reformer 60, the internal reformer 61, and the processing device 80 described later.
  • the processing device 80 is provided in the third processing block B3.
  • the processing device 80 has a rotary table 81.
  • the rotary table 81 is rotatably configured around a vertical rotation center line 82 by a rotation mechanism (not shown).
  • Two chucks 83 for sucking and holding the polymerized wafer T are provided on the rotary table 81.
  • the chucks 83 are evenly arranged on the same circumference as the rotary table 81.
  • the two chucks 83 can be moved to the delivery position A0 and the processing position A1 by rotating the rotary table 81.
  • each of the two chucks 83 is configured to be rotatable around a vertical axis by a rotation mechanism (not shown).
  • a grinding unit 84 is arranged at the processing position A1 to grind the first wafer W.
  • the grinding unit 84 has a grinding unit 85 having an annular shape and a rotatable grinding wheel (not shown). Further, the grinding portion 85 is configured to be movable in the vertical direction along the support column 86.
  • the above wafer processing system 1 is provided with a control device 90 as a control unit.
  • the control device 90 is, for example, a computer equipped with a CPU, a memory, or the like, and has a program storage unit (not shown).
  • the program storage unit stores a program that controls the processing of the polymerized wafer T in the wafer processing system 1.
  • the program may be recorded on a computer-readable storage medium H and may be installed on the control device 90 from the storage medium H.
  • the polymerized wafer T is formed in advance in an external bonding device (not shown) of the wafer processing system 1.
  • the thickness direction of the first wafer W may be referred to as "vertical direction”
  • the back surface Wb side of the first wafer W is referred to as “upper”
  • the front surface Wa side is referred to as "lower”.
  • a cassette Ct containing a plurality of polymerized wafers T shown in FIG. 4A is placed on the cassette mounting table 10 of the loading / unloading station 2.
  • the polymerized wafer T in the cassette Ct is taken out by the wafer transfer device 20 and transferred to the transition device 30.
  • the polymerized wafer T transferred to the transition device 30 is subsequently transferred to the interface reformer 60 by the wafer transfer device 50.
  • the interface reformer 60 as shown in FIG. 4B, the interface between the first wafer W and the device layer D is irradiated with a laser beam to reform the interface (step P1 in FIG. 5).
  • step P1 When the interface between the first wafer W and the device layer D is modified in step P1, the bonding strength between the first wafer W and the second wafer S decreases. As a result, at the interface between the first wafer W and the device layer D, the bonding strength is reduced at the bonding region Ac where the first wafer W and the second wafer S are bonded and the radial outside of the bonding region Ac. An unbonded region Ae, which is a region, is formed.
  • the "modification" of the interface in the formation of the unbonded region Ae refers to a process of reducing the bonding strength between the first wafer W and the second wafer S, or eliminating the bonding strength, for example, a laser. It shall include peeling, removal, amorphization, etc. of the interface by irradiation with light.
  • the polymerized wafer T on which the unbonded region Ae is formed is subsequently transferred to the internal reformer 61 by the wafer transfer device 50.
  • the internal reformer 61 as shown in FIGS. 4C and 4D, the peripheral reforming layer M1 and the internal surface reforming layer M2 are sequentially formed inside the first wafer W (FIG. 6). Step P2 and step P3) of step 5.
  • the laser light is periodically irradiated from the laser head (not shown) while rotating the layered wafer T (first wafer W), and the irradiation position of the laser light is set to the first position.
  • Wafer W is moved to the inside in the radial direction and to the back surface Wb side of the first wafer W.
  • the plurality of peripherally modified layers M1 formed inside the first wafer W have higher formation positions toward the inner side in the radial direction of the first wafer W in cross-sectional view. They are formed at different height positions so as to be.
  • the peripheral modification layer M1 is formed in an annular shape concentric with the bonding region Ac (unbonded region Ae).
  • the number of peripheral modification layers M1 formed on the first wafer W is not limited to the illustrated example, and can be arbitrarily determined.
  • the crack C1 (crack) extends toward the Wb side. As shown in FIG. 6, the crack C1 makes the lower end portion reach the front surface Wa of the first wafer W, and the upper end portion does not reach the back surface Wb.
  • the extension length of the crack C1 is determined by the formation interval of the peripheral modification layer M1 and the output of the laser beam, so that the crack C1 does not reach the front surface Wa and the back surface Wb in this way.
  • the formation operation of the peripheral modification layer M1 is controlled.
  • the peripheral edge portion We is removed from the device wafer Wd1 with the peripheral edge modifying layer M1 and the crack C1 as base points.
  • the peripheral edge modifying layer M1 is formed, for example, at an interval at which the cracks C1 extending from the adjacent peripheral edge modifying layer M1 are connected to each other. Further, for example, the formation interval may be controlled so that a part of the adjacent peripheral modification layers M1 overlap each other.
  • the crack C1 extending inside the first wafer W generally tends to easily extend along the crystal orientation of the first wafer W.
  • the crystal orientation of the first wafer W is often spread in the plane direction and the thickness direction of the first wafer W from the viewpoint of molding and processing, so that the peripheral edge is modified as shown in FIG.
  • the crack C1 easily extends in the thickness direction, that is, easily reaches the back surface Wb.
  • the adjacent peripheral modification layers M1 are formed by shifting them in the thickness direction and the radial direction, respectively, in other words, they are formed side by side in the diagonal direction.
  • the extension of the crack C1 is suppressed and the arrival of the crack C1 on the back surface Wb is suppressed as compared with the case where the peripheral modification layers M'are arranged in the thickness direction as in the conventional case.
  • the formation interval of the peripheral modification layer M1 is controlled to the formation interval in which the cracks C1 are connected to each other or the formation interval so that a part of the peripheral modification layer M1 overlaps with each other. Therefore, it is possible to more appropriately prevent the crack C1 from reaching the back surface Wb.
  • the formation position of the peripheral modification layer M1 (1) formed on the outermost radial direction inside the first wafer W was formed by the interface modifier 60. It is determined to be slightly inward in the radial direction from the inner peripheral side end of the unjoined region Ae, that is, the boundary Ad between the joined region Ac and the unjoined region Ae.
  • the boundary Ad is detected, for example, by using an IR camera or the like in the formation result of the unbonded region Ae in the interface reformer 60 or in an alignment device (not shown) provided at an arbitrary position in the wafer processing system 1.
  • the peripheral modification layer M1 is formed at a position overlapping the boundary Ad, but it may be formed so as to be displaced in the radial direction due to, for example, a processing error.
  • the peripheral modification layer M1 is formed radially outside the boundary Ad, that is, in the unbonded region Ae, the first wafer W with respect to the second wafer S after the peripheral edge We is removed. May become floating.
  • the peripheral modification layer M1 can be formed at a position close to the boundary Ad even on the outer side in the direction, and the floating state of the first wafer W is suppressed.
  • the laser head (not shown) is moved to extend the inner surface modification layer in the radial direction of the peripheral modification layer M1 in the surface direction of the first wafer W.
  • Form M2 the laser beam is periodically irradiated from the laser head while rotating the layered wafer T (first wafer W), and the irradiation position of the laser beam is set on the first wafer W. Move inward in the radial direction.
  • the internal surface modification layer M2 is formed on the entire surface of the first wafer W along the surface direction.
  • the radial formation interval of the inner surface modified layer M2 can be arbitrarily determined.
  • cracks C2 extend along the formation direction of the internal surface modification layer M2, that is, along the surface direction of the first wafer W.
  • the separated wafer Wd2 is separated from the device wafer Wd1 with the internal surface modification layer M2 and the crack C2 as base points.
  • the radial outer end of the crack C2 is connected to the upper end of the crack C1, and the cracks C2 extending from the adjacent internal surface modification layers M2 are mutually formed. It is desirable to connect to.
  • the peripheral modification layer M1 is set to the radial inside of the first wafer W and the back surface Wb of the first wafer W while rotating the polymerized wafer T as described above. It is formed by moving it to the side. Further, the internal surface modification layer M2 is formed by moving the irradiation position of the laser beam in the radial direction of the first wafer W while rotating the polymerized wafer T as described above.
  • the formation of the inner surface modified layer M2 is continued to the formation of the peripheral modified layer M1 by stopping the movement of the irradiation position of the laser beam in the thickness direction at the time of forming the peripheral modified layer M1. It is possible to do it continuously. In other words, it is not necessary to stop the irradiation of the laser beam in the transition from the formation of the peripheral modification layer M1 to the formation of the inner surface modification layer M2. Then, by continuously forming the peripheral modification layer M1 and the internal surface modification layer M2 from the outside in the radial direction without stopping the irradiation of the laser beam in this way, the modification layer in the internal modification device 61 is formed. The throughput related to the operation can be greatly improved.
  • the polymerized wafer T on which the internal surface modification layer M2 is formed is then transferred to the processing device 80 by the wafer transfer device 50.
  • the processing apparatus 80 first, when the polymerized wafer T is delivered from the transport arm 71 to the chuck 83, as shown in FIG. 4 (e), the peripheral modification layer M1, the crack C1, the inner surface modification layer M2 and the crack C2
  • the first wafer W is separated into the device wafer Wd1 and the separation wafer Wd2 (step P4 in FIG. 5). At this time, the peripheral portion We of the first wafer W is also removed from the first wafer W together with the separated wafer Wd2.
  • the first wafer W is sucked and held by the suction surface 71a provided on the transport arm 71, and the second wafer S is sucked and held by the chuck 83.
  • the transfer arm 71 is raised while the suction surface 71a sucks and holds the back surface Wb of the first wafer W to separate the first wafer W into the device wafer Wd1 and the separation wafer Wd2.
  • the separation wafer Wd2 and the peripheral edge portion We are integrally separated. That is, the peripheral portion We is removed and the first wafer W is separated (thinned) at the same time.
  • the peripheral modification layers M1 are arranged side by side in the thickness direction of the first wafer W, when the separation wafer Wd2 is lifted upward by the transport arm 71, the separation wafer Wd2 is as shown in FIG. There is a risk of interfering with the corner K of the device wafer Wd1. Then, when the separated wafer Wd2 interferes with the device wafer Wd1 in this way, the corner portion K may be chipped.
  • the adjacent peripheral modification layers M1 are formed so as to be displaced in the thickness direction and the radial direction, respectively, in other words, they are formed side by side in the oblique direction.
  • the corner portion K is not formed on the device wafer Wd1, and it is possible to prevent the device wafer Wd1 and the separated wafer Wd2 from interfering with each other when the separated wafer Wd2 is raised. Since the chipping of the corner portion K is suppressed in this way, the deterioration of the quality of the device wafer as a product is suppressed, and the internal contamination of the wafer processing system 1 by the particles generated by the chipping is suppressed.
  • the separated wafer Wd2 is collected outside the wafer processing system 1, for example. Further, for example, a recovery unit (not shown) may be provided within the movable range of the transport arm 71, and the separated wafer Wd2 may be collected by the recovery unit.
  • the transfer arm 71 is used to separate the first wafer W in the processing apparatus 80, but the wafer processing system 1 is a separation apparatus for separating the first wafer W (FIG. (Not shown) may be provided.
  • the separation device can be arranged so as to be laminated with, for example, the interface reformer 60 and the internal reformer 61. Further, the method for separating the first wafer W can also be arbitrarily determined.
  • the chuck 83 is subsequently moved to the machining position A1 and the grinding unit 84 grinds the separated surface of the device wafer Wd1 as shown in FIG. 4 (f) (FIG. 5). Step P5).
  • the peripheral modification layer M1 and the internal surface modification layer M2 remaining on the separation surface of the device wafer Wd1 are removed, and the device wafer Wd1 is reduced to a desired finish thickness.
  • the polymerized wafer T in which the first wafer W is thinned to a desired thickness in the processing apparatus 80 is conveyed to the cleaning apparatus 41 by the wafer transfer apparatus 70, and the ground surface of the device wafer Wd1 is cleaned in step P6 of FIG. ).
  • the polymerized wafer T is transferred to the etching device 40 by the wafer transfer device 50, and the ground surface of the device wafer Wd1 is wet-etched by the chemical solution (step P7 in FIG. 5).
  • the polymerized wafer T that has been subjected to all the processing is transported to the transition device 30 by the wafer transfer device 50, and further transferred to the cassette Ct of the cassette mounting table 10 by the wafer transfer device 20. In this way, a series of wafer processing in the wafer processing system 1 is completed.
  • the unbonded region Ae is formed by the interface reformer 60 provided inside the wafer processing system 1, but in the unbonded region Ae, the polymerized wafer T is carried into the wafer processing system 1. It may be preformed before it is used. In such a case, the interface reformer 60 may be omitted in the configuration of the wafer processing system 1.
  • the cracks C1 extending from the peripheral modification layer M1 are formed on the first wafer by forming the adjacent peripheral modification layers M1 so as to be arranged in the diagonal direction while shifting in the thickness direction and the radial direction, respectively. Reaching the back surface Wb of W is suppressed. As a result, it is possible to prevent the peripheral edge portion We from being unintentionally peeled from the separated wafer Wd2, and the separated wafer Wd2 can be appropriately reused.
  • the peripheral modification layer M1 and the inner surface modification layer M2 are continuously formed from the radial outside of the first wafer W without stopping the irradiation of the laser beam. Can be done. As a result, the throughput required for the reforming layer forming operation in the internal reformer 61 can be appropriately improved.
  • the corner portion K is not formed at the end of the device wafer Wd1, and the first wafer W is separated.
  • the concentration of stress on the end of the device wafer Wd1 is suppressed.
  • the peripheral modification layers formed in the wafer processing system 1 are formed so as to be arranged in a direction perpendicular to the surface direction of the first wafer W, at least on the surface Wa side of the final finish thickness of the device wafer Wd1. Is preferable.
  • the peripheral modification layers formed inside the first wafer W are formed by arranging the peripheral modification layers in an oblique direction as shown in the above embodiment. It is preferable to have the layer M1 and the second peripheral modification layer M3 formed side by side in the thickness direction of the first wafer W.
  • the first peripheral edge modification layer M1 is formed so as to be arranged diagonally inside the first wafer W as described above, and the upper end portion of the crack C1 extends from the inner surface modification layer M2 to the outer peripheral side end of the crack C2. Connect with the unit. Further, the lower end portion of the crack C1 does not reach the surface Wa of the first wafer W, and is positioned at least above the final finish thickness height G of the device wafer Wd1.
  • the second peripheral modification layer M3 is formed inside the first wafer W so as to be arranged in the thickness direction. Further, it is preferable that the second peripheral edge modification layer M3 is formed slightly inside the boundary Ad between the unbonded region Ae and the bonding region Ac in the radial direction and above the final finish thickness height G of the device wafer Wd1. Further, the crack C3 extending from the second peripheral edge modifying layer M3 in the thickness direction of the first wafer W has the lower end portion reaching the surface Wa of the first wafer W and the upper end portion with the lower end portion of the crack C1. Connecting.
  • the second peripheral modification layers M3 are formed side by side in the thickness direction of the first wafer W, and the second peripheral modification layers M3 are formed above the final finish thickness height G of the device wafer Wd1.
  • the peripheral modification layers M1 and M3 remain on the device wafer Wd1 after the finish grinding process. Is suppressed.
  • the corner portions K are formed on the device wafer Wd1 when the first wafer W is separated. It is suppressed.
  • the crack C3 can easily extend in the thickness direction of the first wafer W, that is, the first wafer can be appropriately extended.
  • the crack C3 can be extended to the surface Wa of W.
  • the peripheral modification layer M1 when forming the peripheral modification layer M1, the laser beam irradiation position is moved at a constant speed in the radial direction and the thickness direction of the first wafer W, as shown in FIG.
  • the peripheral modification layer M1 is arranged in a substantially linear shape in a cross-sectional view, but the arrangement of the peripheral modification layer M1 is not limited to this.
  • the peripheral modification layer M1 may be arranged in a substantially round shape in a cross-sectional view as shown in FIG.
  • the unbonded region Ae is formed at the interface between the first wafer W and the device layer D in the interface reformer 60 provided inside or outside the wafer processing system 1.
  • the unbonded region Ae does not necessarily have to be formed.
  • the peripheral edges of the first wafer W and the second wafer S are chamfered, whereby the chamfering is formed to have a smaller thickness toward the end.
  • the part is formed.
  • the first wafer W and the second wafer S are formed in the chamfered portion. Can be regarded as unjoined.
  • the formation range of the chamfered portion R of the first wafer W and the second wafer S is defined as the unbonded region Ae, in other words, the chamfered portion R is the removal target. It may be regarded as the peripheral edge We of the first wafer W. That is, the inner peripheral side end portion of the chamfered portion R can be regarded as the boundary Ad in the above embodiment, and the peripheral modification layer M1 can be formed slightly radially inside the boundary Ad. Then, in such a case, the lower end portion of the crack C1 extending from the peripheral modification layer M1 is brought to reach the radial inner end portion of the chamfered portion R on the surface Wa side of the first wafer W.
  • peripheral modification layer M1 is formed inside the first wafer W so that the crack C1 reaches the front surface Wa and the back surface Wb of the first wafer W, respectively, as shown in FIG. 11A. good. That is, as shown in FIG. 11B, only the peripheral edge portion We may be removed from the first wafer W with the peripheral edge modifying layer M1 and the crack C1 as base points. The removed peripheral edge We is collected, for example, in a collection unit (not shown).
  • the peripheral edge modification layers M1 are formed in an oblique direction in this way to remove the peripheral edge portion We, as shown in the above embodiment, the corner portion to the first wafer W after the peripheral edge portion We is removed.
  • the formation of K is suppressed, that is, the occurrence of chipping at the corner K of the first wafer W is suppressed.
  • the generation of particles inside the wafer processing system 1 is suppressed, and the quality deterioration of the first wafer W (device wafer Wd1) as a product is suppressed.
  • the processing apparatus 80 grinds the back surface Wb of the first wafer W to the first wafer W.
  • the wafer W of 1 is thinned.
  • the crack C1 is formed in an oblique direction with respect to the surface Wa of the first wafer W, so that the outer edge portion of the first wafer W after grinding may be chipped. It is suppressed.
  • the generation of particles inside the wafer processing system 1 after grinding is suppressed, and the quality deterioration of the first wafer W (device wafer Wd1) as a product is suppressed.
  • the crack C1 is formed in an oblique direction with respect to the surface Wa of the first wafer W. Then, while the crack C1 is being formed in the oblique direction, the direction of the crack C1 may be directed in the direction perpendicular to the surface Wa of the first wafer W. That is, the lower end portion of the crack C1 may be formed in an oblique direction with respect to the front surface Wa, and the upper end portion of the crack C1 may be formed in a direction perpendicular to the back surface Wb.
  • the range formed in which the expansion direction of the crack C1 is directed in the direction perpendicular to the surface Wa of the first wafer W is formed so as to be removed by the subsequent grinding.
  • the positions where the crack C1 faces obliquely with respect to the surface Wa of the first wafer W are the positions of the first wafer W and the second wafer S. It is determined at the inner peripheral side end of the unjoined region Ae. Alternatively, the position may be determined slightly inward in the radial direction with respect to the inner peripheral side end portion of the unjoined region Ae.
  • the unjoined region Ae may be an unjoined region Ae that has been modified as shown in FIG. 6 to reduce the joining strength, or may be a chamfered portion R as shown in FIG. good.
  • peripheral edge portion We when removing only the peripheral edge portion We from the first wafer W with the peripheral edge modifying layer M1 and the crack C1 as the base points, it is preferable to fragment the peripheral edge portion We in the circumferential direction.
  • a method of fragmenting the peripheral edge portion We for example, a plurality of divided and modified layers M4 are formed inside the peripheral edge portion We, and the peripheral edge portion We is fragmented using the plurality of divided and modified layers M4 as a base point.
  • the inside of the first wafer W (peripheral portion We) is irradiated with a laser beam, and as shown in FIGS. 12 and 13, the surface of the first wafer W is surfaced.
  • a plurality of split reformed layers M4 are formed in the direction perpendicular to the direction and along the radial direction of the first wafer W.
  • the split-modifying layer M4 of the line extending in the radial direction is formed at eight locations, but if at least the lines of the split-modifying layer M4 are formed at two locations, the peripheral edge. Part We can be fragmented and removed.
  • the plurality of split reforming layers M4 are formed radially outward from the upper end portion (the portion reaching the back surface Wb) of the crack C1. Further, in the plurality of divided modified layers M4, the lower end portion of the crack C4 extending from the divided modified layer M4, which will be described later, is peripherally modified above the peripheral modified layer M1 and the crack C1 in the thickness direction of the first wafer W. It is formed so as to reach the layer M1 or the crack C1. For example, by controlling the radial distance for irradiating the laser beam corresponding to the thickness position of the first wafer W, the plurality of divided modified layers M4 of the present embodiment are formed. In this case, it is preferable that the lower end portion of the crack C4 does not pass through the peripheral modification layer M1 or the crack C1.
  • the position of the lowermost divided modified layer M4 is not particularly limited.
  • the lowermost split reforming layer M4 is formed above the final finish thickness height G.
  • the crack C4 extends from the split reforming layer M4.
  • the upper end portion of the crack C4 reaches the back surface Wb and the lower end portion reaches the front surface Wa.
  • the upper end portion of the crack C4 reaches the back surface Wb, and the lower end portion reaches the peripheral edge modification layer M1 or the crack C1.
  • the timing of forming the crack C4 is not limited to this embodiment.
  • the crack C4 may reach the back surface Wb not when the split reforming layer M4 is formed by irradiation with a laser beam but when the peripheral edge portion We is removed.
  • the method for removing the peripheral portion We is not particularly limited.
  • the peripheral edge portion We may be adsorbed and held and removed, or the peripheral edge portion We may be impacted to remove the peripheral edge portion We.
  • an insertion member for example, a wedge roller, a blade, or the like
  • a sharp tip may be inserted into the interface between the peripheral edge portion We and the device layer D from the side of the polymerization wafer T.
  • the peripheral edge portion We when the peripheral edge portion We is removed, the peripheral edge portion We is divided into a plurality of parts by the divided modified layer M4 while being separated from the annular peripheral edge modified layer M1 as a base point. Then, the peripheral portion We to be removed is fragmented and can be removed more easily.
  • the split modified layer M4 is formed so that the lower end portion of the crack C4 reaches the peripheral modified layer M1 or the crack C1 above the peripheral modified layer M1 and the crack C1.
  • the split modified layer M4 is formed over a wide area on the radial outer side of the upper end portion of the crack C1. Therefore, the peripheral portion We can be surely fragmented by the split modification layer M4.
  • the position where the split modified layer M4 is formed on the radial side of the peripheral modified layer M1 and the crack C1 is not limited to the above embodiment.
  • the plurality of divided modified layers M4 may be formed further outside the outermost peripheral modified layer M1 in the radial direction of the first wafer W. That is, the plurality of divided modified layers M4 may be formed radially outside the boundary Ad between the unbonded region Ae and the bonded region Ac.
  • the position of the lowermost split reforming layer M4 is not particularly limited, but in the present embodiment, it is above the final finish thickness height G.
  • the crack C4 extending from the split modified layer M4 reaches the front surface Wa and the back surface Wb.
  • the peripheral portion We can be easily removed by fragmenting the peripheral portion We by the split reforming layer M4.
  • the radial distance for irradiating the laser beam may be the same in the thickness direction of the first wafer W, laser processing can be easily performed.
  • the peripheral edge We can be formed even if the modified layer does not exist between the peripheral modified layer M1 and the divided modified layer M4. It can be divided appropriately.
  • the crack C1 was formed in an oblique direction with respect to the surface Wa of the first wafer W, but while the crack C1 was formed in the oblique direction, the crack C1 was formed in the oblique direction.
  • the direction of the crack C1 may be oriented perpendicular to the surface Wa of the first wafer W.
  • the polymerization wafer T includes the device layer D, but may be a polymerization wafer that does not include the device layer D.
  • the peripheral portion of the first wafer W is removed and thinned.
  • the first wafer W may not be bonded to the second wafer S.
  • Wafer processing system 61 Internal reformer 90 Control device W 1st wafer Wa Front surface Wb Back surface Wc Central part Wd Boundary We Peripheral part M1 (1st) Peripheral reforming layer M3 2nd peripheral reforming layer

Abstract

Provided is a substrate processing method for processing a substrate, the method including irradiating a substrate from a back surface side of the substrate with laser light, and forming a plurality of first peripheral reforming layers along a boundary between a peripheral portion of the substrate to be removed and a center portion of the substrate. From a radially outer side to a radially inner side of the substrate, the plurality of first peripheral reforming layers are formed on positions at different heights so as to be directed toward the back surface side from a surface side in the inside of the substrate.

Description

基板処理方法及び基板処理装置Substrate processing method and substrate processing equipment
　本開示は、基板処理方法及び基板処理装置に関する。 This disclosure relates to a substrate processing method and a substrate processing apparatus.
　特許文献１には、第１の基板と第２の基板が接合された重合基板の処理装置であって、第１の基板の内部に、除去対象の周縁部と中央部との境界に沿って厚み方向に延伸する周縁改質層と、第１の基板の面方向に沿って中心部から周縁部に向けて延伸する内部面改質層と、を形成することが開示されている。特許文献１に記載の処理装置によれば、第１の基板の内部に形成された周縁改質層、及び内部面改質層に沿って、当該第１の基板の周縁部の除去、及び当該第１の基板の裏面側の分離（第１の基板の薄化）を行っている。 Patent Document 1 describes a processing apparatus for a polymerized substrate in which a first substrate and a second substrate are joined, and is inside the first substrate along a boundary between a peripheral portion and a central portion to be removed. It is disclosed that a peripheral surface modification layer extending in the thickness direction and an internal surface modification layer extending from the central portion to the peripheral edge portion along the surface direction of the first substrate are formed. According to the processing apparatus described in Patent Document 1, the peripheral edge portion of the first substrate is removed along the peripheral modified layer formed inside the first substrate and the internal surface modified layer, and the peripheral portion is removed. The back surface side of the first substrate is separated (thinning of the first substrate).
国際公開第２０２０／０１７５９９号International Publication No. 2020/017599
　本開示にかかる技術は、基板の内部に形成された改質層に沿って、当該基板の周縁部の除去、及び当該基板の薄化を適切に行う。 The technique according to the present disclosure appropriately removes the peripheral edge of the substrate and thins the substrate along the modified layer formed inside the substrate.
　本開示の一態様は、基板を処理する基板処理方法であって、前記基板の裏面側からレーザ光を照射して、前記基板の除去対象の周縁部と前記基板の中央部の境界に沿って、複数の第１の周縁改質層を形成することを含み、複数の前記第１の周縁改質層は、前記基板の径方向外側から内側に向けて、前記基板の内部における表面側から裏面側へと向かうように、それぞれ異なる高さ位置に形成される。 One aspect of the present disclosure is a substrate processing method for processing a substrate, which irradiates a laser beam from the back surface side of the substrate along a boundary between a peripheral portion of the substrate to be removed and a central portion of the substrate. , A plurality of the first peripheral modification layers are formed, and the plurality of the first peripheral modification layers are formed from the front side to the back surface inside the substrate from the radial outer side to the inner side of the substrate. They are formed at different height positions so as to face the side.
　本開示によれば、基板の内部に形成された改質層に沿って、当該基板の周縁部の除去、及び当該基板の薄化を適切に行うことができる。 According to the present disclosure, it is possible to appropriately remove the peripheral edge of the substrate and thin the substrate along the modified layer formed inside the substrate.
第１のウェハの分離における課題の説明図である。It is explanatory drawing of the problem in the separation of the 1st wafer. 重合ウェハの構成例を示す側面図である。It is a side view which shows the structural example of a polymerization wafer. 本実施形態に係るウェハ処理システムの構成の概略を示す平面図である。It is a top view which shows the outline of the structure of the wafer processing system which concerns on this embodiment. 半導体ウェハ製造工程における主な工程の一例を示す説明図である。It is explanatory drawing which shows an example of the main process in the semiconductor wafer manufacturing process. 半導体ウェハ製造工程における主な工程の一例を示すフロー図である。It is a flow chart which shows an example of the main process in the semiconductor wafer manufacturing process. 第１のウェハの内部における改質層の形成例を示す説明図である。It is explanatory drawing which shows the formation example of the modified layer in the inside of the 1st wafer. 第１のウェハへの改質層の形成例を示す平面図である。It is a top view which shows the example of forming the modified layer on a 1st wafer. 第１のウェハの内部における改質層の他の形成例を示す説明図である。It is explanatory drawing which shows the other formation example of the modified layer in the inside of the 1st wafer. 第１のウェハの内部における改質層の他の形成例を示す説明図である。It is explanatory drawing which shows the other formation example of the modified layer in the inside of the 1st wafer. 重合ウェハの構成例を示す拡大図である。It is an enlarged view which shows the structural example of a polymerization wafer. 第１のウェハの他の分離例を示す説明図である。It is explanatory drawing which shows the other separation example of the 1st wafer. 第１のウェハへの改質層の他の形成例を示す平面図である。It is a top view which shows the other formation example of the modified layer on a 1st wafer. 第１のウェハの内部における改質層の他の形成例を示す説明図である。It is explanatory drawing which shows the other formation example of the modified layer in the inside of the 1st wafer. 第１のウェハの内部における改質層の他の形成例を示す説明図である。It is explanatory drawing which shows the other formation example of the modified layer in the inside of the 1st wafer.
　近年、半導体デバイスの製造工程においては、表面に複数の電子回路等のデバイスが形成された半導体基板（以下、単に「ウェハ」という。）に対し、当該ウェハの周縁部を除去（いわゆるエッジトリム）するとともに、当該ウェハを表面側のデバイスウェハと裏面側の分離ウェハとに分離して薄化することが行われている。 In recent years, in a semiconductor device manufacturing process, a peripheral portion of a wafer is removed (so-called edge trim) with respect to a semiconductor substrate (hereinafter, simply referred to as a "wafer") in which devices such as a plurality of electronic circuits are formed on the surface. At the same time, the wafer is separated into a device wafer on the front side and a separated wafer on the back side to be thinned.
　ウェハのエッジトリム及び薄化は、例えば特許文献１に開示された基板処理装置を用いて行われる。すなわち、ウェハの内部にレーザ光を照射することで、周縁部の除去の基点となる周縁改質層、及びウェハの分離の基点となる内部面改質層を形成し、当該周縁改質層を基点に周縁部を除去するとともに、当該内部面改質層を基点にウェハを分離（薄化）する。 Edge trimming and thinning of the wafer are performed using, for example, the substrate processing apparatus disclosed in Patent Document 1. That is, by irradiating the inside of the wafer with a laser beam, a peripheral modification layer serving as a base point for removing the peripheral edge portion and an internal surface modifying layer serving as a base point for separating the wafer are formed, and the peripheral surface modifying layer is formed. The peripheral portion is removed from the base point, and the wafer is separated (thinned) from the internal surface modification layer as the base point.
　また特許文献１には、ウェハの内部において周縁改質層と内部面改質層を同じ高さに形成することにより、ウェハの周縁部の除去と裏面側の分離を一体に行うことが開示されている。特許文献１の記載によれば、除去された分離ウェハを回収する。そして、回収する分離ウェハの径が、分離前のウェハの径と変わらないため、当該分離ウェハを例えばサポートウェハ等として再利用することが可能である。 Further, Patent Document 1 discloses that by forming the peripheral modification layer and the internal surface modification layer at the same height inside the wafer, the peripheral edge portion of the wafer is removed and the back surface side is separated integrally. ing. According to the description of Patent Document 1, the removed separated wafer is recovered. Since the diameter of the separated wafer to be collected is the same as the diameter of the wafer before separation, the separated wafer can be reused as, for example, a support wafer.
　しかしながら、このようにウェハの周縁部と分離ウェハとを一体に除去する場合、図１に示すように、周縁部Ｗ´ｅの除去の基点となる周縁改質層Ｍ´の形成に際して、当該周縁改質層Ｍ´から伸展する亀裂Ｃ´がウェハＷ´の裏面Ｗ´ｂまで伸展するおそれがあった。このように亀裂Ｃ´が裏面Ｗ´ｂに到達した場合、当該亀裂Ｃ´を基点に分離ウェハから周縁部Ｗ´ｅが除去され、除去された当該周縁部Ｗ´ｅを適切に回収できなくなることや、分離ウェハを所望の形状で回収できずに再利用できなくなることがある。 However, when the peripheral edge portion of the wafer and the separated wafer are integrally removed in this way, as shown in FIG. 1, when the peripheral edge modification layer M'which is the base point for removing the peripheral edge portion W'e is formed, the peripheral edge is formed. The crack C'extending from the modified layer M'may extend to the back surface W'b of the wafer W'. When the crack C'reaches the back surface W'b in this way, the peripheral edge portion W'e is removed from the separation wafer with the crack C'as the base point, and the removed peripheral edge portion W'e cannot be properly recovered. In addition, the separated wafer may not be recovered in a desired shape and cannot be reused.
　本開示に係る技術は上記事情に鑑みてなされたものであり、基板の内部に形成された改質層に沿って、当該基板の周縁部の除去、及び当該基板の薄化を適切に行う。以下、本実施形態にかかる基板処理装置および基板処理方法ついて、図面を参照して説明する。なお、本明細書及び図面において、実質的に同一の機能構成を有する要素においては、同一の符号を付することにより重複説明を省略する。 The technique according to the present disclosure has been made in view of the above circumstances, and appropriately removes the peripheral edge of the substrate and thins the substrate along the modified layer formed inside the substrate. Hereinafter, the substrate processing apparatus and the substrate processing method according to the present embodiment will be described with reference to the drawings. In the present specification and the drawings, elements having substantially the same functional configuration are designated by the same reference numerals, so that duplicate description will be omitted.
　本実施形態に係る基板処理装置としてのウェハ処理システム１では、図２に示すように基板としての第１のウェハＷと、他の基板としての第２のウェハＳとが接合された重合基板としての重合ウェハＴに対して処理を行う。そしてウェハ処理システム１では、第１のウェハＷの周縁部Ｗｅを除去しつつ、当該第１のウェハＷを薄化する。以下、第１のウェハＷにおいて、第２のウェハＳと接合される側の面を表面Ｗａといい、表面Ｗａと反対側の面を裏面Ｗｂという。同様に、第２のウェハＳにおいて、第１のウェハＷと接合される側の面を表面Ｓａといい、表面Ｓａと反対側の面を裏面Ｓｂという。また第１のウェハＷにおいて、除去対象としての周縁部Ｗｅの径方向内側を中央部Ｗｃという。 In the wafer processing system 1 as a substrate processing apparatus according to the present embodiment, as shown in FIG. 2, as a polymerization substrate in which a first wafer W as a substrate and a second wafer S as another substrate are bonded. Processing is performed on the polymerized wafer T of. Then, in the wafer processing system 1, the peripheral portion We of the first wafer W is removed, and the first wafer W is thinned. Hereinafter, in the first wafer W, the surface on the side to be joined to the second wafer S is referred to as a front surface Wa, and the surface opposite to the front surface Wa is referred to as a back surface Wb. Similarly, in the second wafer S, the surface on the side to be joined to the first wafer W is referred to as the front surface Sa, and the surface opposite to the front surface Sa is referred to as the back surface Sb. Further, in the first wafer W, the radial inner side of the peripheral edge portion We as the removal target is referred to as the central portion Wc.
　第１のウェハＷは、例えばシリコン基板等の半導体ウェハであって、表面Ｗａに複数のデバイスを含むデバイス層Ｄが形成されている。デバイス層Ｄにはさらに、表面膜Ｆｗが形成され、当該表面膜Ｆｗを介して第２のウェハＳの表面膜Ｆｓと接合されている。表面膜Ｆｗとしては、例えば酸化膜（ＳｉＯ２膜、ＴＥＯＳ膜）、ＳｉＣ膜、ＳｉＣＮ膜又は接着剤などが挙げられる。なお、第１のウェハＷの周縁部Ｗｅは面取り加工がされており、周縁部Ｗｅの断面はその先端に向かって厚みが小さくなっている。また、周縁部Ｗｅは後述の第１のウェハＷの分離時において除去される部分であり、例えば第１のウェハＷの外端部から径方向に０．５ｍｍ～３ｍｍの範囲である。 The first wafer W is a semiconductor wafer such as a silicon substrate, and a device layer D including a plurality of devices is formed on the surface Wa. A surface film Fw is further formed on the device layer D, and is bonded to the surface film Fs of the second wafer S via the surface film Fw. Examples of the surface film Fw include an oxide film (SiO 2 film, TEOS film), a SiC film, a SiCN film, and an adhesive. The peripheral edge portion We of the first wafer W is chamfered, and the cross section of the peripheral edge portion We becomes thinner toward the tip thereof. Further, the peripheral edge portion We is a portion that is removed when the first wafer W is separated, which will be described later, and is, for example, in the range of 0.5 mm to 3 mm in the radial direction from the outer end portion of the first wafer W.
　第２のウェハＳは、例えば第１のウェハＷを支持するウェハである。第２のウェハＳの表面Ｓａには表面膜Ｆｓが形成され、周縁部は面取り加工がされている。表面膜Ｆｓとしては、例えば酸化膜（ＳｉＯ２膜、ＴＥＯＳ膜）、ＳｉＣ膜、ＳｉＣＮ膜又は接着剤などが挙げられる。また、第２のウェハＳは、第１のウェハＷのデバイス層Ｄを保護する保護材（サポートウェハ）として機能する。なお、第２のウェハＳはサポートウェハである必要はなく、第１のウェハＷと同様にデバイス層が形成されたデバイスウェハであってもよい。かかる場合、第２のウェハＳの表面Ｓａには、デバイス層を介して表面膜Ｆｓが形成される。 The second wafer S is, for example, a wafer that supports the first wafer W. Surface films Fs are formed on the surface Sa of the second wafer S, and the peripheral edge is chamfered. Examples of the surface film Fs include an oxide film (SiO 2 film, TEOS film), a SiC film, a SiCN film, and an adhesive. Further, the second wafer S functions as a protective material (support wafer) for protecting the device layer D of the first wafer W. The second wafer S does not have to be a support wafer, and may be a device wafer on which a device layer is formed as in the first wafer W. In such a case, the surface film Fs is formed on the surface Sa of the second wafer S via the device layer.
　なお以下の説明においては、分離された表面Ｗａ側の第１のウェハＷをデバイスウェハＷｄ１といい、分離された裏面Ｗｂ側の第１のウェハＷを分離ウェハＷｄ２という。デバイスウェハＷｄ１は第２のウェハＳと接合された状態の第１のウェハＷを指し、第２のウェハＳを含めてデバイスウェハＷｄ１という場合がある。また、デバイスウェハＷｄ１及び分離ウェハＷｄ２において分離された面をそれぞれ分離面という場合がある。 In the following description, the separated first wafer W on the front surface Wa side is referred to as a device wafer Wd1, and the separated first wafer W on the back surface Wb side is referred to as a separated wafer Wd2. The device wafer Wd1 refers to the first wafer W in a state of being joined to the second wafer S, and may be referred to as a device wafer Wd1 including the second wafer S. Further, the separated surfaces of the device wafer Wd1 and the separated wafer Wd2 may be referred to as separation surfaces.
　図３に示すようにウェハ処理システム１は、搬入出ステーション２と処理ステーション３を一体に接続した構成を有している。搬入出ステーション２は、例えば外部との間で複数の重合ウェハＴ、デバイスウェハＷｄ１、分離ウェハＷｄ２を収容可能なカセットＣｔが搬入出される。処理ステーション３は、重合ウェハＴに対して所望の処理を施す各種処理装置を備えている。 As shown in FIG. 3, the wafer processing system 1 has a configuration in which the loading / unloading station 2 and the processing station 3 are integrally connected. At the loading / unloading station 2, for example, a cassette Ct capable of accommodating a plurality of polymerization wafers T, device wafers Wd1, and separation wafers Wd2 is loaded / unloaded from the outside. The processing station 3 is provided with various processing devices that perform desired processing on the polymerized wafer T.
　搬入出ステーション２には、カセット載置台１０が設けられている。図示の例では、カセット載置台１０には、複数、例えば３つのカセットＣｔをＹ軸方向に一列に載置自在になっている。なお、カセット載置台１０に載置されるカセットＣｔの個数は、本実施形態に限定されず、任意に決定することができる。 The loading / unloading station 2 is provided with a cassette mounting stand 10. In the illustrated example, a plurality of, for example, three cassette Cts can be freely mounted in a row on the cassette mounting table 10 in the Y-axis direction. The number of cassettes Ct mounted on the cassette mounting table 10 is not limited to this embodiment and can be arbitrarily determined.
　搬入出ステーション２には、カセット載置台１０のＸ軸負方向側において、当該カセット載置台１０に隣接してウェハ搬送装置２０が設けられている。ウェハ搬送装置２０は、Ｙ軸方向に延伸する搬送路２１上を移動自在に構成されている。また、ウェハ搬送装置２０は、重合ウェハＴを保持して搬送する、例えば２つの搬送アーム２２、２２を有している。各搬送アーム２２は、水平方向、鉛直方向、水平軸回り及び鉛直軸周りに移動自在に構成されている。なお、搬送アーム２２の構成は本実施形態に限定されず、任意の構成を取り得る。そして、ウェハ搬送装置２０は、カセット載置台１０のカセットＣｔ及び後述するトランジション装置３０に対して、重合ウェハＴを搬送可能に構成されている。 The loading / unloading station 2 is provided with a wafer transfer device 20 adjacent to the cassette mounting table 10 on the X-axis negative direction side of the cassette mounting table 10. The wafer transfer device 20 is configured to be movable on a transfer path 21 extending in the Y-axis direction. Further, the wafer transfer device 20 has, for example, two transfer arms 22 and 22 that hold and transfer the polymerized wafer T. Each transport arm 22 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis. The configuration of the transport arm 22 is not limited to this embodiment, and any configuration can be adopted. The wafer transfer device 20 is configured to be able to transfer the polymerized wafer T to the cassette Ct of the cassette mounting table 10 and the transition device 30 described later.
　搬入出ステーション２には、ウェハ搬送装置２０のＸ軸負方向側において、当該ウェハ搬送装置２０に隣接して、重合ウェハＴを受け渡すためのトランジション装置３０が設けられている。 The loading / unloading station 2 is provided with a transition device 30 for delivering the polymerized wafer T adjacent to the wafer transfer device 20 on the X-axis negative direction side of the wafer transfer device 20.
　処理ステーション３には、例えば３つの処理ブロックＢ１～Ｂ３が設けられている。第１の処理ブロックＢ１、第２の処理ブロックＢ２、及び第３の処理ブロックＢ３は、Ｘ軸正方向側（搬入出ステーション２側）から負方向側にこの順で並べて配置されている。 The processing station 3 is provided with, for example, three processing blocks B1 to B3. The first processing block B1, the second processing block B2, and the third processing block B3 are arranged side by side in this order from the positive direction side of the X axis (the loading / unloading station 2 side) to the negative direction side.
　第１の処理ブロックＢ１には、後述の加工装置８０で研削された第１のウェハＷの研削面をエッチングするエッチング装置４０と、第１のウェハＷの研削面を洗浄する洗浄装置４１と、ウェハ搬送装置５０が設けられている。エッチング装置４０と洗浄装置４１は、積層して配置されている。なお、エッチング装置４０と洗浄装置４１の数や配置はこれに限定されない。 The first processing block B1 includes an etching device 40 that etches the ground surface of the first wafer W ground by the processing device 80 described later, a cleaning device 41 that cleans the ground surface of the first wafer W, and the like. A wafer transfer device 50 is provided. The etching apparatus 40 and the cleaning apparatus 41 are arranged in a laminated manner. The number and arrangement of the etching apparatus 40 and the cleaning apparatus 41 are not limited to this.
　ウェハ搬送装置５０は、例えばエッチング装置４０と洗浄装置４１のＹ軸負方向側に配置されている。ウェハ搬送装置５０は、重合ウェハＴを保持して搬送する、例えば２つの搬送アーム５１、５１を有している。各搬送アーム５１は、水平方向、鉛直方向、水平軸回り及び鉛直軸周りに移動自在に構成されている。なお、搬送アーム５１の構成は本実施形態に限定されず、任意の構成を取り得る。そして、ウェハ搬送装置５０は、トランジション装置３０、エッチング装置４０、洗浄装置４１、後述する界面改質装置６０、及び後述する内部改質装置６１に対して、重合ウェハＴを搬送可能に構成されている。 The wafer transfer device 50 is arranged, for example, on the Y-axis negative direction side of the etching device 40 and the cleaning device 41. The wafer transfer device 50 has, for example, two transfer arms 51 and 51 that hold and transfer the polymerized wafer T. Each transport arm 51 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis. The configuration of the transport arm 51 is not limited to this embodiment, and any configuration can be adopted. The wafer transfer device 50 is configured to be able to transfer the polymerized wafer T to the transition device 30, the etching device 40, the cleaning device 41, the interface reformer 60 described later, and the internal reformer 61 described later. There is.
　第２の処理ブロックＢ２には、第２の改質部としての界面改質装置６０、改質部としての内部改質装置６１、及びウェハ搬送装置７０が設けられている。界面改質装置６０及び内部改質装置６１は、積層して配置されている。なお、界面改質装置６０及び内部改質装置６１の数や配置はこれに限定されない。 The second processing block B2 is provided with an interface reformer 60 as a second reformer, an internal reformer 61 as a reformer, and a wafer transfer device 70. The interface reformer 60 and the internal reformer 61 are arranged in a laminated manner. The number and arrangement of the interface reformer 60 and the internal reformer 61 are not limited to this.
　第２の改質部としての界面改質装置６０は、例えば第１のウェハＷのデバイス層Ｄの外周部にレーザ光（界面用レーザ光、例えばＣＯ２レーザ）を照射し、除去対象としての第１のウェハＷの周縁部Ｗｅにおける第１のウェハＷとデバイス層Ｄの界面を改質する。これにより、第１のウェハＷの周縁部Ｗｅには、第１のウェハＷと第２のウェハＳとの接合強度が低下された未接合領域Ａｅが形成される。 The interface reformer 60 as the second reforming portion irradiates the outer peripheral portion of the device layer D of the first wafer W with a laser beam (interfacial laser beam, for example, a CO 2 laser), and serves as a removal target. The interface between the first wafer W and the device layer D at the peripheral edge We of the first wafer W is modified. As a result, an unbonded region Ae in which the bonding strength between the first wafer W and the second wafer S is reduced is formed on the peripheral edge portion We of the first wafer W.
　改質部としての内部改質装置６１は、第１のウェハＷの内部にレーザ光（内部用レーザ光、例えばＹＡＧレーザ）を照射し、周縁改質層Ｍ１、及び内部面改質層Ｍ２を形成する。周縁改質層Ｍ１は、周縁部Ｗｅを除去する際の基点となるものである。内部面改質層Ｍ２は、第１のウェハＷをデバイスウェハＷｄ１と分離ウェハＷｄ２に分離する際の基点となるものである。 The internal reformer 61 as a reforming unit irradiates the inside of the first wafer W with a laser beam (internal laser beam, for example, a YAG laser) to irradiate the peripheral modifying layer M1 and the internal surface modifying layer M2. Form. The peripheral edge modification layer M1 serves as a base point when removing the peripheral edge portion We. The internal surface modification layer M2 serves as a base point when the first wafer W is separated into the device wafer Wd1 and the separation wafer Wd2.
　ウェハ搬送装置７０は、例えば界面改質装置６０と内部改質装置６１のＹ軸正方向側に配置されている。ウェハ搬送装置７０は、重合ウェハＴを図示しない吸着保持面により吸着保持して搬送する、例えば２つの搬送アーム７１、７１を有している。各搬送アーム７１は、多関節のアーム部材７２に支持され、水平方向、鉛直方向、水平軸回り及び鉛直軸周りに移動自在に構成されている。なお、搬送アーム７１の構成は本実施形態に限定されず、任意の構成を取り得る。そして、ウェハ搬送装置７０は、エッチング装置４０、洗浄装置４１、界面改質装置６０、内部改質装置６１、及び後述する加工装置８０に対して、重合ウェハＴを搬送可能に構成されている。 The wafer transfer device 70 is arranged, for example, on the Y-axis positive direction side of the interface reformer 60 and the internal reformer 61. The wafer transfer device 70 has, for example, two transfer arms 71 and 71 that attract and hold the polymerized wafer T by a suction holding surface (not shown) and convey it. Each transport arm 71 is supported by an articulated arm member 72, and is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis. The configuration of the transport arm 71 is not limited to this embodiment, and any configuration can be adopted. The wafer transfer device 70 is configured to be able to transfer the polymerized wafer T to the etching device 40, the cleaning device 41, the interface reformer 60, the internal reformer 61, and the processing device 80 described later.
　第３の処理ブロックＢ３には、加工装置８０が設けられている。 The processing device 80 is provided in the third processing block B3.
　加工装置８０は、回転テーブル８１を有している。回転テーブル８１は、回転機構（図示せず）によって、鉛直な回転中心線８２を中心に回転自在に構成されている。回転テーブル８１上には、重合ウェハＴを吸着保持するチャック８３が２つ設けられている。チャック８３は、回転テーブル８１と同一円周上に均等に配置されている。２つのチャック８３は、回転テーブル８１が回転することにより、受渡位置Ａ０及び加工位置Ａ１に移動可能になっている。また、２つのチャック８３はそれぞれ、回転機構（図示せず）によって鉛直軸回りに回転可能に構成されている。 The processing device 80 has a rotary table 81. The rotary table 81 is rotatably configured around a vertical rotation center line 82 by a rotation mechanism (not shown). Two chucks 83 for sucking and holding the polymerized wafer T are provided on the rotary table 81. The chucks 83 are evenly arranged on the same circumference as the rotary table 81. The two chucks 83 can be moved to the delivery position A0 and the processing position A1 by rotating the rotary table 81. Further, each of the two chucks 83 is configured to be rotatable around a vertical axis by a rotation mechanism (not shown).
　受渡位置Ａ０では、重合ウェハＴの受け渡しが行われる。加工位置Ａ１には、研削ユニット８４が配置され、第１のウェハＷを研削する。研削ユニット８４は、環状形状で回転自在な研削砥石（図示せず）を備えた研削部８５を有している。また、研削部８５は、支柱８６に沿って鉛直方向に移動可能に構成されている。 At the delivery position A0, the polymerization wafer T is delivered. A grinding unit 84 is arranged at the processing position A1 to grind the first wafer W. The grinding unit 84 has a grinding unit 85 having an annular shape and a rotatable grinding wheel (not shown). Further, the grinding portion 85 is configured to be movable in the vertical direction along the support column 86.
　以上のウェハ処理システム１には、制御部としての制御装置９０が設けられている。制御装置９０は、例えばＣＰＵやメモリ等を備えたコンピュータであり、プログラム格納部（図示せず）を有している。プログラム格納部には、ウェハ処理システム１における重合ウェハＴの処理を制御するプログラムが格納されている。なお、上記プログラムは、コンピュータに読み取り可能な記憶媒体Ｈに記録されていたものであって、当該記憶媒体Ｈから制御装置９０にインストールされたものであってもよい。 The above wafer processing system 1 is provided with a control device 90 as a control unit. The control device 90 is, for example, a computer equipped with a CPU, a memory, or the like, and has a program storage unit (not shown). The program storage unit stores a program that controls the processing of the polymerized wafer T in the wafer processing system 1. The program may be recorded on a computer-readable storage medium H and may be installed on the control device 90 from the storage medium H.
　次に、ウェハ処理システム１を用いて行われる基板処理方法としてのウェハ処理について説明する。なお本実施形態では、予めウェハ処理システム１の外部の接合装置（図示せず）において重合ウェハＴが形成されている。また、以下の説明においては第１のウェハＷの厚み方向を「上下方向」という場合があり、第１のウェハＷの裏面Ｗｂ側を「上方」、表面Ｗａ側を「下方」とする。 Next, wafer processing as a substrate processing method performed using the wafer processing system 1 will be described. In this embodiment, the polymerized wafer T is formed in advance in an external bonding device (not shown) of the wafer processing system 1. Further, in the following description, the thickness direction of the first wafer W may be referred to as "vertical direction", and the back surface Wb side of the first wafer W is referred to as "upper" and the front surface Wa side is referred to as "lower".
　先ず、図４（ａ）に示す重合ウェハＴを複数収納したカセットＣｔが、搬入出ステーション２のカセット載置台１０に載置される。次に、ウェハ搬送装置２０によりカセットＣｔ内の重合ウェハＴが取り出され、トランジション装置３０に搬送される。トランジション装置３０に搬送された重合ウェハＴは、続いて、ウェハ搬送装置５０により界面改質装置６０に搬送される。界面改質装置６０では、図４（ｂ）に示すように第１のウェハＷとデバイス層Ｄの界面にレーザ光を照射し、当該界面を改質する（図５のステップＰ１）。 First, a cassette Ct containing a plurality of polymerized wafers T shown in FIG. 4A is placed on the cassette mounting table 10 of the loading / unloading station 2. Next, the polymerized wafer T in the cassette Ct is taken out by the wafer transfer device 20 and transferred to the transition device 30. The polymerized wafer T transferred to the transition device 30 is subsequently transferred to the interface reformer 60 by the wafer transfer device 50. In the interface reformer 60, as shown in FIG. 4B, the interface between the first wafer W and the device layer D is irradiated with a laser beam to reform the interface (step P1 in FIG. 5).
　ステップＰ１において第１のウェハＷとデバイス層Ｄの界面を改質すると第１のウェハＷと第２のウェハＳの接合強度が低下する。これにより第１のウェハＷとデバイス層Ｄの界面には、第１のウェハＷと第２のウェハＳとが接合された接合領域Ａｃと、接合領域Ａｃの径方向外側で接合強度が低下した領域である未接合領域Ａｅとが形成される。 When the interface between the first wafer W and the device layer D is modified in step P1, the bonding strength between the first wafer W and the second wafer S decreases. As a result, at the interface between the first wafer W and the device layer D, the bonding strength is reduced at the bonding region Ac where the first wafer W and the second wafer S are bonded and the radial outside of the bonding region Ac. An unbonded region Ae, which is a region, is formed.
　なお、未接合領域Ａｅの形成における界面の「改質」とは、第１のウェハＷと第２のウェハＳとの接合強度を低下させる、または接合強度をなくす処理のことをいい、例えばレーザ光の照射による当該界面の剥離、除去、アモルファス化等を含むものとする。 The "modification" of the interface in the formation of the unbonded region Ae refers to a process of reducing the bonding strength between the first wafer W and the second wafer S, or eliminating the bonding strength, for example, a laser. It shall include peeling, removal, amorphization, etc. of the interface by irradiation with light.
　未接合領域Ａｅが形成された重合ウェハＴは、続いて、ウェハ搬送装置５０により内部改質装置６１に搬送される。内部改質装置６１では、図４（ｃ）、図４（ｄ）に示すように、第１のウェハＷの内部に、周縁改質層Ｍ１と内部面改質層Ｍ２を順次形成する（図５のステップＰ２及びステップＰ３）。 The polymerized wafer T on which the unbonded region Ae is formed is subsequently transferred to the internal reformer 61 by the wafer transfer device 50. In the internal reformer 61, as shown in FIGS. 4C and 4D, the peripheral reforming layer M1 and the internal surface reforming layer M2 are sequentially formed inside the first wafer W (FIG. 6). Step P2 and step P3) of step 5.
　周縁改質層Ｍ１の形成にあたっては、重合ウェハＴ（第１のウェハＷ）を回転させながらレーザヘッド（図示せず）からレーザ光を周期的に照射するとともに、レーザ光の照射位置を第１のウェハＷの径方向内側、かつ第１のウェハＷの裏面Ｗｂ側に移動させる。換言すれば、第１のウェハＷの内部に形成される複数の周縁改質層Ｍ１は、図６に示すように、断面視において第１のウェハＷの径方向内側に向かうにつれて形成位置が高くなるように、それぞれ異なる高さ位置で形成される。また周縁改質層Ｍ１は、図７に示すように、接合領域Ａｃ（未接合領域Ａｅ）と同心円状の環状に形成される。なお、第１のウェハＷへの周縁改質層Ｍ１の形成数は図示の例には限定されず、任意に決定できる。 In forming the peripheral modification layer M1, the laser light is periodically irradiated from the laser head (not shown) while rotating the layered wafer T (first wafer W), and the irradiation position of the laser light is set to the first position. Wafer W is moved to the inside in the radial direction and to the back surface Wb side of the first wafer W. In other words, as shown in FIG. 6, the plurality of peripherally modified layers M1 formed inside the first wafer W have higher formation positions toward the inner side in the radial direction of the first wafer W in cross-sectional view. They are formed at different height positions so as to be. Further, as shown in FIG. 7, the peripheral modification layer M1 is formed in an annular shape concentric with the bonding region Ac (unbonded region Ae). The number of peripheral modification layers M1 formed on the first wafer W is not limited to the illustrated example, and can be arbitrarily determined.
　なお、第１のウェハＷの内部には、周縁改質層Ｍ１の形成方向に沿って、すなわち第１のウェハＷの径方向外側から内側にかけて、当該第１のウェハＷの表面Ｗａ側から裏面Ｗｂ側に向けてクラックＣ１（亀裂）が伸展する。クラックＣ１は、図６に示したように下端部を第１のウェハＷの表面Ｗａまで到達させ、上端部は裏面Ｗｂに到達させない。換言すれば、クラックＣ１の伸展長さは周縁改質層Ｍ１の形成間隔やレーザ光の出力等により決定されるため、このようにクラックＣ１が表面Ｗａに到達し、裏面Ｗｂに到達しないように、周縁改質層Ｍ１の形成動作が制御される。 Inside the first wafer W, along the forming direction of the peripheral modification layer M1, that is, from the outer side to the inner side in the radial direction of the first wafer W, from the front surface Wa side to the back surface of the first wafer W. The crack C1 (crack) extends toward the Wb side. As shown in FIG. 6, the crack C1 makes the lower end portion reach the front surface Wa of the first wafer W, and the upper end portion does not reach the back surface Wb. In other words, the extension length of the crack C1 is determined by the formation interval of the peripheral modification layer M1 and the output of the laser beam, so that the crack C1 does not reach the front surface Wa and the back surface Wb in this way. , The formation operation of the peripheral modification layer M1 is controlled.
　また、後の第１のウェハＷの分離に際しては、かかる周縁改質層Ｍ１及びクラックＣ１を基点として周縁部ＷｅがデバイスウェハＷｄ１から除去される。かかる周縁部Ｗｅの除去を適切に行うため、周縁改質層Ｍ１は、例えば、隣接する周縁改質層Ｍ１からそれぞれ伸展するクラックＣ１が相互に連結させる形成間隔でそれぞれ形成されることが望ましい。また例えば、隣接する周縁改質層Ｍ１の一部が互いに重なるように形成間隔が制御されてもよい。 Further, when the first wafer W is separated later, the peripheral edge portion We is removed from the device wafer Wd1 with the peripheral edge modifying layer M1 and the crack C1 as base points. In order to properly remove the peripheral edge portion We, it is desirable that the peripheral edge modifying layer M1 is formed, for example, at an interval at which the cracks C1 extending from the adjacent peripheral edge modifying layer M1 are connected to each other. Further, for example, the formation interval may be controlled so that a part of the adjacent peripheral modification layers M1 overlap each other.
　ここで、第１のウェハＷの内部に伸展するクラックＣ１は、一般的に第１のウェハＷの結晶方位に沿って伸展しやすい傾向にある。そして通常、第１のウェハＷの結晶方位は、成形や加工の観点から当該第１のウェハＷの面方向、厚み方向に広がりを持たせることが多いため、図１に示したように周縁改質層Ｍ´を厚み方向に並べて配置した場合、クラックＣ１が厚み方向に伸展しやすくなり、すなわち裏面Ｗｂへ到達しやすくなる。 Here, the crack C1 extending inside the first wafer W generally tends to easily extend along the crystal orientation of the first wafer W. Usually, the crystal orientation of the first wafer W is often spread in the plane direction and the thickness direction of the first wafer W from the viewpoint of molding and processing, so that the peripheral edge is modified as shown in FIG. When the quality layers M'are arranged side by side in the thickness direction, the crack C1 easily extends in the thickness direction, that is, easily reaches the back surface Wb.
　この点、本実施形態においては、隣接する周縁改質層Ｍ１をそれぞれ厚み方向、径方向にずらして形成、換言すれば、斜め方向に並べて形成する。これにより、従来のように厚み方向に周縁改質層Ｍ´を並べて形成する場合と比較してクラックＣ１の伸展が抑制され、裏面ＷｂへのクラックＣ１の到達が抑制される。またこの時、本実施形態においては周縁改質層Ｍ１の形成間隔を、クラックＣ１が相互に連結させる形成間隔、または、周縁改質層Ｍ１の一部が互いに重なるように形成間隔、に制御するため、更に適切にクラックＣ１が裏面Ｗｂまで到達することが抑制できる。 In this respect, in the present embodiment, the adjacent peripheral modification layers M1 are formed by shifting them in the thickness direction and the radial direction, respectively, in other words, they are formed side by side in the diagonal direction. As a result, the extension of the crack C1 is suppressed and the arrival of the crack C1 on the back surface Wb is suppressed as compared with the case where the peripheral modification layers M'are arranged in the thickness direction as in the conventional case. At this time, in the present embodiment, the formation interval of the peripheral modification layer M1 is controlled to the formation interval in which the cracks C1 are connected to each other or the formation interval so that a part of the peripheral modification layer M1 overlaps with each other. Therefore, it is possible to more appropriately prevent the crack C1 from reaching the back surface Wb.
　またここで、図６に示したように、第１のウェハＷの内部において最も径方向外側に形成される周縁改質層Ｍ１（１）の形成位置は、界面改質装置６０で形成された未接合領域Ａｅの内周側端部、すなわち接合領域Ａｃと未接合領域Ａｅとの境界Ａｄよりも若干径方向内側に決定される。境界Ａｄは、例えば界面改質装置６０における未接合領域Ａｅの形成結果や、ウェハ処理システム１の任意の位置に設けられるアライメント装置（図示せず）においてＩＲカメラ等を用いて検知される。 Further, as shown in FIG. 6, the formation position of the peripheral modification layer M1 (1) formed on the outermost radial direction inside the first wafer W was formed by the interface modifier 60. It is determined to be slightly inward in the radial direction from the inner peripheral side end of the unjoined region Ae, that is, the boundary Ad between the joined region Ac and the unjoined region Ae. The boundary Ad is detected, for example, by using an IR camera or the like in the formation result of the unbonded region Ae in the interface reformer 60 or in an alignment device (not shown) provided at an arbitrary position in the wafer processing system 1.
　周縁改質層Ｍ１は、境界Ａｄと重なる位置に形成されることが理想であるが、例えば加工誤差などにより径方向にずれて形成される場合がある。そしてこれにより、周縁改質層Ｍ１が境界Ａｄよりも径方向外側、すなわち未接合領域Ａｅに形成されると、周縁部Ｗｅが除去された後に第２のウェハＳに対して第１のウェハＷが浮いた状態になってしまう場合がある。この点、周縁改質層Ｍ１を境界Ａｄよりも径方向内側に形成するように制御することにより、例えば加工誤差により形成位置がずれたとしても、境界Ａｄと重なる位置、または境界Ａｄよりも径方向外側であっても当該境界Ａｄに近接した位置に周縁改質層Ｍ１を形成することができ、第１のウェハＷが浮いた状態になることが抑制される。 Ideally, the peripheral modification layer M1 is formed at a position overlapping the boundary Ad, but it may be formed so as to be displaced in the radial direction due to, for example, a processing error. As a result, when the peripheral modification layer M1 is formed radially outside the boundary Ad, that is, in the unbonded region Ae, the first wafer W with respect to the second wafer S after the peripheral edge We is removed. May become floating. In this respect, by controlling the peripheral modification layer M1 to be formed radially inside the boundary Ad, for example, even if the formation position shifts due to a processing error, the position overlaps with the boundary Ad or the diameter is larger than the boundary Ad. The peripheral modification layer M1 can be formed at a position close to the boundary Ad even on the outer side in the direction, and the floating state of the first wafer W is suppressed.
　周縁改質層Ｍ１が形成されると、レーザヘッド（図示せず）を移動させて、周縁改質層Ｍ１の径方向内側に、第１のウェハＷの面方向に延伸する内部面改質層Ｍ２を形成する。内部面改質層Ｍ２の形成にあたっては、重合ウェハＴ（第１のウェハＷ）を回転させながらレーザヘッドからレーザ光を周期的に照射するとともに、レーザ光の照射位置を第１のウェハＷの径方向内側に移動させる。これにより、第１のウェハＷの内部には、面方向に沿って全面に内部面改質層Ｍ２が形成される。内部面改質層Ｍ２の径方向の形成間隔は任意に決定することができる。 When the peripheral modification layer M1 is formed, the laser head (not shown) is moved to extend the inner surface modification layer in the radial direction of the peripheral modification layer M1 in the surface direction of the first wafer W. Form M2. In forming the internal surface modification layer M2, the laser beam is periodically irradiated from the laser head while rotating the layered wafer T (first wafer W), and the irradiation position of the laser beam is set on the first wafer W. Move inward in the radial direction. As a result, the internal surface modification layer M2 is formed on the entire surface of the first wafer W along the surface direction. The radial formation interval of the inner surface modified layer M2 can be arbitrarily determined.
　なお、第１のウェハＷの内部には、内部面改質層Ｍ２の形成方向に沿って、すなわち第１のウェハＷの面方向に沿ってクラックＣ２が伸展する。後の第１のウェハＷの分離に際しては、かかる内部面改質層Ｍ２及びクラックＣ２を基点として分離ウェハＷｄ２をデバイスウェハＷｄ１から剥離する。かかる剥離を適切に行うため、図６に示したように、クラックＣ２の径方向外側端部はクラックＣ１の上端部と連結させ、隣接する内部面改質層Ｍ２からそれぞれ伸展するクラックＣ２は相互に連結させることが望ましい。 Inside the first wafer W, cracks C2 extend along the formation direction of the internal surface modification layer M2, that is, along the surface direction of the first wafer W. When the first wafer W is separated later, the separated wafer Wd2 is separated from the device wafer Wd1 with the internal surface modification layer M2 and the crack C2 as base points. In order to properly perform such peeling, as shown in FIG. 6, the radial outer end of the crack C2 is connected to the upper end of the crack C1, and the cracks C2 extending from the adjacent internal surface modification layers M2 are mutually formed. It is desirable to connect to.
　ここで、本実施形態において周縁改質層Ｍ１は、上述のように重合ウェハＴを回転させながらレーザ光の照射位置を第１のウェハＷの径方向内側、かつ第１のウェハＷの裏面Ｗｂ側に移動させることにより形成される。また内部面改質層Ｍ２は、上述のように重合ウェハＴを回転させながらレーザ光の照射位置を第１のウェハＷの径方向内側に移動させることにより形成される。 Here, in the present embodiment, the peripheral modification layer M1 is set to the radial inside of the first wafer W and the back surface Wb of the first wafer W while rotating the polymerized wafer T as described above. It is formed by moving it to the side. Further, the internal surface modification layer M2 is formed by moving the irradiation position of the laser beam in the radial direction of the first wafer W while rotating the polymerized wafer T as described above.
　すなわち本実施形態においては、周縁改質層Ｍ１の形成時におけるレーザ光の照射位置の厚み方向への移動を止めることにより、内部面改質層Ｍ２の形成を周縁改質層Ｍ１の形成に続けて連続的に行うことが可能である。換言すれば、周縁改質層Ｍ１の形成から内部面改質層Ｍ２の形成への移行に際してレーザ光の照射を停止する必要がない。そして、このようにレーザ光の照射を停止することなく周縁改質層Ｍ１と内部面改質層Ｍ２を径方向外側から連続的に形成することにより、内部改質装置６１における改質層の形成動作に係るスループットを大きく向上させることができる。 That is, in the present embodiment, the formation of the inner surface modified layer M2 is continued to the formation of the peripheral modified layer M1 by stopping the movement of the irradiation position of the laser beam in the thickness direction at the time of forming the peripheral modified layer M1. It is possible to do it continuously. In other words, it is not necessary to stop the irradiation of the laser beam in the transition from the formation of the peripheral modification layer M1 to the formation of the inner surface modification layer M2. Then, by continuously forming the peripheral modification layer M1 and the internal surface modification layer M2 from the outside in the radial direction without stopping the irradiation of the laser beam in this way, the modification layer in the internal modification device 61 is formed. The throughput related to the operation can be greatly improved.
　内部面改質層Ｍ２が形成された重合ウェハＴは、次に、ウェハ搬送装置５０により加工装置８０へと搬送される。加工装置８０では、先ず、搬送アーム７１からチャック８３に重合ウェハＴを受け渡す際、図４（ｅ）に示すように、周縁改質層Ｍ１、クラックＣ１、内部面改質層Ｍ２及びクラックＣ２を基点に、第１のウェハＷをデバイスウェハＷｄ１と分離ウェハＷｄ２とに分離する（図５のステップＰ４）。この際、第１のウェハＷの周縁部Ｗｅも、分離ウェハＷｄ２と一体となって第１のウェハＷから除去される。 The polymerized wafer T on which the internal surface modification layer M2 is formed is then transferred to the processing device 80 by the wafer transfer device 50. In the processing apparatus 80, first, when the polymerized wafer T is delivered from the transport arm 71 to the chuck 83, as shown in FIG. 4 (e), the peripheral modification layer M1, the crack C1, the inner surface modification layer M2 and the crack C2 The first wafer W is separated into the device wafer Wd1 and the separation wafer Wd2 (step P4 in FIG. 5). At this time, the peripheral portion We of the first wafer W is also removed from the first wafer W together with the separated wafer Wd2.
　ステップＰ４の第１のウェハＷの分離では、搬送アーム７１が備える吸着面７１ａで第１のウェハＷを吸着保持しつつ、チャック８３で第２のウェハＳを吸着保持する。その後、吸着面７１ａが第１のウェハＷの裏面Ｗｂを吸着保持した状態で搬送アーム７１を上昇させることで、第１のウェハＷをデバイスウェハＷｄ１と分離ウェハＷｄ２に分離する。そして上述のように、ステップＰ４では分離ウェハＷｄ２と周縁部Ｗｅは一体となって分離される。すなわち、周縁部Ｗｅの除去と第１のウェハＷの分離（薄化）が同時に行われる。 In the separation of the first wafer W in step P4, the first wafer W is sucked and held by the suction surface 71a provided on the transport arm 71, and the second wafer S is sucked and held by the chuck 83. After that, the transfer arm 71 is raised while the suction surface 71a sucks and holds the back surface Wb of the first wafer W to separate the first wafer W into the device wafer Wd1 and the separation wafer Wd2. Then, as described above, in step P4, the separation wafer Wd2 and the peripheral edge portion We are integrally separated. That is, the peripheral portion We is removed and the first wafer W is separated (thinned) at the same time.
　ここで、周縁改質層Ｍ１を第１のウェハＷの厚み方向に並べて配置した場合、搬送アーム７１により分離ウェハＷｄ２を上方に持ち上げる際に、当該分離ウェハＷｄ２が、図１に示したようなデバイスウェハＷｄ１の角部Ｋに干渉するおそれがある。そして、このように分離ウェハＷｄ２がデバイスウェハＷｄ１と干渉した場合、当該角部Ｋが欠けるおそれがある。この点、本実施形態においては、隣接する周縁改質層Ｍ１をそれぞれ厚み方向、径方向にずらして形成、換言すれば、斜め方向に並べて形成している。これにより、デバイスウェハＷｄ１には角部Ｋが形成されず、分離ウェハＷｄ２の上昇に際して、デバイスウェハＷｄ１と分離ウェハＷｄ２とが干渉することが抑制される。そして、このように角部Ｋの欠けが抑制されることから、製品としてのデバイスウェハの品質低下が抑制されるとともに、欠けにより発生するパーティクルによるウェハ処理システム１の内部汚染が抑制される。 Here, when the peripheral modification layers M1 are arranged side by side in the thickness direction of the first wafer W, when the separation wafer Wd2 is lifted upward by the transport arm 71, the separation wafer Wd2 is as shown in FIG. There is a risk of interfering with the corner K of the device wafer Wd1. Then, when the separated wafer Wd2 interferes with the device wafer Wd1 in this way, the corner portion K may be chipped. In this respect, in the present embodiment, the adjacent peripheral modification layers M1 are formed so as to be displaced in the thickness direction and the radial direction, respectively, in other words, they are formed side by side in the oblique direction. As a result, the corner portion K is not formed on the device wafer Wd1, and it is possible to prevent the device wafer Wd1 and the separated wafer Wd2 from interfering with each other when the separated wafer Wd2 is raised. Since the chipping of the corner portion K is suppressed in this way, the deterioration of the quality of the device wafer as a product is suppressed, and the internal contamination of the wafer processing system 1 by the particles generated by the chipping is suppressed.
　なお、分離ウェハＷｄ２は例えばウェハ処理システム１の外部に回収される。また例えば、搬送アーム７１の可動範囲内に回収部（図示せず）を設け、当該回収部において分離ウェハＷｄ２を回収してもよい。 The separated wafer Wd2 is collected outside the wafer processing system 1, for example. Further, for example, a recovery unit (not shown) may be provided within the movable range of the transport arm 71, and the separated wafer Wd2 may be collected by the recovery unit.
　また、本実施形態では加工装置８０において搬送アーム７１を利用して第１のウェハＷの分離を行ったが、ウェハ処理システム１には第１のウェハＷの分離を行うための分離装置（図示せず）が設けられていてもよい。分離装置は、例えば界面改質装置６０、内部改質装置６１と積層して配置することができる。また、第１のウェハＷの分離方法も任意に決定することができる。 Further, in the present embodiment, the transfer arm 71 is used to separate the first wafer W in the processing apparatus 80, but the wafer processing system 1 is a separation apparatus for separating the first wafer W (FIG. (Not shown) may be provided. The separation device can be arranged so as to be laminated with, for example, the interface reformer 60 and the internal reformer 61. Further, the method for separating the first wafer W can also be arbitrarily determined.
　第１のウェハＷの分離が行われると、続いて、チャック８３を加工位置Ａ１に移動させ、研削ユニット８４によって図４（ｆ）に示すようにデバイスウェハＷｄ１の分離面を研削する（図５のステップＰ５）。かかる研削処理により、デバイスウェハＷｄ１の分離面に残る周縁改質層Ｍ１、内部面改質層Ｍ２を除去するとともに、デバイスウェハＷｄ１を所望の仕上厚みまで減少させる。 When the first wafer W is separated, the chuck 83 is subsequently moved to the machining position A1 and the grinding unit 84 grinds the separated surface of the device wafer Wd1 as shown in FIG. 4 (f) (FIG. 5). Step P5). By such a grinding process, the peripheral modification layer M1 and the internal surface modification layer M2 remaining on the separation surface of the device wafer Wd1 are removed, and the device wafer Wd1 is reduced to a desired finish thickness.
　加工装置８０において第１のウェハＷが所望の厚みまで薄化された重合ウェハＴは、ウェハ搬送装置７０により洗浄装置４１に搬送され、デバイスウェハＷｄ１の研削面が洗浄される図５のステップＰ６）。 The polymerized wafer T in which the first wafer W is thinned to a desired thickness in the processing apparatus 80 is conveyed to the cleaning apparatus 41 by the wafer transfer apparatus 70, and the ground surface of the device wafer Wd1 is cleaned in step P6 of FIG. ).
　続いて重合ウェハＴは、ウェハ搬送装置５０によりエッチング装置４０に搬送され、デバイスウェハＷｄ１の研削面が薬液によりウェットエッチングされる（図５のステップＰ７）。 Subsequently, the polymerized wafer T is transferred to the etching device 40 by the wafer transfer device 50, and the ground surface of the device wafer Wd1 is wet-etched by the chemical solution (step P7 in FIG. 5).
　その後、すべての処理が施された重合ウェハＴは、ウェハ搬送装置５０によりトランジション装置３０に搬送され、さらにウェハ搬送装置２０によりカセット載置台１０のカセットＣｔに搬送される。こうして、ウェハ処理システム１における一連のウェハ処理が終了する。 After that, the polymerized wafer T that has been subjected to all the processing is transported to the transition device 30 by the wafer transfer device 50, and further transferred to the cassette Ct of the cassette mounting table 10 by the wafer transfer device 20. In this way, a series of wafer processing in the wafer processing system 1 is completed.
　なお、上記実施形態においては、未接合領域Ａｅをウェハ処理システム１の内部に設けられた界面改質装置６０において形成したが、未接合領域Ａｅは、重合ウェハＴがウェハ処理システム１に搬入されるよりも前に予め形成されてもよい。かかる場合、ウェハ処理システム１の構成おいて界面改質装置６０を省略してもよい。 In the above embodiment, the unbonded region Ae is formed by the interface reformer 60 provided inside the wafer processing system 1, but in the unbonded region Ae, the polymerized wafer T is carried into the wafer processing system 1. It may be preformed before it is used. In such a case, the interface reformer 60 may be omitted in the configuration of the wafer processing system 1.
　以上の実施形態によれば、隣接する周縁改質層Ｍ１をそれぞれ厚み方向、径方向にずらして斜め方向に並べて形成することにより、当該周縁改質層Ｍ１から伸展するクラックＣ１が第１のウェハＷの裏面Ｗｂに到達することが抑制される。これにより、周縁部Ｗｅが意図せずに分離ウェハＷｄ２から剥離されることが抑制され、当該分離ウェハＷｄ２を適切に再利用することができる。 According to the above embodiment, the cracks C1 extending from the peripheral modification layer M1 are formed on the first wafer by forming the adjacent peripheral modification layers M1 so as to be arranged in the diagonal direction while shifting in the thickness direction and the radial direction, respectively. Reaching the back surface Wb of W is suppressed. As a result, it is possible to prevent the peripheral edge portion We from being unintentionally peeled from the separated wafer Wd2, and the separated wafer Wd2 can be appropriately reused.
　また以上の実施形態によれば、周縁改質層Ｍ１と内部面改質層Ｍ２とを、レーザ光の照射を停止することなく、第１のウェハＷの径方向外側から連続的に形成することができる。これにより、内部改質装置６１における改質層の形成動作にかかるスループットを適切に向上できる。 Further, according to the above embodiment, the peripheral modification layer M1 and the inner surface modification layer M2 are continuously formed from the radial outside of the first wafer W without stopping the irradiation of the laser beam. Can be done. As a result, the throughput required for the reforming layer forming operation in the internal reformer 61 can be appropriately improved.
　また以上の本実施形態によれば、隣接する周縁改質層Ｍ１を斜め方向に並べて形成することによりデバイスウェハＷｄ１の端部に角部Ｋが形成されず、第１のウェハＷの分離時においてデバイスウェハＷｄ１の端部に応力が集中することが抑制される。これにより、第１のウェハＷの分離に際してデバイスウェハＷｄ１の端部に欠けが生じることが抑制され、ウェハ処理システム１内部へのパーティクルの発生が抑制されるとともに、製品としてのデバイスウェハＷｄ１に欠陥が生じることが抑制される。 Further, according to the above embodiment, by forming the adjacent peripheral modification layers M1 in an oblique direction, the corner portion K is not formed at the end of the device wafer Wd1, and the first wafer W is separated. The concentration of stress on the end of the device wafer Wd1 is suppressed. As a result, it is suppressed that the end portion of the device wafer Wd1 is chipped when the first wafer W is separated, the generation of particles inside the wafer processing system 1 is suppressed, and the device wafer Wd1 as a product is defective. Is suppressed.
　なお、このように隣接する周縁改質層Ｍ１を斜め方向に並べて形成した場合、図４（ｆ）にも示したように、最終仕上厚みまで減少されたデバイスウェハＷｄ１の端部が傾斜を有し、特にこの端部においてデバイスウェハＷｄ１を適切に製品化できないおそれがある。そこでウェハ処理システム１において形成される周縁改質層は、少なくともデバイスウェハＷｄ１の最終仕上げ厚みよりも表面Ｗａ側においては、第１のウェハＷの面方向に対して垂直方向に並べて形成されることが好ましい。 When the adjacent peripheral modification layers M1 are formed by arranging them in an oblique direction in this way, as shown in FIG. 4 (f), the end portion of the device wafer Wd1 reduced to the final finish thickness has an inclination. However, there is a risk that the device wafer Wd1 cannot be properly commercialized, especially at this end. Therefore, the peripheral modification layers formed in the wafer processing system 1 are formed so as to be arranged in a direction perpendicular to the surface direction of the first wafer W, at least on the surface Wa side of the final finish thickness of the device wafer Wd1. Is preferable.
　具体的には、図８に示すように、第１のウェハＷの内部に形成される周縁改質層は、上記実施形態に示したように斜め方向に並べて形成される第１の周縁改質層Ｍ１と、第１のウェハＷの厚み方向に並べて形成される第２の周縁改質層Ｍ３と、を有することが好ましい。 Specifically, as shown in FIG. 8, the peripheral modification layers formed inside the first wafer W are formed by arranging the peripheral modification layers in an oblique direction as shown in the above embodiment. It is preferable to have the layer M1 and the second peripheral modification layer M3 formed side by side in the thickness direction of the first wafer W.
　第１の周縁改質層Ｍ１は、上述のように第１のウェハＷの内部において斜め方向に並べて形成され、クラックＣ１の上端部が内部面改質層Ｍ２から伸展するクラックＣ２の外周側端部と接続する。また、クラックＣ１の下端部は第１のウェハＷの表面Ｗａには到達させず、少なくともデバイスウェハＷｄ１の最終仕上げ厚み高さＧよりも上方に位置させる。 The first peripheral edge modification layer M1 is formed so as to be arranged diagonally inside the first wafer W as described above, and the upper end portion of the crack C1 extends from the inner surface modification layer M2 to the outer peripheral side end of the crack C2. Connect with the unit. Further, the lower end portion of the crack C1 does not reach the surface Wa of the first wafer W, and is positioned at least above the final finish thickness height G of the device wafer Wd1.
　第２の周縁改質層Ｍ３は、第１のウェハＷの内部において厚み方向に並べて形成される。また第２の周縁改質層Ｍ３は、未接合領域Ａｅと接合領域Ａｃの境界Ａｄの若干径方向内側、かつデバイスウェハＷｄ１の最終仕上げ厚み高さＧよりも上方に形成されるのが好ましい。また、第２の周縁改質層Ｍ３から第１のウェハＷの厚み方向に伸展するクラックＣ３は、下端部を第１のウェハＷの表面Ｗａに到達させ、上端部をクラックＣ１の下端部と接続する。 The second peripheral modification layer M3 is formed inside the first wafer W so as to be arranged in the thickness direction. Further, it is preferable that the second peripheral edge modification layer M3 is formed slightly inside the boundary Ad between the unbonded region Ae and the bonding region Ac in the radial direction and above the final finish thickness height G of the device wafer Wd1. Further, the crack C3 extending from the second peripheral edge modifying layer M3 in the thickness direction of the first wafer W has the lower end portion reaching the surface Wa of the first wafer W and the upper end portion with the lower end portion of the crack C1. Connecting.
　このように、第２の周縁改質層Ｍ３を第１のウェハＷの厚み方向に並べて形成し、かかる第２の周縁改質層Ｍ３をデバイスウェハＷｄ１の最終仕上げ厚み高さＧよりも上方に位置させることにより、製品としてのデバイスウェハＷｄ１の端部に傾斜が形成されることが適切に抑制されるとともに、仕上研削処理後のデバイスウェハＷｄ１に周縁改質層Ｍ１、Ｍ３が残ることが適切に抑制される。また、最終仕上げ厚み高さＧより上方においては周縁改質層Ｍ１を斜め方向に並べて形成することにより、第１のウェハＷの分離に際してデバイスウェハＷｄ１に角部Ｋが形成されることが適切に抑制される。また更に、第２の周縁改質層Ｍ３を第１のウェハＷの厚み方向に並べて形成することにより、クラックＣ３が第１のウェハＷの厚み方向に伸展しやすく、すなわち適切に第１のウェハＷの表面ＷａまでクラックＣ３を伸展させることができる。 In this way, the second peripheral modification layers M3 are formed side by side in the thickness direction of the first wafer W, and the second peripheral modification layers M3 are formed above the final finish thickness height G of the device wafer Wd1. By locating it, it is appropriate to appropriately suppress the formation of an inclination at the end of the device wafer Wd1 as a product, and it is appropriate that the peripheral modification layers M1 and M3 remain on the device wafer Wd1 after the finish grinding process. Is suppressed. Further, by forming the peripheral modification layers M1 diagonally above the final finish thickness height G, it is appropriate that the corner portions K are formed on the device wafer Wd1 when the first wafer W is separated. It is suppressed. Furthermore, by forming the second peripheral modification layer M3 side by side in the thickness direction of the first wafer W, the crack C3 can easily extend in the thickness direction of the first wafer W, that is, the first wafer can be appropriately extended. The crack C3 can be extended to the surface Wa of W.
　なお、以上の実施形態においては、例えば周縁改質層Ｍ１の形成にあたりレーザ光の照射位置を第１のウェハＷの径方向、及び厚み方向に一定の速度で移動させ、図６に示したように、周縁改質層Ｍ１を断面視において略線形状に配置したが、周縁改質層Ｍ１の配置はこれに限定されるものではない。例えば周縁改質層Ｍ１の形成におけるレーザ光の照射位置の移動を制御することで、図９に示すように周縁改質層Ｍ１を断面視において略ラウンド形状に配置してもよい。かかる場合であっても、デバイスウェハＷｄ１に角部Ｋが形成されないため、第１のウェハＷの分離にあたってデバイスウェハＷｄ１が欠けることが適切に抑制される。また、周縁改質層Ｍ１が厚み方向に並べて形成されないため、クラックＣ１が第１のウェハＷの厚み方向へ伸展し第１のウェハＷの裏面Ｗｂに到達することが抑制される。 In the above embodiment, for example, when forming the peripheral modification layer M1, the laser beam irradiation position is moved at a constant speed in the radial direction and the thickness direction of the first wafer W, as shown in FIG. In addition, the peripheral modification layer M1 is arranged in a substantially linear shape in a cross-sectional view, but the arrangement of the peripheral modification layer M1 is not limited to this. For example, by controlling the movement of the irradiation position of the laser beam in the formation of the peripheral modification layer M1, the peripheral modification layer M1 may be arranged in a substantially round shape in a cross-sectional view as shown in FIG. Even in such a case, since the corner portion K is not formed on the device wafer Wd1, it is appropriately suppressed that the device wafer Wd1 is chipped when the first wafer W is separated. Further, since the peripheral modification layers M1 are not formed side by side in the thickness direction, it is suppressed that the crack C1 extends in the thickness direction of the first wafer W and reaches the back surface Wb of the first wafer W.
　なお、以上の実施形態においては、ウェハ処理システム１の内部、もしくは外部に設けられた界面改質装置６０において第１のウェハＷとデバイス層Ｄとの界面に未接合領域Ａｅを形成したが、未接合領域Ａｅは必ずしも形成される必要はない。具体的には、図２に示したように第１のウェハＷ及び第２のウェハＳの周縁部には面取り加工がされており、これにより、端部に向けて厚みが小さく形成された面取り部が形成されている。換言すれば、このように面取り部が形成された第１のウェハＷと第２のウェハＳが接合された重合ウェハＴにおいては、当該面取り部においては第１のウェハＷと第２のウェハＳが接合されていないものとみなすことができる。 In the above embodiment, the unbonded region Ae is formed at the interface between the first wafer W and the device layer D in the interface reformer 60 provided inside or outside the wafer processing system 1. The unbonded region Ae does not necessarily have to be formed. Specifically, as shown in FIG. 2, the peripheral edges of the first wafer W and the second wafer S are chamfered, whereby the chamfering is formed to have a smaller thickness toward the end. The part is formed. In other words, in the polymerized wafer T in which the first wafer W and the second wafer S on which the chamfered portion is formed are joined, the first wafer W and the second wafer S are formed in the chamfered portion. Can be regarded as unjoined.
　そこで図１０に示すように、重合ウェハＴにおいて第１のウェハＷと第２のウェハＳの面取り部Ｒの形成範囲を未接合領域Ａｅと、換言すれば、面取り部Ｒを除去対象としての前記第１のウェハＷの周縁部Ｗｅとみなしてもよい。すなわち、当該面取り部Ｒの内周側端部を上記実施形態における境界Ａｄとみなし、当該境界Ａｄの若干径方向内側に周縁改質層Ｍ１を形成することができる。そして、かかる場合、周縁改質層Ｍ１から伸展するクラックＣ１の下端部を、第１のウェハＷの表面Ｗａ側における面取り部Ｒの径方向内側端部に到達させる。これにより、レーザ光の照射により第１のウェハＷの界面に未接合領域Ａｅを形成する必要がなくなるため、ウェハ処理に係る時間を短縮できるとともに、界面改質装置６０を構成することが不要になり、システム構成を簡略化できる。また、クラックＣ１の下端部を面取り部Ｒの径方向内側端部に到達させることにより、より適切に周縁部Ｗｅ除去することができる。 Therefore, as shown in FIG. 10, in the polymerized wafer T, the formation range of the chamfered portion R of the first wafer W and the second wafer S is defined as the unbonded region Ae, in other words, the chamfered portion R is the removal target. It may be regarded as the peripheral edge We of the first wafer W. That is, the inner peripheral side end portion of the chamfered portion R can be regarded as the boundary Ad in the above embodiment, and the peripheral modification layer M1 can be formed slightly radially inside the boundary Ad. Then, in such a case, the lower end portion of the crack C1 extending from the peripheral modification layer M1 is brought to reach the radial inner end portion of the chamfered portion R on the surface Wa side of the first wafer W. As a result, it is not necessary to form an unbonded region Ae at the interface of the first wafer W by irradiating the laser beam, so that the time required for wafer processing can be shortened and it is not necessary to configure the interface modifier 60. Therefore, the system configuration can be simplified. Further, by making the lower end portion of the crack C1 reach the radial inner end portion of the chamfered portion R, the peripheral edge portion We can be removed more appropriately.
　また、第１のウェハＷの内部に、図１１（ａ）に示すようにクラックＣ１が第１のウェハＷの表面Ｗａ、裏面Ｗｂにそれぞれ到達するように周縁改質層Ｍ１を形成してもよい。すなわち図１１（ｂ）に示すように、周縁改質層Ｍ１、及びクラックＣ１を基点として周縁部Ｗｅのみを第１のウェハＷから除去してもよい。除去された周縁部Ｗｅは、例えば回収部（図示せず）に回収される。このように周縁改質層Ｍ１を斜め方向に並べて形成して周縁部Ｗｅの除去を行う場合、上記実施形態でも示したように、周縁部Ｗｅの除去後の第１のウェハＷへの角部Ｋの形成が抑制され、すなわち、第１のウェハＷの角部Ｋに欠けが生じることが抑制される。そして、これによりウェハ処理システム１の内部におけるパーティクルの発生が抑制されるとともに、製品としての第１のウェハＷ（デバイスウェハＷｄ１）の品質低下が抑制される。 Further, even if the peripheral modification layer M1 is formed inside the first wafer W so that the crack C1 reaches the front surface Wa and the back surface Wb of the first wafer W, respectively, as shown in FIG. 11A. good. That is, as shown in FIG. 11B, only the peripheral edge portion We may be removed from the first wafer W with the peripheral edge modifying layer M1 and the crack C1 as base points. The removed peripheral edge We is collected, for example, in a collection unit (not shown). When the peripheral edge modification layers M1 are formed in an oblique direction in this way to remove the peripheral edge portion We, as shown in the above embodiment, the corner portion to the first wafer W after the peripheral edge portion We is removed. The formation of K is suppressed, that is, the occurrence of chipping at the corner K of the first wafer W is suppressed. As a result, the generation of particles inside the wafer processing system 1 is suppressed, and the quality deterioration of the first wafer W (device wafer Wd1) as a product is suppressed.
　また、周縁改質層Ｍ１、及びクラックＣ１を基点として周縁部Ｗｅのみを第１のウェハＷから除去する場合、その後、例えば加工装置８０において第１のウェハＷの裏面Ｗｂを研削し、当該第１のウェハＷを薄化する。かかる場合、図１１に示したようにクラックＣ１が第１のウェハＷの表面Ｗａに対して斜め方向に形成されることにより、研削後における第１のウェハＷの外縁部に欠けが生じることが抑制される。そして、これにより、研削後におけるウェハ処理システム１の内部におけるパーティクルの発生が抑制されるとともに、製品としての第１のウェハＷ（デバイスウェハＷｄ１）の品質低下が抑制される。 Further, when removing only the peripheral edge portion We from the first wafer W with the peripheral edge modifying layer M1 and the crack C1 as the base points, after that, for example, the processing apparatus 80 grinds the back surface Wb of the first wafer W to the first wafer W. The wafer W of 1 is thinned. In such a case, as shown in FIG. 11, the crack C1 is formed in an oblique direction with respect to the surface Wa of the first wafer W, so that the outer edge portion of the first wafer W after grinding may be chipped. It is suppressed. As a result, the generation of particles inside the wafer processing system 1 after grinding is suppressed, and the quality deterioration of the first wafer W (device wafer Wd1) as a product is suppressed.
　研削後における第１のウェハＷの外縁部に欠けが生じることの抑制に、本開示の技術を利用する場合、クラックＣ１は第１のウェハＷの表面Ｗａに対して斜め方向に形成される。そして、このクラックＣ１が斜め方向に形成される途中において、クラックＣ１の方向を第１のウェハＷの表面Ｗａに対して垂直方向に向けてもよい。すなわち、クラックＣ１の下端部は表面Ｗａに対して斜め方向に形成され、クラックＣ１の上端部は裏面Ｗｂに対して垂直方向に形成されてもよい。但し、クラックＣ１の伸展方向を第１のウェハＷの表面Ｗａに対して垂直方向に向けて形成される範囲は、その後の研削により除去されるように形成する。 When the technique of the present disclosure is used to prevent the outer edge of the first wafer W from being chipped after grinding, the crack C1 is formed in an oblique direction with respect to the surface Wa of the first wafer W. Then, while the crack C1 is being formed in the oblique direction, the direction of the crack C1 may be directed in the direction perpendicular to the surface Wa of the first wafer W. That is, the lower end portion of the crack C1 may be formed in an oblique direction with respect to the front surface Wa, and the upper end portion of the crack C1 may be formed in a direction perpendicular to the back surface Wb. However, the range formed in which the expansion direction of the crack C1 is directed in the direction perpendicular to the surface Wa of the first wafer W is formed so as to be removed by the subsequent grinding.
　クラックＣ１が第１のウェハＷの表面Ｗａに対して斜め方向に向かう位置（すなわち、クラックＣ１の伸展方向が垂直方向から斜め方向に変わる位置）は、第１のウェハＷと第２のウェハＳの未接合領域Ａｅの内周側端部に決定される。あるいは、上記位置は、未接合領域Ａｅの内周側端部よりも若干径方向内側に決定されてもよい。なお、この未接合領域Ａｅは、図６に示したように改質されて接合強度が低下された未接合領域Ａｅであってもよいし、図１０示したように面取り部Ｒであってもよい。 The positions where the crack C1 faces obliquely with respect to the surface Wa of the first wafer W (that is, the position where the extension direction of the crack C1 changes from the vertical direction to the diagonal direction) are the positions of the first wafer W and the second wafer S. It is determined at the inner peripheral side end of the unjoined region Ae. Alternatively, the position may be determined slightly inward in the radial direction with respect to the inner peripheral side end portion of the unjoined region Ae. The unjoined region Ae may be an unjoined region Ae that has been modified as shown in FIG. 6 to reduce the joining strength, or may be a chamfered portion R as shown in FIG. good.
　また、周縁改質層Ｍ１、及びクラックＣ１を基点として周縁部Ｗｅのみを第１のウェハＷから除去する場合、周縁部Ｗｅを周方向に小片化するのが好ましい。周縁部Ｗｅを小片化する方法としては、例えば周縁部Ｗｅの内部に複数の分割改質層Ｍ４を形成し、当該複数の分割改質層Ｍ４を基点として周縁部Ｗｅを小片化する。 Further, when removing only the peripheral edge portion We from the first wafer W with the peripheral edge modifying layer M1 and the crack C1 as the base points, it is preferable to fragment the peripheral edge portion We in the circumferential direction. As a method of fragmenting the peripheral edge portion We, for example, a plurality of divided and modified layers M4 are formed inside the peripheral edge portion We, and the peripheral edge portion We is fragmented using the plurality of divided and modified layers M4 as a base point.
　具体的には、例えば内部改質装置６１において、第１のウェハＷ（周縁部Ｗｅ）の内部にレーザ光を照射して、図１２及び図１３に示すように、第１のウェハＷの面方向に対して垂直方向であって、かつ当該第１のウェハＷの径方向に沿って、複数の分割改質層Ｍ４を形成する。なお、図示の例においては、径方向に延伸するラインの分割改質層Ｍ４は８箇所に形成されているが、少なくとも、分割改質層Ｍ４のラインが２箇所に形成されていれば、周縁部Ｗｅを小片化して除去できる。 Specifically, for example, in the internal reformer 61, the inside of the first wafer W (peripheral portion We) is irradiated with a laser beam, and as shown in FIGS. 12 and 13, the surface of the first wafer W is surfaced. A plurality of split reformed layers M4 are formed in the direction perpendicular to the direction and along the radial direction of the first wafer W. In the illustrated example, the split-modifying layer M4 of the line extending in the radial direction is formed at eight locations, but if at least the lines of the split-modifying layer M4 are formed at two locations, the peripheral edge. Part We can be fragmented and removed.
　複数の分割改質層Ｍ４は、クラックＣ１の上端部（裏面Ｗｂに到達する部分）より径方向外側に形成される。また、複数の分割改質層Ｍ４は、第１のウェハＷの厚み方向に周縁改質層Ｍ１及びクラックＣ１の上方において、後述する分割改質層Ｍ４から伸展するクラックＣ４の下端部が周縁改質層Ｍ１またはクラックＣ１に到達するように形成される。例えば、第１のウェハＷの厚み位置に対応し、レーザ光を照射する径方向距離を制御することで、本実施形態の複数の分割改質層Ｍ４が形成される。この場合、クラックＣ４の下端部は、周縁改質層Ｍ１またはクラックＣ１を通過しないのが好ましい。 The plurality of split reforming layers M4 are formed radially outward from the upper end portion (the portion reaching the back surface Wb) of the crack C1. Further, in the plurality of divided modified layers M4, the lower end portion of the crack C4 extending from the divided modified layer M4, which will be described later, is peripherally modified above the peripheral modified layer M1 and the crack C1 in the thickness direction of the first wafer W. It is formed so as to reach the layer M1 or the crack C1. For example, by controlling the radial distance for irradiating the laser beam corresponding to the thickness position of the first wafer W, the plurality of divided modified layers M4 of the present embodiment are formed. In this case, it is preferable that the lower end portion of the crack C4 does not pass through the peripheral modification layer M1 or the crack C1.
　また複数の分割改質層Ｍ４は周縁部Ｗｅとして除去されるため、最下段の分割改質層Ｍ４の位置は特に限定されるものではない。本実施形態では、最下段の分割改質層Ｍ４を、最終仕上げ厚み高さＧよりも上方に形成している。 Further, since the plurality of divided modified layers M4 are removed as the peripheral portion We, the position of the lowermost divided modified layer M4 is not particularly limited. In the present embodiment, the lowermost split reforming layer M4 is formed above the final finish thickness height G.
　また、分割改質層Ｍ４からはクラックＣ４が伸展する。未接合領域Ａｅと接合領域Ａｃとの境界Ａｄより径方向外側においては、クラックＣ４の上端部は裏面Ｗｂに到達し、下端部は表面Ｗａに到達する。一方、境界Ａｄより径方向内側においては、クラックＣ４の上端部は裏面Ｗｂに到達し、下端部は周縁改質層Ｍ１またはクラックＣ１に到達する。なお、クラックＣ４の形成タイミングは、本実施形態に限定されない。例えば、クラックＣ４の裏面Ｗｂへの到達は、レーザ光の照射による分割改質層Ｍ４の形成時ではなく、周縁部Ｗｅの除去時に行われるようにしてもよい。この周縁部Ｗｅの除去方法は、特に限定されない。例えば、周縁部Ｗｅを吸着保持して除去してもよいし、あるいは周縁部Ｗｅに対して衝撃を付与して当該周縁部Ｗｅを除去してもよい。またこの際、重合ウェハＴの側方より、周縁部Ｗｅとデバイス層Ｄの界面に対して、先端が尖った形状を有する挿入部材（例えばくさびローラやブレード等）を挿入してもよい。 Further, the crack C4 extends from the split reforming layer M4. On the radial outer side of the boundary Ad between the unbonded region Ae and the bonded region Ac, the upper end portion of the crack C4 reaches the back surface Wb and the lower end portion reaches the front surface Wa. On the other hand, inside the boundary Ad in the radial direction, the upper end portion of the crack C4 reaches the back surface Wb, and the lower end portion reaches the peripheral edge modification layer M1 or the crack C1. The timing of forming the crack C4 is not limited to this embodiment. For example, the crack C4 may reach the back surface Wb not when the split reforming layer M4 is formed by irradiation with a laser beam but when the peripheral edge portion We is removed. The method for removing the peripheral portion We is not particularly limited. For example, the peripheral edge portion We may be adsorbed and held and removed, or the peripheral edge portion We may be impacted to remove the peripheral edge portion We. At this time, an insertion member (for example, a wedge roller, a blade, or the like) having a sharp tip may be inserted into the interface between the peripheral edge portion We and the device layer D from the side of the polymerization wafer T.
　本実施形態によれば、周縁部Ｗｅを除去する際、当該周縁部Ｗｅは、環状の周縁改質層Ｍ１を基点に分離しつつ、分割改質層Ｍ４によって複数に分割される。そうすると、除去される周縁部Ｗｅが小片化され、より容易に除去することができる。 According to the present embodiment, when the peripheral edge portion We is removed, the peripheral edge portion We is divided into a plurality of parts by the divided modified layer M4 while being separated from the annular peripheral edge modified layer M1 as a base point. Then, the peripheral portion We to be removed is fragmented and can be removed more easily.
　しかも、本実施形態では、分割改質層Ｍ４は、周縁改質層Ｍ１及びクラックＣ１の上方において、クラックＣ４の下端部が周縁改質層Ｍ１またはクラックＣ１に到達するように形成される。換言すれば、分割改質層Ｍ４は、クラックＣ１の上端部の径方向外側において広範囲に形成される。したがって、分割改質層Ｍ４によって周縁部Ｗｅを確実に小片化することができる。 Moreover, in the present embodiment, the split modified layer M4 is formed so that the lower end portion of the crack C4 reaches the peripheral modified layer M1 or the crack C1 above the peripheral modified layer M1 and the crack C1. In other words, the split modified layer M4 is formed over a wide area on the radial outer side of the upper end portion of the crack C1. Therefore, the peripheral portion We can be surely fragmented by the split modification layer M4.
　なお、周縁改質層Ｍ１及びクラックＣ１より径方向外側において、分割改質層Ｍ４が形成される位置は上記実施形態に限定されない。 The position where the split modified layer M4 is formed on the radial side of the peripheral modified layer M1 and the crack C1 is not limited to the above embodiment.
　例えば、図１４に示すように、複数の分割改質層Ｍ４は、第１のウェハＷの径方向において、周縁改質層Ｍ１の最外側より更に外側に形成されてもよい。すなわち、複数の分割改質層Ｍ４は、未接合領域Ａｅと接合領域Ａｃとの境界Ａｄより径方向外側に形成されてもよい。また最下段の分割改質層Ｍ４の位置は特に限定されるものではないが、本実施形態では、最終仕上げ厚み高さＧよりも上方としている。分割改質層Ｍ４から伸展するクラックＣ４は、表面Ｗａと裏面Ｗｂに到達する。 For example, as shown in FIG. 14, the plurality of divided modified layers M4 may be formed further outside the outermost peripheral modified layer M1 in the radial direction of the first wafer W. That is, the plurality of divided modified layers M4 may be formed radially outside the boundary Ad between the unbonded region Ae and the bonded region Ac. The position of the lowermost split reforming layer M4 is not particularly limited, but in the present embodiment, it is above the final finish thickness height G. The crack C4 extending from the split modified layer M4 reaches the front surface Wa and the back surface Wb.
　かかる場合、上記実施形態と同様に、分割改質層Ｍ４によって周縁部Ｗｅを小片化して容易に除去することができる。また、本実施形態では、第１のウェハＷの厚み方向に、レーザ光を照射する径方向距離は同一でよいため、レーザ加工を容易に行うことができる。特に、クラックＣ１の上端部と境界Ａｄまでの径方向距離が十分に小さい場合、周縁改質層Ｍ１と分割改質層Ｍ４との間に改質層が存在しなくても、周縁部Ｗｅを適切に分割することができる。 In such a case, as in the above embodiment, the peripheral portion We can be easily removed by fragmenting the peripheral portion We by the split reforming layer M4. Further, in the present embodiment, since the radial distance for irradiating the laser beam may be the same in the thickness direction of the first wafer W, laser processing can be easily performed. In particular, when the radial distance between the upper end of the crack C1 and the boundary Ad is sufficiently small, the peripheral edge We can be formed even if the modified layer does not exist between the peripheral modified layer M1 and the divided modified layer M4. It can be divided appropriately.
　なお、以上の図１３及び図１４に示した例では、クラックＣ１は第１のウェハＷの表面Ｗａに対して斜め方向に形成されたが、このクラックＣ１が斜め方向に形成される途中において、クラックＣ１の方向を第１のウェハＷの表面Ｗａに対して垂直方向に向けてもよい。 In the examples shown in FIGS. 13 and 14 above, the crack C1 was formed in an oblique direction with respect to the surface Wa of the first wafer W, but while the crack C1 was formed in the oblique direction, the crack C1 was formed in the oblique direction. The direction of the crack C1 may be oriented perpendicular to the surface Wa of the first wafer W.
　なお、以上の実施形態においては、重合ウェハＴはデバイス層Ｄを含んだが、デバイス層Ｄを含まない重合ウェハであってもよい。 In the above embodiment, the polymerization wafer T includes the device layer D, but may be a polymerization wafer that does not include the device layer D.
　なお、以上の実施形態においてはウェハ処理システム１において第１のウェハＷと第２のウェハＳとが接合された重合ウェハＴにおいて、第１のウェハＷの周縁部の除去、薄化を行う場合を例に説明を行ったが、第１のウェハＷは第２のウェハＳと接合されていなくてもよい。 In the above embodiment, in the layered wafer T in which the first wafer W and the second wafer S are joined in the wafer processing system 1, the peripheral portion of the first wafer W is removed and thinned. However, the first wafer W may not be bonded to the second wafer S.
　今回開示された実施形態はすべての点で例示であって制限的なものではないと考えられるべきである。上記の実施形態は、添付の請求の範囲及びその主旨を逸脱することなく、様々な形態で省略、置換、変更されてもよい。 The embodiments disclosed this time should be considered to be exemplary in all respects and not restrictive. The above embodiments may be omitted, replaced or modified in various forms without departing from the scope of the appended claims and their gist.
　　１　　ウェハ処理システム
　　６１　内部改質装置
　　９０　制御装置
　　Ｗ　　第１のウェハ
　　Ｗａ　表面
　　Ｗｂ　裏面
　　Ｗｃ　中央部
　　Ｗｄ　境界
　　Ｗｅ　周縁部
　　Ｍ１　（第１の）周縁改質層
　　Ｍ３　第２の周縁改質層
  1 Wafer processing system 61 Internal reformer 90 Control device W 1st wafer Wa Front surface Wb Back surface Wc Central part Wd Boundary We Peripheral part M1 (1st) Peripheral reforming layer M3 2nd peripheral reforming layer

Claims (20)

  1. 基板を処理する基板処理方法であって、
    前記基板の裏面側からレーザ光を照射して、前記基板の除去対象の周縁部と前記基板の中央部の境界に沿って、複数の第１の周縁改質層を形成することを含み、
    複数の前記第１の周縁改質層は、前記基板の径方向外側から内側に向けて、前記基板の内部における表面側から裏面側へと向かうように、それぞれ異なる高さ位置に形成される、基板処理方法。     It is a substrate processing method that processes a substrate.
    It includes irradiating a laser beam from the back surface side of the substrate to form a plurality of first peripheral modification layers along the boundary between the peripheral portion of the substrate to be removed and the central portion of the substrate.
    The plurality of first peripheral modification layers are formed at different height positions from the radial outer side to the inner side of the substrate and from the front surface side to the back surface side inside the substrate. Substrate processing method.
  2. 前記第１の周縁改質層の形成時において、隣接する前記第１の周縁改質層から伸展する第１の亀裂が連結される、請求項１に記載の基板処理方法。 The substrate processing method according to claim 1, wherein when the first peripheral modification layer is formed, the first crack extending from the adjacent first peripheral modification layer is connected.
  3. 前記基板の内部にレーザ光を照射して、前記基板の除去対象の周縁部と前記基板の中央部の境界に沿って、複数の第２の周縁改質層を形成することを含み、
    複数の前記第２の周縁改質層は、前記基板の面方向に対して垂直方向に並べて形成され、
    前記第２の周縁改質層から伸展する第２の亀裂は、下端部が前記基板の表面に到達され、上端部が前記第１の亀裂の下端部と連結される、請求項２に記載の基板処理方法。     Including irradiating the inside of the substrate with a laser beam to form a plurality of second peripheral modification layers along the boundary between the peripheral portion of the substrate to be removed and the central portion of the substrate.
    The plurality of the second peripheral modification layers are formed so as to be arranged in a direction perpendicular to the surface direction of the substrate.
    The second aspect of claim 2, wherein the lower end of the second crack extending from the second peripheral modification layer reaches the surface of the substrate and the upper end is connected to the lower end of the first crack. Substrate processing method.
  4. 前記第２の亀裂の上端部は、前記基板の最終仕上げ厚み高さよりも裏面側に位置する、請求項３に記載の基板処理方法。 The substrate processing method according to claim 3, wherein the upper end portion of the second crack is located on the back surface side of the final finishing thickness height of the substrate.
  5. 前記基板の内部にレーザ光を照射して、前記基板の面方向に沿って複数の内部面改質層を形成することを含み、
    前記内部面改質層から面方向に伸展する第３の亀裂は、径方向外側端部が前記第１の亀裂の上端部と連結される、請求項２～４のいずれか一項に記載の基板処理方法。     Including irradiating the inside of the substrate with a laser beam to form a plurality of internal surface modification layers along the surface direction of the substrate.
    The third crack extending in the plane direction from the inner surface modification layer is according to any one of claims 2 to 4, wherein the radial outer end portion is connected to the upper end portion of the first crack. Substrate processing method.
  6. 前記第１の周縁改質層及び前記内部面改質層は、前記基板の径方向外側から内側に向けて連続的に形成される、請求項５に記載の基板処理方法。 The substrate processing method according to claim 5, wherein the first peripheral modification layer and the internal surface modification layer are continuously formed from the radial outer side to the inner side of the substrate.
  7. 前記基板は表面側が他の基板と接合されることにより重合基板を形成し、
    前記周縁部における前記基板と前記他の基板の接合強度を弱める未接合領域を形成することを含む、請求項１～６のいずれか一項に記載の基板処理方法。     The surface side of the substrate is bonded to another substrate to form a polymerized substrate.
    The substrate processing method according to any one of claims 1 to 6, further comprising forming an unbonded region in the peripheral portion that weakens the bonding strength between the substrate and the other substrate.
  8. 前記基板には、断面視において端部の厚みが小さく形成された面取り部が形成され、
    前記基板は表面側が他の基板と接合されることにより重合基板を形成し、
    前記第１の周縁改質層の形成時において、前記第１の周縁改質層から伸展する第１の亀裂の下端部を、前記基板の表面における前記面取り部の径方向内側端部に到達させる、請求項１～６のいずれか一項に記載の基板処理方法。     A chamfered portion having a small end thickness formed in the cross-sectional view is formed on the substrate.
    The surface side of the substrate is bonded to another substrate to form a polymerized substrate.
    At the time of forming the first peripheral modification layer, the lower end portion of the first crack extending from the first peripheral modification layer is made to reach the radial inner end portion of the chamfered portion on the surface of the substrate. , The substrate processing method according to any one of claims 1 to 6.
  9. 前記基板の内部にレーザ光を照射して、前記基板の面方向に対して垂直方向であって、かつ当該基板の径方向に沿って、複数の分割改質層を形成することを含み、
    複数の前記分割改質層は、前記第１の周縁改質層から伸展する第１の亀裂の上端部より径方向外側に形成され、かつ、前記基板の厚み方向に前記第１の周縁改質層及び前記第１の亀裂の上方において、分割改質層から伸展する第４の亀裂の下端部が前記第１の周縁改質層または前記第１の亀裂に到達するように形成される、請求項１～８のいずれか一項に記載の基板処理方法。     Including irradiating the inside of the substrate with a laser beam to form a plurality of divided reforming layers in a direction perpendicular to the surface direction of the substrate and along the radial direction of the substrate.
    The plurality of the divided and modified layers are formed radially outward from the upper end of the first crack extending from the first peripherally modified layer, and the first peripherally modified layer is formed in the thickness direction of the substrate. A claim that the lower end of the fourth crack extending from the split modified layer is formed above the layer and the first crack so as to reach the first peripheral modified layer or the first crack. Item 8. The substrate processing method according to any one of Items 1 to 8.
  10. 前記基板の内部にレーザ光を照射して、前記基板の面方向に対して垂直方向であって、かつ当該基板の径方向に沿って、複数の分割改質層を形成することを含み、
    複数の前記分割改質層は、前記基板の径方向において、複数の前記第１の周縁改質層の最外側より更に外側に形成される、請求項１～８のいずれか一項に記載の基板処理方法。     Including irradiating the inside of the substrate with a laser beam to form a plurality of divided reforming layers in a direction perpendicular to the surface direction of the substrate and along the radial direction of the substrate.
    The invention according to any one of claims 1 to 8, wherein the plurality of the divided modified layers are formed on the outermost side of the plurality of the first peripheral modified layers in the radial direction of the substrate. Substrate processing method.
  11. 基板を処理する基板処理装置であって、
    前記基板の裏面側からレーザ光を照射して、前記基板の除去対象の周縁部と前記基板の中央部の境界に沿って、複数の第１の周縁改質層を形成する改質部と、
    前記基板に対する改質層の形成動作を制御する制御部と、を備え、
    前記制御部は、
    複数の前記第１の周縁改質層を、前記基板の径方向外側から内側に向けて、前記基板の内部における表面側から裏面側へと向かうように、それぞれ異なる高さ位置に形成するように、前記改質部の動作を制御する、基板処理装置。     It is a substrate processing device that processes substrates.
    A modified portion that irradiates a laser beam from the back surface side of the substrate to form a plurality of first peripheral modified layers along the boundary between the peripheral portion of the substrate to be removed and the central portion of the substrate.
    A control unit for controlling the formation operation of the modified layer on the substrate is provided.
    The control unit
    The plurality of first peripheral modification layers are formed at different height positions so as to be directed from the radial outer side to the inner side of the substrate and from the front surface side to the back surface side inside the substrate. , A substrate processing device that controls the operation of the reforming unit.
  12. 前記制御部は、
    前記第１の周縁改質層の形成時において、隣接する前記第１の周縁改質層から伸展する第１の亀裂が連結されるように、前記第１の周縁改質層の形成間隔を制御する、請求項１１に記載の基板処理装置。     The control unit
    When the first peripheral modification layer is formed, the formation interval of the first peripheral modification layer is controlled so that the first cracks extending from the adjacent first peripheral modification layer are connected. The substrate processing apparatus according to claim 11.
  13. 前記制御部は、
    前記基板の内部にレーザ光を照射して、前記基板の除去対象の周縁部と前記基板の中央部の境界に沿って、前記基板の面方向に対して垂直方向に並べて複数の第２の周縁改質層を形成し、
    前記第２の周縁改質層から伸展する第２の亀裂の下端部が前記基板の表面に到達し、上端部が前記第１の亀裂の下端部と連結されるように、前記改質部の動作を制御する、請求項１２に記載の基板処理装置。     The control unit
    A plurality of second peripheral edges are arranged in a direction perpendicular to the surface direction of the substrate along the boundary between the peripheral edge portion to be removed from the substrate and the central portion of the substrate by irradiating the inside of the substrate with a laser beam. Form a modified layer,
    The modified portion of the modified portion so that the lower end portion of the second crack extending from the second peripheral modification layer reaches the surface of the substrate and the upper end portion is connected to the lower end portion of the first crack. The substrate processing apparatus according to claim 12, which controls the operation.
  14. 前記制御部は、
    前記第２の亀裂の上端部が、前記基板の最終仕上げ厚み高さよりも裏面側に位置するように、前記第２の周縁改質層の形成動作を制御する、請求項１３に記載の基板処理装置。     The control unit
    The substrate treatment according to claim 13, wherein the formation operation of the second peripheral modification layer is controlled so that the upper end portion of the second crack is located on the back surface side with respect to the final finish thickness height of the substrate. Device.
  15. 前記制御部は、
    前記基板の内部にレーザ光を照射して、前記基板の面方向に沿って複数の内部面改質層を形成し、
    前記内部面改質層から面方向に伸展する第３の亀裂の径方向外側端部が、前記第１の亀裂の上端部と連結されるように、前記改質部の動作を制御する、請求項１２～１４のいずれか一項に記載の基板処理装置。     The control unit
    A laser beam is irradiated to the inside of the substrate to form a plurality of internal surface modification layers along the surface direction of the substrate.
    A claim that controls the operation of the modified portion so that the radial outer end portion of the third crack extending in the plane direction from the inner surface modified layer is connected to the upper end portion of the first crack. Item 2. The substrate processing apparatus according to any one of Items 12 to 14.
  16. 前記制御部は、
    前記第１の周縁改質層及び前記内部面改質層が、前記基板の径方向外側から内側に向けて連続的に形成されるように、前記改質部の動作を制御する、請求項１５に記載の基板処理装置。     The control unit
    15. The operation of the modified portion is controlled so that the first peripheral modification layer and the internal surface modification layer are continuously formed from the radial outer side to the inner side of the substrate. The substrate processing apparatus according to.
  17. 前記基板は表面側が他の基板と接合されることにより重合基板を形成しており、
    前記周縁部における前記基板と前記他の基板の接合強度を弱める未接合領域を形成する第２の改質部を備える、請求項１１～１６のいずれか一項に記載の基板処理装置。     The surface side of the substrate is bonded to another substrate to form a polymerized substrate.
    The substrate processing apparatus according to any one of claims 11 to 16, further comprising a second modified portion that forms an unbonded region that weakens the bonding strength between the substrate and the other substrate at the peripheral edge portion.
  18. 前記基板には、断面視において端部の厚みが小さく形成された面取り部が形成され、
    前記基板は表面側が他の基板と接合されることにより重合基板を形成しており、
    前記制御部は、
    前記第１の周縁改質層の形成時において、前記第１の周縁改質層から伸展する第１の亀裂の下端部を、前記基板の表面における前記面取り部の径方向内側端部に到達させるように前記第１の周縁改質層の形成動作を制御する、請求項１１～１６のいずれか一項に記載の基板処理装置。     A chamfered portion having a small end thickness formed in the cross-sectional view is formed on the substrate.
    The surface side of the substrate is bonded to another substrate to form a polymerized substrate.
    The control unit
    At the time of forming the first peripheral modification layer, the lower end portion of the first crack extending from the first peripheral modification layer is made to reach the radial inner end portion of the chamfered portion on the surface of the substrate. The substrate processing apparatus according to any one of claims 11 to 16, wherein the operation of forming the first peripheral modification layer is controlled as described above.
  19. 前記制御部は、
    前記基板の内部にレーザ光を照射して、前記基板の面方向に対して垂直方向であって、かつ当該基板の径方向に沿って、複数の分割改質層を形成し、
    複数の前記分割改質層が、前記第１の周縁改質層から伸展する第１の亀裂の上端部より径方向外側に形成され、かつ、前記基板の厚み方向に前記第１の周縁改質層及び前記第１の亀裂の上方において、分割改質層から伸展する第４の亀裂の下端部が前記第１の周縁改質層または前記第１の亀裂に到達するように形成されるように、前記改質部の動作を制御する、請求項１１～１８のいずれか一項に記載の基板処理装置。     The control unit
    By irradiating the inside of the substrate with a laser beam, a plurality of divided and modified layers are formed in a direction perpendicular to the surface direction of the substrate and along the radial direction of the substrate.
    A plurality of the divided modified layers are formed radially outward from the upper end of the first crack extending from the first peripheral modified layer, and the first peripheral modified layer is formed in the thickness direction of the substrate. Above the layer and the first crack, the lower end of the fourth crack extending from the split modified layer is formed to reach the first peripheral modified layer or the first crack. The substrate processing apparatus according to any one of claims 11 to 18, which controls the operation of the reforming unit.
  20. 前記制御部は、
    前記基板の内部にレーザ光を照射して、前記基板の面方向に対して垂直方向であって、かつ当該基板の径方向に沿って、複数の分割改質層を形成し、
    複数の前記分割改質層が、前記基板の径方向において、複数の前記第１の周縁改質層の最外側より更に外側に形成される、前記改質部の動作を制御する、請求項１１～１８のいずれか一項に記載の基板処理装置。     The control unit
    By irradiating the inside of the substrate with a laser beam, a plurality of divided and modified layers are formed in a direction perpendicular to the surface direction of the substrate and along the radial direction of the substrate.
    11. The operation of the reforming portion, wherein the plurality of divided reforming layers are formed on the outermost side of the plurality of first peripheral modification layers in the radial direction of the substrate, and the operation of the reforming portion is controlled. The substrate processing apparatus according to any one of 18 to 18.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017071074A (en) * 2015-10-05 2017-04-13 国立大学法人埼玉大学 Method for manufacturing internal processing layer formation single crystal substrate, and method for manufacturing single crystal substrate
WO2020017599A1 (en) * 2018-07-19 2020-01-23 東京エレクトロン株式会社 Substrate treatment system and substrate treatment method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017071074A (en) * 2015-10-05 2017-04-13 国立大学法人埼玉大学 Method for manufacturing internal processing layer formation single crystal substrate, and method for manufacturing single crystal substrate
WO2020017599A1 (en) * 2018-07-19 2020-01-23 東京エレクトロン株式会社 Substrate treatment system and substrate treatment method

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