WO2021159827A1

WO2021159827A1 - Information sending and receiving methods and apparatuses, and terminal

Info

Publication number: WO2021159827A1
Application number: PCT/CN2020/133844
Authority: WO
Inventors: 任晓涛; 赵锐
Original assignee: 大唐移动通信设备有限公司
Priority date: 2020-02-14
Filing date: 2020-12-04
Publication date: 2021-08-19
Also published as: TWI820369B; CN113271567A; TW202131652A

Abstract

Disclosed are information sending and receiving methods and apparatuses, and a terminal. The sending method comprises: sending a sidelink-synchronization signal block (S-SSB), the S-SSB comprising a Physical Sidelink Broadcast Channel (PSBCH) scrambled by means of a scrambling sequence, wherein the scrambling sequence is determined according to at least one of first information and second information.

Description

Information sending and receiving method, device and terminal

Cross-references to related applications

This application claims the priority of Chinese Patent Application No. 202010093721.7 filed in China on February 14, 2020, the entire content of which is incorporated herein by reference.

Technical field

The present disclosure relates to the field of communication technology, and in particular, to a method, device and terminal for sending and receiving information.

Background technique

In the Long Time Evolution (LTE) vehicle and everything (Vehicle-to-Everything, V2X) technology, the direct link (Sidelink, or side link, side link, etc.) can be configured with a maximum of 3 per 160ms Synchronization subframes, the terminal (User Equipment, UE, or user equipment) sends and receives Sidelink synchronization signals and broadcast information on these synchronization subframes, and the UE sends and receives synchronization signals and synchronization signals on these synchronization subframes. When broadcasting information, beam scanning is not performed. With the development of Internet of Vehicles technology, in the 5th Generation (5G) New Radio (NR) system, in order to meet the needs of new application scenarios, 5G NR supports larger bandwidth and flexible subcarrier spacing The configuration, synchronization signal, and broadcast information of the synchronization signal are sent in the form of synchronization signal and broadcast channel block (Synchronization Signal and PBCH Block, SSB) beam scanning or beam repetition. This brings new challenges to the design of the NR V2X physical layer structure. The original UE sending and receiving synchronization signals and broadcast information on synchronization subframes needs to be redesigned, and flexible subcarrier spacing needs to be introduced. Configuration and SSB beam scanning or beam repetition mechanism to meet the requirements of NR V2X. However, after the direct link synchronization signal and broadcast channel block (Sidelink Synchronization Signal and PBCH Block, S-SSB) was introduced in NR V2X, how to address the physical direct link broadcast channel (Physical Sidelink Broadcast Channel) sent on the direct link? , PSBCH) scrambling has become an urgent problem to be solved.

Summary of the invention

The embodiments of the present disclosure provide an information sending and receiving method, device, and terminal, which can solve the PSBCH scrambling problem in the NR V2X system.

The embodiments of the present disclosure provide the following technical solutions:

The embodiment of the present disclosure provides an information sending method, which is applied to a terminal, and the method includes:

Send the direct link synchronization signal block S-SSB, which contains the physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is based on at least one of the first information and the second information It is determined that at least one item of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.

Optionally, at least one of the first information and the second information is carried by the PSBCH payload, or at least one of the first information and the second information is carried by the PSBCH demodulation reference signal DMRS.

Optionally, the information sending method further includes:

According to the through link synchronization signal identification number SL-SSID, the scrambling sequence is initialized.

Optionally, scrambling the PSBCH through a scrambling sequence includes:

Scrambling the PSBCH through the first scrambling sequence;

or,

Scrambling the PSBCH through the second scrambling sequence;

or,

Scramble the PSBCH through the first scrambling sequence, and then scramble the PSBCH through the second scrambling sequence;

The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

Optionally, scrambling the PSBCH through the first scrambling sequence includes:

The PSBCH payload bit sequence is scrambled through the first scrambling sequence; wherein, the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

Optionally, scrambling the PSBCH through the second scrambling sequence includes:

The PSBCH sequence is scrambled through the second scrambling sequence; where the PSBCH sequence is generated after interleaving and rate matching the payload in the PSBCH.

According to the first information, a sequence is selected from the first candidate sequence set as the first scrambling sequence,

The PSBCH is scrambled by the first scrambling sequence.

Optionally, the number N1 of candidate sequences in the first candidate sequence set is 2M1, and M1 is the number of bits in the first information.

Optionally, each sequence in the first candidate sequence set is a part of the first sequence, or is a subsequence of the first sequence.

According to the second information, a sequence is selected from the second candidate sequence set as the second scrambling sequence, and the PSBCH is scrambled by the second scrambling sequence.

Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2M2, and M2 is the number of bits in the second information.

Optionally, each sequence in the second candidate sequence set is a part of the second sequence, or is a subsequence of the second sequence.

Optionally, at least part of the bits of the DFN are the 2nd and 3rd bits of the least significant bit of the DFN.

Optionally, at least part of the bits of the S-SSB index number are 2 or 3 least significant bits of the S-SSB index number.

Optionally, at least part of the bits of the time slot number are 2 or 3 least significant bits of the time slot number.

Optionally, the time slot number is a time slot number in a system radio frame or a direct radio frame.

Optionally, in the process of scrambling the PSBCH, at least one of the DFN bits, the S-SSB index number, and the slot number in the first information at least part of the bits is not Scrambled.

The embodiment of the present disclosure also provides an information receiving method, which is applied to a terminal, and the method includes:

Receive a through link synchronization signal block S-SSB, where the S-SSB contains a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined based on at least one of the first information and the second information, and the first At least one item of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least some bits of the slot number.

Optionally, the information receiving method further includes:

The PSBCH in the S-SSB is descrambled through the scrambling sequence.

The embodiment of the present disclosure also provides a terminal, including: a transceiver, a processor, a memory, and a program executable by the processor is stored in the memory; when the processor executes the program, the transceiver controls the transceiver to realize: send a direct link synchronization signal block S-SSB, S-SSB includes PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and the first information and the second information At least one item of information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least some bits of the slot number.

Optionally, the processor is configured to: initialize the scrambling sequence according to the through link synchronization signal identification number SL-SSID.

Optionally, the processor is specifically configured to: scramble the PSBCH through the first scrambling sequence;

Or, scrambling the PSBCH through the second scrambling sequence;

Alternatively, the PSBCH is scrambled through the first scrambling sequence, and the PSBCH is scrambled through the second scrambling sequence;

Optionally, the processor is configured to: scramble the PSBCH payload bit sequence through the first scrambling sequence; where the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

Optionally, the processor is configured to: scramble the PSBCH sequence through the second scrambling sequence; where the PSBCH sequence is generated after interleaving and rate matching the payload in the PSBCH.

Optionally, the processor is specifically configured to: select a sequence from the first candidate sequence set as the first scrambling sequence according to the first information,

The PSBCH is scrambled by the first scrambling sequence.

Optionally, the processor is specifically used for:

The embodiment of the present disclosure also provides an information sending device, which is applied to a terminal, and the device includes:

The sending module is used to send the direct link synchronization signal block S-SSB, the S-SSB contains the physical direct link broadcast channel PSBCH scrambled by the scrambling sequence; wherein the scrambling sequence is based on the first information and the second information Is determined by at least one type of information, at least one of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least some bits of the slot number.

The embodiment of the present disclosure also provides a terminal, including: a transceiver, a processor, a memory, and a program executable by the processor is stored in the memory; when the processor executes the program, the transceiver is controlled to realize: receiving a direct link synchronization signal block S-SSB, S-SSB contains PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and the first information and the second information At least one item of information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least some bits of the slot number.

Optionally, the processor is configured to: descramble the PSBCH in the S-SSB through the scrambling sequence.

The embodiment of the present disclosure also provides an information receiving device, which is applied to a terminal, and the device includes:

The receiving module is used to receive the through link synchronization signal block S-SSB, the S-SSB contains the PSBCH scrambled by the scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information , At least one of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least some bits of the slot number.

The embodiments of the present disclosure also provide a processor-readable storage medium, the processor-readable storage medium stores processor-executable instructions, and the processor-executable instructions are used to cause the processor to execute the aforementioned The method of sending information, or the method of receiving information as described above.

The beneficial effects of the embodiments of the present disclosure are:

In the above-mentioned embodiment of the present disclosure, the scrambling sequence of the PSBCH is determined according to at least one of the first information and the second information, and the corresponding scrambling sequence is used to scramble the PSBCH, which can reduce the difference in the direct link. The mutual interference between the PSBCH channels improves the decoding success rate of the PSBCH, thereby reducing the synchronization delay of the terminal.

Description of the drawings

FIG. 1 is a schematic flowchart of an information sending method according to an embodiment of the disclosure;

FIG. 2 is a schematic diagram of a process of scrambling PSBCH through a first scrambling sequence in an embodiment of the disclosure;

FIG. 3 is a schematic flow chart of scrambling the PSBCH through the first scrambling sequence and scrambling the PSBCH through the second scrambling sequence in an embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a process of scrambling PSBCH through a second scrambling sequence in an embodiment of the present disclosure;

FIG. 5 is a block diagram of a terminal on the sending side of an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a module structure of a terminal on the sending side of an embodiment of the present disclosure;

FIG. 7 is a schematic flowchart of an information receiving method according to an embodiment of the disclosure;

FIG. 8 is a block diagram of a terminal on the receiving side of an embodiment of the present disclosure;

FIG. 9 is a schematic diagram of a module structure of a terminal on the receiving side according to an embodiment of the disclosure.

Detailed ways

Hereinafter, exemplary embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. Although the drawings show exemplary embodiments of the present disclosure, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

The terms "first", "second", etc. in the specification and claims of this application are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in a sequence other than those illustrated or described herein. The terms "a", "said", etc. are all general concepts, which are used to denote objects of the same kind, and do not specifically refer to the number of objects. In addition, the terms "including" and "having" and any variations of them are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those clearly listed. Those steps or units may include other steps or units that are not clearly listed or are inherent to these processes, methods, products, or equipment. In the description and claims, "and/or" means at least one of the connected objects.

In the 5G NR V2X system, the PC5 port (Sidelink) is used for direct communication between the terminal and the terminal. Before the service data transmission, the two terminals that need to communicate first need to establish synchronization on the PC5 port (Sidelink). The method of establishing synchronization is that one terminal A sends synchronization and broadcast signals, and the other terminal B receives the synchronization and broadcast signals sent by terminal A. Once terminal B receives and demodulates successfully, the two terminals can establish synchronization. Communication is ready. As 5G NR supports larger bandwidth, flexible sub-carrier spacing configuration, synchronization signals and broadcast information are sent in the form of SSB beam scanning or beam repetition, this brings new challenges to the design of the NR V2X physical layer structure. The original transmission and reception of synchronization signals and broadcast information by the UE in synchronization subframes needs to be redesigned, and flexible subcarrier spacing configuration and SSB beam scanning or beam repetition mechanisms need to be introduced to meet the requirements of NR V2X . After the introduction of S-SSB in NR V2X, how to scramble the PSBCH has become an urgent problem to be solved. The embodiment of the present disclosure provides a PSBCH scrambling method to solve the PSBCH scrambling problem. It will be further described below in conjunction with specific embodiments.

The first embodiment

As shown in FIG. 1, an embodiment of the present disclosure provides an information sending method, which is applied to a terminal, and the method includes but is not limited to the following steps:

Step 11: Send the direct link synchronization signal block S-SSB, which contains the physical direct link broadcast channel PSBCH scrambled by the scrambling sequence. The scrambling sequence is determined according to at least one of the first information and the second information.

Optionally, the at least one item of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; the index number of the direct link synchronization broadcast channel block S-SSB At least part of the bits; at least part of the time slot number. The first scrambling sequence and the second scrambling sequence are related to the target information carried in the S-SSB (such as PSBCH), such as timing information in the PSBCH, etc. Alternatively, the scrambling sequence can be determined according to the timing information carried in the PSBCH . It is worth pointing out that in addition to timing information, the information carried in PSBCH can also include: time domain configuration information (such as subframe configuration information), frequency domain configuration information (such as bandwidth information, subcarrier spacing information, etc.), and coverage indication information (Such as synchronizing cluster information) and other content. That is, the first information and/or the second information may be information carried by the S-SSB, for example, at least one of the first information and the second information is carried by the PSBCH payload, or the first information and the second information At least one type of information in is carried by a PSBCH demodulation reference signal (Demodulation Reference Signal, DMRS). Here, the first scrambling sequence determined according to the first information is used in the first scrambling process of PSBCH, and the second scrambling sequence determined according to the second information is used in the second scrambling process of PSBCH. The first scrambling process and The second scrambling process is a different scrambling process. For example, the first scrambling is the scrambling after the interleaving of the PSBCH payload bit sequence, and the second scrambling is the scrambling after the PSBCH sequence rate matching.

In NR V2X, the PSBCH is included in the S-SSB, that is, the S-SSB includes the PSBCH, and step 12 can also be understood as sending the S-SSB, and the S-SSB includes the scrambled PSBCH.

In this way, the terminal uses the scrambling sequence to perform a scrambling process on the PSBCH. The S-SSB includes the PSBCH. After the scrambling is completed, the S-SSB is sent to complete the PSBCH transmission. Since the scrambling sequence is determined according to the information carried in the S-SSB, the mutual interference between different PSBCHs can be reduced, the decoding success rate of the PSBCH can be improved, and the synchronization delay in the direct link communication can be reduced.

In an optional embodiment, before step 11, it may further include: selecting a sequence from at least one candidate sequence according to the value of at least part of the bits in the information carried in the S-SSB (such as the timing information carried in the PSBCH, etc.), As a scrambling sequence for PSBCH scrambling.

Optionally, the number of candidate sequences is related to the number of at least some bits. Optionally, candidate sequences corresponding to different values of at least some of the bits are different. For example, the corresponding relationship between the value of at least part of the bits in the timing information and the candidate sequence can be pre-defined or pre-configured, and the terminal can select a scrambling sequence for scrambling from a plurality of candidate sequences according to the value of at least part of the bit. Assuming that the number of candidate sequences is N, in one embodiment, N is related to the number of bits of at least part of the bits, such as N=2 ^M , where M is the number of at least part of the bits, and the at least part of the bits mentioned here refers to Bits related to the selected scrambling sequence. For example, if the number of bits of at least part of the bits is 2, the number of candidate sequences is 4. Correspondingly, the terminal selects a scrambling sequence for scrambling the PSBCH from the four candidate sequences according to the value of these 2 bits. For another example, if the number of bits of at least part of the bits is 3, the number of candidate sequences is 8. Correspondingly, the terminal selects a scrambling sequence for scrambling the PSBCH from the 8 candidate sequences according to the value of these 3 bits.

The selection or determination method of the scrambling sequence has been introduced above, and the initialization method of the scrambling sequence will be further introduced below. It is worth noting that this initialization method can be used in combination with the above selection or determination method, or it can be used alone. Optionally, the initialization sequence of the scrambling sequence is obtained according to the sidelink synchronization signal identification number (Sidelink-Synchronization Signal ID, SL-SSID).

Specifically, before step 11, the information sending method described in the embodiment of the present disclosure may further include: initializing the scrambling sequence through the SL-SSID; wherein, different SL-SSIDs correspond to different scrambling sequences.

Specifically, initializing the scrambling sequence through the SL-SSID is: calculating C _init according to the SL-SSID, and initializing the scrambling sequence according to C _init.

In some embodiments, the process of scrambling the PSBCH through the scrambling sequence includes at least one of the following:

Scrambling the PSBCH through the first scrambling sequence;

The PSBCH is scrambled through the second scrambling sequence.

Wherein, the first scrambling sequence is related to the first information, and the second scrambling sequence is related to the second information. The content included in the first information and the second information may be the same or different. Optionally, at least part of the bits related to the selection of the first scrambling sequence in the target information (such as timing information carried by the PSBCH) is the first information, and at least part of the bits related to the selection of the second scrambling sequence in the target information are the first information. Two information. That is to say, at least part of the bits corresponding to the first scrambling sequence and the second scrambling sequence may be the same or different.

In other words, scrambling the PSBCH through the scrambling sequence includes:

The PSBCH is scrambled through the first scrambling sequence; or the PSBCH is scrambled through the second scrambling sequence; or the PSBCH is scrambled through the first scrambling sequence, and then the second scrambling sequence is used , To scramble the PSBCH;

Specifically, the process of scrambling the PSBCH through the scrambling sequence may include:

Selecting a first scrambling sequence from at least one candidate sequence according to the value of the first information, and scrambling the PSBCH according to the first scrambling sequence;

Or, according to the value of the second information, a second scrambling sequence is selected from at least one candidate sequence, and the PSBCH is scrambled according to the second scrambling sequence;

Alternatively, according to the value of the first information, the first scrambling sequence is selected from at least one candidate sequence, the PSBCH is scrambled according to the first scrambling sequence, and the second information is selected from the at least one candidate sequence according to the value of the second information. Two scrambling sequences, which scramble the PSBCH according to the second scrambling sequence.

In an optional embodiment of the present disclosure, the step of scrambling the PSBCH according to the first scrambling sequence includes:

The PSBCH payload bit sequence is scrambled through the first scrambling sequence; where the PSBCH payload bit sequence is generated after the payload in the PSBCH (such as the PSBCH of a broadcast message) is interleaved. That is, the first scrambling occurs after the interleaving of the PSBCH payload bit sequence.

In an optional embodiment of the present disclosure, the step of scrambling the PSBCH according to the second scrambling sequence includes: scrambling the PSBCH sequence through the second scrambling sequence; wherein the PSBCH sequence is in the PSBCH (such as The PSBCH (broadcast message) payload is generated after interleaving and rate matching. That is, the second scrambling occurs after the rate matching of the PSBCH sequence.

Among them, the first information and/or the second information in the embodiment of the present disclosure may be carried by the DMRS of the PSBCH, that is, the terminal may obtain the first information and/or the second information by detecting the DMRS of the PSBCH. Specifically, the terminal obtains the first information and/or the second information by blindly detecting the DMRS sequence of the PSBCH. For example, the terminal can obtain the second signal by detecting the DMRS of the PSBCH.

As an optional embodiment, scrambling the PSBCH through the first scrambling sequence includes: selecting a sequence from the first candidate sequence set as the first scrambling sequence according to the first information, and then passing the first scrambling sequence. The scrambling sequence scrambles the PSBCH.

Optionally, the number N1 of candidate sequences in the first candidate sequence set is 2 ^M1 , and M1 is the number of bits in the first information.

As an optional embodiment, scrambling the PSBCH through the second scrambling sequence includes:

Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2 ^M2 , and M2 is the number of bits in the second information.

It is worth noting that the first candidate sequence set may be the same as or different from the second candidate sequence set, which is not particularly limited in the embodiment of the present disclosure. Similarly, the first sequence and the second sequence may be the same or different, and the first sequence and/or the second sequence may be pseudo-random sequences. In addition, N, M, N1, M1, N2, and M2 mentioned in the embodiments of the present disclosure are all positive integers.

In order to further improve flexibility, in the above-mentioned embodiments of the present disclosure, step 11 may include: determining a scrambling mode for the PSBCH according to the system configuration, and different system configurations can select different scrambling modes.

For example, according to the system configuration, it is determined to scramble the PSBCH at least once. When it is determined to scramble the PSBCH multiple times, the scrambling method used in each scrambling process may be the same or different. In this way, the PSBCH scrambling mode can be flexibly determined according to the system configuration, which improves the flexibility of the PSBCH scrambling process configuration and is suitable for different scenarios, thereby improving the success rate of PSBCH decoding.

Optionally, according to the system configuration, the step of determining to scramble the PSBCH at least once includes one of the following:

In the case of the first system configuration, the PSBCH is scrambled according to the first scrambling sequence. Optionally, in the case of the first system configuration, the first scrambling sequence is selected from at least one candidate sequence according to the value of the first information, and the PSBCH is scrambled according to the first scrambling sequence.

In the case of the second system configuration, the PSBCH is scrambled according to the first scrambling sequence and the PSBCH is scrambled according to the second scrambling sequence. Optionally, in the case of the second system configuration, the first scrambling sequence is selected from at least one candidate sequence according to the value of the first information, the PSBCH is scrambled according to the first scrambling sequence, and then according to the second information Value, the second scrambling sequence is selected from at least one candidate sequence, and the PSBCH is scrambled according to the second scrambling sequence.

In the case of the third system configuration, the PSBCH is scrambled according to the second scrambling sequence. Optionally, in the case of the third system configuration, the second scrambling sequence is selected from at least one candidate sequence according to the value of the second information, and the PSBCH is scrambled according to the second scrambling sequence.

Taking the system configuration including the working frequency band of the PSBCH as an example, the terminal can determine to scramble the PSBCH according to the working frequency band of the PSBCH. For example, when the working frequency band of PSBCH is Frequency 1 (Frequency Range 1, FR1), only beam repetition is required, instead of beam scanning. In the case of beam repetition, all sent S-SSBs can be combined after PSBCH decoding, in order to facilitate the combination , Scramble the PSBCH according to the first scrambling sequence. For another example, when the working frequency band of the PSBCH is Frequency Range 2 (FR2), beam scanning is required, and the PSBCH needs to be scrambled according to the first scrambling sequence, and then the PSBCH is scrambled according to the second scrambling sequence.

In order to improve flexibility, the length of the scrambling sequence used for scrambling is different for different system configurations. Take the system configuration including the PSBCH working frequency band as an example. When the PSBCH working frequency band is FR1, the length of the scrambling sequence to scramble the PSBCH is M1, and when the PSBCH working frequency band is FR2, the length of the scrambling sequence to scramble the PSBCH is M2 .

The following will further introduce the first information and/or the second information in the aforementioned scrambling process, such as the first information related to the first scrambling process and the second information related to the second scrambling process. The first information and/or the second information includes at least one of the following: at least part of the bits of the Direct Frame Number (DFN); at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; time slot At least part of the number of bits.

At least part in the embodiments of the present disclosure refers to part or all. For example, at least part of the bits of the DFN are the 2nd and 3rd bits of the least significant bit of the DFN. At least part of the bits of the S-SSB index number are 2 or 3 least significant bits of the S-SSB index number. At least some bits of the slot number are the 2 or 3 least significant bits of the slot number. The time slot number mentioned here may be a time slot number in a system radio frame (Systerm Frame, SF) or a direct radio frame (Direct Frame, DF).

In some embodiments of the present disclosure, in the process of scrambling the PSBCH according to the first scrambling sequence, specific bits are not scrambled, such as at least part of the DFN bits and the S-SSB index number in the first information. At least one of at least part of the bits and at least part of the time slot number. Specifically, the first information and/or the bit indicating the S-SSB index number are not scrambled in the first scrambling process. Optionally, in the process of scrambling the PSBCH according to the first scrambling sequence, the bits indicating the 2nd and 3rd bits of the least significant DFN and/or the bits indicating the S-SSB index number in the first information It is not scrambled during the first scrambling process.

The above describes different scrambling methods in the PSBCH scrambling methods of the embodiments of the present disclosure, and the following will describe them in detail with reference to specific examples.

Example 1:

The PSBCH is scrambled through the first scrambling sequence, and the scrambled PSBCH is sent. Specifically, according to the value of at least part of the bits in the first information, the first scrambling sequence is selected from the candidate sequence; then the PSBCH payload bit sequence is scrambled through the first scrambling sequence; wherein the PSBCH payload bit sequence is PBSCH The PBSCH payload of the broadcast message in is generated after interleaving.

As shown in Figure 2, the terminal generates a broadcast message, generates a PSBCH payload, and undergoes interleaving to obtain a PSBCH payload bit sequence, and then scrambles the PSBCH payload bit sequence through the first scrambling sequence. After scrambling, a Cyclic Redundancy Check (CRC) is added and Polar encoding is performed, and then rate matching is performed, and QPSK modulation and resource mapping are performed on the PSBCH sequence after the rate matching, so as to send the S-SSB containing the PSBCH.

The first information in this example includes at least one of the following:

At least some bits of DFN, such as the 2nd and 3rd bits of the least significant bit of DFN.

At least part of the bits of the S-SSB index number, such as part or all of the bits of the S-SSB index number;

At least some bits of the slot number, such as some or all bits of the slot number.

The candidate sequence is related to the first information. In the following, different first information will be combined as an example to describe the first scrambling process.

Method 1: When the first information refers to the 2nd and 3rd bits of the least significant bit of DFN, according to the value of these two bits, one of the four candidate sequences (or called candidate subsequences) is selected as the first A scrambling sequence, and using the first scrambling sequence to scramble the PSBCH payload bit sequence.

Assuming that DFN is 10 bits, such as 1101011101, then starting from the far right, the first bit on the far right is the first bit of the least significant bit, the second bit on the far right is the second bit of the least significant bit, and so on ,As shown in Table 1.

Table 1: Schematic table of the least significant bit of the direct frame number DFN

When the first information refers to the 2nd and 3rd bits of the least significant bit of DFN, according to the value (1,0) of the 2nd and 3rd bits of the least significant bit of DFN, from the four candidate subsequences Selecting a subsequence as the first scrambling sequence and using the first scrambling sequence to scramble the PSBCH payload bit sequence means:

The sequence PSBCH payload bits _{_{_{a 0, a 1, a 2}}} , a 3, ..., a A-1 scrambling bit sequence to _{_{a '0, a' 1,}} a '2, a' 3, ..., a'A _-1 , where _a'i = (a _i + s _i ) mod 2 and i=0, 1,..., A-1. A is the total number of bits in the PSBCH payload.

s ₀ ,s ₁ ,s ₂ ,s ₃ ,...,s _A-1 are generated according to the following process:

i=0;

j=0;

while i＜A

if a _i belongs to the bit representing the S-SSB index number; or the second and third bits representing the least significant bit of DFN

s _i =0;

else

s _i =c(j+vM);

j=j+1;

end if

i=i+1;

end while

Where c(i) is a pseudo-random sequence, and _{is initialized with C init} =SL-SSID. M is the number of PSBCH payload bits participating in scrambling. In this embodiment, c(i) is the candidate sequence, and s _i is the first scrambling sequence, and s _i is a subsequence of c(i), or a part or a part of the c(i) sequence. part. v According to Table 2, it is determined by using the 2nd and 3rd bits of the least significant bit of the DFN to send PSBCH.

Table 2: How to determine the value of v

(DFN最低有效位的第3位比特,DFN最低有效位的第2位比特)(The 3rd bit of the least significant bit of DFN, the 2nd bit of the least significant bit of DFN)	Value of vValue of v
(0,0)(0,0)	00
(0,1)(0,1)	11
(1,0)(1,0)	22
(1,1)(1,1)	33

Second way, when the first information is an index number S-SSB, the sequence PSBCH payload bits _{_{_{a 0, a 1, a 2}}} , a 3, ..., a A-1 scrambling bit sequence to a _'0, a _{_{'1, a' 2, a}} '3, ..., a' A-1, where _{_{a 'i = (a i +}} s i) mod2 and i = 0,1, ..., A- 1. A is the total number of bits in the PSBCH payload.

i=0;

j=0;

while i＜A

s _i =0;

else

s _i =c(j+vM);

j=j+1;

end if

i=i+1;

end while

Where c(i) is a pseudo-random sequence, and _{is initialized with C init} =SL-SSID. M is the number of PSBCH payload bits participating in scrambling. In this embodiment, c(i) is the candidate sequence, and s _i is the first scrambling sequence, and s _i is a subsequence of c(i), or a part or a part of the c(i) sequence. Segment, v=S-SSB index number.

Manner 3: When the first information is the time slot number, the time slot number refers to the time slot number in the system radio frame, or the time slot number in the direct frame. The sequence PSBCH payload bits _{_{_{a 0, a 1, a 2}}} , a 3, ..., a A-1 scrambling bit sequence to _{_{a '0, a' 1,}} a '2, a' 3, ..., a'A _-1 , where _a'i = (a _i + s _i ) mod 2 and i=0, 1,..., A-1. A is the total number of bits in the PSBCH payload.

i=0;

j=0;

while i＜A

s _i =0;

else

s _i =c(j+vM);

j=j+1;

end if

i=i+1;

end while

Where c(i) is a pseudo-random sequence, and _{is initialized with C init} =SL-SSID. M is the number of PSBCH payload bits participating in scrambling. In this embodiment, c(i) is the candidate sequence, and s _i is the first scrambling sequence, and s _i is a subsequence of c(i), or a part or a part of the c(i) sequence. Segment, v = slot number.

In this example, different system configurations have different lengths of the first scrambling sequence used for scrambling. Taking the system configuration including the working frequency band of PSBCH as an example, when the working frequency band of PSBCH belongs to FR1, the length of the first scrambling sequence used is M1. When the working frequency band of PSBCH belongs to FR2, the first scrambling sequence used is M1. The length of the scrambling sequence is M2, and M1 is not equal to M2.

Example 2:

The PSBCH is scrambled through the first scrambling sequence, and the PSBCH is scrambled through the second scrambling sequence; the scrambled PSBCH is sent. Specifically, the first scrambling sequence is selected from the candidate sequences according to the value of the first information; the PSBCH payload bit sequence is scrambled through the first scrambling sequence; wherein the PSBCH payload bit sequence is the broadcast message in the PBSCH The PBSCH payload is generated after interleaving. Then, according to the value of the second information, a second scrambling sequence is selected from the candidate sequence; the PSBCH sequence is scrambled through the second scrambling sequence, where the PSBCH sequence is the PSBCH payload of the broadcast message in the PSBCH after interleaving and Generated after rate matching.

As shown in Figure 3, the terminal generates a broadcast message, generates a PSBCH payload, and undergoes interleaving to obtain a PSBCH payload bit sequence, and then scrambles the PSBCH payload bit sequence through the first scrambling sequence. After scrambling, add CRC and perform Polar encoding, and then perform rate matching. Then the rate-matched PSBCH sequence is scrambled by the second scrambling sequence, and then the scrambled PSBCH sequence is subjected to QPSK modulation and resource mapping to send S-SSB containing PSBCH.

The first information in this example is similar to the first information in Example 1, and the first scrambling process is similar to the scrambling process in Example 1, so it will not be repeated. This example will specifically introduce the second information and the second scrambling process.

The second information in this example includes at least one of the following:

At least some bits of DFN;

At least part of the bits of the S-SSB index number, such as the two least significant bits or the three least significant bits of the S-SSB index number;

At least some bits of the slot number, such as the two least significant bits or the three least significant bits of the slot number.

The candidate sequence is related to the second information. The second scrambling process will be described below by combining different second information as an example.

Method 1: When the second information refers to the two least significant bits of the S-SSB index number, according to the value of these two bits, one of the four candidate sequences (or called candidate subsequences) is selected as the second addition Scrambling sequence, and using the second scrambling sequence to scramble the PSBCH sequence. When the second information refers to the three least significant bits of the S-SSB index number, according to the value of these three bits, one of the eight candidate sequences (or called candidate sub-sequences) is selected as the second scrambling sequence, And use the second scrambling sequence to scramble the PSBCH sequence.

Assuming that the S-SSB index number is 6 bits, such as 111001, starting from the far right, the first bit on the far right is the first bit of the least significant bit, and the second bit on the far right is the second bit of the least significant bit. , And so on, as shown in Table 3.

Table 3: Schematic table of the least significant bit of the S-SSB index number

When the second information refers to the 2 or 3 least significant bits of the S-SSB index number, according to the value (0,1) or (0,0,1) of the 2 or 3 least significant bits of the S-SSB index number ), select a subsequence from 4 or 8 candidate subsequences as the second scrambling sequence, and use the second scrambling sequence to scramble the PSBCH sequence, which means:

For PSBCH sequence b(0),...,b(M _bit -1), where M _bit is the length of the PSBCH sequence, scrambled by the following formula, the scrambled sequence is

Where c(i) is a pseudo-random sequence, and _{is initialized by c init} =SL-SSID.

Manner 2: When the first information is the time slot number, the time slot number refers to the time slot number in the system radio frame, or the time slot number in the direct frame. When the second information refers to the two least significant bits of the slot number, according to the value of these two bits, one of the four candidate sequences (or called candidate subsequences) is selected as the second scrambling sequence and used The second scrambling sequence scrambles the PSBCH sequence. When the second information refers to the three least significant bits of the slot number, according to the value of these three bits, one of the eight candidate sequences (or called candidate subsequences) is selected as the second scrambling sequence and used The second scrambling sequence scrambles the PSBCH sequence.

Assuming that the slot number is 6 bits, such as 111001, starting from the rightmost bit, the first bit of the rightmost is the first bit of the least significant bit, and the second bit of the rightmost is the second bit of the least significant bit. And so on, as shown in Table 4.

Table 4: Schematic table of the least significant bit of the time slot number

When the second information refers to the 2 or 3 least significant bits of the slot number, according to the value (0,1) or (0,0,1) of the 2 or 3 least significant bits of the slot number, from 4 Or select one subsequence from the eight candidate subsequences as the second scrambling sequence, and use the second scrambling sequence to scramble the PSBCH sequence, which means:

In this example, the number of bits contained in the second information is different for different system configurations. Taking the system configuration including the PSBCH working frequency band as an example, when the PSBCH working frequency band belongs to FR1, v is the two least significant bits of the S-SSB index number, or v is the two least significant bits of the time slot number; when the PSBCH When the working frequency band belongs to FR2, v is the three least significant bits of the S-SSB index number, or v is the three least significant bits of the slot number.

Example three:

The PSBCH is scrambled through the second scrambling sequence; the scrambled PSBCH is sent. Specifically, the second scrambling sequence is selected from the candidate sequence according to the value of the second information; the PSBCH sequence is scrambled by the second scrambling sequence, where the PSBCH sequence is the PSBCH payload of the broadcast message in the PSBCH. Generated after interleaving and rate matching.

As shown in Figure 4, the terminal generates a broadcast message, generates a PSBCH payload, and undergoes interleaving to obtain a PSBCH payload bit sequence, then adds a CRC and performs Polar encoding, and then performs rate matching. The rate-matched PSBCH sequence passes through the second The scrambling sequence is scrambled, and then QPSK modulation and resource mapping are performed on the scrambled PSBCH sequence, so as to transmit the S-SSB containing the PSBCH.

The second information in this example is similar to the second information in Example 2, and the second scrambling process is similar to the scrambling process in Example 2, so it will not be repeated here.

Example four:

In order to improve flexibility, the scrambling method for PSBCH is determined according to the system configuration. Different system configurations can choose different scrambling methods. For example, according to the system configuration, it is determined to scramble the PSBCH at least once. When it is determined to scramble the PSBCH multiple times, the scrambling method used in each scrambling process can be the same or different. In this way, the PSBCH scrambling mode can be flexibly determined according to the system configuration, which improves the flexibility of the PSBCH scrambling process configuration and is suitable for different scenarios, thereby improving the success rate of PSBCH decoding.

As shown in Figure 3, the first scrambling process occurs after the interleaving of the PSBCH payload bit sequence, and the second scrambling process occurs after the PSBCH sequence rate matching occurs. According to the system configuration, the PSBCH may only undergo the first scrambling process, or only the second scrambling process, or need to undergo the first scrambling process and the second scrambling process before being sent.

One implementation solution is to control whether to perform the first or second scrambling process according to the working frequency band of the PSBCH belonging to FR1 or FR2. When the working frequency band of the PSBCH belongs to FR1, the first scrambling process is performed on the PSBCH; when the working frequency band of the PSBCH belongs to FR2, the first scrambling process and the second scrambling process are performed on the PSBCH.

The above describes the PSBCH scrambling method of the embodiments of the present disclosure. In the process of scrambling the PSBCH, the specific bits in the timing information carried in the PSBCH may not be scrambled, such as: at least part of the bits in the timing information represents S -The bits of the SSB index number, etc. Specifically, when using the first scrambling sequence to scramble the PSBCH payload bit sequence, at least part of the bits in the timing information, the bits representing the S-SSB index number, and the like may not be scrambled.

In the first embodiment, the terminal scrambles the physical direct link broadcast channel PSBCH through the scrambling sequence; sends the scrambled PSBCH. Among them, the scrambling sequence used for scrambling is related to the timing information carried by the PSBCH, which can reduce the mutual interference between the PSBCH channels between different synchronization clusters in the direct link, and improve the decoding success rate of the PSBCH, thereby reducing The synchronization delay of the terminal.

Second embodiment

As shown in FIG. 5, an embodiment of the present disclosure also provides a terminal 50, including: a transceiver 51, a processor 52, a memory 53, and the memory 53 stores a program executable by the processor 52; when the processor executes the program, it controls The transceiver 51 realizes: sending the direct link synchronization signal block S-SSB, the S-SSB contains the PSBCH scrambled by the scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information At least one item of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; at least part of the direct link synchronization broadcast channel block S-SSB index number Bit; at least some bits of the slot number.

Optionally, the processor 52 is further configured to: initialize the scrambling sequence according to the through link synchronization signal identification number SL-SSID.

Optionally, the processor 52 is further configured to: scramble the PSBCH through the first scrambling sequence;

Or, scrambling the PSBCH through the second scrambling sequence;

Optionally, the processor 52 is configured to: scramble the PSBCH payload bit sequence through the first scrambling sequence; where the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

Optionally, the processor 52 is configured to: scramble the PSBCH sequence through the second scrambling sequence; where the PSBCH sequence is generated after interleaving and rate matching the payload in the PSBCH.

Optionally, the processor 52 is specifically configured to: according to the first information, select a sequence from the first candidate sequence set as the first scrambling sequence, and scramble the PSBCH by using the first scrambling sequence.

Optionally, the processor is specifically used for:

It should be noted that the terminal in this embodiment is a terminal corresponding to the method shown in FIG. 1 above, and the implementation manners in the above embodiments are all applicable to the embodiment of the terminal, and the same technical effect can also be achieved. In this terminal, the transceiver 51 and the memory 53, as well as the transceiver 51 and the processor 52 can all be communicatively connected via a bus interface. The functions of the processor 52 can also be implemented by the transceiver 51, and the functions of the transceiver 51 can also be implemented by the processor. 52 achieved. It should be noted here that the above-mentioned terminal provided by the embodiment of the present disclosure can implement all the method steps implemented in the above-mentioned method embodiment and achieve the same technical effect, and it is not necessary to describe the same as the method embodiment in this embodiment. The part and beneficial effects of this will be described in detail.

The third embodiment

As shown in FIG. 6, an embodiment of the present disclosure also provides an information sending device, which is applied to a terminal, and the device includes the following functional modules:

The sending module 61 is configured to send the through link synchronization signal block S-SSB, the S-SSB includes the PSBCH scrambled by the scrambling sequence; wherein the scrambling sequence is based on at least one of the first information and the second information It is determined that at least one item of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; at least the index number of the direct link synchronization broadcast channel block S-SSB Partial bits; at least part of the time slot number.

Optionally, the device further includes: an initialization module, configured to initialize the scrambling sequence according to the through-link synchronization signal identification number SL-SSID.

Optionally, the device further includes a scrambling module 62, and the scrambling module 62 includes:

The first scrambling sub-module is configured to scramble the PSBCH through the first scrambling sequence;

Or, the second scrambling submodule is configured to scramble the PSBCH through the second scrambling sequence;

Alternatively, the third scrambling submodule is configured to scramble the PSBCH through the first scrambling sequence, and then scramble the PSBCH through the second scrambling sequence;

Optionally, the first scrambling submodule is specifically configured to: scramble the PSBCH payload bit sequence through the first scrambling sequence; where the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

Optionally, the second scrambling submodule is configured to scramble the PSBCH sequence through the second scrambling sequence; where the PSBCH sequence is generated after the payload in the PSBCH is interleaved and rate matched.

Optionally, the scrambling module 62 is specifically configured to: according to the first information, select a sequence from the first candidate sequence as the first scrambling sequence, and scramble the PSBCH through the first scrambling sequence.

Optionally, the scrambling module 62 is specifically configured to:

Optionally, in the process of scrambling the PSBCH according to the first scrambling sequence, at least part of the DFN bits, at least part of the S-SSB index number, and at least part of the time slot number in the first information At least one piece of information is not scrambled.

It should be noted that the device in this embodiment is a device corresponding to the method shown in FIG. 1 above, and the implementation manners in the above embodiments are all applicable to the embodiments of the device, and the same technical effects can also be achieved. The device may also include a processing module, etc., for processing the information sent by the sending module, etc. It should be noted here that the above-mentioned device provided by the embodiment of the present disclosure can realize all the method steps realized by the above-mentioned method embodiment and can achieve the same technical effect. The part and beneficial effects of this will be described in detail.

Fourth embodiment

As shown in FIG. 7, an embodiment of the present disclosure also provides an information receiving method, which is applied to a terminal, and the method may include the following steps:

Step 71: Receive the through link synchronization signal block S-SSB, where the S-SSB contains the PSBCH scrambled by the scrambling sequence. The scrambling sequence is determined by at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following: direct radio frame number DFN At least some bits of the S-SSB index number of the direct link synchronization broadcast channel block; at least some bits of the slot number. Wherein, the first information and the second information may be at least part of bits in the target information carried in the S-SSB (for example, timing information carried in the PSBCH). Specifically, the scrambling sequence may be determined according to the timing information carried in the PSBCH. It is worth noting that PSBCH can also include: time domain configuration information (such as subframe configuration information), frequency domain configuration information (such as bandwidth information, subcarrier spacing information, etc.), coverage indication information (such as synchronization cluster information), etc. . In NR V2X, the PSBCH is included in the S-SSB, that is, the S-SSB includes the PSBCH, and step 12 can also be understood as sending the S-SSB, and the S-SSB includes the scrambled PSBCH.

Further, the method further includes: descrambling the PSBCH in the S-SSB through a scrambling sequence (or called descrambling). The descrambling process is the inverse process of the scrambling process in the above first embodiment. When the terminal on the transmitting side uses the first scrambling process to scramble the PSBCH, the terminal on the receiving side uses the first descrambling process to descramble the S- PSBCH in SSB. When the terminal on the transmitting side uses the second scrambling process to scramble the PSBCH, the terminal on the receiving side uses the second descrambling process to descramble the PSBCH in the S-SSB. When the terminal on the transmitting side uses the first scrambling process and the second scrambling process to scramble the PSBCH, the terminal on the receiving side uses the first descrambling process and the second descrambling process to descramble the PSBCH in the S-SSB. It is worth noting that the first information and second information involved in the embodiment of the receiving terminal are similar to the first information and second information mentioned in the first embodiment, and the first information in the first embodiment Both the selection method of the second information and the selection method of the scrambling sequence are applicable to this embodiment, so they will not be repeated here.

The transmitting side terminal sends the PSBCH scrambled by the scrambling sequence, and the receiving side uses the corresponding scrambling sequence to descramble the PSBCH, which can reduce the mutual interference between the PSBCH channels between different synchronization clusters in the direct link. The PSBCH decoding success rate is improved, thereby reducing the synchronization delay of the terminal.

Fifth embodiment

As shown in FIG. 8, an embodiment of the present disclosure also provides a terminal 80, including: a transceiver 81, a processor 82, a memory 83, and a program executable by the processor 82 is stored in the memory 83; The transceiver 81 realizes: receiving the direct link synchronization signal block S-SSB, the S-SSB contains the PSBCH scrambled by the scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information At least one item of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; at least part of the direct link synchronization broadcast channel block S-SSB index number Bit; at least some bits of the slot number.

Optionally, the processor 82 is further configured to: descramble the PSBCH in the S-SSB through the scrambling sequence.

It should be noted that the terminal in this embodiment is a terminal corresponding to the method shown in FIG. 7 above, and the implementation manners in the above embodiments are all applicable to the embodiment of the terminal, and the same technical effect can also be achieved. In this terminal, the transceiver 81 and the memory 83, as well as the transceiver 81 and the processor 82 can all be communicatively connected via a bus interface. The functions of the processor 82 can also be implemented by the transceiver 81, and the functions of the transceiver 81 can also be implemented by the processor. 82 achieved. It should be noted here that the above-mentioned terminal provided by the embodiment of the present disclosure can implement all the method steps implemented in the above-mentioned method embodiment and achieve the same technical effect, and it is not necessary to describe the same as the method embodiment in this embodiment. The part and beneficial effects of this will be described in detail.

Sixth embodiment

As shown in FIG. 9, an embodiment of the present disclosure also provides an information receiving device, which is applied to a terminal, and the device includes the following functional modules:

The receiving module 91 is configured to receive the through link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is based on at least one of the first information and the second information It is determined that at least one item of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; at least the index number of the direct link synchronization broadcast channel block S-SSB Partial bits; at least part of the time slot number.

Wherein, the device further includes: a descrambling module, which is used to descramble the PSBCH in the S-SSB through the scrambling sequence.

It should be noted that the device in this embodiment is a device corresponding to the method shown in FIG. 7 above, and the implementation manners in the above embodiments are all applicable to the embodiments of the device, and the same technical effects can also be achieved. The device may also include a processing module, etc., for processing the information sent by the sending module, etc. It should be noted here that the above-mentioned device provided by the embodiment of the present disclosure can realize all the method steps realized by the above-mentioned method embodiment and can achieve the same technical effect. The part and beneficial effects of this will be described in detail.

The embodiments of the present disclosure also provide a processor-readable storage medium, the processor-readable storage medium stores processor-executable instructions, and the processor-executable instructions are used to cause the processor to execute as shown in Figure 1 above. Or the method of FIG. 7 all the implementation manners in the above method embodiment are applicable to this embodiment, and the same technical effect can also be achieved.

A person of ordinary skill in the art may realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be implemented by electronic hardware or a combination of computer software and electronic hardware. Whether these functions are executed by hardware or software depends on the specific application and design constraint conditions of the technical solution. Professionals and technicians can use different methods for each specific application to implement the described functions, but such implementation should not be considered as going beyond the scope of the present disclosure.

Those skilled in the art can clearly understand that, for the convenience and conciseness of description, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

In the embodiments provided in the present disclosure, it should be understood that the disclosed device and method may be implemented in other ways. For example, the device embodiments described above are merely illustrative, for example, the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components may be combined or It can be integrated into another system, or some features can be ignored or not implemented. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.

In addition, the functional units in the various embodiments of the present disclosure may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.

If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on this understanding, the technical solution of the present disclosure essentially or the part that contributes to the related technology or the part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several The instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present disclosure. The aforementioned storage media include: U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk and other media that can store program codes.

In addition, it should be pointed out that in the device and method of the present disclosure, obviously, each component or each step can be decomposed and/or recombined. These decomposition and/or recombination should be regarded as equivalent solutions of the present disclosure. In addition, the steps of performing the above series of processing can naturally be performed in a chronological order in the order of description, but do not necessarily need to be performed in a chronological order, and some steps can be performed in parallel or independently of each other. A person of ordinary skill in the art can understand that all or any of the steps or components of the methods and devices of the present disclosure can be used in any computing device (including a processor, storage medium, etc.) or a network of computing devices with hardware and firmware. , Software, or a combination of them. This can be achieved by those of ordinary skill in the art using their basic programming skills after reading the description of the present disclosure.

Therefore, the purpose of the present disclosure can also be realized by running a program or a group of programs on any computing device. The computing device may be a well-known general-purpose device. Therefore, the purpose of the present disclosure can also be achieved only by providing a program product containing program code for implementing the method or device. That is, such a program product also constitutes the present disclosure, and a storage medium storing such a program product also constitutes the present disclosure. Obviously, the storage medium may be any well-known storage medium or any storage medium developed in the future. It should also be pointed out that in the device and method of the present disclosure, obviously, each component or each step can be decomposed and/or recombined. These decomposition and/or recombination should be regarded as equivalent solutions of the present disclosure. In addition, the steps of executing the above-mentioned series of processing can naturally be executed in chronological order in the order of description, but they do not necessarily need to be executed in chronological order. Some steps can be performed in parallel or independently of each other.

It should be noted that it should be understood that the division of the various modules of the above network equipment and the terminal is only a division of logical functions, and may be fully or partially integrated into one physical entity in actual implementation, or may be physically separated. And these modules can all be implemented in the form of software called by processing elements; they can also be implemented in the form of hardware; some modules can be implemented in the form of calling software by processing elements, and some of the modules can be implemented in the form of hardware. For example, the determining module may be a separately established processing element, or it may be integrated in a chip of the above-mentioned device for implementation. In addition, it may also be stored in the memory of the above-mentioned device in the form of program code, which is determined by a certain processing element of the above-mentioned device. Call and execute the functions of the above-identified module. The implementation of other modules is similar. In addition, all or part of these modules can be integrated together or implemented independently. The processing element described here may be an integrated circuit with signal processing capability. In the implementation process, each step of the above method or each of the above modules can be completed by an integrated logic circuit of hardware in the processor element or instructions in the form of software.

For example, each module, unit, sub-unit or sub-module may be one or more integrated circuits configured to implement the above method, for example: one or more application specific integrated circuits (ASIC), or, one or Multiple microprocessors (digital signal processors, DSP), or, one or more field programmable gate arrays (Field Programmable Gate Array, FPGA), etc. For another example, when one of the above modules is implemented in the form of processing element scheduling program code, the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processors that can call program codes. For another example, these modules can be integrated together and implemented in the form of a system-on-a-chip (SOC).

The terms "first", "second", etc. in the specification and claims of this application are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present application described herein, for example, are implemented in a sequence other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations of them are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those clearly listed. Those steps or units may include other steps or units that are not clearly listed or are inherent to these processes, methods, products, or equipment. In addition, the use of "and/or" in the specification and claims means at least one of the connected objects, such as A and/or B and/or C, which means that it includes A alone, B alone, C alone, and both A and B Exist, B and C exist, A and C exist, and A, B, and C all exist in 7 cases. Similarly, the use of "at least one of A and B" in this specification and claims should be understood as "A alone, B alone, or both A and B exist".

The above are optional implementations of the present disclosure. It should be pointed out that for those of ordinary skill in the art, several improvements and modifications can be made without departing from the principles described in the present disclosure, and these improvements and modifications are also Within the protection scope of the present disclosure.

Claims

An information sending method applied to a terminal, the method including:

Send the direct link synchronization signal block S-SSB, the S-SSB contains the physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is based on the first information and the second information Determined by at least one type of information, at least one of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.
The information sending method according to claim 1, wherein at least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information It is carried by the PSBCH demodulation reference signal DMRS.
The information sending method according to claim 1, further comprising:

The scrambling sequence is initialized according to the through link synchronization signal identification number SL-SSID.
The information transmission method according to claim 1, wherein scrambling the PSBCH by a scrambling sequence comprises:

Scrambling the PSBCH by using the first scrambling sequence;

or,

Scrambling the PSBCH by using the second scrambling sequence;

or,

Scrambling the PSBCH by using the first scrambling sequence, and then scrambling the PSBCH by using the second scrambling sequence;

Wherein, the first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.
The information sending method according to claim 4, wherein scrambling the PSBCH through the first scrambling sequence comprises:

The PSBCH payload bit sequence is scrambled by the first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.
The information sending method according to claim 4, wherein scrambling the PSBCH through the second scrambling sequence comprises:

The PSBCH sequence is scrambled through the second scrambling sequence; wherein, the PSBCH sequence is generated after interleaving and rate matching the payload in the PSBCH.
The information sending method according to claim 4, wherein, scrambling the PSBCH through the first scrambling sequence comprises:

According to the first information, a sequence is selected from the first candidate sequence set as the first scrambling sequence, and the PSBCH is scrambled by the first scrambling sequence.
8. The information sending method according to claim 7, wherein the number N1 of candidate sequences in the first candidate sequence set is 2 M1 , and M1 is the number of bits in the first information.
8. The information sending method according to claim 7, wherein each sequence in the first candidate sequence set is a part of the first sequence, or is a subsequence of the first sequence.
The information sending method according to claim 4, wherein scrambling the PSBCH through the second scrambling sequence comprises:

According to the second information, a sequence is selected from the second candidate sequence set as the second scrambling sequence, and the PSBCH is scrambled by the second scrambling sequence.
The information sending method according to claim 10, wherein the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , and M2 is the number of bits in the second information.
The information sending method according to claim 10, wherein each sequence in the second candidate sequence set is a part of the second sequence, or is a subsequence of the second sequence.
The information sending method according to claim 1, wherein at least some bits of the DFN are the 2nd and 3rd bits of the least significant bit of the DFN.
The information sending method according to claim 1, wherein at least part of the bits of the S-SSB index number are 2 or 3 least significant bits of the S-SSB index number.
The information transmission method according to claim 1, wherein at least some bits of the time slot number are 2 or 3 least significant bits of the time slot number.
The information sending method according to claim 1, wherein the time slot number is a time slot number in a system radio frame or a direct radio frame.
The information transmission method according to claim 1, wherein, in the process of scrambling the PSBCH, at least part of the bits of the DFN, at least part of the bits of the S-SSB index number, and time slot number in the first information At least one piece of information in at least part of the bits is not scrambled.
An information receiving method, wherein, applied to a terminal, the method includes:

Receive a through link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information , The at least one item of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.
The information receiving method according to claim 18, further comprising:

Descramble the PSBCH in the S-SSB through the scrambling sequence.
A terminal, which includes: a transceiver, a processor, and a memory, and a program executable by the processor is stored in the memory;

When the processor executes the program, the transceiver controls the transceiver to realize: sending the direct link synchronization signal block S-SSB, the S-SSB includes the PSBCH scrambled by the scrambling sequence; wherein the scrambling sequence is Determined according to at least one of the first information and the second information, at least one of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.
The terminal according to claim 20, wherein at least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH The demodulation reference signal DMRS is carried.
The terminal according to claim 20, wherein the processor is configured to initialize the scrambling sequence according to the through link synchronization signal identification number SL-SSID.
The terminal according to claim 20, wherein the processor is specifically configured to:

Scrambling the PSBCH by using the first scrambling sequence;

or,

Scrambling the PSBCH by using the second scrambling sequence;

or,

Scrambling the PSBCH by using the first scrambling sequence, and then scrambling the PSBCH by using the second scrambling sequence;

Wherein, the first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.
The terminal according to claim 23, wherein the processor is configured to:

The PSBCH payload bit sequence is scrambled by the first scrambling sequence; wherein, the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.
The terminal according to claim 23, wherein the processor is configured to:

The PSBCH sequence is scrambled through the second scrambling sequence; wherein the PSBCH sequence is generated after interleaving and rate matching the payload in the PSBCH.
The terminal according to claim 23, wherein the processor is specifically configured to:

According to the first information, a sequence is selected from the first candidate sequence set as the first scrambling sequence, and the PSBCH is scrambled by the first scrambling sequence.
The terminal according to claim 26, wherein the number N1 of candidate sequences in the first candidate sequence set is 2 M1 , and M1 is the number of bits in the first information.
The information terminal according to claim 26, wherein each sequence in the first candidate sequence set is a part of the first sequence, or is a subsequence of the first sequence.
The terminal according to claim 23, wherein the processor is specifically configured to:

According to the second information, a sequence is selected from the second candidate sequence set as the second scrambling sequence, and the PSBCH is scrambled by the second scrambling sequence.
The terminal according to claim 29, wherein the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , and M2 is the number of bits in the second information.
The terminal according to claim 29, wherein each sequence in the second candidate sequence set is a part of the second sequence, or is a subsequence of the second sequence.
The terminal according to claim 20, wherein at least a part of the bits of the DFN are the 2nd and 3rd bits of the least significant bit of the DFN.
The terminal according to claim 20, wherein at least some bits of the S-SSB index number are 2 or 3 least significant bits of the S-SSB index number.
The terminal according to claim 20, wherein at least some bits of the time slot number are 2 or 3 least significant bits of the time slot number.
The terminal according to claim 20, wherein the time slot number is a time slot number in a system radio frame or a direct radio frame.
The terminal according to claim 20, wherein, in the process of scrambling the PSBCH, at least part of the DFN bits, at least part of the S-SSB index number, and at least part of the slot number in the first information At least one item of information in the bits is not scrambled.
An information sending device, wherein, applied to a terminal, the device includes:

The sending module is used to send the direct link synchronization signal block S-SSB, the S-SSB contains the physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is based on the first information and If at least one piece of information in the second information is determined, at least one piece of information in the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.
A terminal, which includes: a transceiver, a processor, and a memory, the memory stores a program executable by the processor; when the processor executes the program, the transceiver controls the transceiver to realize: receive a direct link A channel synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and the At least one item of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.
The terminal according to claim 38, wherein the processor is configured to:

Descramble the PSBCH in the S-SSB through the scrambling sequence.
An information receiving device, wherein, applied to a terminal, the device includes:

The receiving module is configured to receive the through link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is based on at least one of the first information and the second information If one type of information is determined, at least one of the first information and the second information includes at least one of the following:

At least some bits of the direct radio frame number DFN;

At least part of the bits of the S-SSB index number of the direct link synchronous broadcast channel block;

At least some bits of the slot number.
A processor-readable storage medium, wherein the processor-readable storage medium stores processor-executable instructions, and the processor-executable instructions are used to make the processor execute any one of claims 1 to 17 The method for sending information, or the method for receiving information according to claim 18 or 19.