WO2021159527A1 - Voltage adjusting system, system on chip, and voltage adjusting method - Google Patents

Abstract

Disclosed are a voltage adjusting system, a system on chip, and a voltage adjusting method, for use in providing an adjustable working voltage to the system on chip, satisfying both an initialization requirement and high-performance scenario requirement of the system on chip. The voltage adjusting system comprises the system on chip and a power supply chip. The system on chip is used for outputting a first PWM digital signal and a second PWM digital signal. The power supply chip is coupled with the system on chip and is used for producing an output voltage signal on the basis of a first duty cycle of the first PWM digital signal, of a second duty cycle of the second PWM digital signal, and of a reference voltage of the power supply chip, the output voltage signal being used for providing an input voltage to the system on chip.

Description

Pressure regulating system, on-chip system and pressure regulating method Technical field

This application relates to the field of chip technology, and in particular to a voltage regulation system, a system on a chip, and a voltage regulation method.

Background technique

A system on chip (system on chip, SoC) is an integrated circuit used to implement specific functions, which includes complete system hardware and embedded software. For comprehensive considerations of performance and power consumption, different operating voltages need to be provided to the processors inside the SoC in different working scenarios.

The existing SoC voltage regulation scheme can be as shown in Fig. 1. In this solution, the SoC outputs a pulse width modulation (PWM) digital signal with an adjustable duty cycle. Different duty cycles correspond to different analog voltage values. The SoC adjusts the power chip through the output PWM digital signal. Make the output voltage signal of the power chip output the operating voltage required by the processor inside the SoC after passing through the peripheral circuit.

In practical applications, the Vout input to the SoC needs to meet the working requirements of different application scenarios of the SoC: 1. The minimum value of Vout cannot be lower than the minimum voltage V1 required by the processor; 2. In order to meet the high-performance scene requirements of the processor, Vout The maximum value of can not be lower than the operating voltage V2 required by the processor in high-performance scenarios; 3. During the SoC initialization process, it is necessary to provide the processor with an intermediate voltage value V3 between V1 and V2 to meet Initialization requirements of SoC.

Then, the solution shown in Figure 1 has the following problems: In the SoC initialization process, the duty cycle of the PWM digital signal cannot be set, and the PWM pin can only output a high level (equivalent to a duty cycle of 1) or low Level (equivalent to a duty cycle of 0). When the PWM pin outputs a high level, the value of Vout is the smallest. In actual applications, it is necessary to ensure that the value of Vout when the PWM pin outputs a high level is greater than V1 to meet the minimum voltage requirement of the SoC. However, because the PWM pin outputs a high voltage The usual value of Vout is much smaller than V3, so the value of Vout cannot be used as the operating voltage during SoC initialization; when the PWM pin outputs a low level, the value of Vout is the largest. If the PWM pin outputs a low level, the value of Vout is set It is V3, although it can meet the initial needs of SoC, but because the Vout value when the PWM pin outputs low level is the maximum voltage that the SoC can provide, SoC cannot provide the required operating voltage V2 (V2 is greater than V3) in high-performance scenarios. Therefore, the processor cannot support the work in high-performance scenarios. If the value of Vout when the PWM pin outputs a low level is set to V2, then during the initialization process, the value of Vout is not equal to V3 (V3 is less than V2), which is difficult to meet The initialization requirement of SoC makes SoC initialization fail.

Therefore, the SoC voltage regulation solution provided by the prior art has a problem that it is difficult to balance the requirements of initialization and high-performance scenarios.

Summary of the invention

The embodiments of the present application provide a voltage regulation system, a system on a chip, and a voltage regulation method, which are used to provide an adjustable working voltage for the system on a chip, taking into account the initialization requirements of the system on chip and the requirements of high-performance scenarios.

In the first aspect, an embodiment of the present application provides a voltage regulation system, which includes: a system on a chip and a power chip. Among them, the system-on-chip is used to output the first PWM digital signal and the second PWM digital signal; the power chip is coupled with the system-on-chip, and is used to output the first duty cycle of the first PWM digital signal and the second duty of the second PWM digital signal. The output voltage signal is obtained by the idle ratio and the reference voltage of the power chip, and the output voltage signal is used to provide the input voltage for the on-chip system.

Using the voltage regulation system provided in the first aspect, the on-chip system outputs two PWM digital signals, namely the first PWM digital signal and the second PWM digital signal. When the on-chip system is initialized, the first PWM digital signal can be configured as a high level ( Equivalent to a duty cycle of 1) or a low level (equivalent to a duty cycle of 0), the second PWM digital signal can also be configured as a high level or a low level. Therefore, the output of the on-chip system can be configured into four types The combination, correspondingly, the input voltage provided by the power chip for the system-on-chip can also have four combinations. Then, set the maximum value of the input voltage of the system-on-chip to the required operating voltage V2 in the high-performance scenario, and set the minimum value of the input voltage of the system-on-chip to a value greater than the minimum voltage V1 required by the processor, and set the system-on-chip The intermediate value of the input voltage is set to the operating voltage V3 required during the initialization of the on-chip system, which can take into account both the initialization requirements of the on-chip system and the requirements of high-performance scenarios. After the system-on-chip is initialized, the system-on-chip can output the first PWM digital signal with adjustable duty cycle and the second PWM digital signal with adjustable duty cycle to instruct the power chip to adjust the output voltage signal, thereby making the system-on-chip Obtain the desired operating voltage. Therefore, the voltage regulation system provided by the embodiments of the present application can provide an adjustable operating voltage for the system-on-chip when the system-on-chip is working normally, and at the same time, it can also take into account the initialization requirements of the system-on-chip and the requirements of high-performance scenarios.

Specifically, when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, the output voltage signal is the on-chip system and the input voltage is the operating voltage of the on-chip system in the initialization scenario; or, the first PWM digital When the signal is at a high level and the second PWM digital signal is at a low level, the output voltage signal is the on-chip system and the input voltage is the operating voltage of the on-chip system in the initialization scenario.

Generally, the smaller the first duty cycle of the first PWM digital signal output by the on-chip system, the greater the input voltage provided by the power chip for the on-chip system; similarly, the second duty cycle of the second PWM digital signal output by the on-chip system The smaller the value, the greater the input voltage provided by the power chip for the system-on-chip. Therefore, in the initialization scenario, one of the first PWM digital signal and the second PWM digital signal can be configured as a high level and the other can be configured as a low level.

Specifically, when the first PWM digital signal and the second PWM digital signal are both low level, the output voltage signal is the input voltage provided by the on-chip system as the operating voltage of the on-chip system in a high-performance scenario; or, the first duty cycle is less than When the first preset value and the second duty ratio are less than the second preset value, the output voltage signal is the input voltage provided by the on-chip system as the operating voltage of the on-chip system in a high-performance scenario.

Wherein, the first preset value and the second preset value can be configured according to requirements, and the values of the first preset value and the second preset value may be the same or different. As mentioned earlier, the smaller the first duty cycle and the second duty cycle, the greater the input voltage provided by the power chip for the system-on-chip. In high-performance scenarios, the operating voltage required by the system-on-chip is relatively high. At this time, the first duty cycle can be made smaller than the first preset value, the second duty cycle can be made smaller than the second preset value, or the first duty cycle can be made The ratio and the second duty cycle are both zero (that is, the first PWM digital signal and the second PWM digital signal are both low), so that the on-chip system can obtain a higher input voltage as the working voltage in a high-performance scenario.

In a possible design, the voltage regulation system provided in the first aspect further includes a peripheral circuit. The peripheral circuit is used to convert the first PWM digital signal into a first feedback signal; and the second PWM digital signal is converted into a second feedback signal; the peripheral circuit is also used to divide the input voltage of the on-chip system to obtain the first Three feedback signals, and the first feedback signal, the second feedback signal, and the third feedback signal are fed back to the power chip; then, the power chip is specifically used to: according to the first feedback signal, the second feedback signal, the third feedback signal and the power source The chip reference voltage gets the output voltage signal.

With the above solution, a feedback signal can be provided for the power supply chip through the peripheral circuit, so that the power supply chip can adjust the reference voltage according to the feedback signal to obtain an output voltage signal.

Specifically, the peripheral circuit may include: a first filter circuit for converting the first PWM digital signal into a first feedback signal, and feeding back the first feedback signal to the feedback voltage input terminal of the power chip; and a second filter circuit for The second PWM digital signal is converted into a second feedback signal, and the second feedback signal is fed back to the feedback voltage input terminal; a voltage divider circuit is used to divide the input voltage to obtain a third feedback signal, and feed back the third feedback signal To the feedback voltage input terminal.

With the above solution, the first feedback signal, the second feedback signal, and the third feedback signal are provided for the power chip through the first filter circuit, the second filter circuit, and the voltage divider circuit, respectively.

In a possible design, the voltage divider circuit includes a first resistor and a second resistor. The first end of the first resistor is coupled to the port of the on-chip system for receiving the input voltage, and the second end of the first resistor is connected to the feedback voltage input. The first end of the second resistor is coupled to the first end of the second resistor, and the second end of the second resistor is coupled to the ground end; the first filter circuit includes a third resistor, a fourth resistor, and a first capacitor. The first end of the third resistor is connected to the on-chip system Port coupling for outputting the first PWM digital signal, the second end of the third resistor is coupled to the first end of the first capacitor and the first end of the fourth resistor, and the second end of the fourth resistor is coupled to the feedback voltage input end , The second terminal of the first capacitor is coupled to the ground terminal; the second filter circuit includes a fifth resistor, a sixth resistor, and a second capacitor. Coupling, the second end of the fifth resistor is coupled to the first end of the second capacitor and the first end of the sixth resistor, the second end of the sixth resistor is coupled to the feedback voltage input end, and the second end of the second capacitor is connected to ground End coupling.

With the above solution, a specific structure of the peripheral circuit is provided.

In addition, the peripheral circuit may further include: an output filter circuit, coupled with the voltage output terminal of the power chip, for filtering the output voltage signal to obtain the input voltage of the on-chip system.

With the above solution, the output voltage signal can be filtered through the output filter circuit to provide a stable input voltage for the on-chip system.

In the second aspect, the embodiments of the present application also provide a system on chip, the system on chip is used to: output the first PWM digital signal and the second PWM digital signal; receive the input voltage of the system on chip provided by the power chip, It works under the driving of the voltage, and the input voltage is obtained by the power chip according to the first duty ratio of the first PWM digital signal, the second duty ratio of the second PWM digital signal and the reference voltage of the power chip.

In a possible design, when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, or the first PWM digital signal is at a high level and the second PWM digital signal is at a low level, the input The voltage is the operating voltage of the on-chip system in the initialization scenario.

In a possible design, when the first PWM digital signal and the second PWM digital signal are both low, or the first duty cycle is less than the first preset value, and the second duty cycle is less than the second preset value , The input voltage is the operating voltage of the on-chip system in high-performance scenarios.

It should be noted that the system-on-chip provided in the second aspect can be regarded as the system-on-chip in the voltage regulation system provided in the first aspect. For its specific structure, function and technical effect, please refer to the relevant description in the first aspect, which will not be omitted here. Go into details.

In a third aspect, an embodiment of the present application also provides a voltage regulation method. The method includes: a voltage regulation system obtains a first PWM digital signal and a second PWM digital signal; Ratio, the second duty of the second PWM digital signal and the reference voltage of the power chip obtain an output voltage signal, and the output voltage signal is used to provide an input voltage for the on-chip system.

In a possible design, when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, the output voltage signal is the system-on-chip input voltage, and the input voltage is the operating voltage of the system-on-chip in the initialization scenario; or , When the first PWM digital signal is at a high level and the second PWM digital signal is at a low level, the output voltage signal is the on-chip system and the input voltage is the operating voltage of the on-chip system in the initialization scenario.

In a possible design, when the first PWM digital signal and the second PWM digital signal are both low, the output voltage signal is the input voltage provided by the on-chip system as the operating voltage of the on-chip system in a high-performance scenario; or, the first When a duty cycle is less than the first preset value and the second duty cycle is less than the second preset value, the output voltage signal is the system-on-chip input voltage, and the input voltage is the operating voltage of the system-on-chip in a high-performance scenario.

Specifically, the voltage regulating system obtains the output voltage signal according to the first duty cycle of the first PWM digital signal, the second duty cycle of the second PWM digital signal, and the power chip reference voltage, which can be implemented in the following manner: The digital signal is converted into the first feedback signal; the second PWM digital signal is converted into the second feedback signal; the input voltage of the on-chip system is divided to obtain the third feedback signal; according to the first feedback signal, the second feedback signal, and the second feedback signal Three feedback signals and the reference voltage of the power chip obtain the output voltage signal.

In a possible design, the output voltage signal is used to provide the input voltage for the on-chip system, which specifically includes: filtering the output voltage signal to obtain the input voltage of the on-chip system.

It should be noted that the pressure regulation method provided by the third aspect can be regarded as the method performed by the pressure regulation system provided by the first aspect. For the specific implementation and technical effects, please refer to the relevant description in the first aspect. Go into details.

In a fourth aspect, an embodiment of the present application provides a system on chip, the system on chip includes: a DC power supply, a first resistor, a first switch tube, a second switch tube, and a second resistor, and a PWM controller, a DC power supply and a first resistor Is coupled to the first end of the first resistor, the second end of the first resistor is coupled to the first end of the first switch, the second end of the first switch is coupled to the first end of the second switch, the PWM controller and the on-chip system The second end of the second switch tube is coupled to the first end of the second resistor, and the second end of the second resistor is coupled to the ground end. The power chip is used to adjust the output voltage signal according to the output signal of the system-on-chip, The output voltage signal is used to provide a working voltage for the on-chip system; wherein, when the on-chip system is initialized, the first switch tube and the second switch tube are turned on, and the PWM controller is in a high impedance state.

With the above solution, when the on-chip system is initialized, the output of the PWM controller is zero, and the output of the PWM controller has no effect on the power chip. The system on chip provides the power chip with the output of the first resistor and the second resistor to the DC power supply. The voltage obtained after the voltage is divided. The voltage can be adjusted by the output voltage of the DC power supply, the resistance of the first resistor, and the resistance of the second resistor, so that the power chip can adjust the reference voltage according to the voltage. The output voltage signal can meet the initialization requirements of the on-chip system.

In a possible design, when the on-chip system is working normally, the first switching tube and the second switching tube are turned off, and the PWM controller outputs a PWM digital signal.

With the above solution, when the system on chip is working normally, the first switch tube and the second switch tube are turned off, the DC power supply, the first resistor and the second resistor no longer function, and the system on chip provides the output of the PWM controller to the power chip. PWM digital signal, the power chip can adjust the output voltage signal according to the duty ratio of the PWM digital signal, so that the output voltage signal can meet the working voltage requirements of the on-chip system in the normal working state.

Description of the drawings

Figure 1 is a schematic diagram of a SoC voltage regulation solution provided by the prior art;

Figure 2 is a schematic structural diagram of a pressure regulating system provided by the prior art;

FIG. 3 is a schematic structural diagram of the first pressure regulating system provided by an embodiment of the application;

Fig. 4 is a schematic structural diagram of a second pressure regulating system provided by an embodiment of the application;

Fig. 5 is a schematic structural diagram of a third pressure regulating system provided by an embodiment of the application;

Fig. 6 is a schematic structural diagram of a fourth pressure regulating system provided by an embodiment of the application;

FIG. 7 is a schematic structural diagram of a fifth pressure regulating system provided by an embodiment of the application;

FIG. 8 is a schematic flow chart of a pressure regulating method provided by an embodiment of the application;

FIG. 9 is a schematic structural diagram of a system on chip provided by an embodiment of the application.

Detailed ways

As mentioned in the background art, in the existing SoC voltage regulation scheme, the SoC outputs a PWM digital signal with an adjustable duty cycle. Different duty cycles correspond to different voltage values, and the SoC adjusts by the output PWM digital signal. The power chip makes the output voltage signal of the power chip output the working voltage required by the processor inside the SoC after passing through the peripheral circuit. Specifically, the PWM digital signal is converted into a corresponding voltage value by the peripheral circuit and output to the power chip. The power chip adjusts the reference voltage according to the voltage value to obtain the output voltage. The output voltage is filtered by the peripheral circuit to obtain the SoC internal The operating voltage Vout required by the processor.

Specifically, using the voltage regulation scheme shown in FIG. 1, the structural schematic diagram of the voltage regulation system may be as shown in FIG. 2. In the voltage regulation system shown in Figure 2, the power chip includes an error amplifier and a voltage output circuit. The resistor R1, resistor R2, resistor R3, resistor R4, inductor L, capacitor C1, and capacitor C2 form a peripheral circuit.

Among them, the PWM digital signal output by the SoC is filtered by R3, R4 and C2 to obtain the feedback signal Vpwm, which is input to the inverting input terminal of the error amplifier; the input voltage Vout of the SoC is divided by R1 and R2 as the feedback signal input The inverting input terminal of the error amplifier; the non-inverting input terminal of the error amplifier is connected to the reference voltage source for inputting the reference voltage Vref, the inverting input terminal is used as the feedback input terminal, and the error amplifier is used to output the input voltage of the feedback input terminal and the reference voltage source. It should be understood that the error amplifier adjusts the reference voltage signal input from the non-inverting input terminal based on the feedback signal input from the inverting input terminal, and the voltage difference output by the error amplifier is the adjusted voltage signal, which is The input terminal is connected with the output terminal of the error amplifier to obtain the voltage difference. The voltage output circuit processes the voltage difference output by the error amplifier to obtain an output voltage signal. The output voltage signal is filtered by L and C1 to obtain Vout and provide it to the SoC .

It is not difficult to see that when the duty cycle of the PWM digital signal output by the SoC changes, the voltage value of the feedback signal Vpwm obtained after the PWM digital signal is filtered by R3, R4 and C2 will also change, because the feedback signal Vpwm is The feedback signal of the error amplifier, so the change of Vpwm will also affect the output voltage signal of the power chip, and finally lead to the change of Vout. Therefore, the SoC can indicate the operating voltage required by the internal processor through the output PWM digital signal, thereby obtaining the desired Vout.

Among them, the output voltage Vout is determined according to the following formula:

Vout=Vref·(1+R1/R2)+(Vref-Vpwm)(R1/(R3+R4))

It can be seen from the above formula that Vref, R1, R2, R3, and R4 are all constants, so Vout is controlled by the Vpwm converted from the PWM digital signal, that is, controlled by the duty cycle of the PWM digital signal.

In addition, it is not difficult to see from the above formula that the greater the duty cycle of the PWM digital signal, the greater the value of Vpwm, and the smaller the value of Vout.

Then, the voltage regulation system shown in Figure 2 has the following problems: During the initialization of the SoC, the duty cycle of the PWM digital signal cannot be set, and the PWM pin can only output a high level (equivalent to a duty cycle of 1) Or low level (equivalent to a duty cycle of 0). When the PWM pin outputs a low level, the value of Vout is the largest. If the value of Vout when the PWM pin outputs a low level is set to the initialization voltage of the SoC, although it can meet the initialization requirements of the SoC, because the Vout value when the PWM pin outputs a low level is the maximum value of Vout that the power chip can provide During the normal operation of the SoC, the power chip can no longer provide a higher voltage than the initialization voltage, so it is difficult to meet the voltage requirements of the SoC in high-performance scenarios; if the Vout value when the PWM pin outputs a low level is set to the SoC The operating voltage in the high-performance scenario, then during the initialization process, the operating voltage in the high-performance scenario is relatively high, making the SoC unable to complete the initialization.

Based on the foregoing problems, the embodiments of the present application provide a voltage regulation system, a system on a chip, and a voltage regulation method, which are used to provide an adjustable working voltage for the system on a chip, taking into account the initialization requirements of the system on chip and the requirements of high-performance scenarios.

The embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

Refer to FIG. 3, which is a schematic structural diagram of a pressure regulating system provided by an embodiment of this application. The voltage regulation system 300 includes a system on chip 301 and a power chip 302.

Among them, the system-on-chip 301 is used to output the first PWM digital signal and the second PWM digital signal; the power chip 302 is coupled with the system-on-chip 301 and is used to output the first duty cycle of the first PWM digital signal and the second PWM digital signal. The second duty cycle and the reference voltage of the power chip obtain an output voltage signal, and the output voltage signal is used to provide an input voltage for the system on chip 301.

Among them, the output voltage signal of the power chip 302 can be directly used as the input voltage of the system on chip 301, or after processing (such as filtering), it can be used as the input voltage of the system on chip 301. The input voltage is the input voltage of the system on chip 301 in the current scene. Required working voltage.

Wherein, the first PWM digital signal and the second PWM digital signal are both PWM digital signals with an adjustable duty cycle. The system-on-chip 301 instructs the power chip 302 to adjust the output voltage signal through the first duty cycle of the first PWM digital signal and the second duty cycle of the second PWM digital signal that are output, so as to obtain a desired operating voltage.

Exemplarily, assuming that the high-level voltage value corresponding to the first PWM digital signal is 3.3V, and the low-level voltage value corresponding to the first PWM digital signal is 0V, then in one clock cycle, the first PWM digital signal The duration of the output high level can reflect the size of the first duty cycle. For example, if the duration of a clock cycle is 100ms, the first PWM digital signal outputs a high level in the first 50ms and outputs a low level in the last 50ms. Then in this clock cycle, the first duty cycle of the first PWM digital signal For example, the duration of a clock cycle is 100ms, and the first PWM digital signal outputs a high level in the first 20ms and a low level in the last 80ms. Then in this clock cycle, the first PWM The first duty ratio of the digital signal is 20/100=0.2. In extreme cases, the first PWM digital signal outputs 3.3V in one clock cycle, then the first duty cycle of the PWM digital signal is 1; the first PWM digital signal outputs 0V in one clock cycle, then the PWM digital The first duty cycle of the signal is zero. Of course, the second duty cycle of the second PWM digital signal can also be understood in the same way, which will not be repeated here.

It should be noted that, in the embodiment of the present application, the voltage value of the low level corresponding to the first PWM digital signal and the second PWM digital signal may both be 0V, and the first PWM digital signal and the second PWM digital signal correspond to The high-level voltage values can be the same or different. For example, in one possible situation, the high-level voltage value corresponding to the first PWM digital signal is 3.3V, and the high-level voltage value corresponding to the second PWM digital signal is also 3.3V; in another possibility In the case, the high-level voltage value corresponding to the first PWM digital signal is 3.3V, and the high-level voltage value corresponding to the second PWM digital signal is 1.8V.

In practical applications, the system-on-chip 301 can detect its own attribute parameters, and generate corresponding first PWM digital signals and second PWM digital signals based on the detected attribute parameters; among them, the detected attribute parameters can reflect the system-on-chip 301 The parameters required by the core voltage, such as the process parameters of the processor, the scene in which the processor is running, and so on. According to this attribute parameter, the operating voltage required by the processor can be obtained. The corresponding relationship between the attribute parameter and the operating voltage required by the processor can be a set mapping relationship. Through the experience and experiment of the designer, the operating voltage corresponding to different attribute parameters is determined in advance, and then the determined voltage value is made to have the first account. The first PWM digital signal with the empty ratio and the second PWM digital signal with the second duty ratio are identified. The on-chip system 301 instructs the operating voltage required by the internal processor by outputting the first PWM digital signal and the second PWM digital signal. Specifically, the generation of the first PWM digital signal and the second PWM digital signal can be performed by the PWM controller in the system-on-chip 301, for example, the first PWM digital signal and the second PWM digital signal can be generated by a PWM controller, or by The two PWM controllers respectively generate the first PWM digital signal and the second PWM digital signal.

Using the voltage regulating system 300 provided by the embodiment of the present application, since the system on chip 301 outputs two PWM digital signals, that is, the first PWM digital signal and the second PWM digital signal, then when the system on chip 301 is initialized, the first PWM digital signal can be Configured as high level (equivalent to duty cycle of 1) or low level (equivalent to duty cycle of 0), the second PWM digital signal can also be configured to high level or low level. Therefore, the system on chip 301 The output can be configured into four combinations: 1. The first PWM digital signal is high level, and the second PWM digital signal is high level; 2. The first PWM digital signal is high level, and the second PWM digital signal is low. Level; 3. The first PWM digital signal is low level, and the second PWM digital signal is high level; 4. The first PWM digital signal is low level, and the second PWM digital signal is low level. Correspondingly, under the above four combinations, the input voltage provided for the system on chip 301 can also have four combinations. Set the maximum value of the input voltage of the corresponding system on chip 301 in the four groups of combinations to the required operating voltage V2 in the high-performance scenario, and set the minimum value of the input voltage of the corresponding system on chip 301 in the four groups of combinations to be greater than V1 Set the intermediate value of the input voltage of the system-on-chip 301 corresponding to the four groups of combinations to the operating voltage V3 required for the initialization of the system-on-chip 301, which can take into account the initialization requirements of the system-on-chip 301 and high-performance scenarios.

In addition, after the initialization of the system-on-chip 301 is completed, the system-on-chip 301 can output a first PWM digital signal with an adjustable duty cycle and a second PWM digital signal with an adjustable duty cycle to instruct the internal processor to work. Voltage, and then obtain the desired operating voltage, to meet the different operating voltage requirements of the processor.

In summary, the voltage regulating system 300 provided by the embodiment of the present application can provide the system on chip 301 with an adjustable operating voltage when the system on chip 301 is working normally. In addition, it can also take into account the initialization requirements of the system on chip 301 and the requirements of high-performance scenarios. .

Specifically, when the system-on-chip 301 is initialized, the first PWM digital signal and the second PWM digital signal can adopt the following configuration: when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, the power chip 302 The output voltage signal of is the input voltage provided by the system-on-chip 301 is the operating voltage of the system-on-chip 301 in the initialization field. Alternatively, when the first PWM digital signal is at a high level and the second PWM digital signal is at a low level, the output voltage signal of the power chip 302 is the system-on-chip 301 and the input voltage is the operating voltage of the system-on-chip 301 in the initialization scenario.

That is to say, in the initialization scenario, one of the first PWM digital signal and the second PWM digital signal can be configured as a high level and the other can be configured as a low level.

Specifically, in a high-performance scenario, the first PWM digital signal and the second PWM digital signal may adopt the following configuration: when the first PWM digital signal and the second PWM digital signal are both low, the output voltage signal of the power chip 302 is The input voltage provided by the system-on-chip 301 is the operating voltage of the system-on-chip 301 in a high-performance scenario. Or, when the first duty cycle is less than the first preset value, and the second duty cycle is less than the second preset value, the output voltage signal of the power chip 302 is the input voltage provided by the system-on-chip 301. Working voltage.

Wherein, the first preset value and the second preset value can be configured according to requirements, and the values of the first preset value and the second preset value may be the same or different. In a specific example, the first preset value and the second preset value may both be 0.1, or the first preset value may be 0.1 and the second preset value may be 0.2.

Generally, the smaller the first duty cycle of the first PWM digital signal output by the system-on-chip 301, the greater the input voltage provided by the power chip 302 to the system-on-chip 301; similarly, the second PWM digital signal output by the system-on-chip 301 is Second, the smaller the duty cycle, the greater the input voltage provided by the power chip 302 to the system-on-chip 301. Then, in a high-performance scenario, the operating voltage required by the system-on-chip 301 is relatively high. At this time, the first duty cycle can be made smaller than the first preset value, the second duty cycle can be made smaller than the second preset value, or the first The first duty cycle and the second duty cycle are both zero (that is, the first PWM digital signal and the second PWM digital signal are both low), so that the system-on-chip 301 obtains a higher input voltage, which is used as a high-performance scenario Working voltage.

In addition, the voltage regulation system 300 may also include peripheral circuits, as shown in FIG. 4. The peripheral circuit is used for converting the first PWM digital signal into a first feedback signal; and converting the second PWM digital signal into a second feedback signal.

When the first duty ratio is different, the voltage value of the first feedback signal converted by the peripheral circuit is also different; similarly, when the second duty ratio is different, the value of the second feedback signal converted by the peripheral circuit is different. The voltage value is also different. That is, the first feedback signal is a feedback signal that can reflect the magnitude of the first duty cycle, and the second feedback signal is a feedback signal that can reflect the magnitude of the first duty cycle. Since the system-on-chip 301 can indicate the operating voltage required by its internal processor through the first duty cycle and the second duty cycle, the peripheral circuit uses the first feedback signal for the first duty cycle and the second duty cycle respectively. And the second feedback signal instruction can make the power chip 302 adjust the output voltage signal according to the first feedback signal and the second feedback signal, so that the input voltage of the system on chip 301 is the operating voltage required by the processor.

In addition, the peripheral circuit can also be used to divide the input voltage of the system-on-chip 301 to obtain a third feedback signal, and feed back the first feedback signal, the second feedback signal, and the third feedback signal to the power chip 302. Then, the power chip 302 is specifically used to obtain the output voltage signal according to the first feedback signal, the second feedback signal, the third feedback signal and the reference voltage of the power chip.

Specifically, the power chip 302 may adjust the reference voltage of the power chip according to the first feedback signal, the second feedback signal, and the third feedback signal to obtain the output voltage signal.

According to the functional division of the aforementioned peripheral circuits, it is not difficult to understand that the peripheral circuits may include a first filter circuit, a second filter circuit, and a voltage divider circuit. Among them, the first filter circuit is used to convert the first PWM digital signal into a first feedback signal, and the first feedback signal is fed back to the feedback voltage input terminal of the power chip 302; the second filter circuit is used to convert the second PWM digital signal It is the second feedback signal, and the second feedback signal is fed back to the feedback voltage input terminal; the voltage divider circuit is used to divide the input voltage to obtain the third feedback signal, and feed back the third feedback signal to the feedback voltage input terminal.

In practical applications, the filter circuit can be composed of resistors and capacitors, and the voltage divider circuit can be implemented by voltage divider resistors.

In a specific example, the voltage divider circuit may include a first resistor and a second resistor. The first end of the first resistor is coupled to the port of the on-chip system 301 for receiving the input voltage, and the second end of the first resistor is connected to the feedback voltage. The input terminal is coupled with the first terminal of the second resistor, and the second terminal of the second resistor is coupled with the ground terminal; the first filter circuit may include a third resistor, a fourth resistor, and a first capacitor, and the first terminal of the third resistor is coupled with The on-chip system 301 is used to output the port coupling of the first PWM digital signal, the second end of the third resistor is coupled to the first end of the first capacitor and the first end of the fourth resistor, and the second end of the fourth resistor is coupled to the feedback voltage The input end is coupled, the second end of the first capacitor is coupled to the ground end; the second filter circuit includes a fifth resistor, a sixth resistor, and a second capacitor, and the first end of the fifth resistor and the system on chip 301 are used to output the second PWM Digital signal port coupling, the second end of the fifth resistor is coupled to the first end of the second capacitor and the first end of the sixth resistor, the second end of the sixth resistor is coupled to the feedback voltage input end, and the second end of the second capacitor The two ends are coupled with the ground end.

Referring to FIG. 5, it is a specific example of the voltage regulating system 300 shown in FIG. 4. In the example of FIG. 5, the specific composition of the peripheral circuit is shown. Among them, R1 and R2 form a voltage divider circuit, where R1 can be regarded as the first resistor, and R2 can be regarded as the second resistor; R3, R4 and C2 form the first filter circuit, where R3 can be regarded as the third resistor and R4 can be regarded as As the fourth resistor, C2 can be regarded as the first capacitor; R5, R6, and C3 form the second filter circuit, where R5 can be regarded as the fifth resistor, R6 can be regarded as the sixth resistor, and C3 can be regarded as the second capacitor.

In addition, in the voltage regulation system 300 shown in FIG. 5, the peripheral circuit may also include an output filter circuit, which is coupled to the voltage output terminal of the power chip 302 and is used to filter the output voltage signal of the power chip 302 In order to obtain the input voltage of the system-on-chip 301. Exemplarily, the output filter circuit may be composed of an inductor L and a capacitor C1, as shown in FIG. 5.

Similar to the voltage regulation system shown in FIG. 2, in the voltage regulation system shown in FIG. 5, the power chip may include an error amplifier and a voltage output circuit, as shown in FIG. 6 in detail.

Among them, the first PWM digital signal output by the on-chip system 301 (indicated by PWM0 in Figure 6) is filtered by R3, R4, and C2 to obtain the first feedback signal Vpwm0, and Vpwm0 is input as the first feedback signal to the inverting input terminal of the error amplifier ; The second PWM digital signal output by the on-chip system 301 (indicated by PWM1 in Figure 6) is filtered by R5, R6, and C3 to obtain the second feedback signal Vpwm1, and Vpwm1 is input as the second feedback signal to the inverting input of the error amplifier; The input voltage Vout of the system-on-chip 301 is divided by R1 and R2 as the third feedback signal and input to the inverting input terminal of the error amplifier; the non-inverting input terminal of the error amplifier is connected to a reference voltage source for inputting the reference voltage Vref, and the inverting input terminal As the feedback input terminal, the error amplifier is used to output the voltage difference between the input voltage at the feedback input terminal and the reference voltage source; it should be understood that the error amplifier performs the reference voltage signal input at the non-inverting input terminal based on the feedback signal input at the inverting input terminal. Adjustment, the voltage difference output by the error amplifier is the adjusted voltage signal, the input terminal of the voltage output circuit is connected with the output terminal of the error amplifier to obtain the voltage difference, and the voltage output circuit processes the voltage difference output by the error amplifier The output voltage signal is obtained, and the output voltage signal is filtered by L and C1 to obtain Vout and provide it to the system-on-chip 301.

It is not difficult to understand that when the first duty cycle of PWM0 output by the on-chip system 301 changes, the voltage value of the first feedback signal Vpwm0 obtained after PWM0 is filtered by R3, R4 and C2 will also change; when the on-chip system 301 outputs When the second duty cycle of PWM1 changes, the voltage value of the second feedback signal Vpwm1 obtained after PWM1 is filtered by R5, R6 and C3 will also change. Since Vpwm0 and Vpwm1 are feedback signals of the error amplifier, the changes of Vpwm0 and Vpwm1 will affect the output voltage signal of the power chip 302, and eventually cause Vout to change. Therefore, the system-on-chip 301 can indicate the operating voltage required by its internal processor through the output PWM0 and PWM1, thereby obtaining the desired Vout.

Specifically, the output voltage Vout is determined according to the following formula:

Vout=Vdc+△V0+△V1

Among them, Vdc=Vref*(1+R1/R2), and the value of Vdc depends on the characteristics of the power chip 302 and is a fixed value.

△V0=(Vref-Vpwm0)*R1/(R3+R4), △V0 changes with the first duty ratio set by the system on chip 301.

ΔV1=(Vref-Vpwm1)*R1/(R5+R6), ΔV1 changes with the second duty ratio set by the system on chip 301.

It is not difficult to see that the smaller the value of Vpwm0, the larger the value of Vout; and Vpwm0 is obtained by PWM0 after filtering by R3, R4 and C2. The smaller the first duty cycle of PWM0, the smaller the value of Vpwm0. Therefore, the smaller the first duty cycle, the larger the value of Vout. Similarly, the smaller the value of Vpwm1, the larger the value of Vout; and Vpwm1 is obtained by filtering PWM1 through R5, R6 and C3. The smaller the second duty cycle of PWM1, the smaller the value of Vpwm1. Therefore, the smaller the second duty cycle, the larger the value of Vout.

Based on the above analysis, the following conclusions can be drawn:

① When both PWM0 and PWM1 are set to low level (Low), Vout can get the maximum value Vout_max;

② When both PWM0 and PWM1 are set to high level (High), Vout can get the minimum value Vout_min;

③Set one of PWM0 and PWM1 to high level (High) and one to low level (Low), and the intermediate voltage value Vout_mid can be obtained.

Therefore, in the initialization process of the system-on-chip 301, you can configure according to ③ to obtain Vout_mid as the operating voltage of the system-on-chip 301 in the initialization scenario; in the high-performance scenario, the processor in the system-on-chip 301 requires a higher operating voltage , You can configure according to ① to get Vout_max as the operating voltage of the system-on-chip 301 in high-performance scenarios; when the system-on-chip 301 works normally in non-high-performance scenarios, PWM0 and PWM1 can be digital signals with dynamic changes in duty cycle. So as to meet the dynamic voltage regulation requirements of the system-on-chip 301.

In summary, using the voltage regulating system 300 provided by the embodiment of the present application, the on-chip system 301 outputs two PWM digital signals, namely the first PWM digital signal and the second PWM digital signal. When the on-chip system 301 is initialized, the first PWM digital signal It can be configured as a high level (equivalent to a duty cycle of 1) or a low level (equivalent to a duty cycle of 0), and the second PWM digital signal can also be configured to a high level or a low level. Therefore, the system on chip The output of 301 can be configured into four combinations. Correspondingly, the input voltage provided by the power chip 302 for the system-on-chip 301 can also have four combinations. Then, set the maximum value of the input voltage of the system-on-chip 301 to the required operating voltage V2 in a high-performance scenario, and set the minimum value of the input voltage of the system-on-chip 301 to a value greater than the minimum voltage V1 required by the processor, and set the on-chip The intermediate value of the input voltage of the system 301 is set to the operating voltage V3 required when the system on chip 301 is initialized, which can take into account the initialization requirements of the system on chip 301 and the high performance scenario requirements. After the system-on-chip 301 is initialized, the system-on-chip 301 can output a first PWM digital signal with an adjustable duty cycle and a second PWM digital signal with an adjustable duty cycle to instruct the power chip to adjust the output voltage signal, so that The system on chip 301 obtains the desired operating voltage. Therefore, the voltage regulating system 300 provided by the embodiment of the present application can provide the system on chip 301 with an adjustable operating voltage when the system on chip 301 is working normally, and at the same time, it can also take into account the initialization requirements of the system on chip 301 and the high performance scenario requirements.

Based on the same inventive concept, an embodiment of the present application also provides a pressure regulating system, which can be regarded as a specific example of the aforementioned pressure regulating system 300. The structure of the pressure regulating system can be shown in Figure 7.

In the voltage regulation system shown in FIG. 7, the chip U1 can be regarded as a specific example of the aforementioned power chip 302, and the chip U2 can be regarded as a specific example of the aforementioned system-on-chip 301. The parts other than the chip U1 and the chip U2 can be Think of it as a specific example of the aforementioned peripheral circuit. PWM0 can be regarded as the first PWM digital signal, PWM1 can be regarded as the second PWM digital signal, and Vout can be regarded as the input voltage of the system on chip 301. In the chip U1, the FB port can be regarded as the feedback voltage input terminal of U1, and the LX port can be regarded as the voltage output terminal of U1. Vin is the power supply of chip U1.

In this voltage regulation system, in the SoC initialization process, one of PWM0 and PWM1 can be set to high level and the other to low level. Vout is the operating voltage of the SoC in the initialization scenario; in the high-performance scenario , Both PWM0 and PWM1 can be set to high level, Vout is the operating voltage of SoC in high-performance scenarios; when SoC works normally in non-high-performance scenarios, PWM0 and PWM1 can be digital signals with dynamic changes in duty cycle , So as to meet SoC's dynamic voltage regulation requirements.

Based on the same inventive concept, the embodiments of the present application also provide a system on chip, which can be regarded as a specific example of the aforementioned system on chip 301. Specifically, the system-on-chip is used to output the first PWM digital signal and the second PWM digital signal; it receives the input voltage of the system-on-chip provided by the power chip, and works under the drive of the input voltage of the system-on-chip. The input voltage is based on the power chip The first duty cycle of the first PWM digital signal, the second duty cycle of the second PWM digital signal and the reference voltage of the power chip are obtained.

In a possible example, when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, or the first PWM digital signal is at a high level and the second PWM digital signal is at a low level, the input The voltage is the operating voltage of the on-chip system in the initialization scenario.

In a possible example, when the first PWM digital signal and the second PWM digital signal are both low, or the first duty cycle is less than the first preset value, and the second duty cycle is less than the second preset value , The input voltage is the operating voltage of the on-chip system in high-performance scenarios.

It should be noted that the specific functions of the system-on-chip and the interaction between the system-on-chip 301 and the power chip can refer to the relevant description in the aforementioned voltage regulation system 300, which will not be repeated here.

Based on the same inventive concept, an embodiment of the present application also provides a pressure regulating method, which can be regarded as the method performed by the aforementioned pressure regulating system 300. Referring to Figure 8, the method includes the following steps.

S801: The voltage regulating system obtains the first PWM digital signal and the second PWM digital signal.

S802: The voltage regulation system obtains an output voltage signal according to the first duty ratio of the first PWM digital signal, the second duty ratio of the second PWM digital signal, and the power chip reference voltage.

Among them, the output voltage signal is used to provide input voltage for the on-chip system.

Optionally, when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, the output voltage signal is the on-chip system and the input voltage is the operating voltage of the on-chip system in the initialization scenario; or, the first PWM When the digital signal is at a high level and the second PWM digital signal is at a low level, the output voltage signal is the on-chip system and the input voltage is the operating voltage of the on-chip system in the initialization scenario.

Optionally, when the first PWM digital signal and the second PWM digital signal are both at a low level, the output voltage signal is the system-on-chip input voltage, and the input voltage is the operating voltage of the system-on-chip in a high-performance scenario; or, the first duty cycle When the output voltage signal is less than the first preset value and the second duty cycle is less than the second preset value, the input voltage provided by the system-on-chip is the operating voltage of the system-on-chip in a high-performance scenario.

Specifically, the voltage regulating system obtains the output voltage signal according to the first duty cycle of the first PWM digital signal, the second duty cycle of the second PWM digital signal, and the power chip reference voltage, which can be implemented in the following manner: The digital signal is converted into the first feedback signal; the second PWM digital signal is converted into the second feedback signal; the input voltage of the on-chip system is divided to obtain the third feedback signal; according to the first feedback signal, the second feedback signal, and the second feedback signal Three feedback signals and the reference voltage of the power chip obtain the output voltage signal.

In addition, the output voltage signal is used to provide the input voltage for the on-chip system, which may specifically be: filtering the output voltage signal to obtain the input voltage of the on-chip system.

In addition, an embodiment of the present application also provides a system on a chip. Referring to FIG. 9, the system on chip 900 includes: a DC power supply 901, a first resistor 902, a first switch tube 903, a second switch tube 904, a second resistor 905, and a PWM In the controller 906, the DC power supply 901 is coupled to the first end of the first resistor 902, the second end of the first resistor 902 is coupled to the first end of the first switch tube 903, and the second end of the first switch tube 903 is coupled to the second end of the first switch tube 903. The first end of the switch tube 904, the PWM controller 906, and the power chip outside the system-on-chip 900 are coupled, the second end of the second switch tube 904 is coupled to the first end of the second resistor 905, and the second end of the second resistor 905 is coupled to the first end of the second resistor 905. The terminal is coupled with the ground terminal, and the power chip is used to adjust the output voltage signal according to the output signal of the system on chip 900, and the output voltage signal is used to provide the operating voltage for the system on chip 900.

In the embodiment of the present application, the types of the first switching tube 903 and the second switching tube 904 are not specifically limited, for example, they may be metal-oxide-semiconductor field-effect transistors (MOSFETs), It may also be an insulated gate bipolar transistor (IGBT). In FIG. 9, only a MOSFET is used as an example for illustration. In addition, the first switch tube 903 and the second switch tube 904 can be controlled by a controller inside the system-on-chip 900.

Wherein, when the system on chip 900 is initialized, the first switch tube 903 and the second switch tube 904 are turned on, and the PWM controller 906 is in a high impedance state.

That is to say, when the system on chip 900 is initialized, the output of the PWM controller 906 is zero, and the output of the PWM controller 906 has no effect on the power chip. The system on chip 900 provides the power chip by the first resistor 902 and the second resistor. The resistor 905 divides the output voltage of the DC power supply 901 to obtain the voltage. The voltage can be adjusted by the output voltage of the DC power supply 901, the resistance of the first resistor 902, and the resistance of the second resistor 905, so that the power chip The output voltage signal obtained after adjusting the reference voltage according to the voltage can meet the initialization requirement of the system on chip 900.

Specifically, the system-on-chip 900 shown in FIG. 9 can be applied to the voltage regulation system shown in FIG. 1 or FIG. Go into details.

In addition, when the system on chip 900 is working normally, the first switching tube 903 and the second switching tube 904 are turned off, and the PWM controller 906 outputs a PWM digital signal.

That is to say, when the system on chip 900 is working normally, the first switch tube 903 and the second switch tube 904 are turned off, the DC power supply 901, the first resistor 902, and the second resistor 905 no longer function, and the system on chip 900 provides the power supply chip It is the PWM digital signal output by the PWM controller 906. The power chip can adjust the output voltage signal according to the duty ratio of the PWM digital signal, so that the output voltage signal can meet the working voltage requirements of the system on chip 900 in the normal working state. .

It should be noted that in the system-on-chip 900 shown in FIG. 9, the positions of the first resistor 902 and the first switch tube 903 can be exchanged, and the positions of the second switch tube 904 and the second resistor 905 can also be exchanged. The position exchange will not affect the function of the system-on-chip 900.

Those skilled in the art should understand that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, this application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, this application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

This application is described with reference to flowcharts and/or block diagrams of methods, equipment (systems), and computer program products according to this application. It should be understood that each process and/or block in the flowchart and/or block diagram, and the combination of processes and/or blocks in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing equipment to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing equipment are used to generate It is a device that realizes the functions specified in one process or multiple processes in the flowchart and/or one block or multiple blocks in the block diagram.

These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing equipment to work in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture including the instruction device. The device implements the functions specified in one process or multiple processes in the flowchart and/or one block or multiple blocks in the block diagram.

These computer program instructions can also be loaded on a computer or other programmable data processing equipment, so that a series of operation steps are executed on the computer or other programmable equipment to produce computer-implemented processing, so as to execute on the computer or other programmable equipment. The instructions provide steps for implementing the functions specified in one process or multiple processes in the flowchart and/or one block or multiple blocks in the block diagram.

Obviously, those skilled in the art can make various changes and modifications to this application without departing from the protection scope of this application. In this way, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, then this application is also intended to include these modifications and variations.

Claims (17)

1. A pressure regulating system is characterized in that it comprises:

   On-chip system for outputting the first pulse width modulation PWM digital signal and the second PWM digital signal;

   A power chip, coupled to the system-on-chip, for obtaining an output voltage according to the first duty cycle of the first PWM digital signal, the second duty cycle of the second PWM digital signal, and the power chip reference voltage Signal, the output voltage signal is used to provide an input voltage for the on-chip system.
2. The voltage regulation system according to claim 1, wherein when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, the output voltage signal is provided for the on-chip system The input voltage is the operating voltage of the system-on-chip in the initialization scenario; or, when the first PWM digital signal is at a high level and the second PWM digital signal is at a low level, the output voltage signal is the The input voltage provided by the on-chip system is the operating voltage of the on-chip system in the initialization scenario.
3. The voltage regulating system according to claim 1 or 2, wherein when the first PWM digital signal and the second PWM digital signal are both low, the output voltage signal is provided by the on-chip system The input voltage is the operating voltage of the system-on-chip in a high-performance scenario; or, when the first duty cycle is less than a first preset value, and the second duty cycle is less than a second preset value, the output The input voltage provided by the voltage signal for the system-on-chip is the operating voltage of the system-on-chip in a high-performance scenario.
4. The pressure regulating system according to any one of claims 1 to 3, wherein the pressure regulating system further comprises:

   A peripheral circuit for converting the first PWM digital signal into a first feedback signal; and converting the second PWM digital signal into a second feedback signal;

   The peripheral circuit is also used to divide the input voltage of the on-chip system to obtain a third feedback signal, and combine the first feedback signal, the second feedback signal, and the third feedback signal Feedback to the power chip;

   The power chip is specifically used for:

   The output voltage signal is obtained according to the first feedback signal, the second feedback signal, the third feedback signal, and the power chip reference voltage.
5. The voltage regulating system according to claim 4, wherein the peripheral circuit comprises:

   A first filter circuit, configured to convert the first PWM digital signal into the first feedback signal, and feed back the first feedback signal to the feedback voltage input terminal of the power chip;

   A second filter circuit, configured to convert the second PWM digital signal into the second feedback signal, and feed back the second feedback signal to the feedback voltage input terminal;

   A voltage divider circuit is used to divide the input voltage to obtain the third feedback signal, and feed back the third feedback signal to the feedback voltage input terminal.
6. The voltage regulating system according to claim 5, wherein the voltage divider circuit comprises a first resistor and a second resistor, and the first end of the first resistor and the system on chip are used to receive the input voltage Port coupling of the first resistor, the second end of the first resistor is coupled to the feedback voltage input end and the first end of the second resistor, and the second end of the second resistor is coupled to the ground end;

   The first filter circuit includes a third resistor, a fourth resistor, and a first capacitor. A first end of the third resistor is coupled to a port of the on-chip system for outputting the first PWM digital signal. The second end of the three resistor is coupled to the first end of the first capacitor and the first end of the fourth resistor, the second end of the fourth resistor is coupled to the feedback voltage input end, and the first The second terminal of the capacitor is coupled with the ground terminal;

   The second filter circuit includes a fifth resistor, a sixth resistor, and a second capacitor. The first end of the fifth resistor is coupled to a port used by the on-chip system to output the second PWM digital signal. The second end of the five resistor is coupled to the first end of the second capacitor and the first end of the sixth resistor, the second end of the sixth resistor is coupled to the feedback voltage input end, and the second The second terminal of the capacitor is coupled with the ground terminal.
7. The voltage regulating system according to claim 5 or 6, wherein the peripheral circuit further comprises:

   An output filter circuit, coupled with the voltage output terminal of the power chip, is used to filter the output voltage signal to obtain the input voltage of the system on chip.
8. A system on chip, characterized in that the system on chip is used for:

   Output the first PWM digital signal and the second PWM digital signal;

   Receive the input voltage of the system-on-chip provided by the power chip, and work under the drive of the input voltage of the system-on-chip, where the input voltage is the first duty cycle of the power chip according to the first PWM digital signal , The second duty ratio of the second PWM digital signal and the reference voltage of the power chip are obtained.
9. 8. The system-on-chip of claim 8, wherein the first PWM digital signal is at a low level, the second PWM digital signal is at a high level, or the first PWM digital signal is at a high level, and the When the second PWM digital signal is at a low level, the input voltage is the operating voltage of the on-chip system in the initialization scenario.
10. The system on chip according to claim 8 or 9, wherein the first PWM digital signal and the second PWM digital signal are both low level, or the first duty cycle is less than the first preset When the second duty cycle is less than the second preset value, the input voltage is the operating voltage of the system-on-chip in a high-performance scenario.
11. A pressure regulating method, characterized in that it comprises:

    The voltage regulation system obtains the first PWM digital signal and the second PWM digital signal;

    The voltage regulating system obtains an output voltage signal according to the first duty cycle of the first PWM digital signal, the second duty cycle of the second PWM digital signal and the power chip reference voltage, and the output voltage signal is used to provide the The on-chip system provides the input voltage.
12. The method of claim 11, wherein when the first PWM digital signal is at a low level and the second PWM digital signal is at a high level, the output voltage signal is an input provided by the on-chip system The voltage is the operating voltage of the on-chip system in the initialization scenario; or, when the first PWM digital signal is at a high level and the second PWM digital signal is at a low level, the output voltage signal is provided by the on-chip system The input voltage is the operating voltage of the on-chip system in the initialization scenario.
13. The method according to claim 11 or 12, wherein when the first PWM digital signal and the second PWM digital signal are both low, the output voltage signal is the input voltage provided by the on-chip system Is the operating voltage of the system-on-chip in a high-performance scenario; or, when the first duty cycle is less than a first preset value, and the second duty cycle is less than a second preset value, the output voltage signal The input voltage provided for the system-on-chip is the operating voltage of the system-on-chip in a high-performance scenario.
14. The method according to any one of claims 11 to 13, wherein the voltage regulation system is based on the first duty cycle of the first PWM digital signal and the second duty cycle of the second PWM digital signal. The output voltage signal is obtained by comparing with the reference voltage of the power chip, which specifically includes:

    Converting the first PWM digital signal into a first feedback signal;

    Converting the second PWM digital signal into a second feedback signal;

    Obtaining a third feedback signal after dividing the input voltage of the on-chip system;

    The output voltage signal is obtained according to the first feedback signal, the second feedback signal, the third feedback signal, and the power chip reference voltage.
15. The method according to any one of claims 11 to 14, wherein the output voltage signal is used to provide an input voltage for the on-chip system, and specifically comprises:

    Filtering the output voltage signal is performed to obtain the input voltage of the on-chip system.
16. A system on a chip, characterized by comprising: a DC power supply, a first resistor, a first switch tube, a second switch tube, and a second resistor, and a PWM controller, the DC power supply and the first end of the first resistor Coupling, the second end of the first resistor is coupled to the first end of the first switch tube, the second end of the first switch tube is coupled to the first end of the second switch tube, the PWM control The second end of the second switch tube is coupled to the first end of the second resistor, and the second end of the second resistor is coupled to the ground end. The power chip is used to adjust an output voltage signal according to the output signal of the system on chip, and the output voltage signal is used to provide a working voltage for the system on chip;

    Wherein, when the on-chip system is initialized, the first switching tube and the second switching tube are turned on, and the PWM controller is in a high impedance state.
17. 16. The system on chip of claim 16, wherein when the system on chip works normally, the first switch tube and the second switch tube are turned off, and the PWM controller outputs a PWM digital signal.

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