WO2021147255A1 - Electrode piece, carrier, and coating system - Google Patents

Electrode piece, carrier, and coating system Download PDF

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Publication number
WO2021147255A1
WO2021147255A1 PCT/CN2020/100197 CN2020100197W WO2021147255A1 WO 2021147255 A1 WO2021147255 A1 WO 2021147255A1 CN 2020100197 W CN2020100197 W CN 2020100197W WO 2021147255 A1 WO2021147255 A1 WO 2021147255A1
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WO
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Prior art keywords
slide
area
electrode sheet
outer edge
groove
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PCT/CN2020/100197
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French (fr)
Chinese (zh)
Inventor
赵赞良
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宁夏隆基乐叶科技有限公司
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Publication of WO2021147255A1 publication Critical patent/WO2021147255A1/en

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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C23C16/509Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This application relates to the technical field of solar cells, in particular to an electrode sheet, a slide carrier and a coating system.
  • the production process of solar cells mainly includes the steps of surface texturing, diffusion bonding, surface film formation, screen printing and high temperature sintering.
  • plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, abbreviated as PECVD) is mainly used to form an anti-reflection film on the surface of the silicon wafer that has formed a PN junction to improve the final solar cell The photoelectric conversion efficiency.
  • the silicon wafer is hung on the graphite boat of the graphite boat, and the graphite boat is placed in the coating chamber of the coating equipment, and then ionized in the coating chamber under high temperature and high pressure.
  • the reaction gas makes the reaction gas plasma and chemical reaction occurs.
  • the reaction product is deposited on the surface of the silicon wafer, so that an anti-reflection film is formed on the surface of the silicon wafer.
  • the use of PECVD to form an anti-reflection film on the surface of a silicon wafer is prone to winding plating problems, resulting in abnormal color at the edge of the silicon wafer, thereby reducing the coating yield of the silicon wafer.
  • the purpose of the present application is to provide an electrode sheet, a slide carrier and a coating system to alleviate the problem of abnormal color of the edge of the silicon wafer caused by the winding plating during the surface film formation process, thereby improving the coating yield of the silicon wafer.
  • this application provides an electrode sheet.
  • the electrode sheet includes: at least one slide unit. At least one surface of each slide unit has a slide area and a peripheral area, and the peripheral area is located in the circumferential direction of the slide area. At least one surface of each slide unit is provided with at least one groove for suppressing the plating phenomenon. At least one tank is located in the peripheral area.
  • at least one groove body is opened on at least one surface of each slide unit, so that when two electrode sheets are arranged oppositely, the groove body contained in at least one electrode sheet faces the surface of the other electrode sheet. It can be ensured that the distance between the regions where the grooves are opened on the two electrode sheets is relatively large (compared to the existing method where the grooves are not opened).
  • the electrode sheet provided in the embodiments of the present application is applied to a carrier such as a graphite boat, the substrate to be formed into a film is hung on the electrode sheet contained in the carrier, and the substrate is controlled to be hung on the carrier.
  • the unit is provided with a slide area on the surface of the tank.
  • the intensity of the electric field between the grooved regions of the two electrode plates (hereinafter referred to as the electric field of the groove region) can suppress the plating phenomenon to a certain extent, so that the two A film with uniform thickness is formed on the surface of the substrate on which the electrode sheet is hung, so as to alleviate the problem of abnormal color of the edge of the silicon chip caused by the winding plating during the surface film forming process, thereby improving the coating yield of the silicon chip and the production efficiency of the solar cell.
  • the distance d 1 from the side of the slot of the groove near the outer edge of the slide area to the outer edge of the slide area is greater than or equal to zero.
  • the side of the notch of the tank body close to the outer edge of the slide area has substantially overlapped with the outer edge of the slide area, so that the electric field of the tank body area and the electric field of the slide area (that is, the two electrode plates hang
  • the electric field between the silicon wafers and other substrates can be seamlessly superimposed, so as to maximize the abnormal color of the edge of the silicon wafer caused by the electric field in the tank area around the plating, and improve the coating yield of the silicon wafer.
  • the transition electric field the electric field between the electric field in the tank area and the electric field in the carrier area (hereinafter referred to as the transition electric field) is affected by the electric field in the tank area. Co-influence with the electric field of the slide area. At this time, along the direction from the electric field in the carrier area to the electric field in the tank area, the electric field intensity of the transition electric field gradually increases. Therefore, the electrode sheet provided in this application can alleviate the abnormal color of the edge of the silicon chip caused by the winding plating to a certain extent. , Improve the yield of silicon wafer coating.
  • the distance d 2 between the side of the slot of the groove near the outer edge of the peripheral area and the outer edge of the peripheral area is greater than or equal to 0 and less than d, d It is the distance between the outer edge of the slide area and the outer edge of the peripheral area.
  • each slide unit When 0 < d 2 < d, the side of the slot of the groove body close to the outer edge of the peripheral area is located in the peripheral area.
  • the grooves provided on at least one surface of each slide unit are essentially grooves.
  • the distance d 1 between the side of the slot of the groove body close to the slide area and the outer edge of the slide area 0.01 mm ⁇ 0.5 mm.
  • the distance d 0 between the side of the slot of the groove near the outer edge of the slide area and the side near the outer edge of the peripheral area is 0.1 mm- 15mm.
  • the electric field in the slot area can effectively alleviate the problem of plating around the edges of substrates such as silicon wafers, and can also minimize the impact of excessively wide notches on the structural strength of the electrode sheets.
  • the depth D of each groove body is smaller than the maximum thickness T of the peripheral area, so as to prevent the groove body from penetrating the electrode sheet and affecting the normal coating.
  • the depth D of each groove is less than half of the maximum thickness T of the peripheral area.
  • the grooves provided on the two surfaces of the slide unit will not penetrate, so as to ensure that when the slide unit is mounted with silicon wafers, the slide area of the slide unit is not easily caused by the pulling of the silicon wafer.
  • the function is damaged, so that under the normal condition of film formation on the surface of the substrate such as silicon wafer, the problem of plating around the edge of the substrate such as silicon wafer is alleviated.
  • the thickness of the electrode sheet is 2 cm
  • the depth D of each groove on the same surface of each slide unit is greater than or equal to 0.1 mm and less than 1.0 cm.
  • At least one slide unit includes at least two slide units.
  • the grooves opened on the same surface of two adjacent slide units are connected into one body to further reduce the weight of the electrode sheet.
  • the at least one trough body includes an annular trough body.
  • the annular groove is arranged around the circumference of the slide area. At this time, the entire slide area is surrounded by the ring-shaped groove, so that the ring-shaped groove can alleviate the problem of being plated around the edges of the silicon wafer and other substrates in the circumferential direction during the film formation process.
  • At least one trough body includes a plurality of trough bodies.
  • a plurality of grooves are arranged around the circumference of the carrier area, so that during the process of forming a film on the surface, the plurality of grooves can alleviate the plating problem at multiple locations on the edge of a substrate such as a silicon wafer.
  • a plurality of tank bodies are connected as a whole.
  • the connected tank body can be regarded as the ring-shaped tank body described above.
  • two adjacent trough bodies are connected through a groove with a relatively small opening.
  • two adjacent tank bodies can be directly connected together.
  • At least one of the plurality of groove bodies is a groove or a notched groove.
  • the groove shapes of the multiple groove bodies are the same or partly the same.
  • the groove shapes of multiple tank bodies are different.
  • each slide unit of the above-mentioned electrode sheet is provided with a slide window located in the slide area.
  • the slide window not only helps to reduce the weight of the entire electrode sheet, but also reduces the possibility of the slide unit wearing silicon wafers and other substrates.
  • each slide unit is provided with at least two pinch point holes that are matched with the pinch point axis.
  • a pinch point shaft can be built into each pinch point hole to use the pinch point shaft to hang the silicon wafer and other substrates on the slide area of the slide unit included in the electrode sheet.
  • the present application provides a slide carrier.
  • the slide includes at least one electrode sheet described in the first aspect or any possible implementation manner of the first aspect.
  • the above-mentioned slide carrier is a graphite boat.
  • the present application provides a coating system.
  • the coating system includes a coating device and the second aspect or the slide carrier described in any possible implementation manner of the second aspect.
  • the coating equipment has a coating chamber for coating. When the coating system is in the coating state, the carrier is located in the coating chamber.
  • the above-mentioned coating equipment is a PECVD coating equipment.
  • the beneficial effects of the coating equipment provided by the third aspect or any possible implementation manner of the third aspect are the same as the beneficial effects of the electrode sheet described in the first aspect or any possible implementation manner, and will not be repeated here.
  • Figure 1 is a schematic diagram of the coating principle of a tubular PECVD coating system in the prior art
  • FIG. 2 is a schematic diagram of the structure of a slide carrier taking a graphite boat as an example in the prior art
  • FIG. 3 is a diagram of the state of coating a silicon wafer in a plasma atmosphere in the prior art
  • FIG. 4 is a schematic diagram of a partial structure of an electrode sheet provided by an embodiment of the application.
  • FIG. 5 is a schematic diagram of a first structure of a slide unit in an embodiment of the application.
  • FIG. 6 is a schematic diagram of a state in which the electrode sheet provided by an embodiment of the application is applied to PECVD coating;
  • FIG. 7 is a cross-sectional view of the slide unit in the embodiment of the application.
  • FIG. 8 is a schematic diagram of the second structure of the slide-carrying unit in the embodiment of the application.
  • FIG. 9 is a schematic diagram of a third structure of the slide-carrying unit in an embodiment of the application.
  • FIG. 10 is a schematic diagram 1 of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the application;
  • FIG. 11 is a second schematic diagram of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the application;
  • FIG. 12 is a schematic diagram of the first structural relationship between two adjacent slide units in an embodiment of the application.
  • FIG. 13 is a schematic diagram of a second structural relationship between two adjacent slide units in an embodiment of the application.
  • FIG. 14 is a schematic diagram of a connecting structure of multiple tanks in an embodiment of the application.
  • 15 is a schematic diagram of a first structure in which a plurality of tanks are distributed at intervals in an embodiment of the application;
  • FIG. 16 is a schematic diagram of a second structure in which a plurality of grooves are distributed at intervals in an embodiment of the application.
  • connection should be understood in a broad sense.
  • “connected” can be a fixed connection, a detachable connection, or a whole; it can be a direct connection, or It can be indirectly connected through an intermediary.
  • the plasma enhanced chemical vapor deposition (Plasma Enhance Chemical Vapor Deposition, abbreviated as PECVD) system is a coating system composed of a parallel plate coating boat such as a graphite boat and a high-frequency plasma exciter. This coating system is often used in the manufacturing process of solar cells.
  • FIG. 1 shows a schematic diagram of the coating principle of a tubular PECVD coating system in the prior art.
  • the PECVD coating system includes a tubular PECVD equipment 100 and a graphite boat 200 for loading substrates such as silicon wafers.
  • the tubular PECVD equipment 100 includes a PECVD tubular furnace 110 and a radio frequency generator 120.
  • the PECVD tube furnace 110 includes a resistance furnace 111 and a quartz tube 112.
  • the resistance furnace 111 is located outside the quartz tube 112 for heating the quartz tube 112.
  • the quartz tube 112 is provided with an air inlet 1121 and an air outlet 1122.
  • the cavity 1120 in the quartz tube 112 is used to accommodate the graphite boat 200.
  • FIG. 2 shows a schematic diagram of the structure of a slide carrier taking a graphite boat as an example in the prior art.
  • the graphite boat includes 10 upper electrode sheets 201, 11 lower electrode sheets 202 and connecting components.
  • the 10 upper electrode sheets 201 and the 11 lower electrode sheets 202 are all distributed along the direction indicated by arrow A in FIG. 2, and there is an upper electrode sheet 201 between two adjacent lower electrode sheets 202.
  • Each upper electrode sheet 201 and each lower electrode sheet 202 extend along the direction indicated by arrow B in FIG. 2.
  • the 11 lower motor sheets include the first lower electrode sheet, the second lower electrode sheet,..., the tenth lower electrode sheet and Tenth, the electrode sheet.
  • the 11 lower electrode sheets there is one upper electrode sheet 201 between two adjacent lower electrode sheets.
  • the first bottom electrode sheet and the tenth bottom electrode sheet are located outside the graphite boat, and the second bottom electrode sheet to the tenth bottom electrode sheet and all the upper electrode sheets 201 are located inside the graphite boat.
  • the first lower electrode sheet and the second lower electrode sheet are defined as the outer sheets of the graphite boat.
  • the above-mentioned connecting assembly includes 7 upper end ceramic screws 203, 7 lower end ceramic screws 204, 1 first front end graphite screw 205, 1 second front end graphite screw 206, and 1 first rear end graphite screw 207 and a second rear end graphite screw 208.
  • the 7 upper ceramic screws 203 are distributed along the direction indicated by arrow B in Fig. 2.
  • Each upper ceramic screw 203 insulates and fixes the upper ends of the 10 upper electrode sheets 201 and the upper ends of the 11 lower electrode sheets 202 Together.
  • the seven lower ceramic screws 204 are distributed along the direction indicated by the arrow B in FIG. 2, and each lower ceramic screw 204 insulates and fixes the lower ends of the 10 upper electrode sheets 201 and the lower ends of the 11 lower electrode sheets 202 together.
  • the upper electrode sheet 201 and the lower electrode sheet 202 are adjacent.
  • an insulating sleeve such as a ceramic sleeve or a rubber sleeve can be added between the adjacent upper electrode sheet 201 and the lower electrode sheet 202 to improve the upper electrode sheet 201 and the lower electrode sheet 202.
  • the insulation of the electrode sheet 202 can be added between the adjacent upper electrode sheet 201 and the lower electrode sheet 202 to improve the upper electrode sheet 201 and the lower electrode sheet 202.
  • the front ends of the 10 upper electrode sheets 201 and the front ends of the 11 lower electrode sheets 202 are all located at the front end of the graphite boat, and the rear ends of the 10 upper electrode sheets 201 and the rear ends of the 11 lower electrode sheets 202 are located at the front end of the graphite boat. They are all located at the back end of the graphite boat.
  • the front ends of the ten upper electrode sheets 201 are fixed together by a first front-end graphite screw 205, and the rear ends of the ten upper electrode sheets 201 are fixed together by a first rear-end graphite screw 207.
  • the front ends of the 11 lower electrode sheets 202 are fixed together by a second front end graphite screw 206, and the rear ends of the 11 lower electrode sheets 202 are fixed together by a second rear end graphite screw 208.
  • the above-mentioned connecting assembly further includes a plurality of first front end graphite blocks 209, a plurality of second front end graphite blocks 210, a plurality of first rear end graphite blocks 211 and a second rear end graphite block 212.
  • each first front end graphite screw 205 is sleeved with a plurality of first front end graphite blocks 209, and it is ensured that there is a first front end between the front ends of two adjacent upper electrode sheets 201.
  • Each second front end graphite screw 206 is sleeved with a plurality of second front end graphite blocks 210, and it is ensured that there is a second front end graphite block 210 between the front ends of two adjacent lower electrode sheets 202.
  • each first rear end graphite screw 207 is sleeved with a plurality of first rear end graphite blocks 211, and it is ensured that the rear ends of two adjacent upper electrode sheets 201 are separated from each other.
  • Each second rear graphite screw 208 is sleeved with a plurality of second rear graphite blocks 212, and it is ensured that there is a second rear graphite block 212 between the rear ends of two adjacent lower electrode sheets 202.
  • one of the plurality of first front-end graphite blocks 209 is provided with an upper electrode hole (not shown in FIG. 2) for inserting the upper electrode rod.
  • One of the plurality of first front-end graphite blocks 209 is provided with a lower electrode hole (not shown in FIG. 2) for connecting the lower electrode rod.
  • the front end of the graphite boat is close to the furnace door 1123 of the quartz tube 112 shown in FIG. 1 to facilitate the insertion of the upper electrode rod into the upper electrode hole and the lower electrode rod into the lower electrode hole.
  • Fig. 3 is a diagram showing the state of film coating of a silicon wafer in a plasma atmosphere in the prior art.
  • a first silicon wafer 301 is hung on the surface of the upper electrode sheet 201 through a first clamping point axis a
  • a second silicon wafer 302 is hung on the surface of the lower electrode sheet 202 through a second clamping point axis b.
  • the surface of the upper electrode sheet 201 and the surface of the lower electrode sheet 202 are arranged opposite to each other, so that the first silicon sheet 301 and the second silicon sheet 302 are located between the upper electrode sheet 201 and the lower electrode sheet 202 in terms of spatial position.
  • the graphite boat 200 is fed into the quartz tube 112 of the PECVD tube furnace 110, and the air in the cavity 1120 is exhausted through the exhaust port 1122 to make the cavity
  • the body 1120 is evacuated, and then silane (SiH 4 ) and ammonia (NH 3 ) are introduced into the cavity 1120 through the air inlet 1121.
  • the resistance furnace 111 is used to heat the quartz tube 112, and the pressure of the cavity 1120 in the quartz tube 112 is controlled so that the environment in the cavity 1120 reaches the high temperature and high pressure environment required for coating.
  • the radio frequency generator 120 applies radio frequency voltages of different polarities to the upper electrode sheet 201 and the lower electrode sheet 202 contained in the graphite boat 200. Since the first silicon wafer 301 and the second silicon wafer 302 have good electrical conductivity at high temperatures, under the conditions of high temperature and high pressure, the upper electrode sheet 201 can introduce the RF voltage to the first silicon wafer 301, and the lower electrode sheet 202 can The radio frequency voltage is introduced into the second silicon wafer 302. That is to say, when the radio frequency generator 120 applies radio frequency voltages of different polarities to the upper electrode sheet 201 and the lower electrode sheet 202 contained in the graphite boat 200, the first silicon wafer 301 and the second silicon wafer 302 can be used for coating.
  • the electrodes make a relatively uniform electric field PSA formed between the first silicon wafer 301 and the second silicon wafer 302.
  • silane and ammonia are ionized into NH bond plasma and Si-H bond plasma under the action of an electric field, and the silicon nitride formed after the reaction of the two is gradually deposited on the surface of the first silicon wafer 301 and the surface of the second silicon wafer 302 , Thereby forming a silicon nitride film on the surface of the silicon wafer.
  • the silicon nitride is not only Deposited on the surface of the silicon wafer away from the electrode (the front side of the silicon wafer), and the silicon wafer that is also deposited on the edge of the surface (the backside of the silicon wafer) close to the electrode, causes the edge of the silicon nitride deposited silicon wafer to have an abnormal color (such as whitening), This phenomenon is called the winding-plating phenomenon.
  • the coating thickness When the thickness of the silicon nitride deposited on the surface edge of the silicon wafer (the coating thickness) is 1mm, it needs to be reworked and re-plated, which will affect the coating yield of the silicon wafer. It is understandable that when the silicon wafer is plated around, while the silicon nitride is plated around the edge of the silicon wafer near the surface of the electrode (hereinafter referred to as the back of the silicon wafer), it will also deposit too much on the silicon wafer away from the edge.
  • the edge of the surface of the electrode sheet hereinafter referred to as the front surface of the silicon chip
  • the inventor conducted research on the above problems and found that reducing the electric field intensity at the edge of the silicon wafer can effectively suppress the plating around the edge of the silicon wafer, so as to reduce the thickness of silicon nitride deposited on the edge of the silicon wafer near the surface of the electrode wafer.
  • the embodiment of the present application provides an electrode sheet.
  • the electrode sheet can be an electrode sheet made of any conductive material, and is not limited to the electrode sheet contained in the graphite boat mentioned above. This kind of electrode sheet can be used in the coating process of various substrates such as silicon wafers.
  • the coating method is not limited to this PECVD, but can also be a coating method close to the principle of PECVD.
  • FIG. 4 shows a schematic diagram of a partial structure of an electrode sheet provided by an embodiment of the present application.
  • the electrode sheet 400 provided by the embodiment of the present application includes at least one sheet-carrying unit 400U.
  • Each carrier unit 400U can be used to mount a substrate such as a silicon wafer.
  • FIG. 5 shows a schematic diagram of the first structure of the slide unit in the embodiment of the present application.
  • the area of each slide unit 400U should be greater than the area of the substrate to be mounted.
  • At least one surface of each slide unit 400U has a slide area U1 and a peripheral area U2.
  • the peripheral area U2 is located in the circumferential direction of the slide area U1.
  • the slide area U1 is defined as the area where the surface of the slide unit 400U is covered by the orthographic projection of the silicon wafer or other substrate when the substrate such as a silicon wafer is hung on the slide unit 400U.
  • the peripheral area U2 is defined as the area where the surface of the wafer carrier unit 400U is not covered by the orthographic projection of the wafer carrier unit 400U when a substrate such as a silicon wafer is hung on the wafer carrier unit 400U.
  • each slide unit 400U is provided with at least one tank 402 for suppressing the plating phenomenon.
  • At least one trough body 402 is located in the peripheral area U2. It should be understood that here at least one slot 402 is located in the peripheral area U2 means that all the slots 402 formed on at least one surface of each chip carrier unit 400U are located in the peripheral area U2.
  • FIG. 6 shows a schematic diagram of the state in which the electrode sheet provided by the embodiment of the present application is applied to PECVD coating.
  • both the first electrode sheet 400A and the second electrode sheet 400B are the electrode sheets shown in FIG. 4.
  • both the first electrode sheet 400A and the second electrode sheet 400B include a chip carrier unit 400U.
  • the surface of the first electrode sheet 400A (or the slide unit 400U included in the first electrode sheet 400A) and the surface of the second electrode sheet 400B (or the slide unit 400U included in the second electrode sheet 400B) both have a slide area U1 and the peripheral area U2.
  • the surface of the first electrode sheet 400A is provided with a first groove body 402A located in the peripheral area U2, and the surface of the second electrode sheet 400B is provided with a second groove body 402B located in the peripheral area U2.
  • the orthographic projection of the first groove body 402A shown in FIG. 6 on the surface of the second electrode sheet 400B is the same as that of the second groove body 402B.
  • the first silicon wafer 301 and the second silicon wafer 302 are PECVD coated with the first electrode wafer 400A and the second electrode wafer 400B
  • the first electrode wafer 400A The surface is opposite to the surface of the second electrode sheet 400B.
  • the surface of the first electrode sheet 400A is hung with a first silicon wafer 301 located in the wafer carrier area U1
  • the surface of the second electrode sheet 400B is hung with a first silicon wafer located in the wafer area U1.
  • the distance between the first silicon wafer 301 hung on the first electrode sheet 400A and the second silicon wafer 302 hung on the second electrode sheet 400B is R 1 , and the first groove body is opened on the surface of the first electrode sheet 400A
  • the distance between the groove bottom of the 402A and the groove bottom of the second groove body 402B opened on the surface of the second electrode sheet 400B is R 2 .
  • Electric field force Electric field strength
  • F is the electric field force
  • k is the electrostatic constant
  • k 9.0 ⁇ 10 9 N ⁇ m 2 /C 2
  • Q is the charge amount of one of the two counter electrodes
  • q is the two counter electrodes
  • q 0 is the charge amount of the plasma
  • R is the distance between the two opposite electrodes. It can be seen from the electric field force formula and the electric field strength formula that the distance R between the two opposite electrodes is inversely proportional to the electric field force and the electric field strength. When the distance R between the two opposed electrodes decreases, the electric field force and the electric field strength increase. When the distance R between the two opposed electrodes increases, the electric field force and the electric field strength decrease.
  • the distance R between the two counter electrodes is inversely proportional to the electric field force and the electric field strength, as shown in FIG. 6, when all the grooves 402 opened on at least one surface of each slide unit 400U are located in the peripheral area At U2, since R 1 ⁇ R 2 , the intensity of the electric field cPSA in the tank area is lower than the intensity of the electric field zPSA in the slide area.
  • the electric field cPSA in the slot area refers to the electric field between the first slot 402A opened by the first electrode sheet 400A and the second slot 402B opened by the second electrode sheet 400B.
  • the electric field zPSA in the slide area refers to the electric field between the first silicon wafer 301 and the second silicon wafer 302.
  • the amount of silicon nitride deposited on the edge of the silicon wafer is relatively small per unit area of silicon nitride on the edge of the front surface of the first silicon wafer 301 per unit time (compared to other areas on the front surface of the first silicon wafer 301). At this time, the thickness of the silicon nitride deposited on the front edge of the first silicon wafer 301 is insufficient.
  • the amount of silicon nitride deposited per unit area on the edge of the front surface of the second silicon wafer 302 per unit time is relatively small (relative to other areas on the front surface of the second silicon wafer 302). At this time, the thickness of the silicon nitride deposited on the front edge of the second silicon wafer 302 is insufficient.
  • the degree of plating around the edge of the first silicon wafer 301 is reduced, not only the thickness of the silicon nitride deposited on the back edge of the first silicon wafer 301 is reduced, but also the thickness of the silicon nitride deposited on the front edge of the first silicon wafer 301 is also reduced. It can be seen that when the groove 402 opened on the surface of the wafer carrier unit 400U is located in the peripheral area U2, the plating phenomenon still existing on the edge of the first silicon wafer 301 can be used to increase the deposition of the front surface of the first silicon wafer 301 to a certain extent.
  • the amount of silicon nitride deposited at the edge can compensate for the insufficient thickness of silicon nitride at the front edge of the first silicon wafer 301 due to the difference in electric field intensity (the electric field cPSA intensity in the tank area is less than the electric field zPSA intensity in the carrier area), which makes the second
  • the silicon nitride deposited on the front surface of the silicon wafer 301 has a uniform thickness.
  • the degree of plating around the edge of the second silicon wafer 302 is reduced, not only the thickness of the silicon nitride deposited on the back edge of the second silicon wafer 302 is reduced, but also the thickness of the silicon nitride deposited on the front edge of the second silicon wafer 302 will also be reduced. It can be seen that when the groove 402 opened on the surface of the wafer carrier unit 400U is located in the peripheral area U2, the plating phenomenon still existing on the edge of the second silicon wafer 302 can be used to increase the deposition of the front surface of the second silicon wafer 302 to a certain extent.
  • the amount of silicon nitride deposited on the edge can compensate for the insufficient thickness of silicon nitride at the front edge of the second silicon wafer 302 caused by the difference in electric field intensity (the electric field cPSA intensity in the tank area is less than the electric field zPSA intensity in the carrier area), so that the second The silicon nitride deposited on the front surface of the silicon wafer 302 has a uniform thickness.
  • the thickness of silicon nitride (coating thickness) deposited on the first silicon wafer 301 near the surface edge of the first electrode piece 400A is less than 1mm
  • the second silicon wafer 302 is deposited near the surface edge of the second electrode piece 400B.
  • the silicon thickness (the coating thickness) is less than 1mm, and the color uniformity of the silicon nitride film formed on the surface of the first silicon wafer 301 and the surface of the second silicon wafer 302 is relatively good. Therefore, the first silicon wafer 301 and the second silicon wafer 302 There is no need to rework and re-coat after coating.
  • the tank 402 can be used to adjust the cPSA intensity of the electric field in the tank area, and the fringe electric field intensity of the electric field zPSA in the carrier area can be appropriately adjusted while the plating phenomenon still exists.
  • the edge color of the silicon wafer after coating is close to normal or normal, thereby improving the coating yield of the silicon wafer and improving the production efficiency of solar cells.
  • each sheet carrier unit 400U which not only makes the electrode sheet lighter
  • the groove 402 contained in at least one electrode sheet faces the surface of the other electrode sheet 400, which can ensure that the distance between the areas where the groove bodies 402 are opened on the two electrode sheets is relatively large ( (Compared to the existing way of not opening a tank).
  • a substrate such as a silicon wafer
  • the substrate is hung on the slide area U1 provided on the surface of the slot 402 of the slide unit 400U.
  • the electric field cPSA in the tank area can suppress the plating phenomenon to a certain extent, so that the surface of the substrate where the two electrode plates are hung can form a uniform thickness film, thereby It alleviates the abnormal color of the edge of the silicon wafer caused by the winding plating during the surface film formation process, thereby improving the coating yield of the silicon wafer and the production efficiency of the solar cell.
  • the electrode sheet 400 provided by the embodiment of the present application is applied to silicon wafer coating, the coating yield of the silicon wafer can be improved, and the problems of rework and cell degradation caused by severe winding plating can be reduced.
  • each slide unit 400U included in the electrode sheet 400 is provided with a slide window 401 located in the slide area U1.
  • the slide window 401 not only helps to reduce the weight of the entire electrode sheet 400, but also reduces the possibility that the slide unit 400U wears out substrates such as silicon wafers.
  • each of the chip carrier units 400U included in the electrode sheet 400 is provided with at least two pinch point holes 403 that are matched with the pinch point axis.
  • FIG. 5 when a substrate such as a silicon wafer is hung on the substrate area U1 on the surface of the chip carrier unit 400U, you can refer to FIG. 3 to have a built-in pinch point axis in each pinch point hole 403 to use the pinch point axis A substrate such as a silicon wafer is hung on the slide area U1 of the slide unit 400U.
  • the pinch point axis can be conductive or non-conductive.
  • the card point axis is a conductive card point axis such as a graphite card point axis
  • the card point axis can not only support the silicon chip, but also can introduce the radio frequency current loaded into the electrode chip into the silicon chip, so that the two electrode chips can be hung.
  • the electric field of the slide area formed between the set silicon wafers is more uniform and stable.
  • the distance between the outer edge of the slide area U1 and the outer edge of the peripheral area U2 (hereinafter referred to as the width of the peripheral area) is d
  • the distance between the side of the notch of the groove body 402 near the outer edge of the slide area U1 and the side near the outer edge of the peripheral area U2 (that is, the width of the notch of the groove body 402) Is d 0
  • the distance between the side of the slot of the groove body 402 near the outer edge of the slide area U1 and the outer edge of the slide area U1 (hereinafter referred to as the transition area width) is d 1
  • the distance between the side of the slot of the groove body 402 near the outer edge of the peripheral area U2 and the outer edge of the peripheral area U2 (hereinafter referred to as the edge area width).
  • FIG. 7 shows a cross-sectional view (a view formed by cutting along the thickness direction of the electrode sheet) of the slide unit in an embodiment of the present application.
  • the line segment L is composed of an inner line segment L 1 , an outer line segment L 2 and a slot line segment L 0 .
  • the line segment L is used to indicate the width d of the peripheral area.
  • the inner line segment L1 is used to represent the transition area width d 1
  • the outer line segment L 2 is used to represent the edge area width d 2
  • the slot line segment L 0 is used to represent the slot width d 0 of the slot body 402.
  • the inner line segment L 1 , the outer line segment L 2 and the slot line segment L 0 shown in Fig. 7 should be located on the same straight line and form a line segment L.
  • FIG. 8 shows a schematic diagram of a second structure of the slide unit in an embodiment of the present application.
  • the distance d 1 between the notch of the groove body 402 near the outer edge of the slide area U1 and the outer edge of the slide area U1 is greater than or equal to 0.
  • the electrode sheet 400 includes a slide unit 400U.
  • a groove 402 is formed on the surface of the slide unit 400U.
  • the inner line a1 shown in FIG. 5 is a side of the notch of the groove body 402 close to the outer edge of the slide area U1. It can be seen from FIGS. 5 and 8 that the inner line a1 coincides with the outer edge a2 of the slide area U1.
  • the distance (ie, d 1 ) between the inner line a1 and the outer edge a2 of the slide area U1 is equal to zero.
  • the slot of the tank 402 is at a certain distance from the outer edge of the slide area U1, so that the electric field cPSA of the tank body area and the electric field zPSA of the slide area
  • the strength of the electric field (hereinafter referred to as the transition electric field gPSA) is jointly affected by the electric field cPSA in the tank area and the electric field zPSA in the carrier area.
  • the electrode sheet 400 provided by the embodiment of the present application can relieve the winding plating to a certain extent.
  • the problem of abnormal color at the edge of silicon wafer can improve the coating yield of silicon wafers and other substrates.
  • the slide unit 400U can be regarded as an electrode sheet including one slide unit 400U.
  • a groove 402 is formed on the surface of the slide unit 400U.
  • the inner line a1 shown in FIG. 5 is a side of the notch of the groove body 402 close to the outer edge of the slide area U1. It can be seen from FIG. 5 that the distance (ie, d 1 ) between the inner line a1 and the outer edge a2 of the slide area U1 is greater than zero.
  • the distance d 1 between the inner line a1 and the outer edge a2 of the slide area U1 0.01 mm ⁇ 0.5 mm.
  • d 1 0.01mm, 0.5mm or 0.03mm.
  • the distance between the side of the notch of the groove body 402 near the outer edge of the slide area U1 and the side near the outer edge of the peripheral area U2 (That is, the slot width of the slot body 402) d 0 is 0.1mm-15mm.
  • the cPSA field in the tank region can effectively alleviate the plating problem around the edges of substrates such as silicon wafers, and minimize the impact of excessively wide notches on the structural strength of the electrode plates.
  • FIG. 9 shows a schematic diagram of a third structure of the slide unit in an embodiment of the present application. 5 and 9, the same surface of each slide element 400U, the notch groove 402 from the side near the outer edge of the outer edge of the peripheral region U2 and U2 d 2 of the peripheral region is greater than or equal to 0 and Less than d, d is the distance between the outer edge of the slide area U1 and the outer edge of the peripheral area U2.
  • each slide unit 400U is substantially a notched groove.
  • the slide unit 400U can be regarded as an electrode sheet including one slide unit 400U.
  • a groove 402 is formed on the surface of the slide unit 400U.
  • the outer line b1 shown in FIG. 5 is the side of the notch of the groove body 402 close to the outer edge of the peripheral area U2. It can be seen from Fig. 5 and Fig. 9 that the outer line b1 coincides with the outer edge b2 of the peripheral area U2.
  • the distance (ie, d 2 ) between the outer line b1 and the outer edge b2 of the peripheral area U2 is equal to zero.
  • each slide unit 400U is substantially a groove.
  • the slide unit 400U can be regarded as an electrode sheet including one slide unit 400U.
  • a groove 402 is formed on the surface of the slide unit 400U.
  • the outer line b1 shown in FIG. 5 is the side of the notch of the groove body 402 close to the outer edge of the peripheral area U2. It can be seen from FIG. 5 that the distance (ie, d 2 ) between the outer line b1 and the outer edge b2 of the peripheral area U2 is greater than zero.
  • the first silicon sheet 301 and the second electrode sheet 400B are hung on the first electrode sheet 400A.
  • a distance R between the second wafer 302 is hung, the surface of the first electrode tab 400A of the body defines a first groove 402A deeper surface of the first electrode tab 400A of the body defines a first groove 402A
  • the distance R 2 between the groove bottom and the groove bottom of the second groove body 402B opened on the surface of the second electrode sheet 400B is greater.
  • each slide unit 400U in FIG. 7 the deeper the depth D of each groove body 402 is in direct proportion to the ability of the groove body 402 to suppress the plating phenomenon.
  • the depth D of each groove body 402 is less than the maximum thickness T of the peripheral area U2, so as to prevent the groove body 402 from penetrating the electrode sheet and affecting normal operation. Coating.
  • the minimum thickness area of the peripheral area U2 refers to the area where the groove body 402 is opened. Therefore, the peripheral area U2 has a maximum thickness and a minimum thickness.
  • the maximum thickness T of the peripheral area U2 has an inseparable relationship with the shape and structure of the electrode sheet. Those skilled in the art can determine the maximum thickness of the peripheral area U2 according to the actual shape and structure of the electrode sheet. For example, when the electrode sheet is a plate-shaped electrode sheet, the maximum thickness T of the peripheral area U2 is the same as the thickness of the electrode sheet.
  • FIG. 10 and 11 show schematic diagrams of the relative positions of the grooves provided on the two surfaces of the slide unit.
  • the slide unit 400U has a first surface M1 and a second surface M2 opposite to each other, and both surfaces can be used to mount substrates such as silicon wafers.
  • both the first surface M1 and the second surface M2 have a slide area U1 and a peripheral area U2.
  • the slide area U1 and the peripheral area U2 reference may be made to the foregoing, which is not limited here.
  • both surfaces of the same wafer carrier unit 400U are provided with grooves 402 located in the peripheral area U2.
  • FIG. 10 shows the first schematic diagram of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the present application.
  • the orthographic projection of the groove 402 opened on the first surface M1 on the plane where the second surface M2 is located does not overlap with the groove 402 opened on the second surface M2, then It is only necessary to ensure that the depth D of the groove body 402 opened on the first surface and the depth D of the groove body 402 opened on the second surface M2 are smaller than the maximum thickness T of the peripheral area U2 to prevent the groove body 402 from penetrating the electrode sheet.
  • the electrode sheet is a plate-shaped electrode sheet, and the thickness of the electrode sheet is 2.0 cm
  • the depth D of each groove body 402 is greater than or equal to 0.1 mm and less than 2.0 cm.
  • FIG. 11 shows the second schematic diagram of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the present application.
  • the slide unit 400U in the slide unit 400U, if the orthographic projection of the slot 402 opened on the first surface M1 on the plane of the second surface M2 coincides with the slot 402 opened on the second surface M2, then each slide On the same surface of the unit 400U, the depth D of each groove body 402 is less than half of the maximum thickness T of the peripheral area U2.
  • the grooves 402 provided on the two surfaces of the same slide unit 400U will not penetrate, so as to ensure that when the slide unit 400U is mounted with silicon wafers, the slide area of the slide unit 400U is not easy to The pulling action of the silicon wafer is damaged, so that when the surface of the substrate such as the silicon wafer is normal, the problem of plating around the edge of the substrate such as the silicon wafer is alleviated.
  • each groove body 402 is greater than or equal to 0.1 mm and less than 1.0 cm. At this time, the groove body 402 opened at the same position on the two surfaces of the electrode sheet 400 will not penetrate.
  • each groove body 402 when the depth D of each groove body 402 is less than one-half of the maximum thickness T of the peripheral area U2, if the groove bodies 402 opened on the two surfaces of the same slide unit 400U are too deep, then Under the condition of force, in the slide unit 400U shown in FIG. 11, the barrier 404 between the grooves 402 opened on the first surface M1 and the second surface M2 is easy to crack or even fall off, thereby affecting the coating effect .
  • each groove body 402 may be 0.3 mm to 0.7 mm.
  • the depth D of each trough body 402 can be 0.3 mm, 0.7 mm or 0.5 mm.
  • each tank body 402 can be plated normally while ensuring the structural strength of the electrode sheet, and effectively suppress the winding plating problem.
  • FIGS. 12 and 13 show schematic diagrams of two structural relationships between two adjacent slide units in an embodiment of the present application.
  • the grooves 402 opened on the same surface of two adjacent slide units 400U are connected as a whole to further reduce The weight of the electrode sheet 400.
  • At least one groove body 402 includes an annular groove body.
  • the annular groove is arranged around the circumference of the slide area U1.
  • the annular groove body can be an annular groove or an annular notched groove, of course, it can also be other groove types not listed.
  • the entire slide area U1 is surrounded by the ring-shaped groove, so that the ring-shaped groove can alleviate the problem of plating around the edges of the silicon wafer and other substrates in the circumferential direction during the film formation process.
  • the annular groove body is a groove body in a broad sense, and it can be not only an annular groove body, a regular polygonal annular groove body or an irregular polygonal annular groove body.
  • the regular polygonal annular trough means that the shape enclosed by the direction of the annular trough is a regular polygon, and the regular polygon can be a regular polygon such as a triangle, a rectangle, a square, and a regular hexagon.
  • Irregular polygonal annular groove means that the shape enclosed by the direction of the annular groove is an irregular polygon.
  • the choice of the shape of the annular groove can be determined according to the shape of the slide area U1. When the shape of the annular groove is the same as the shape of the carrier area U1, the smaller the size difference between the two, the closer the annular groove is to the carrier area U1, and the annular groove prevents the edge of the substrate such as silicon wafers from wrapping around. The effect of the plating phenomenon is also better.
  • FIG. 12 shows a schematic diagram of a first structural relationship between two adjacent slide units in an embodiment of the present application.
  • the grooves 402 opened on the same surface of two adjacent slide units 400U are annular grooves
  • the grooves 402 provided on the same surface of two adjacent slide units 400U are connected to form
  • the connected groove bodies 402 are all displayed in the form of grooves as shown in FIG. 12.
  • FIG. 13 shows a schematic diagram of a second structure relationship between two adjacent slide units in an embodiment of the present application.
  • the grooves 402 opened on the same surface of two adjacent slide units 400U are annular notched grooves
  • the grooves 402 opened on the same surface of two adjacent slide units 400U are connected to form
  • the connected groove bodies 402 are all displayed in the form of notched grooves as shown in FIG. 13.
  • the at least one tank 402 includes a plurality of tanks.
  • the multiple grooves 402 are arranged around the circumference of the slide area U1, so that during the surface film formation process, the multiple grooves 402 can alleviate the plating problem at multiple locations on the edge of the substrate.
  • FIG. 14 shows a schematic diagram of a communication structure of a plurality of slots provided in a slide unit in an embodiment of the present application. As shown in FIG. 14, for the same surface of the same slide unit 400U, a plurality of trough bodies 402 are connected as a whole.
  • two adjacent groove bodies 402 are connected through a communicating groove 405 with a relatively small opening (relative to the groove width of the groove body 402).
  • two adjacent tank bodies 402 can be directly joined together to realize that a plurality of tank bodies 402 communicate with each other.
  • the integrated tank body 402 can be regarded as the annular tank body 402 described above (as shown in FIG. 5, FIG. 8 or FIG. 9).
  • FIG. 15 shows a first structural schematic diagram in which a plurality of groove bodies are distributed at intervals in an embodiment of the present application.
  • FIG. 16 shows a schematic diagram of a second structure in which a plurality of slots are distributed at intervals in an embodiment of the present application.
  • the multiple grooves 402 can alleviate the plating problem at multiple locations on the edge of the substrate such as a silicon wafer.
  • each trough body 402 is independent.
  • the trough body 402 can be a straight groove. The body, the curve goes towards the trough body or the broken line goes towards the trough body.
  • the curved trough body can be arc-directed trough body or wavy-directed trough body.
  • a plurality of grooves 402 are arranged around the circumference of the slide area. As shown in FIG. 16, from the groove type, some groove bodies 402 are grooves, and some groove bodies 402 are notched grooves. From the top of the trough direction, some trough bodies 402 are linearly oriented trough bodies, and some trough bodies 402 are oriented trough bodies at right angles.
  • the embodiment of the present application also provides a slide carrier.
  • the slide carrier includes at least one electrode pad described in the above embodiment.
  • the beneficial effects of the slide carrier provided in the embodiments of the present application are the same as the beneficial effects of the electrode sheets described in the foregoing embodiments, and will not be repeated here.
  • the above-mentioned slide holder may be a graphite boat or a slide holder of other materials, as long as at least one of the plurality of electrode plates used therein is the electrode plate described in the above embodiment.
  • the embodiment of the present application also provides a coating system.
  • the coating system includes a coating equipment and the slide carrier described in the above embodiments.
  • the coating equipment has a coating chamber for coating. When the coating system is in the coating state, the film carrier is located in the coating chamber.
  • the beneficial effects of the coating system provided by the embodiments of the present application are the same as the beneficial effects of the electrode plates described in the foregoing embodiments, and will not be repeated here.
  • the above-mentioned coating system can refer to the coating system shown in FIG. 1.
  • the coating equipment can be the PECVD coating equipment shown in FIG. 1.
  • the coating chamber can be a quartz tube as shown in Fig. 1, and the carrier is located in the quartz tube.
  • the coating chamber can also be other pressure-resistant tubes with good thermal conductivity, which will not be introduced here.
  • the PECVD coating equipment please refer to the previous description.

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Abstract

The present application relates to the technical field of solar cells. Disclosed are an electrode piece, a carrier, and a coating system, for eliminating the abnormal color of the edge of a silicon wafer caused by the unwanted deposition on the wafer edge during a surface film formation process, thereby improving the coating quality of silicon wafers. The electrode piece comprises: at least one carrier unit. At least one surface of each carrier unit has a carrier area and a peripheral area, and the peripheral area is located on the periphery of the carrier area. At least one surface of each carrier unit is provided with at least one groove for preventing the unwanted deposition on the wafer edge. The at least one groove is located at the peripheral area. The carrier comprises the electrode piece mentioned in the technical solution. The electrode piece provided in the present application is used in a coating system.

Description

一种电极片、载片器以及镀膜系统Electrode sheet, sheet carrier and film coating system
本申请要求在2020年1月20日提交中国专利局、申请号为202020130174.0、发明名称为“一种电极片、载片器以及镀膜系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of a Chinese patent application filed with the Chinese Patent Office on January 20, 2020, the application number is 202020130174.0, and the invention title is "An electrode sheet, a carrier and a coating system", the entire content of which is incorporated by reference In this application.
技术领域Technical field
本申请涉及太阳能电池技术领域,尤其涉及一种电极片、载片器以及镀膜系统。This application relates to the technical field of solar cells, in particular to an electrode sheet, a slide carrier and a coating system.
背景技术Background technique
目前,太阳能电池片的制作流程主要包括表面制绒、扩散制结、表面成膜、丝网印刷和高温烧结等步骤。在表面成膜步骤中,主要采用等离子体增强化学气相沉积法(Plasma Enhanced Chemical Vapor Deposition,缩写为PECVD)在已经形成PN结的硅片表面形成减反射膜,以提高最终所制作的太阳能电池片的光电转换效率。At present, the production process of solar cells mainly includes the steps of surface texturing, diffusion bonding, surface film formation, screen printing and high temperature sintering. In the surface film forming step, plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, abbreviated as PECVD) is mainly used to form an anti-reflection film on the surface of the silicon wafer that has formed a PN junction to improve the final solar cell The photoelectric conversion efficiency.
具体来说,在硅片表面形成减反射膜时,将硅片挂设在石墨舟的石墨舟片上,并将石墨舟置于镀膜设备的镀膜腔内,然后在高温高压下电离镀膜腔内的反应气体,使得反应气体等离子化并发生化学反应。此时,反应产物沉积在硅片表面,使得硅片表面形成减反射膜。但是,采用PECVD在硅片表面形成减反射膜时容易出现绕镀问题,导致硅片边缘颜色异常,进而降低硅片镀膜良率。Specifically, when the anti-reflection film is formed on the surface of the silicon wafer, the silicon wafer is hung on the graphite boat of the graphite boat, and the graphite boat is placed in the coating chamber of the coating equipment, and then ionized in the coating chamber under high temperature and high pressure. The reaction gas makes the reaction gas plasma and chemical reaction occurs. At this time, the reaction product is deposited on the surface of the silicon wafer, so that an anti-reflection film is formed on the surface of the silicon wafer. However, the use of PECVD to form an anti-reflection film on the surface of a silicon wafer is prone to winding plating problems, resulting in abnormal color at the edge of the silicon wafer, thereby reducing the coating yield of the silicon wafer.
发明内容Summary of the invention
本申请的目的在于提供一种电极片、载片器以及镀膜系统,以缓解表面成膜过程中绕镀所产生的硅片边缘颜色异常问题,从而提高硅片镀膜良率。The purpose of the present application is to provide an electrode sheet, a slide carrier and a coating system to alleviate the problem of abnormal color of the edge of the silicon wafer caused by the winding plating during the surface film formation process, thereby improving the coating yield of the silicon wafer.
第一方面,本申请提供一种电极片。该电极片包括:至少一个载片单元。每个载片单元的至少一个表面具有载片区域和外围区域,外围区域位于载片区域的周向。每个载片单元的至少一个表面开设有用于抑制绕镀现象的至少一个槽体。至少一个槽体位于外围区域。本申请提供的电极片中,每个载片 单元的至少一个表面开设有至少一个槽体,使得两个电极片相对设置的时候,至少一个电极片含有的槽体朝向另一电极片的表面,就能保证两个电极片开设槽体的区域距离比较大(相对于现有未开设槽体的方式)。基于此,当本申请实施例提供的电极片应用于石墨舟等载片器时,将需要成膜的基片挂设在载片器所含有的电极片上,并控制基片挂设于载片单元开设槽体的表面具有的载片区域。在此基础上,采用PECVD在基片表面成膜时,两个电极片开设槽体的区域之间的电场(下文简称槽体区域电场)强度可以在一定程度上抑制绕镀现象,使得两个电极片所挂设的基片表面形成厚度均匀的膜层,从而缓解表面成膜过程中绕镀所产生的硅片边缘颜色异常问题,进而提高硅片镀膜良率和太阳能电池片的生产效率。In the first aspect, this application provides an electrode sheet. The electrode sheet includes: at least one slide unit. At least one surface of each slide unit has a slide area and a peripheral area, and the peripheral area is located in the circumferential direction of the slide area. At least one surface of each slide unit is provided with at least one groove for suppressing the plating phenomenon. At least one tank is located in the peripheral area. In the electrode sheet provided in the present application, at least one groove body is opened on at least one surface of each slide unit, so that when two electrode sheets are arranged oppositely, the groove body contained in at least one electrode sheet faces the surface of the other electrode sheet. It can be ensured that the distance between the regions where the grooves are opened on the two electrode sheets is relatively large (compared to the existing method where the grooves are not opened). Based on this, when the electrode sheet provided in the embodiments of the present application is applied to a carrier such as a graphite boat, the substrate to be formed into a film is hung on the electrode sheet contained in the carrier, and the substrate is controlled to be hung on the carrier. The unit is provided with a slide area on the surface of the tank. On this basis, when PECVD is used to form a film on the surface of the substrate, the intensity of the electric field between the grooved regions of the two electrode plates (hereinafter referred to as the electric field of the groove region) can suppress the plating phenomenon to a certain extent, so that the two A film with uniform thickness is formed on the surface of the substrate on which the electrode sheet is hung, so as to alleviate the problem of abnormal color of the edge of the silicon chip caused by the winding plating during the surface film forming process, thereby improving the coating yield of the silicon chip and the production efficiency of the solar cell.
在一种可能的实现方式中,每个载片单元的同一表面中,槽体的槽口靠近载片区域外边缘的一侧与载片区域的外边缘距离d 1大于或等于0。 In a possible implementation manner, on the same surface of each slide unit, the distance d 1 from the side of the slot of the groove near the outer edge of the slide area to the outer edge of the slide area is greater than or equal to zero.
当d 1=0时,槽体的槽口靠近载片区域外边缘的一侧实质已经与载片区域的外边缘重合,使得槽体区域电场与载片区域电场(即两个电极片所挂设的硅片等基片之间的电场)可以实现无缝叠加,以利用槽体区域电场最大限度绕镀所产生的硅片边缘颜色异常问题,提高硅片镀膜良率。 When d 1 =0, the side of the notch of the tank body close to the outer edge of the slide area has substantially overlapped with the outer edge of the slide area, so that the electric field of the tank body area and the electric field of the slide area (that is, the two electrode plates hang The electric field between the silicon wafers and other substrates can be seamlessly superimposed, so as to maximize the abnormal color of the edge of the silicon wafer caused by the electric field in the tank area around the plating, and improve the coating yield of the silicon wafer.
当d 1>0时,槽体的槽口与载片区域的外边缘有一定的距离,使得槽体区域电场和载片区域电场之间的电场(下文简称过渡电场)强度受到槽体区域电场和载片区域电场共同影响。此时,沿着载片区域电场到槽体区域电场的方向,过渡电场的电场强度逐渐增高,因此,本申请提供的电极片在一定程度上可以缓解绕镀所产生的硅片边缘颜色异常问题,提高硅片镀膜良率。 When d 1 >0, there is a certain distance between the slot of the tank and the outer edge of the carrier area, so that the electric field between the electric field in the tank area and the electric field in the carrier area (hereinafter referred to as the transition electric field) is affected by the electric field in the tank area. Co-influence with the electric field of the slide area. At this time, along the direction from the electric field in the carrier area to the electric field in the tank area, the electric field intensity of the transition electric field gradually increases. Therefore, the electrode sheet provided in this application can alleviate the abnormal color of the edge of the silicon chip caused by the winding plating to a certain extent. , Improve the yield of silicon wafer coating.
在一种可能的实现方式中,每个载片单元的同一表面中,槽体的槽口靠近外围区域外边缘的一侧与外围区域的外边缘距离d 2大于或等于0且小于d,d为载片区域的外边缘与外围区域的外边缘的距离。 In a possible implementation manner, on the same surface of each slide unit, the distance d 2 between the side of the slot of the groove near the outer edge of the peripheral area and the outer edge of the peripheral area is greater than or equal to 0 and less than d, d It is the distance between the outer edge of the slide area and the outer edge of the peripheral area.
当d 2=0时,槽体的槽口靠近外围区域外边缘的一侧已经与外围区域外边缘重合。此时,每个载片单元的至少一个表面开设有的槽体实质为缺口槽。 When d 2 =0, the side of the notch of the groove body close to the outer edge of the peripheral area has already coincided with the outer edge of the peripheral area. At this time, the grooves provided on at least one surface of each slide unit are substantially notched grooves.
当0<d 2<d时,槽体的槽口靠近外围区域外边缘的一侧位于外围区域内。此时,每个载片单元的至少一个表面开设有的槽体实质为凹槽。 When 0 < d 2 < d, the side of the slot of the groove body close to the outer edge of the peripheral area is located in the peripheral area. At this time, the grooves provided on at least one surface of each slide unit are essentially grooves.
在一种可能的实现方式中,每个载片单元的同一表面中,载片区域的外 边缘与外围区域的外边缘的距离为d,d=d 0+d 1+d 2,d 0为槽体的槽口靠近载片区域外边缘的一侧与靠近外围区域外边缘的一侧的距离,d 1为每个载片单元的同一表面中,槽体的槽口靠近载片区域外边缘的一侧与载片区域的外边缘距离,d 2为每个载片单元的同一表面中,槽体的槽口靠近外围区域外边缘的一侧与外围区域的外边缘距离。 In a possible implementation manner, on the same surface of each slide unit, the distance between the outer edge of the slide area and the outer edge of the peripheral area is d, d = d 0 + d 1 + d 2 , and d 0 is The distance between the side of the notch of the trough near the outer edge of the slide area and the side near the outer edge of the peripheral area, d 1 is the same surface of each slide unit, and the notch of the trough is near the outer edge of the slide area The distance between one side of and the outer edge of the slide area, and d 2 is the distance between the side of the slot near the outer edge of the peripheral area and the outer edge of the peripheral area on the same surface of each slide unit.
在一种可能的实现方式中,每个载片单元的同一表面中,槽体的槽口靠近载片区域的一侧与载片区域的外边缘距离d 1=0.01mm~0.5mm。此时,前文所述过渡电场在槽体区域电场的影响下,可以有效缓解因为载片区域电场的电场强度高所产生的硅片等基片边缘绕镀问题,从而进一步提高硅片镀膜良率。 In a possible implementation manner, on the same surface of each slide unit, the distance d 1 between the side of the slot of the groove body close to the slide area and the outer edge of the slide area = 0.01 mm˜0.5 mm. At this time, under the influence of the electric field in the tank area, the transient electric field mentioned above can effectively alleviate the problem of coating around the edge of silicon wafers and other substrates caused by the high electric field strength of the electric field in the carrier area, thereby further improving the coating yield of silicon wafers. .
在一种可能的实现方式中,每个载片单元的同一表面中,槽体的槽口靠近载片区域外边缘的一侧与靠近外围区域外边缘的一侧的距离d 0为0.1mm-15mm。此时,槽体区域电场既可以有效缓解硅片等基片边缘绕镀问题,又能尽量减少槽口过宽对电极片结构强度的影响。 In a possible implementation manner, on the same surface of each slide unit, the distance d 0 between the side of the slot of the groove near the outer edge of the slide area and the side near the outer edge of the peripheral area is 0.1 mm- 15mm. At this time, the electric field in the slot area can effectively alleviate the problem of plating around the edges of substrates such as silicon wafers, and can also minimize the impact of excessively wide notches on the structural strength of the electrode sheets.
在一种可能的实现方式中,每个载片单元的同一表面中,每个槽体的深度D小于外围区域的最大厚度T,以防止槽体穿透电极片,影响正常镀膜。In a possible implementation manner, on the same surface of each slide unit, the depth D of each groove body is smaller than the maximum thickness T of the peripheral area, so as to prevent the groove body from penetrating the electrode sheet and affecting the normal coating.
在一种可能的实现方式中,每个载片单元的同一表面中,每个槽体的深度D小于外围区域的最大厚度T的二分之一。此时,载片单元的两个表面开设的槽体不会贯通,以保证在载片单元在挂设硅片的情况下,载片单元所具有的载片区域不容易因为硅片的牵拉作用发生损坏,从而使得硅片等基片表面成膜正常的情况下,缓解硅片等基片边缘绕镀问题。例如:当电极片的厚度为2cm时,每个载片单元的同一表面中,每个槽体的深度D大于或等于0.1mm且小于1.0cm。In a possible implementation manner, on the same surface of each slide unit, the depth D of each groove is less than half of the maximum thickness T of the peripheral area. At this time, the grooves provided on the two surfaces of the slide unit will not penetrate, so as to ensure that when the slide unit is mounted with silicon wafers, the slide area of the slide unit is not easily caused by the pulling of the silicon wafer. The function is damaged, so that under the normal condition of film formation on the surface of the substrate such as silicon wafer, the problem of plating around the edge of the substrate such as silicon wafer is alleviated. For example: when the thickness of the electrode sheet is 2 cm, the depth D of each groove on the same surface of each slide unit is greater than or equal to 0.1 mm and less than 1.0 cm.
在一种可能的实现方式中,至少一个载片单元包括至少两个载片单元。相邻两个载片单元的同一表面所开设的槽体连成一体,以进一步减少电极片的重量。In a possible implementation manner, at least one slide unit includes at least two slide units. The grooves opened on the same surface of two adjacent slide units are connected into one body to further reduce the weight of the electrode sheet.
在一种可能的实现方式中,至少一个槽体包括环状槽体。该环状槽体绕设在载片区域的周向。此时整个载片区域被环状槽体包围,使得在表面成膜的过程中,环状槽体可以缓解被硅片等基片周向各个方位的边缘绕镀问题。In a possible implementation manner, the at least one trough body includes an annular trough body. The annular groove is arranged around the circumference of the slide area. At this time, the entire slide area is surrounded by the ring-shaped groove, so that the ring-shaped groove can alleviate the problem of being plated around the edges of the silicon wafer and other substrates in the circumferential direction during the film formation process.
在一种可能的实现方式中,至少一个槽体包括多个槽体。多个槽体绕设在载片区域的周向,使得在表面成膜的过程中,多个槽体可以缓解硅片等基片边缘具有的多个位置的绕镀问题。In a possible implementation manner, at least one trough body includes a plurality of trough bodies. A plurality of grooves are arranged around the circumference of the carrier area, so that during the process of forming a film on the surface, the plurality of grooves can alleviate the plating problem at multiple locations on the edge of a substrate such as a silicon wafer.
在一种可能的实现方式中,多个槽体连成一体。此时连成一体的槽体可以看作前文所描述的环状槽体。In a possible implementation manner, a plurality of tank bodies are connected as a whole. At this time, the connected tank body can be regarded as the ring-shaped tank body described above.
例如:相邻两个槽体通过一条开口比较小的凹槽连通。又例如:相邻两个槽体可以直接连通在一起。For example, two adjacent trough bodies are connected through a groove with a relatively small opening. Another example: two adjacent tank bodies can be directly connected together.
在另一种可能的实现方式中,相邻两个所述槽体之间具有间隔。此时,在表面成膜的过程中,多个槽体可以缓解硅片等基片边缘具有的多个位置的绕镀问题。In another possible implementation manner, there is an interval between two adjacent grooves. At this time, in the process of forming a film on the surface, multiple grooves can alleviate the plating problem at multiple locations on the edge of a substrate such as a silicon wafer.
在一种可能的实现方式中,多个槽体中的至少一个为凹槽或缺口槽。In a possible implementation manner, at least one of the plurality of groove bodies is a groove or a notched groove.
在一种可能的实现方式中,多个槽体的槽型相同或者部分相同。当然多个槽体的槽型都不相同。In a possible implementation manner, the groove shapes of the multiple groove bodies are the same or partly the same. Of course, the groove shapes of multiple tank bodies are different.
在一种可能的实现方式中,上述电极片的每个载片单元开设有位于载片区域的载片窗口。载片窗口不仅有利于降低整个电极片的重量,还能够降低载片单元磨损硅片等基片的可能性。In a possible implementation manner, each slide unit of the above-mentioned electrode sheet is provided with a slide window located in the slide area. The slide window not only helps to reduce the weight of the entire electrode sheet, but also reduces the possibility of the slide unit wearing silicon wafers and other substrates.
在一种可能的实现方式中,每个载片单元开设有至少两个与卡点轴相配合的卡点孔。当定位硅片等基片时,可以在每个卡点孔内置入卡点轴,以利用卡点轴将硅片等基片挂设在电极片包括的载片单元所具有的载片区域。In a possible implementation manner, each slide unit is provided with at least two pinch point holes that are matched with the pinch point axis. When positioning substrates such as silicon wafers, a pinch point shaft can be built into each pinch point hole to use the pinch point shaft to hang the silicon wafer and other substrates on the slide area of the slide unit included in the electrode sheet.
第二方面,本申请提供一种载片器。该载片器包括至少一个第一方面或第一方面的任一可能的实现方式所描述的电极片。In the second aspect, the present application provides a slide carrier. The slide includes at least one electrode sheet described in the first aspect or any possible implementation manner of the first aspect.
在一种可能的实现方式中,上述载片器为石墨舟。In a possible implementation manner, the above-mentioned slide carrier is a graphite boat.
第二方面或第二方面的任一可能的实现方式提供的载片器的有益效果与第一方面或任一可能的实现方式所描述的电极片的有益效果相同,此处不做赘述。The beneficial effects of the slide carrier provided by the second aspect or any possible implementation manner of the second aspect are the same as the beneficial effects of the electrode sheet described in the first aspect or any possible implementation manner, and will not be repeated here.
第三方面,本申请提供一种镀膜系统。该镀膜系统包括镀膜设备和第二方面或第二方面的任一可能的实现方式所描述的载片器。该镀膜设备具有用于镀膜的镀膜腔。当镀膜系统处在镀膜状态时,载片器位于镀膜腔内。In the third aspect, the present application provides a coating system. The coating system includes a coating device and the second aspect or the slide carrier described in any possible implementation manner of the second aspect. The coating equipment has a coating chamber for coating. When the coating system is in the coating state, the carrier is located in the coating chamber.
在一种可能的实现方式中,上述镀膜设备为PECVD镀膜设备。In a possible implementation manner, the above-mentioned coating equipment is a PECVD coating equipment.
第三方面或第三方面的任一可能的实现方式提供的镀膜设备的有益效果与第一方面或任一可能的实现方式所描述的电极片的有益效果相同,此处不做赘述。The beneficial effects of the coating equipment provided by the third aspect or any possible implementation manner of the third aspect are the same as the beneficial effects of the electrode sheet described in the first aspect or any possible implementation manner, and will not be repeated here.
上述说明仅是本申请技术方案的概述,为了能够更清楚了解本申请的技术手段,而可依照说明书的内容予以实施,并且为了让本申请的上述和其它目的、特征和优点能够更明显易懂,以下特举本申请的具体实施方式。The above description is only an overview of the technical solution of this application. In order to understand the technical means of this application more clearly, it can be implemented in accordance with the content of the specification, and in order to make the above and other purposes, features and advantages of this application more obvious and understandable. , The specific implementations of this application are cited below.
附图说明Description of the drawings
此处所说明的附图用来提供对本申请的进一步理解,构成本申请的一部分,本申请的示意性实施例及其说明用于解释本申请,并不构成对本申请的不当限定。在附图中:The drawings described here are used to provide a further understanding of the application and constitute a part of the application. The exemplary embodiments and descriptions of the application are used to explain the application, and do not constitute an improper limitation of the application. In the attached picture:
图1为现有技术中管式PECVD镀膜系统的镀膜原理示意图;Figure 1 is a schematic diagram of the coating principle of a tubular PECVD coating system in the prior art;
图2为现有技术中以石墨舟为例的载片器的结构示意图;FIG. 2 is a schematic diagram of the structure of a slide carrier taking a graphite boat as an example in the prior art;
图3为现有技术中硅片在等离子体气氛的镀膜状态图;FIG. 3 is a diagram of the state of coating a silicon wafer in a plasma atmosphere in the prior art;
图4为本申请实施例提供的电极片的局部结构示意图;4 is a schematic diagram of a partial structure of an electrode sheet provided by an embodiment of the application;
图5为本申请实施例中载片单元的第一种结构示意图;FIG. 5 is a schematic diagram of a first structure of a slide unit in an embodiment of the application;
图6为本申请实施例提供的电极片应用于PECVD镀膜的状态示意图;FIG. 6 is a schematic diagram of a state in which the electrode sheet provided by an embodiment of the application is applied to PECVD coating;
图7为本申请实施例中载片单元的剖视图;FIG. 7 is a cross-sectional view of the slide unit in the embodiment of the application;
图8为本申请实施例中载片单元的第二种结构示意图;FIG. 8 is a schematic diagram of the second structure of the slide-carrying unit in the embodiment of the application;
图9为本申请实施例中载片单元的第三种结构示意图;FIG. 9 is a schematic diagram of a third structure of the slide-carrying unit in an embodiment of the application;
图10为本申请实施例中载片单元的两个表面开设的槽体相对位置示意图一;FIG. 10 is a schematic diagram 1 of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the application; FIG.
图11为本申请实施例中载片单元的两个表面开设的槽体相对位置示意图二;11 is a second schematic diagram of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the application;
图12为本申请实施例中相邻两个载片单元的第一种结构关系示意图;FIG. 12 is a schematic diagram of the first structural relationship between two adjacent slide units in an embodiment of the application; FIG.
图13为本申请实施例中相邻两个载片单元的第二种结构关系示意图;FIG. 13 is a schematic diagram of a second structural relationship between two adjacent slide units in an embodiment of the application;
图14为本申请实施例中多个槽体连通结构示意图;14 is a schematic diagram of a connecting structure of multiple tanks in an embodiment of the application;
图15为本申请实施例中多个槽体间隔分布的第一种结构示意图;15 is a schematic diagram of a first structure in which a plurality of tanks are distributed at intervals in an embodiment of the application;
图16为本申请实施例中多个槽体间隔分布的第二种结构示意图。FIG. 16 is a schematic diagram of a second structure in which a plurality of grooves are distributed at intervals in an embodiment of the application.
具体实施例Specific embodiment
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.
在附图中示出本申请实施例的各种示意图,这些图并非按比例绘制。其中,为了清楚明白的目的,放大了某些细节,并且可能省略了某些细节。图中所示出的各种区域、层的形状以及它们之间的相对大小、位置关系仅是示例性的,实际中可能呢由于制造公差或技术限制而有所偏差,并且本领域技术人员根据实际所需可以另外设计具有不同形状、大小、相对位置的区域/层。Various schematic diagrams of the embodiments of the present application are shown in the drawings, which are not drawn to scale. Among them, for the purpose of clarity, some details are enlarged, and some details may be omitted. The shapes of the various regions and layers shown in the figure and the relative size and positional relationship between them are only exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations. In actual needs, areas/layers with different shapes, sizes, and relative positions can be designed in addition.
以下,术语“第一”、“第二”等仅用于描述目的,而不能理解为指示或暗示相对重要性或隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或更多个该特征。在本申请的描述中,除非另有说明,“多个”的含义是两个或两个以上。Hereinafter, the terms “first”, “second”, etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include one or more of these features. In the description of this application, unless otherwise specified, "plurality" means two or more.
此外,本申请中,“上”、“下”等方位术语是相对于附图中的部件示意置放的方位来定义。应当能理解到,这些方向性术语是相对概念,它们用于相对的描述和澄清,其可以根据附图中部件所放置的方位变化而相应地发生变化。In addition, in this application, the azimuth terms such as "upper" and "lower" are defined relative to the directions in which the components in the drawings are schematically placed. It should be understood that these directional terms are relative concepts, which are used for relative description and clarification, and they can be changed correspondingly according to the changes in the orientation of the components in the drawings.
在本申请中,除非另有明确的规定和限定,术语“连接”应做广义理解,例如,“连接”可以是固定连接,也可以是可拆卸连接,或成一体;可以是直接相连,也可以是通过中间媒介间接相连。In this application, unless expressly stipulated and limited otherwise, the term "connected" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or a whole; it can be a direct connection, or It can be indirectly connected through an intermediary.
等离子增强化学气相沉积(Plasma Enhance Chemical Vapour Deposition,缩写为PECVD)系统是一种利用石墨舟等平行板镀膜舟和高频等离子激发器所构成的镀膜系统。这种镀膜系统常被应用于太阳能电池片的制作过程中。The plasma enhanced chemical vapor deposition (Plasma Enhance Chemical Vapor Deposition, abbreviated as PECVD) system is a coating system composed of a parallel plate coating boat such as a graphite boat and a high-frequency plasma exciter. This coating system is often used in the manufacturing process of solar cells.
图1示出现有技术中管式PECVD镀膜系统的镀膜原理示意图。如图1所示,该PECVD镀膜系统包括管式PECVD设备100以及用于装载硅片等基片的石墨舟200。管式PECVD设备100包括PECVD管式炉110和射频发生器120。PECVD管式炉110包括电阻炉111和石英管112。电阻炉111 位于石英管112的外侧,用以对石英管112进行加热。石英管112开设有进气口1121和排气口1122。石英管112内的腔体1120用于容纳石墨舟200。Figure 1 shows a schematic diagram of the coating principle of a tubular PECVD coating system in the prior art. As shown in FIG. 1, the PECVD coating system includes a tubular PECVD equipment 100 and a graphite boat 200 for loading substrates such as silicon wafers. The tubular PECVD equipment 100 includes a PECVD tubular furnace 110 and a radio frequency generator 120. The PECVD tube furnace 110 includes a resistance furnace 111 and a quartz tube 112. The resistance furnace 111 is located outside the quartz tube 112 for heating the quartz tube 112. The quartz tube 112 is provided with an air inlet 1121 and an air outlet 1122. The cavity 1120 in the quartz tube 112 is used to accommodate the graphite boat 200.
图2示出现有技术中以石墨舟为例的载片器的结构示意图。如图2所示,该石墨舟包括10个上电极片201、11个下电极片202以及连接组件。10个上电极片201和11个下电极片202均沿着图2中箭头A所示方向分布,且相邻两个下电极片202之间具有一个上电极片201。每个上电极片201和每个下电极片202均沿着图2中箭头B所示方向延伸。FIG. 2 shows a schematic diagram of the structure of a slide carrier taking a graphite boat as an example in the prior art. As shown in FIG. 2, the graphite boat includes 10 upper electrode sheets 201, 11 lower electrode sheets 202 and connecting components. The 10 upper electrode sheets 201 and the 11 lower electrode sheets 202 are all distributed along the direction indicated by arrow A in FIG. 2, and there is an upper electrode sheet 201 between two adjacent lower electrode sheets 202. Each upper electrode sheet 201 and each lower electrode sheet 202 extend along the direction indicated by arrow B in FIG. 2.
当沿着图2中箭头A所示方向对11个下电极片202分别进行标号时,11个下电机片包括第一下电极片、第二下电极片、……、第十下电极片和第十一下电极片。这11个下电极片中相邻两个下电极片之间具有一个上述上电极片201。从位置关系来说,第一下电极片和第十一下电极片位于石墨舟的外侧,第二下电极片至第十下电极片和所有上电极片201均位于石墨舟内部。此时,将第一下电极片和第二下电极片定义为石墨舟外片。When the 11 lower electrode sheets 202 are marked along the direction indicated by arrow A in FIG. 2, the 11 lower motor sheets include the first lower electrode sheet, the second lower electrode sheet,..., the tenth lower electrode sheet and Tenth, the electrode sheet. Among the 11 lower electrode sheets, there is one upper electrode sheet 201 between two adjacent lower electrode sheets. In terms of positional relationship, the first bottom electrode sheet and the tenth bottom electrode sheet are located outside the graphite boat, and the second bottom electrode sheet to the tenth bottom electrode sheet and all the upper electrode sheets 201 are located inside the graphite boat. At this time, the first lower electrode sheet and the second lower electrode sheet are defined as the outer sheets of the graphite boat.
如图2所示,上述连接组件包括7根上端陶瓷螺杆203、7根下端陶瓷螺杆204、1根第一前端石墨螺杆205、1根第二前端石墨螺杆206、1根第一后端石墨螺杆207和1根第二后端石墨螺杆208。As shown in Figure 2, the above-mentioned connecting assembly includes 7 upper end ceramic screws 203, 7 lower end ceramic screws 204, 1 first front end graphite screw 205, 1 second front end graphite screw 206, and 1 first rear end graphite screw 207 and a second rear end graphite screw 208.
如图2所示,7根上端陶瓷螺杆203沿着图2中箭头B所示方向分布,每根上端陶瓷螺杆203将10个上电极片201的上端和11个下电极片202的上端绝缘固定在一起。7根下端陶瓷螺杆204沿着图2中箭头B所示方向分布,每根下端陶瓷螺杆204将10个上电极片201的下端和11个下电极片202的下端绝缘固定在一起。当相邻两个下电极片202之间具有一个上电极片201,上电极片201和下电极片202相邻。为了保证相邻的上电极片201和下电极片202绝缘,可以在相邻的上电极片201和下电极片202之间增设陶瓷套或橡胶套等绝缘套,以提高上电极片201和下电极片202的绝缘性。As shown in Fig. 2, the 7 upper ceramic screws 203 are distributed along the direction indicated by arrow B in Fig. 2. Each upper ceramic screw 203 insulates and fixes the upper ends of the 10 upper electrode sheets 201 and the upper ends of the 11 lower electrode sheets 202 Together. The seven lower ceramic screws 204 are distributed along the direction indicated by the arrow B in FIG. 2, and each lower ceramic screw 204 insulates and fixes the lower ends of the 10 upper electrode sheets 201 and the lower ends of the 11 lower electrode sheets 202 together. When there is an upper electrode sheet 201 between two adjacent lower electrode sheets 202, the upper electrode sheet 201 and the lower electrode sheet 202 are adjacent. In order to ensure the insulation between the adjacent upper electrode sheet 201 and the lower electrode sheet 202, an insulating sleeve such as a ceramic sleeve or a rubber sleeve can be added between the adjacent upper electrode sheet 201 and the lower electrode sheet 202 to improve the upper electrode sheet 201 and the lower electrode sheet 202. The insulation of the electrode sheet 202.
如图2所示,上述10个上电极片201的前端和11个下电极片202的前端均位于石墨舟前端,上述10个上电极片201的后端和11个下电极片202的后端均位于石墨舟后端。10个上电极片201的前端通过1根第一前端石墨螺杆205固定在一起,10个上电极片201的后端通过1根第一后端石墨螺杆207固定在一起。11个下电极片202的前端通过1根第二前端石墨螺杆206 固定在一起,11个下电极片202的后端通过1根第二后端石墨螺杆208固定在一起。As shown in FIG. 2, the front ends of the 10 upper electrode sheets 201 and the front ends of the 11 lower electrode sheets 202 are all located at the front end of the graphite boat, and the rear ends of the 10 upper electrode sheets 201 and the rear ends of the 11 lower electrode sheets 202 are located at the front end of the graphite boat. They are all located at the back end of the graphite boat. The front ends of the ten upper electrode sheets 201 are fixed together by a first front-end graphite screw 205, and the rear ends of the ten upper electrode sheets 201 are fixed together by a first rear-end graphite screw 207. The front ends of the 11 lower electrode sheets 202 are fixed together by a second front end graphite screw 206, and the rear ends of the 11 lower electrode sheets 202 are fixed together by a second rear end graphite screw 208.
如图2所示,上述连接组件还包括多个第一前端石墨块209、多个第二前端石墨块210、多个第一后端石墨块211和第二后端石墨块212。As shown in FIG. 2, the above-mentioned connecting assembly further includes a plurality of first front end graphite blocks 209, a plurality of second front end graphite blocks 210, a plurality of first rear end graphite blocks 211 and a second rear end graphite block 212.
如图2所示,对于石墨舟前端来说,每根第一前端石墨螺杆205套设有多个第一前端石墨块209,并保证相邻两个上电极片201的前端之间具有一个第一前端石墨块209。每根第二前端石墨螺杆206套设有多个第二前端石墨块210,并保证相邻两个下电极片202的前端之间具有一个第二前端石墨块210。As shown in Figure 2, for the front end of the graphite boat, each first front end graphite screw 205 is sleeved with a plurality of first front end graphite blocks 209, and it is ensured that there is a first front end between the front ends of two adjacent upper electrode sheets 201. A front end graphite block 209. Each second front end graphite screw 206 is sleeved with a plurality of second front end graphite blocks 210, and it is ensured that there is a second front end graphite block 210 between the front ends of two adjacent lower electrode sheets 202.
如图2所示,对于石墨舟后端来说,每根第一后端石墨螺杆207套设有多个第一后端石墨块211,并保证相邻两个上电极片201的后端之间具有一个第一后端石墨块211。每根第二后端石墨螺杆208套设有多个第二后端石墨块212,并保证相邻两个下电极片202的后端之间具有一个第二后端石墨块212。As shown in FIG. 2, for the rear end of the graphite boat, each first rear end graphite screw 207 is sleeved with a plurality of first rear end graphite blocks 211, and it is ensured that the rear ends of two adjacent upper electrode sheets 201 are separated from each other. There is a first rear end graphite block 211 in the room. Each second rear graphite screw 208 is sleeved with a plurality of second rear graphite blocks 212, and it is ensured that there is a second rear graphite block 212 between the rear ends of two adjacent lower electrode sheets 202.
如图2所示,上述多个第一前端石墨块209中的一个开设有上电极孔(图2未示出),用以插入上电极棒。上述多个第一前端石墨块209中的一个开设有下电极孔(图2未示出),用以接入下电极棒。在实际应用中,石墨舟前端靠近图1所示的石英管112的炉门1123,以方便向上电极孔插入上电极棒,向下电极孔插入下电极棒。As shown in FIG. 2, one of the plurality of first front-end graphite blocks 209 is provided with an upper electrode hole (not shown in FIG. 2) for inserting the upper electrode rod. One of the plurality of first front-end graphite blocks 209 is provided with a lower electrode hole (not shown in FIG. 2) for connecting the lower electrode rod. In practical applications, the front end of the graphite boat is close to the furnace door 1123 of the quartz tube 112 shown in FIG. 1 to facilitate the insertion of the upper electrode rod into the upper electrode hole and the lower electrode rod into the lower electrode hole.
图3示出现有技术中硅片在等离子体气氛的镀膜状态图。如图3所示,上电极片201的表面通过第一卡点轴a挂设有第一硅片301,下电极片202的表面通过第二卡点轴b挂设有第二硅片302。上电极片201的表面与下电极片202的表面相对设置,使得从空间位置来说,第一硅片301和第二硅片302位于上电极片201和下电极片202之间。Fig. 3 is a diagram showing the state of film coating of a silicon wafer in a plasma atmosphere in the prior art. As shown in FIG. 3, a first silicon wafer 301 is hung on the surface of the upper electrode sheet 201 through a first clamping point axis a, and a second silicon wafer 302 is hung on the surface of the lower electrode sheet 202 through a second clamping point axis b. The surface of the upper electrode sheet 201 and the surface of the lower electrode sheet 202 are arranged opposite to each other, so that the first silicon sheet 301 and the second silicon sheet 302 are located between the upper electrode sheet 201 and the lower electrode sheet 202 in terms of spatial position.
在实际应用时,当上电极片201的表面通过第一卡点轴a挂设有第一硅片301时,第一硅片301边缘有些位置与上电极片201具有一定的缝隙,第一硅片301边缘有些位置与上电极片201接触。In practical applications, when the first silicon wafer 301 is hung on the surface of the upper electrode sheet 201 through the first pinch point axis a, there is a certain gap between the edge of the first silicon wafer 301 and the upper electrode sheet 201, and the first silicon wafer 201 The edge of the sheet 301 is in contact with the upper electrode sheet 201 at some positions.
当下电极片202的表面通过第二卡点轴b挂设有第二硅片302时,第二硅片302边缘有些位置与下电极片202具有一定的缝隙,第二硅片302边缘 有些位置与下电极片202接触。When the second silicon chip 302 is hung on the surface of the bottom electrode sheet 202 through the second pinch point axis b, some positions on the edge of the second silicon chip 302 have a certain gap with the bottom electrode sheet 202, and some positions on the edge of the second silicon chip 302 are in contact with the bottom electrode sheet 202. The bottom electrode sheet 202 is in contact.
如图1~图3所示,当采用PECVD在硅片表面镀膜时,将石墨舟200送入PECVD管式炉110的石英管112,利用排气口1122排出腔体1120内的空气,使得腔体1120真空化,然后通过进气口1121向腔体1120通入硅烷(SiH 4)和氨气(NH 3)。这个时候,利用电阻炉111对石英管112进行加热,并控制石英管112内的腔体1120压力,使得腔体1120内的环境达到镀膜所需的高温高压环境。同时,射频发生器120向石墨舟200所含有的上电极片201和下电极片202通入不同极性的射频电压。而由于第一硅片301和第二硅片302在高温下具有良好的导电能力,因此,在高温高压条件下,上电极片201可以将射频电压导入第一硅片301,下电极片202可以将射频电压导入第二硅片302。也就是说,当射频发生器120向石墨舟200所含有的上电极片201和下电极片202通入不同极性的射频电压时,第一硅片301与第二硅片302可以作为镀膜用的电极,使得第一硅片301与第二硅片302之间形成比较均匀的电场PSA。此时,硅烷和氨气在电场作用下电离成N-H键等离子体和Si-H键等离子体,二者反应后形成的氮化硅逐渐沉积在第一硅片301表面和第二硅片302表面,从而在硅片表面形成氮化硅膜。 As shown in Figures 1 to 3, when PECVD is used to coat the surface of a silicon wafer, the graphite boat 200 is fed into the quartz tube 112 of the PECVD tube furnace 110, and the air in the cavity 1120 is exhausted through the exhaust port 1122 to make the cavity The body 1120 is evacuated, and then silane (SiH 4 ) and ammonia (NH 3 ) are introduced into the cavity 1120 through the air inlet 1121. At this time, the resistance furnace 111 is used to heat the quartz tube 112, and the pressure of the cavity 1120 in the quartz tube 112 is controlled so that the environment in the cavity 1120 reaches the high temperature and high pressure environment required for coating. At the same time, the radio frequency generator 120 applies radio frequency voltages of different polarities to the upper electrode sheet 201 and the lower electrode sheet 202 contained in the graphite boat 200. Since the first silicon wafer 301 and the second silicon wafer 302 have good electrical conductivity at high temperatures, under the conditions of high temperature and high pressure, the upper electrode sheet 201 can introduce the RF voltage to the first silicon wafer 301, and the lower electrode sheet 202 can The radio frequency voltage is introduced into the second silicon wafer 302. That is to say, when the radio frequency generator 120 applies radio frequency voltages of different polarities to the upper electrode sheet 201 and the lower electrode sheet 202 contained in the graphite boat 200, the first silicon wafer 301 and the second silicon wafer 302 can be used for coating. The electrodes make a relatively uniform electric field PSA formed between the first silicon wafer 301 and the second silicon wafer 302. At this time, silane and ammonia are ionized into NH bond plasma and Si-H bond plasma under the action of an electric field, and the silicon nitride formed after the reaction of the two is gradually deposited on the surface of the first silicon wafer 301 and the surface of the second silicon wafer 302 , Thereby forming a silicon nitride film on the surface of the silicon wafer.
另外,如图3所示,由于第一硅片301边缘有些位置与上电极片201具有一定的缝隙,第二硅片302边缘有些位置与下电极片202具有一定的缝隙,使得氮化硅不仅沉积在硅片背离电极片的表面(硅片正面),还沉积在的硅片靠近电极片的表面(硅片背面)边缘,导致沉积氮化硅的硅片边缘颜色异常(如发白),这种现象被称为绕镀现象。当硅片靠近电极片的表面边缘沉积的氮化硅厚度(绕镀厚度)1mm时,就需要返工重新镀膜,进而影响硅片镀膜良率。可以理解的是,当发生硅片发生绕镀的时候,氮化硅在绕镀至硅片靠近电极片的表面(下文简称硅片背面)边缘的同时,还会过多的沉积在硅片背离电极片的表面(下文简称硅片正面)边缘(与硅片背离电极片的表面其它区域相比),导致硅片正面边缘颜色异常。In addition, as shown in FIG. 3, since some positions on the edge of the first silicon wafer 301 have a certain gap with the upper electrode sheet 201, and some positions on the edge of the second silicon wafer 302 have a certain gap with the lower electrode sheet 202, the silicon nitride is not only Deposited on the surface of the silicon wafer away from the electrode (the front side of the silicon wafer), and the silicon wafer that is also deposited on the edge of the surface (the backside of the silicon wafer) close to the electrode, causes the edge of the silicon nitride deposited silicon wafer to have an abnormal color (such as whitening), This phenomenon is called the winding-plating phenomenon. When the thickness of the silicon nitride deposited on the surface edge of the silicon wafer (the coating thickness) is 1mm, it needs to be reworked and re-plated, which will affect the coating yield of the silicon wafer. It is understandable that when the silicon wafer is plated around, while the silicon nitride is plated around the edge of the silicon wafer near the surface of the electrode (hereinafter referred to as the back of the silicon wafer), it will also deposit too much on the silicon wafer away from the edge. The edge of the surface of the electrode sheet (hereinafter referred to as the front surface of the silicon chip) (compared with other areas of the surface of the silicon chip away from the electrode sheet), causes the color of the front edge of the silicon chip to be abnormal.
发明人针对上述问题进行研究,结果发现降低硅片边缘的电场强度,可以有效抑制硅片边缘绕镀现象,以减小硅片靠近电极片的表面边缘沉积的氮化硅厚度。基于此,本申请实施例提供一种电极片。该电极片可以为任何导 电材料制作的电极片,不仅限于前文所述石墨舟含有的电极片。这种电极片可以应用于硅片等各种基片的镀膜过程中,镀膜方式不仅限于此PECVD,还可以是与PECVD原理比较接近的镀膜方式。The inventor conducted research on the above problems and found that reducing the electric field intensity at the edge of the silicon wafer can effectively suppress the plating around the edge of the silicon wafer, so as to reduce the thickness of silicon nitride deposited on the edge of the silicon wafer near the surface of the electrode wafer. Based on this, the embodiment of the present application provides an electrode sheet. The electrode sheet can be an electrode sheet made of any conductive material, and is not limited to the electrode sheet contained in the graphite boat mentioned above. This kind of electrode sheet can be used in the coating process of various substrates such as silicon wafers. The coating method is not limited to this PECVD, but can also be a coating method close to the principle of PECVD.
图4示出本申请实施例提供的电极片的局部结构示意图。如图4所示,本申请实施例提供的电极片400包括至少一个载片单元400U。每个载片单元400U可以用于挂设一张硅片等基片。FIG. 4 shows a schematic diagram of a partial structure of an electrode sheet provided by an embodiment of the present application. As shown in FIG. 4, the electrode sheet 400 provided by the embodiment of the present application includes at least one sheet-carrying unit 400U. Each carrier unit 400U can be used to mount a substrate such as a silicon wafer.
图5示出本申请实施例中载片单元的第一种结构示意图。如图5所示,当每个载片单元400U的面积应当大于所需挂设的基片面积。每个载片单元400U的至少一个表面具有载片区域U1和外围区域U2。该外围区域U2位于载片区域U1的周向。此处载片区域U1被定义为硅片等基片挂设在载片单元400U时,载片单元400U的表面被硅片等基片的正投影覆盖的区域。外围区域U2被定义为硅片等基片挂设在载片单元400U时,载片单元400U的表面没有被硅片等基片的正投影覆盖的区域。FIG. 5 shows a schematic diagram of the first structure of the slide unit in the embodiment of the present application. As shown in FIG. 5, when the area of each slide unit 400U should be greater than the area of the substrate to be mounted. At least one surface of each slide unit 400U has a slide area U1 and a peripheral area U2. The peripheral area U2 is located in the circumferential direction of the slide area U1. Here, the slide area U1 is defined as the area where the surface of the slide unit 400U is covered by the orthographic projection of the silicon wafer or other substrate when the substrate such as a silicon wafer is hung on the slide unit 400U. The peripheral area U2 is defined as the area where the surface of the wafer carrier unit 400U is not covered by the orthographic projection of the wafer carrier unit 400U when a substrate such as a silicon wafer is hung on the wafer carrier unit 400U.
如图5所示,每个载片单元400U的至少一个表面开设有用于抑制绕镀现象的至少一个槽体402。至少一个槽体402位于外围区域U2。应理解,此处至少一个槽体402位于外围区域U2是指每个载片单元400U的至少一个表面开设的所有槽体402均位于外围区域U2。As shown in FIG. 5, at least one surface of each slide unit 400U is provided with at least one tank 402 for suppressing the plating phenomenon. At least one trough body 402 is located in the peripheral area U2. It should be understood that here at least one slot 402 is located in the peripheral area U2 means that all the slots 402 formed on at least one surface of each chip carrier unit 400U are located in the peripheral area U2.
图6示出本申请实施例提供的电极片应用于PECVD镀膜的状态示意图。如图6所示,第一电极片400A和第二电极片400B均为图4所示的电极片。为了方便描述镀膜原理,设定第一电极片400A和第二电极片400B均包括一个载片单元400U。第一电极片400A(或者说第一电极片400A包括的载片单元400U)的表面和第二电极片400B(或者说第二电极片400B包括的载片单元400U)的表面均具有载片区域U1和外围区域U2。第一电极片400A的表面开设有位于外围区域U2的第一槽体402A,第二电极片400B的表面开设有位于外围区域U2的第二槽体402B。图6所示出的第一槽体402A在第二电极片400B表面的正投影与第二槽体402B相同。FIG. 6 shows a schematic diagram of the state in which the electrode sheet provided by the embodiment of the present application is applied to PECVD coating. As shown in FIG. 6, both the first electrode sheet 400A and the second electrode sheet 400B are the electrode sheets shown in FIG. 4. In order to facilitate the description of the principle of coating, it is assumed that both the first electrode sheet 400A and the second electrode sheet 400B include a chip carrier unit 400U. The surface of the first electrode sheet 400A (or the slide unit 400U included in the first electrode sheet 400A) and the surface of the second electrode sheet 400B (or the slide unit 400U included in the second electrode sheet 400B) both have a slide area U1 and the peripheral area U2. The surface of the first electrode sheet 400A is provided with a first groove body 402A located in the peripheral area U2, and the surface of the second electrode sheet 400B is provided with a second groove body 402B located in the peripheral area U2. The orthographic projection of the first groove body 402A shown in FIG. 6 on the surface of the second electrode sheet 400B is the same as that of the second groove body 402B.
如图6所示,当利用第一电极片400A和第二电极片400B对第一硅片301和第二硅片302(但不仅限于此硅片)进行PECVD镀膜时,第一电极片400A的表面和第二电极片400B的表面相对,第一电极片400A的表面挂设 有位于载片区域U1的第一硅片301,第二电极片400B的表面挂设有位于载片区域U1的第二硅片302。第一电极片400A所挂设的第一硅片301与第二电极片400B所挂设的第二硅片302之间的距离为R 1,第一电极片400A的表面开设的第一槽体402A具有的槽底与第二电极片400B的表面开设的第二槽体402B具有的槽底之间的距离为R 2As shown in FIG. 6, when the first silicon wafer 301 and the second silicon wafer 302 (but not limited to this silicon wafer) are PECVD coated with the first electrode wafer 400A and the second electrode wafer 400B, the first electrode wafer 400A The surface is opposite to the surface of the second electrode sheet 400B. The surface of the first electrode sheet 400A is hung with a first silicon wafer 301 located in the wafer carrier area U1, and the surface of the second electrode sheet 400B is hung with a first silicon wafer located in the wafer area U1. Two silicon wafers 302. The distance between the first silicon wafer 301 hung on the first electrode sheet 400A and the second silicon wafer 302 hung on the second electrode sheet 400B is R 1 , and the first groove body is opened on the surface of the first electrode sheet 400A The distance between the groove bottom of the 402A and the groove bottom of the second groove body 402B opened on the surface of the second electrode sheet 400B is R 2 .
本领域技术人员可以知道的是:在通电的情况下,两个对设电极之间可以形成均匀的电场。该电场的电场力
Figure PCTCN2020100197-appb-000001
电场强度
Figure PCTCN2020100197-appb-000002
其中,F为电场力,k为静电常数,k=9.0×10 9N·m 2/C 2,Q为两个对设电极所包括的其中一个电极的带电量,q为两个对设电极所包括的另一个电极的带电量,q 0为等离子体的电量,R为两个对设电极之间的距离。由电场力公式和电场强度公式可以看出,两个对设电极之间的距离R与电场力和电场强度均呈反比。当两个对设的电极之间的距离R减小时,电场力和电场强度增加。当两个对设的电极之间的距离R增加时,电场力和电场强度减小。
Those skilled in the art can know that when the current is energized, a uniform electric field can be formed between the two opposed electrodes. Electric field force
Figure PCTCN2020100197-appb-000001
Electric field strength
Figure PCTCN2020100197-appb-000002
Among them, F is the electric field force, k is the electrostatic constant, k=9.0×10 9 N·m 2 /C 2 , Q is the charge amount of one of the two counter electrodes, and q is the two counter electrodes The charge amount of the other electrode included, q 0 is the charge amount of the plasma, and R is the distance between the two opposite electrodes. It can be seen from the electric field force formula and the electric field strength formula that the distance R between the two opposite electrodes is inversely proportional to the electric field force and the electric field strength. When the distance R between the two opposed electrodes decreases, the electric field force and the electric field strength increase. When the distance R between the two opposed electrodes increases, the electric field force and the electric field strength decrease.
基于两个对设电极之间的距离R与电场力和电场强度均呈反比这一结论,如图6所示,当每个载片单元400U的至少一个表面开设的所有槽体402位于外围区域U2时,由于R 1<R 2,槽体区域电场cPSA强度低于载片区域电场zPSA强度。其中,槽体区域电场cPSA是指第一电极片400A开设的第一槽体402A和第二电极片400B开设的第二槽体402B之间的电场。载片区域电场zPSA是指第一硅片301和第二硅片302之间的电场。 Based on the conclusion that the distance R between the two counter electrodes is inversely proportional to the electric field force and the electric field strength, as shown in FIG. 6, when all the grooves 402 opened on at least one surface of each slide unit 400U are located in the peripheral area At U2, since R 1 <R 2 , the intensity of the electric field cPSA in the tank area is lower than the intensity of the electric field zPSA in the slide area. Wherein, the electric field cPSA in the slot area refers to the electric field between the first slot 402A opened by the first electrode sheet 400A and the second slot 402B opened by the second electrode sheet 400B. The electric field zPSA in the slide area refers to the electric field between the first silicon wafer 301 and the second silicon wafer 302.
如图4~图6所示,当槽体区域电场cPSA低于载片区域电场zPSA强度时,载片区域电场zPSA虽然受到槽体区域电场cPSA的影响,但是因为影响比较小,在槽体区域电场cPSA的作用下,载片区域电场zPSA的边缘电场强度有所降低,但距离槽体402较远的区域电场强度均匀,因此,在同样的时间长度下,如果不考虑绕镀所带来的硅片边缘氮化硅沉积量,单位时间内在第一硅片301正面边缘的单位面积氮化硅沉积量比较少(相对第一硅片301正面其他区域)。此时,第一硅片301正面边缘沉积的氮化硅厚度不足。As shown in Figures 4-6, when the electric field cPSA in the tank area is lower than the intensity of the electric field zPSA in the slide area, although the electric field zPSA in the slide area is affected by the electric field cPSA in the tank area, the influence is relatively small in the tank area. Under the action of the electric field cPSA, the fringe electric field intensity of the electric field zPSA in the slide area is reduced, but the electric field intensity in the area farther from the tank 402 is uniform. Therefore, under the same length of time, if the winding plating is not considered The amount of silicon nitride deposited on the edge of the silicon wafer is relatively small per unit area of silicon nitride on the edge of the front surface of the first silicon wafer 301 per unit time (compared to other areas on the front surface of the first silicon wafer 301). At this time, the thickness of the silicon nitride deposited on the front edge of the first silicon wafer 301 is insufficient.
同理,单位时间内在第二硅片302正面边缘的氮化硅单位面积沉积量比较少(相对第二硅片302正面的其他区域)。此时,第二硅片302正面边缘沉积的氮化硅厚度不足。Similarly, the amount of silicon nitride deposited per unit area on the edge of the front surface of the second silicon wafer 302 per unit time is relatively small (relative to other areas on the front surface of the second silicon wafer 302). At this time, the thickness of the silicon nitride deposited on the front edge of the second silicon wafer 302 is insufficient.
如图4~图6所示,在实际应用中,第一硅片301边缘有些位置与第一电极片400A具有一定的缝隙,使得第一硅片301仍然会发生绕镀。在这种情况下,由于槽体区域电场cPSA的影响,使得载片区域电场zPSA的边缘电场强度有所减小,有利于降低第一硅片301的边缘绕镀程度。As shown in FIGS. 4 to 6, in practical applications, some positions on the edge of the first silicon wafer 301 have a certain gap with the first electrode sheet 400A, so that the first silicon wafer 301 will still be plated. In this case, due to the influence of the electric field cPSA in the tank area, the fringe electric field intensity of the electric field zPSA in the slide area is reduced, which is beneficial to reduce the edge plating degree of the first silicon wafer 301.
例如:当第一硅片301的边缘绕镀程度降低时,不仅第一硅片301背面边缘所沉积氮化硅厚度降低,而且第一硅片301正面边缘沉积的氮化硅厚度也会降低。由此可见,当载片单元400U的表面开设的槽体402位于外围区域U2时,利用第一硅片301的边缘仍然存在的绕镀现象,可以在一定程度上增加沉积第一硅片301正面边缘的氮化硅沉积量,从而弥补因为电场强度差异(槽体区域电场cPSA强度小于载片区域电场zPSA强度)所导致的第一硅片301正面边缘氮化硅厚度不足的问题,使得第二硅片301正面沉积的氮化硅厚度均匀。For example, when the degree of plating around the edge of the first silicon wafer 301 is reduced, not only the thickness of the silicon nitride deposited on the back edge of the first silicon wafer 301 is reduced, but also the thickness of the silicon nitride deposited on the front edge of the first silicon wafer 301 is also reduced. It can be seen that when the groove 402 opened on the surface of the wafer carrier unit 400U is located in the peripheral area U2, the plating phenomenon still existing on the edge of the first silicon wafer 301 can be used to increase the deposition of the front surface of the first silicon wafer 301 to a certain extent. The amount of silicon nitride deposited at the edge can compensate for the insufficient thickness of silicon nitride at the front edge of the first silicon wafer 301 due to the difference in electric field intensity (the electric field cPSA intensity in the tank area is less than the electric field zPSA intensity in the carrier area), which makes the second The silicon nitride deposited on the front surface of the silicon wafer 301 has a uniform thickness.
如图4~图6所示,在实际应用中,第二硅片302边缘有些位置与第二电极片400B具有一定的缝隙,使得第二硅片302的边缘仍然会发生绕镀。在这种情况下,由于槽体区域电场cPSA的影响,使得载片区域电场zPSA的边缘电场强度有所减小,有利于降低第二硅片302的边缘绕镀程度。As shown in FIGS. 4 to 6, in practical applications, some positions of the edge of the second silicon wafer 302 have a certain gap with the second electrode piece 400B, so that the edge of the second silicon wafer 302 still has a plating around. In this case, due to the influence of the electric field cPSA in the tank area, the fringe electric field intensity of the electric field zPSA in the carrier area is reduced, which is beneficial to reduce the edge coating degree of the second silicon wafer 302.
例如:当第二硅片302的边缘绕镀程度降低时,不仅第二硅片302背面边缘所沉积氮化硅厚度降低,而且第二硅片302正面边缘沉积的氮化硅厚度也会降低。由此可见,当载片单元400U的表面开设的槽体402位于外围区域U2时,利用第二硅片302的边缘仍然存在的绕镀现象,可以在一定程度上增加沉积第二硅片302正面边缘的氮化硅沉积量,从而弥补因为电场强度差异(槽体区域电场cPSA强度小于载片区域电场zPSA强度)所导致的第二硅片302正面边缘氮化硅厚度不足的问题,使得第二硅片302正面沉积的氮化硅厚度均匀。For example, when the degree of plating around the edge of the second silicon wafer 302 is reduced, not only the thickness of the silicon nitride deposited on the back edge of the second silicon wafer 302 is reduced, but also the thickness of the silicon nitride deposited on the front edge of the second silicon wafer 302 will also be reduced. It can be seen that when the groove 402 opened on the surface of the wafer carrier unit 400U is located in the peripheral area U2, the plating phenomenon still existing on the edge of the second silicon wafer 302 can be used to increase the deposition of the front surface of the second silicon wafer 302 to a certain extent. The amount of silicon nitride deposited on the edge can compensate for the insufficient thickness of silicon nitride at the front edge of the second silicon wafer 302 caused by the difference in electric field intensity (the electric field cPSA intensity in the tank area is less than the electric field zPSA intensity in the carrier area), so that the second The silicon nitride deposited on the front surface of the silicon wafer 302 has a uniform thickness.
经试验证明,第一硅片301靠近第一电极片400A的表面边缘沉积的氮化硅厚度(绕镀厚度)小于1mm,第二硅片302靠近第二电极片400B的表面边缘沉积的氮化硅厚度(绕镀厚度)小于1mm,且第一硅片301表面和第二硅片302表面所形成的氮化硅膜颜色均一性比较好,因此,第一硅片301和第二硅片302镀膜后无需返工重新镀膜。由此可见,采用PECVD方式对 硅片进行镀膜时,可以在绕镀现象仍然存在的情况下,利用槽体402调整槽体区域电场cPSA强度,并对载片区域电场zPSA的边缘电场强度进行适当的影响,以保证镀膜后的硅片边缘颜色接近正常或正常,从而提高硅片镀膜良率,提高太阳能电池片的生产效率。Tests have proved that the thickness of silicon nitride (coating thickness) deposited on the first silicon wafer 301 near the surface edge of the first electrode piece 400A is less than 1mm, and the second silicon wafer 302 is deposited near the surface edge of the second electrode piece 400B. The silicon thickness (the coating thickness) is less than 1mm, and the color uniformity of the silicon nitride film formed on the surface of the first silicon wafer 301 and the surface of the second silicon wafer 302 is relatively good. Therefore, the first silicon wafer 301 and the second silicon wafer 302 There is no need to rework and re-coat after coating. It can be seen that when the PECVD method is used to coat silicon wafers, the tank 402 can be used to adjust the cPSA intensity of the electric field in the tank area, and the fringe electric field intensity of the electric field zPSA in the carrier area can be appropriately adjusted while the plating phenomenon still exists. In order to ensure that the edge color of the silicon wafer after coating is close to normal or normal, thereby improving the coating yield of the silicon wafer and improving the production efficiency of solar cells.
由上可知,如图4~图6所示,本申请实施例提供的电极片400中,每个载片单元400U的至少一个表面开设有至少一个槽体402,不仅可以使得电极片轻质化,还能够在两个电极片400相对设置的情况下,至少一个电极片含有的槽体402朝向另一电极片400的表面,就能够保证两个电极片开设槽体402的区域距离比较大(相对于现有未开设槽体的方式)。基于此,当本申请实施例提供的电极片应用于石墨舟等载片器时,将需要成膜的基片(如硅片)挂设在载片器所含有的电极片400上,并控制基片挂设于载片单元400U开设槽体402的表面具有的载片区域U1。在此基础上,采用PECVD在基片表面成膜时,槽体区域电场cPSA可以在一定程度上抑制绕镀现象,使得两个电极片所挂设的基片表面形成厚度均匀的膜层,从而缓解表面成膜过程中绕镀所产生的硅片边缘颜色异常问题,进而提高硅片镀膜良率和太阳能电池片的生产效率。另外,本申请实施例提供的电极片400应用于硅片镀膜时,可以提高硅片的镀膜良率,减少因为绕镀严重所导致返工和电池片降级问题。It can be seen from the above that, as shown in FIGS. 4 to 6, in the electrode sheet 400 provided by the embodiment of the present application, at least one groove 402 is opened on at least one surface of each sheet carrier unit 400U, which not only makes the electrode sheet lighter It is also possible that when the two electrode sheets 400 are arranged oppositely, the groove 402 contained in at least one electrode sheet faces the surface of the other electrode sheet 400, which can ensure that the distance between the areas where the groove bodies 402 are opened on the two electrode sheets is relatively large ( (Compared to the existing way of not opening a tank). Based on this, when the electrode sheet provided by the embodiment of the present application is applied to a carrier such as a graphite boat, a substrate (such as a silicon wafer) that needs to be filmed is hung on the electrode sheet 400 contained in the carrier and controlled The substrate is hung on the slide area U1 provided on the surface of the slot 402 of the slide unit 400U. On this basis, when PECVD is used to form a film on the surface of the substrate, the electric field cPSA in the tank area can suppress the plating phenomenon to a certain extent, so that the surface of the substrate where the two electrode plates are hung can form a uniform thickness film, thereby It alleviates the abnormal color of the edge of the silicon wafer caused by the winding plating during the surface film formation process, thereby improving the coating yield of the silicon wafer and the production efficiency of the solar cell. In addition, when the electrode sheet 400 provided by the embodiment of the present application is applied to silicon wafer coating, the coating yield of the silicon wafer can be improved, and the problems of rework and cell degradation caused by severe winding plating can be reduced.
需要说明的是,如图4所示,上述电极片400包括的每个载片单元400U开设有位于载片区域U1的载片窗口401。载片窗口401不仅有利于降低整个电极片400的重量,还能够降低载片单元400U磨损硅片等基片的可能性。It should be noted that, as shown in FIG. 4, each slide unit 400U included in the electrode sheet 400 is provided with a slide window 401 located in the slide area U1. The slide window 401 not only helps to reduce the weight of the entire electrode sheet 400, but also reduces the possibility that the slide unit 400U wears out substrates such as silicon wafers.
另外,如图4所示,上述电极片400包括的每个载片单元400U开设有至少两个与卡点轴相配合的卡点孔403。如图5所述,当在载片单元400U的表面具有的载片区域U1挂设硅片等基片时,可以参考图3在每个卡点孔403内置卡点轴,以利用卡点轴将硅片等基片挂设在载片单元400U所具有的载片区域U1。应理解,如果槽体402与载片区域U1的距离特别近的情况下,至少两个卡点孔403有可能与槽体402的部分区域重合。并且,卡点轴可以导电,也可以不导电。当卡点轴为石墨卡点轴等导电卡点轴时,卡点轴不仅可以起到支撑硅片的作用,还能够将载入电极片的射频电流导入硅片, 使得两个电极片所挂设的硅片之间形成的载片区域电场更加均匀和稳定。In addition, as shown in FIG. 4, each of the chip carrier units 400U included in the electrode sheet 400 is provided with at least two pinch point holes 403 that are matched with the pinch point axis. As shown in FIG. 5, when a substrate such as a silicon wafer is hung on the substrate area U1 on the surface of the chip carrier unit 400U, you can refer to FIG. 3 to have a built-in pinch point axis in each pinch point hole 403 to use the pinch point axis A substrate such as a silicon wafer is hung on the slide area U1 of the slide unit 400U. It should be understood that if the distance between the trough body 402 and the slide area U1 is extremely close, at least two of the clamping point holes 403 may overlap a part of the trough body 402. In addition, the pinch point axis can be conductive or non-conductive. When the card point axis is a conductive card point axis such as a graphite card point axis, the card point axis can not only support the silicon chip, but also can introduce the radio frequency current loaded into the electrode chip into the silicon chip, so that the two electrode chips can be hung. The electric field of the slide area formed between the set silicon wafers is more uniform and stable.
作为一种可能的实现方式,如图5所示,每个载片单元400U的同一表面中,载片区域U1的外边缘与外围区域U2的外边缘的距离(下文简称外围区域宽度)为d,每个载片单元400U的同一表面中,槽体402的槽口靠近载片区域U1外边缘的一侧与靠近外围区域U2外边缘的一侧的距离(即槽体402的槽口宽度)为d 0,每个载片单元400U的同一表面中,槽体402的槽口靠近载片区域U1外边缘的一侧与载片区域U1的外边缘距离(下文简称过渡区域宽度)为d 1,每个载片单元400U的同一表面中,槽体402的槽口靠近外围区域U2外边缘的一侧与外围区域U2的外边缘距离(下文简称边缘区域宽度)为d 2As a possible implementation, as shown in FIG. 5, on the same surface of each slide unit 400U, the distance between the outer edge of the slide area U1 and the outer edge of the peripheral area U2 (hereinafter referred to as the width of the peripheral area) is d In the same surface of each slide unit 400U, the distance between the side of the notch of the groove body 402 near the outer edge of the slide area U1 and the side near the outer edge of the peripheral area U2 (that is, the width of the notch of the groove body 402) Is d 0 , on the same surface of each slide unit 400U, the distance between the side of the slot of the groove body 402 near the outer edge of the slide area U1 and the outer edge of the slide area U1 (hereinafter referred to as the transition area width) is d 1 In the same surface of each slide unit 400U, the distance between the side of the slot of the groove body 402 near the outer edge of the peripheral area U2 and the outer edge of the peripheral area U2 (hereinafter referred to as the edge area width) is d 2 .
示例性的,图7示出本申请实施例中载片单元的剖视图(沿着电极片的厚度方向剖切所形成的视图)。如图7所示,线段L由内侧线段L 1、外侧线段L 2和槽口线段L 0构成。该线段L用于表示外围区域宽度d。内侧线段L1用于表示过渡区域宽度d 1,外侧线段L 2用于表示边缘区域宽度d 2,槽口线段L 0用于表示槽体402的槽口的宽度d 0。并且,为了保证图5所示的d=d 0+d 1+d 2关系成立,图7所示的内侧线段L 1、外侧线段L 2和槽口线段L 0应当位于同一直线,并构成线段L。 Illustratively, FIG. 7 shows a cross-sectional view (a view formed by cutting along the thickness direction of the electrode sheet) of the slide unit in an embodiment of the present application. As shown in Fig. 7, the line segment L is composed of an inner line segment L 1 , an outer line segment L 2 and a slot line segment L 0 . The line segment L is used to indicate the width d of the peripheral area. The inner line segment L1 is used to represent the transition area width d 1 , the outer line segment L 2 is used to represent the edge area width d 2 , and the slot line segment L 0 is used to represent the slot width d 0 of the slot body 402. Moreover, in order to ensure that the relationship d=d 0 +d 1 +d 2 shown in Figure 5 is established, the inner line segment L 1 , the outer line segment L 2 and the slot line segment L 0 shown in Fig. 7 should be located on the same straight line and form a line segment L.
在一种可选方式中,图8示出本申请实施例中载片单元的第二种结构示意图。如图5和图8所示,每个载片单元400U的同一表面中,槽体402的槽口靠近载片区域U1外边缘的一侧与载片区域U1的外边缘距离d 1大于或等于0。 In an optional manner, FIG. 8 shows a schematic diagram of a second structure of the slide unit in an embodiment of the present application. As shown in Figures 5 and 8, on the same surface of each slide unit 400U, the distance d 1 between the notch of the groove body 402 near the outer edge of the slide area U1 and the outer edge of the slide area U1 is greater than or equal to 0.
如图6和图8所示,当d 1=0时,槽体402的槽口靠近载片区域U1外边缘的一侧实质已经与载片区域U1的外边缘重合,使得槽体区域电场cPSA与载片区域U1电场可以实现无缝叠加,以利用槽体区域电场cPSA最大限度绕镀所产生的硅片边缘颜色异常问题,提高硅片镀膜良率。 As shown in Figures 6 and 8, when d 1 =0, the side of the slot of the tank 402 close to the outer edge of the slide area U1 has substantially coincided with the outer edge of the slide area U1, so that the tank area electric field cPSA It can be seamlessly superimposed with the electric field of the carrier area U1 to maximize the color abnormality of the edge of the silicon wafer caused by the electric field cPSA in the tank area, and improve the coating yield of the silicon wafer.
示例性的,如图8所示,该电极片400含有一个载片单元400U。该载片单元400U的表面开设有槽体402。图5示出的内侧线条a1为槽体402的槽口靠近载片区域U1外边缘的一侧。由图5和图8可以看出:内侧线条a1与载片区域U1的外边缘a2重合。内侧线条a1与载片区域U1的外边缘a2 之间的距离(即d 1)等于0。 Exemplarily, as shown in FIG. 8, the electrode sheet 400 includes a slide unit 400U. A groove 402 is formed on the surface of the slide unit 400U. The inner line a1 shown in FIG. 5 is a side of the notch of the groove body 402 close to the outer edge of the slide area U1. It can be seen from FIGS. 5 and 8 that the inner line a1 coincides with the outer edge a2 of the slide area U1. The distance (ie, d 1 ) between the inner line a1 and the outer edge a2 of the slide area U1 is equal to zero.
如图5和图6所示,当d 1>0时,槽体402的槽口与载片区域U1的外边缘有一定的距离,使得槽体区域电场cPSA和载片区域电场zPSA之间的电场(下文简称过渡电场gPSA)强度受到槽体区域电场cPSA和载片区域电场zPSA共同影响。此时,沿着载片区域电场zPSA到槽体区域电场cPSA的方向,过渡电场gPSA的电场强度逐渐增高,因此,本申请实施例提供的电极片400在一定程度上可以缓解绕镀所产生的硅片边缘颜色异常问题,提高硅片等基片的镀膜良率。 As shown in Figures 5 and 6, when d 1 >0, the slot of the tank 402 is at a certain distance from the outer edge of the slide area U1, so that the electric field cPSA of the tank body area and the electric field zPSA of the slide area The strength of the electric field (hereinafter referred to as the transition electric field gPSA) is jointly affected by the electric field cPSA in the tank area and the electric field zPSA in the carrier area. At this time, along the direction from the electric field zPSA in the slide area to the electric field cPSA in the tank area, the electric field intensity of the transitional electric field gPSA gradually increases. Therefore, the electrode sheet 400 provided by the embodiment of the present application can relieve the winding plating to a certain extent. The problem of abnormal color at the edge of silicon wafer can improve the coating yield of silicon wafers and other substrates.
示例性的,如图5所示,该载片单元400U可以看作含有一个载片单元400U的电极片。该载片单元400U的表面开设有槽体402。图5示出的内侧线条a1为槽体402的槽口靠近载片区域U1外边缘的一侧。由图5可以看出:内侧线条a1与载片区域U1的外边缘a2之间的距离(即d 1)大于0。 Exemplarily, as shown in FIG. 5, the slide unit 400U can be regarded as an electrode sheet including one slide unit 400U. A groove 402 is formed on the surface of the slide unit 400U. The inner line a1 shown in FIG. 5 is a side of the notch of the groove body 402 close to the outer edge of the slide area U1. It can be seen from FIG. 5 that the distance (ie, d 1 ) between the inner line a1 and the outer edge a2 of the slide area U1 is greater than zero.
例如:如图5和图6所示,每个载片单元400U的同一表面中,内侧线条a1与载片区域U1的外边缘a2距离d 1=0.01mm~0.5mm。例如:d 1=0.01mm、0.5mm或0.03mm。此时,前文所述过渡电场gPSA在槽体区域电场cPSA的影响下,可以有效缓解因为载片区域电场zPSA的电场强度高所产生的硅片等基片边缘绕镀问题,从而进一步提高硅片等基片的镀膜良率。 For example, as shown in Figs. 5 and 6, on the same surface of each slide unit 400U, the distance d 1 between the inner line a1 and the outer edge a2 of the slide area U1 = 0.01 mm˜0.5 mm. For example: d 1 =0.01mm, 0.5mm or 0.03mm. At this time, under the influence of the electric field cPSA in the tank area, the transition electric field gPSA mentioned above can effectively alleviate the problem of plating around the edge of the silicon wafer and other substrates caused by the high electric field intensity of the electric field zPSA in the carrier area, thereby further improving the silicon wafer Wait for the coating yield of the substrate.
在一些情况下,如图5所示,每个载片单元400U的同一表面中,槽体402的槽口靠近载片区域U1外边缘的一侧与靠近外围区域U2外边缘的一侧的距离(即槽体402的槽口宽度)d 0为0.1mm-15mm。此时,如图5和图6所示,槽体区域电场cPSA既可以有效缓解硅片等基片边缘绕镀问题,又能尽量减少槽口过宽对电极片的结构强度影响。 In some cases, as shown in FIG. 5, on the same surface of each slide unit 400U, the distance between the side of the notch of the groove body 402 near the outer edge of the slide area U1 and the side near the outer edge of the peripheral area U2 (That is, the slot width of the slot body 402) d 0 is 0.1mm-15mm. At this time, as shown in Figures 5 and 6, the cPSA field in the tank region can effectively alleviate the plating problem around the edges of substrates such as silicon wafers, and minimize the impact of excessively wide notches on the structural strength of the electrode plates.
在一种可选方式中,图9示出本申请实施例中载片单元的第三种结构示意图。如图5和图9所示,每个载片单元400U的同一表面中,槽体402的槽口靠近外围区域U2外边缘的一侧与外围区域U2的外边缘距离d 2大于或等于0且小于d,d为载片区域U1的外边缘与外围区域U2的外边缘的距离。 In an optional manner, FIG. 9 shows a schematic diagram of a third structure of the slide unit in an embodiment of the present application. 5 and 9, the same surface of each slide element 400U, the notch groove 402 from the side near the outer edge of the outer edge of the peripheral region U2 and U2 d 2 of the peripheral region is greater than or equal to 0 and Less than d, d is the distance between the outer edge of the slide area U1 and the outer edge of the peripheral area U2.
如图9所示,当d 2=0时,槽体402的槽口靠近外围区域U2外边缘的一侧已经与外围区域U2外边缘重合。此时,每个载片单元400U的至少一个表面开设有的槽体402实质为缺口槽。 As shown in FIG. 9, when d 2 =0, the side of the notch of the groove body 402 close to the outer edge of the peripheral area U2 has already overlapped with the outer edge of the peripheral area U2. At this time, the groove 402 provided on at least one surface of each slide unit 400U is substantially a notched groove.
示例性的,如图5所示,该载片单元400U可以看作含有一个载片单元400U的电极片。该载片单元400U的表面开设有槽体402。图5示出的外侧线条b1为槽体402的槽口靠近外围区域U2外边缘的一侧。由图5和图9可以看出:外侧线条b1与外围区域U2外边缘b2重合。外侧线条b1与外围区域U2外边缘b2之间的距离(即d 2)等于0。 Exemplarily, as shown in FIG. 5, the slide unit 400U can be regarded as an electrode sheet including one slide unit 400U. A groove 402 is formed on the surface of the slide unit 400U. The outer line b1 shown in FIG. 5 is the side of the notch of the groove body 402 close to the outer edge of the peripheral area U2. It can be seen from Fig. 5 and Fig. 9 that the outer line b1 coincides with the outer edge b2 of the peripheral area U2. The distance (ie, d 2 ) between the outer line b1 and the outer edge b2 of the peripheral area U2 is equal to zero.
如图5所示,当0<d 2<d时,槽体402的槽口靠近外围区域U2外边缘的一侧位于外围区域U2内。此时,每个载片单元400U的至少一个表面开设有的槽体402实质为凹槽。 As shown in FIG. 5, when 0<d 2 <d, the side of the slot of the groove body 402 that is close to the outer edge of the peripheral area U2 is located in the peripheral area U2. At this time, the groove 402 provided on at least one surface of each slide unit 400U is substantially a groove.
示例性的,如图5所示,该载片单元400U可以看作含有一个载片单元400U的电极片。该载片单元400U的表面开设有槽体402。图5示出的外侧线条b1为槽体402的槽口靠近外围区域U2外边缘的一侧。由图5可以看出:外侧线条b1与外围区域U2外边缘b2之间的距离(即d 2)大于0。 Exemplarily, as shown in FIG. 5, the slide unit 400U can be regarded as an electrode sheet including one slide unit 400U. A groove 402 is formed on the surface of the slide unit 400U. The outer line b1 shown in FIG. 5 is the side of the notch of the groove body 402 close to the outer edge of the peripheral area U2. It can be seen from FIG. 5 that the distance (ie, d 2 ) between the outer line b1 and the outer edge b2 of the peripheral area U2 is greater than zero.
作为一种可能的实现方式,如图6所示,本申请实施例提供的电极片应用于PECVD镀膜时,在第一电极片400A所挂设的第一硅片301和第二电极片400B所挂设的第二硅片302之间的距离R 1一定的情况下,第一电极片400A的表面开设的第一槽体402A越深,第一电极片400A的表面开设的第一槽体402A具有的槽底与第二电极片400B的表面开设的第二槽体402B具有的槽底之间的距离R 2也就越大。 As a possible implementation manner, as shown in FIG. 6, when the electrode sheet provided by the embodiment of the present application is applied to PECVD coating, the first silicon sheet 301 and the second electrode sheet 400B are hung on the first electrode sheet 400A. under certain circumstances a distance R between the second wafer 302 is hung, the surface of the first electrode tab 400A of the body defines a first groove 402A deeper surface of the first electrode tab 400A of the body defines a first groove 402A The distance R 2 between the groove bottom and the groove bottom of the second groove body 402B opened on the surface of the second electrode sheet 400B is greater.
由上可见,图7中每个载片单元400U的同一表面中,每个槽体402的深度D越深与槽体402抑制绕镀现象的能力呈正比关系。It can be seen from the above that on the same surface of each slide unit 400U in FIG. 7, the deeper the depth D of each groove body 402 is in direct proportion to the ability of the groove body 402 to suppress the plating phenomenon.
示例性的,如图7所示,每个载片单元400U的同一表面中,每个槽体402的深度D小于外围区域U2的最大厚度T,以防止槽体402穿透电极片,影响正常镀膜。应理解,由于外围区域U2开设有槽体402,使得外围区域U2的厚度最小区域是指为开设槽体的402的区域,因此,外围区域U2存在最大厚度和最小厚度之分。并且外围区域U2的最大厚度T与电极片的形状结构有着密不可分的关系,本领域技术人员可以根据实际电极片的形状结构确定外围区域U2的最大厚度。例如:电极片为板状电极片时,外围区域U2的最大厚度T与电极片的厚度相同。Exemplarily, as shown in FIG. 7, on the same surface of each slide unit 400U, the depth D of each groove body 402 is less than the maximum thickness T of the peripheral area U2, so as to prevent the groove body 402 from penetrating the electrode sheet and affecting normal operation. Coating. It should be understood that since the peripheral area U2 is provided with the groove body 402, the minimum thickness area of the peripheral area U2 refers to the area where the groove body 402 is opened. Therefore, the peripheral area U2 has a maximum thickness and a minimum thickness. In addition, the maximum thickness T of the peripheral area U2 has an inseparable relationship with the shape and structure of the electrode sheet. Those skilled in the art can determine the maximum thickness of the peripheral area U2 according to the actual shape and structure of the electrode sheet. For example, when the electrode sheet is a plate-shaped electrode sheet, the maximum thickness T of the peripheral area U2 is the same as the thickness of the electrode sheet.
图10和图11示出载片单元的两个表面开设的槽体相对位置示意图。如 图10和图11所示,对于同一载片单元400U来说,其具有相对的第一表面M1和第二表面M2,这两个表面均可以用于挂设硅片等基片。并且第一表面M1和第二表面M2均具有载片区域U1和外围区域U2。至于载片区域U1和外围区域U2的定义可以参考前文,此处不做限定。为了缓解挂设在两个表面的硅片绕镀问题,同一载片单元400U所具有的两个表面均开设有位于外围区域U2的槽体402。10 and 11 show schematic diagrams of the relative positions of the grooves provided on the two surfaces of the slide unit. As shown in FIG. 10 and FIG. 11, for the same slide unit 400U, it has a first surface M1 and a second surface M2 opposite to each other, and both surfaces can be used to mount substrates such as silicon wafers. And both the first surface M1 and the second surface M2 have a slide area U1 and a peripheral area U2. As for the definition of the slide area U1 and the peripheral area U2, reference may be made to the foregoing, which is not limited here. In order to alleviate the plating problem of the silicon wafers hanging on two surfaces, both surfaces of the same wafer carrier unit 400U are provided with grooves 402 located in the peripheral area U2.
图10示出本申请实施例中载片单元的两个表面开设的槽体相对位置示意图一。如图10所示,在载片单元400U中,如果第一表面M1开设的槽体402在第二表面M2所在平面的正投影与第二表面M2开设的槽体402不发生任何交叠,那么只要保证第一个表面开设的槽体402深度和第二表面M2开设的槽体402深度D小于外围区域U2的最大厚度T,以防止槽体402穿透电极片即可。例如:当电极片为板状电极片,电极片的厚度为2.0cm时,每个载片单元400U的同一表面中,每个槽体402的深度D大于或等于0.1mm且小于2.0cm。FIG. 10 shows the first schematic diagram of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the present application. As shown in FIG. 10, in the slide unit 400U, if the orthographic projection of the groove 402 opened on the first surface M1 on the plane where the second surface M2 is located does not overlap with the groove 402 opened on the second surface M2, then It is only necessary to ensure that the depth D of the groove body 402 opened on the first surface and the depth D of the groove body 402 opened on the second surface M2 are smaller than the maximum thickness T of the peripheral area U2 to prevent the groove body 402 from penetrating the electrode sheet. For example, when the electrode sheet is a plate-shaped electrode sheet, and the thickness of the electrode sheet is 2.0 cm, on the same surface of each slide unit 400U, the depth D of each groove body 402 is greater than or equal to 0.1 mm and less than 2.0 cm.
图11示出本申请实施例中载片单元的两个表面开设的槽体相对位置示意图二。如图11所示,在载片单元400U中,如果第一表面M1开设的槽体402在第二表面M2所在平面的正投影与第二表面M2开设的槽体402重合,那么每个载片单元400U的同一表面中,每个槽体402的深度D小于外围区域U2的最大厚度T的二分之一。此时,同一载片单元400U的两个表面开设的槽体402不会贯通,以保证在载片单元400U在挂设硅片的情况下,载片单元400U所具有的载片区域不容易因为硅片的牵拉作用发生损坏,从而使得硅片等基片表面成膜正常的情况下,缓解硅片等基片边缘绕镀问题。FIG. 11 shows the second schematic diagram of the relative position of the grooves formed on the two surfaces of the slide unit in the embodiment of the present application. As shown in FIG. 11, in the slide unit 400U, if the orthographic projection of the slot 402 opened on the first surface M1 on the plane of the second surface M2 coincides with the slot 402 opened on the second surface M2, then each slide On the same surface of the unit 400U, the depth D of each groove body 402 is less than half of the maximum thickness T of the peripheral area U2. At this time, the grooves 402 provided on the two surfaces of the same slide unit 400U will not penetrate, so as to ensure that when the slide unit 400U is mounted with silicon wafers, the slide area of the slide unit 400U is not easy to The pulling action of the silicon wafer is damaged, so that when the surface of the substrate such as the silicon wafer is normal, the problem of plating around the edge of the substrate such as the silicon wafer is alleviated.
例如:如图4和图7所示,当电极片400为板状电极片,且电极片400的厚度为2cm时,如果载片单元的两个表面所开设的槽体402位置一样。此时,每个载片单元400U的同一表面中,每个槽体402的深度D大于或等于0.1mm且小于1.0cm。此时,电极片400的两个表面开设在同一位置的槽体402不会贯通。For example, as shown in FIGS. 4 and 7, when the electrode sheet 400 is a plate-shaped electrode sheet and the thickness of the electrode sheet 400 is 2 cm, if the positions of the slots 402 opened on the two surfaces of the slide unit are the same. At this time, on the same surface of each slide unit 400U, the depth D of each groove body 402 is greater than or equal to 0.1 mm and less than 1.0 cm. At this time, the groove body 402 opened at the same position on the two surfaces of the electrode sheet 400 will not penetrate.
如图11所示,当每个槽体402的深度D小于外围区域U2的最大厚度T的二分之一时,如果同一载片单元400U两个表面所开设的槽体402过深, 那么在受到作用力的情况下,图11所示的载片单元400U中,第一表面M1和第二表面M2开设的槽体402之间的隔层404很容易裂开,甚至脱落,进而影响镀膜效果。As shown in FIG. 11, when the depth D of each groove body 402 is less than one-half of the maximum thickness T of the peripheral area U2, if the groove bodies 402 opened on the two surfaces of the same slide unit 400U are too deep, then Under the condition of force, in the slide unit 400U shown in FIG. 11, the barrier 404 between the grooves 402 opened on the first surface M1 and the second surface M2 is easy to crack or even fall off, thereby affecting the coating effect .
示例性的,每个槽体402的深度D可以为0.3mm~0.7mm。例如:每个槽体402的深度D可以为0.3mm、0.7mm或0.5mm。这种情况下,每个槽体402可以在保证电极片结构强度的情况下正常镀膜,并有效抑制绕镀问题。Exemplarily, the depth D of each groove body 402 may be 0.3 mm to 0.7 mm. For example, the depth D of each trough body 402 can be 0.3 mm, 0.7 mm or 0.5 mm. In this case, each tank body 402 can be plated normally while ensuring the structural strength of the electrode sheet, and effectively suppress the winding plating problem.
示例性的,如图5和图7所示,当内侧线条a1与外侧线条b1的距离(即槽体402的槽口宽度)d 0=6mm,槽体402的深度D为5mm,内侧线段a1与载片区域U1的外边缘a2距离d 1=0.01mm时,槽体402既不会对电极片结构强度造成过大的影响,也能够有效抑制硅片等基片的边缘绕镀现象。 Exemplarily, as shown in FIGS. 5 and 7, when the distance between the inner line a1 and the outer line b1 (that is, the notch width of the groove body 402) d 0 =6 mm, the depth D of the groove body 402 is 5 mm, and the inner line segment a1 When the distance d 1 from the outer edge a2 of the slide area U1 is equal to 0.01 mm, the groove body 402 will not have an excessive influence on the structural strength of the electrode sheet, and it can also effectively suppress the edge plating phenomenon of silicon wafers and other substrates.
作为一种可能的实现方式,图12和图13示出本申请实施例中相邻两个载片单元的两种结构关系示意图。如图12和图13所示,当至少一个载片单元400U包括至少两个载片单元400U时,相邻两个载片单元400U的同一表面所开设的槽体402连成一体,以进一步减少电极片400的重量。As a possible implementation manner, FIGS. 12 and 13 show schematic diagrams of two structural relationships between two adjacent slide units in an embodiment of the present application. As shown in Figures 12 and 13, when at least one slide unit 400U includes at least two slide units 400U, the grooves 402 opened on the same surface of two adjacent slide units 400U are connected as a whole to further reduce The weight of the electrode sheet 400.
作为一种可能的实现方式,如图5所示,至少一个槽体402包括环状槽体。该环状槽体绕设在载片区域U1的周向。环状槽体可以为环状凹槽或环状缺口槽,当然还可以时其他未列出的槽型。此时整个载片区域U1被环状槽体包围,使得在表面成膜的过程中,环状槽体可以缓解硅片等基片周向各个方位的边缘绕镀问题。此处环状槽体为广义上的槽体,不仅可以为圆环槽体,规则多边形环状槽体或不规则多边形环状槽体。规则多边形环状槽体是指环状槽体的走向围成的形状为规则多边形,规则多边形可以为三角形、长方形、正方形、正六边形等规则多边形。不规则多边形环状槽体是指环状槽体的走向围成的形状为不规则多边形。至于环状槽体的形状选择可以根据载片区域U1的形状决定。当环状槽体的形状与载片区域U1的形状一致的情况下,二者的尺寸差异越小,环状槽体越靠近载片区域U1,环状槽体抑制硅片等基片边缘绕镀现象的效果也就越好。As a possible implementation manner, as shown in FIG. 5, at least one groove body 402 includes an annular groove body. The annular groove is arranged around the circumference of the slide area U1. The annular groove body can be an annular groove or an annular notched groove, of course, it can also be other groove types not listed. At this time, the entire slide area U1 is surrounded by the ring-shaped groove, so that the ring-shaped groove can alleviate the problem of plating around the edges of the silicon wafer and other substrates in the circumferential direction during the film formation process. Here, the annular groove body is a groove body in a broad sense, and it can be not only an annular groove body, a regular polygonal annular groove body or an irregular polygonal annular groove body. The regular polygonal annular trough means that the shape enclosed by the direction of the annular trough is a regular polygon, and the regular polygon can be a regular polygon such as a triangle, a rectangle, a square, and a regular hexagon. Irregular polygonal annular groove means that the shape enclosed by the direction of the annular groove is an irregular polygon. The choice of the shape of the annular groove can be determined according to the shape of the slide area U1. When the shape of the annular groove is the same as the shape of the carrier area U1, the smaller the size difference between the two, the closer the annular groove is to the carrier area U1, and the annular groove prevents the edge of the substrate such as silicon wafers from wrapping around. The effect of the plating phenomenon is also better.
示例性的,图12示出本申请实施例中相邻两个载片单元的第一种结构关系示意图。如图12所示,当相邻两个载片单元400U的同一表面所开设的槽体402为环状凹槽时,相邻两个载片单元400U的同一表面所开设的槽体 402连成一体后,连成一体的槽体402均以图12所示的凹槽的形式展现。Exemplarily, FIG. 12 shows a schematic diagram of a first structural relationship between two adjacent slide units in an embodiment of the present application. As shown in FIG. 12, when the grooves 402 opened on the same surface of two adjacent slide units 400U are annular grooves, the grooves 402 provided on the same surface of two adjacent slide units 400U are connected to form After being integrated, the connected groove bodies 402 are all displayed in the form of grooves as shown in FIG. 12.
图13示出本申请实施例中相邻两个载片单元的第二种结构关系示意图。如图13所示,当相邻两个载片单元400U的同一表面所开设的槽体402为环状缺口槽时,相邻两个载片单元400U的同一表面所开设的槽体402连成一体后,连成一体的槽体402均以图13所示的缺口槽的形式展现。FIG. 13 shows a schematic diagram of a second structure relationship between two adjacent slide units in an embodiment of the present application. As shown in FIG. 13, when the grooves 402 opened on the same surface of two adjacent slide units 400U are annular notched grooves, the grooves 402 opened on the same surface of two adjacent slide units 400U are connected to form After being integrated, the connected groove bodies 402 are all displayed in the form of notched grooves as shown in FIG. 13.
作为一种可能的实现方式,图14~图16所示出的载片单元400U的同一表面。至少一个槽体402包括多个槽体。多个槽体402绕设在载片区域U1的周向,使得在表面成膜的过程中,多个槽体402可以缓解基片边缘多个位置的绕镀问题。As a possible implementation manner, the same surface of the slide unit 400U shown in FIGS. 14 to 16. The at least one tank 402 includes a plurality of tanks. The multiple grooves 402 are arranged around the circumference of the slide area U1, so that during the surface film formation process, the multiple grooves 402 can alleviate the plating problem at multiple locations on the edge of the substrate.
在一种示例中,图14示出本申请实施例中载片单元开设的多个槽体连通结构示意图。如图14所示,对于同一载片单元400U的同一表面,多个槽体402连成一体。In an example, FIG. 14 shows a schematic diagram of a communication structure of a plurality of slots provided in a slide unit in an embodiment of the present application. As shown in FIG. 14, for the same surface of the same slide unit 400U, a plurality of trough bodies 402 are connected as a whole.
例如:相邻两个槽体402通过一条开口比较小的连通槽405(相对于槽体402的槽口宽度)连通。又例如:如图5所示,相邻两个槽体402可以直接接合在一起,实现多个槽体402连通彼此连通。此时连成一体的槽体402可以看作前文所描述的环状槽体402(如图5、图8或图9)。For example, two adjacent groove bodies 402 are connected through a communicating groove 405 with a relatively small opening (relative to the groove width of the groove body 402). For another example, as shown in FIG. 5, two adjacent tank bodies 402 can be directly joined together to realize that a plurality of tank bodies 402 communicate with each other. At this time, the integrated tank body 402 can be regarded as the annular tank body 402 described above (as shown in FIG. 5, FIG. 8 or FIG. 9).
在另一种示例中,图15示出本申请实施例中多个槽体间隔分布的第一种结构示意图。图16示出本申请实施例中多个槽体间隔分布的第二种结构示意图。如图15和图16所示,对于同一载片单元400U的同一表面,相邻两个槽体402之间具有间隔。此时,在表面成膜的过程中,多个槽体402可以缓解硅片等基片边缘具有的多个位置的绕镀问题。In another example, FIG. 15 shows a first structural schematic diagram in which a plurality of groove bodies are distributed at intervals in an embodiment of the present application. FIG. 16 shows a schematic diagram of a second structure in which a plurality of slots are distributed at intervals in an embodiment of the present application. As shown in FIGS. 15 and 16, for the same surface of the same slide unit 400U, there is a space between two adjacent grooves 402. At this time, in the process of forming a film on the surface, the multiple grooves 402 can alleviate the plating problem at multiple locations on the edge of the substrate such as a silicon wafer.
如图15所示,从槽体走向的角度来说,当相邻两个槽体402之间具有间隔时,各个槽体402独立,至于每个槽体402的走向,则可以为直线走向槽体、曲线走向槽体或折线走向槽体。曲线走向槽体可以为弧线走向槽体,也可以为波浪线走向槽体。As shown in Figure 15, from the perspective of the trough body direction, when there is a gap between two adjacent trough bodies 402, each trough body 402 is independent. As for the trough body 402, the trough body 402 can be a straight groove. The body, the curve goes towards the trough body or the broken line goes towards the trough body. The curved trough body can be arc-directed trough body or wavy-directed trough body.
如图5、图7、图8和图16所示,对于同一载片单元400U的同一表面,不管是至少一个槽体402包括环状槽体还是包括多个槽体402,从槽型的角度来说,这些槽体均可以为缺口槽或凹槽。此处缺口槽是指具有缺口面的缺口槽。并且,多个槽体402的槽型相同或者部分相同。当然多个槽体的槽型 都不相同。As shown in Figure 5, Figure 7, Figure 8 and Figure 16, for the same surface of the same slide unit 400U, whether at least one tank 402 includes an annular tank or a plurality of tanks 402, from the perspective of the groove shape In other words, all of these grooves can be notched grooves or grooves. The notched groove here refers to a notched groove with a notched surface. In addition, the groove shapes of the plurality of groove bodies 402 are the same or partly the same. Of course, the groove shapes of multiple tanks are different.
例如:图16中多个槽体402绕设在载片区域的周向。如图16所示,从槽型上来分,有些槽体402为凹槽,有些槽体402为缺口槽。从槽体走向上来分,有些槽体402为线性走向槽体,有些槽体402为直角状走向槽体。For example, in FIG. 16, a plurality of grooves 402 are arranged around the circumference of the slide area. As shown in FIG. 16, from the groove type, some groove bodies 402 are grooves, and some groove bodies 402 are notched grooves. From the top of the trough direction, some trough bodies 402 are linearly oriented trough bodies, and some trough bodies 402 are oriented trough bodies at right angles.
本申请实施例还提供一种载片器。该载片器包括至少一个上述实施例描述的电极片。The embodiment of the present application also provides a slide carrier. The slide carrier includes at least one electrode pad described in the above embodiment.
与现有技术相比,本申请实施例提供的载片器的有益效果与上述实施例描述的电极片的有益效果相同,此处不做赘述。Compared with the prior art, the beneficial effects of the slide carrier provided in the embodiments of the present application are the same as the beneficial effects of the electrode sheets described in the foregoing embodiments, and will not be repeated here.
在实际应用中,上述载片器可以为石墨舟,也可以为其他材质的载片器,只要其中所使用的多个电极片中至少一个电极片为上述实施例描述的电极片即可。In practical applications, the above-mentioned slide holder may be a graphite boat or a slide holder of other materials, as long as at least one of the plurality of electrode plates used therein is the electrode plate described in the above embodiment.
本申请实施例还提供一种镀膜系统。该镀膜系统包括镀膜设备和上述实施例描述的载片器。该镀膜设备具有用于镀膜的镀膜腔,当镀膜系统处在镀膜状态时,载片器位于镀膜腔内。The embodiment of the present application also provides a coating system. The coating system includes a coating equipment and the slide carrier described in the above embodiments. The coating equipment has a coating chamber for coating. When the coating system is in the coating state, the film carrier is located in the coating chamber.
与现有技术相比,本申请实施例提供的镀膜系统的有益效果与上述实施例描述的电极片的有益效果相同,此处不做赘述。Compared with the prior art, the beneficial effects of the coating system provided by the embodiments of the present application are the same as the beneficial effects of the electrode plates described in the foregoing embodiments, and will not be repeated here.
在实际应用中,上述镀膜系统可以参考图1所示的镀膜系统。镀膜设备可以为图1所示的PECVD镀膜设备。镀膜腔可以为图1所示的石英管,载片器位于石英管内。当然镀膜腔也可以其他导热性良好的耐压管,此处不再一一介绍。至于PECVD镀膜设备可以参考前文描述。In practical applications, the above-mentioned coating system can refer to the coating system shown in FIG. 1. The coating equipment can be the PECVD coating equipment shown in FIG. 1. The coating chamber can be a quartz tube as shown in Fig. 1, and the carrier is located in the quartz tube. Of course, the coating chamber can also be other pressure-resistant tubes with good thermal conductivity, which will not be introduced here. As for the PECVD coating equipment, please refer to the previous description.
在上述实施方式的描述中,具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。In the description of the foregoing embodiments, specific features, structures, materials, or characteristics may be combined in any one or more embodiments or examples in an appropriate manner.
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。The above are only specific implementations of this application, but the protection scope of this application is not limited to this. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in this application. Should be covered within the scope of protection of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims (10)

  1. 一种电极片,其特征在于,包括:An electrode sheet, characterized in that it comprises:
    至少一个载片单元,每个所述载片单元的至少一个表面具有载片区域和外围区域,所述外围区域位于所述载片区域的周向;At least one slide unit, at least one surface of each slide unit has a slide area and a peripheral area, and the peripheral area is located in a circumferential direction of the slide area;
    每个所述载片单元的至少一个表面开设有用于抑制绕镀现象的至少一个槽体,所述至少一个槽体位于所述外围区域。At least one groove for suppressing the plating phenomenon is opened on at least one surface of each of the slide units, and the at least one groove is located in the peripheral area.
  2. 根据权利要求1所述的电极片,其特征在于,每个所述载片单元的同一表面中,所述槽体的槽口靠近载片区域外边缘的一侧与所述载片区域的外边缘距离d 1大于或等于0;和/或, The electrode sheet according to claim 1, wherein on the same surface of each of the slide units, the notch of the groove body is close to the outer edge of the slide area and the outer edge of the slide area. The edge distance d 1 is greater than or equal to 0; and/or,
    每个所述载片单元的同一表面中,所述槽体的槽口靠近外围区域外边缘的一侧与所述外围区域的外边缘距离d 2大于或等于0且小于d,d为所述载片区域的外边缘与所述外围区域的外边缘的距离。 On the same surface of each of the slide units, the distance d 2 between the side of the slot of the groove near the outer edge of the peripheral area and the outer edge of the peripheral area is greater than or equal to 0 and less than d, where d is the The distance between the outer edge of the slide area and the outer edge of the peripheral area.
  3. 根据权利要求1所述的电极片,其特征在于,每个所述载片单元的同一表面中,所述载片区域的外边缘与所述外围区域的外边缘的距离为d,d=d 0+d 1+d 2,d 0为所述槽体的槽口靠近载片区域外边缘的一侧与靠近外围区域外边缘的一侧的距离,d 1为每个所述载片单元的同一表面中,所述槽体的槽口靠近载片区域外边缘的一侧与所述载片区域的外边缘距离,d 2为每个所述载片单元的同一表面中,所述槽体的槽口靠近外围区域外边缘的一侧与所述外围区域的外边缘距离。 The electrode sheet according to claim 1, wherein, on the same surface of each of the slide units, the distance between the outer edge of the slide area and the outer edge of the peripheral area is d, d=d 0 + d 1 + d 2 , d 0 is the distance between the side of the notch of the groove body near the outer edge of the slide area and the side near the outer edge of the peripheral area, and d 1 is the distance of each slide unit In the same surface, the distance between the side of the slot of the groove body near the outer edge of the slide area and the outer edge of the slide area, d 2 is the same surface of each slide unit, the groove body The side of the notch near the outer edge of the peripheral area is at a distance from the outer edge of the peripheral area.
  4. 根据权利要求1所述的电极片,其特征在于,每个所述载片单元的同一表面中,所述槽体的槽口靠近载片区域的一侧与所述载片区域的外边缘距离d 1=0.01mm~0.5mm;和/或, The electrode sheet according to claim 1, wherein, on the same surface of each of the slide units, the notch of the groove body is close to the slide area at a distance from the outer edge of the slide area d 1 =0.01mm~0.5mm; and/or,
    每个所述载片单元的同一表面中,所述槽体的槽口靠近载片区域外边缘的一侧与靠近外围区域外边缘的一侧的距离d 0为0.1mm-15mm。 On the same surface of each of the slide units, the distance d 0 between the side of the notch of the groove body close to the outer edge of the slide area and the side close to the outer edge of the peripheral area is 0.1mm-15mm.
  5. 根据权利要求1所述的电极片,其特征在于,每个所述载片单元的同一表面中,每个所述槽体的深度D小于所述外围区域的最大厚度T;或,The electrode sheet according to claim 1, wherein in the same surface of each of the slide units, the depth D of each of the grooves is less than the maximum thickness T of the peripheral area; or,
    每个所述载片单元的同一表面中,每个所述槽体的深度D小于所述外围 区域的最大厚度T的二分之一。On the same surface of each slide unit, the depth D of each groove is less than half of the maximum thickness T of the peripheral area.
  6. 根据权利要求1~5任一项所述的电极片,其特征在于,所述至少一个载片单元包括至少两个载片单元;相邻两个所述载片单元的同一表面所开设的槽体连成一体;或,The electrode sheet according to any one of claims 1 to 5, wherein the at least one slide unit includes at least two slide units; grooves formed on the same surface of two adjacent slide units The body becomes one; or,
    所述至少一个槽体包括环状槽体,所述环状槽体绕设在所述载片区域的周向。The at least one groove body includes an annular groove body, and the annular groove body is arranged around the circumference of the slide area.
  7. 根据权利要求1~5任一项所述的电极片,其特征在于,所述至少一个槽体包括多个槽体,多个所述槽体绕设在所述载片区域的周向。The electrode sheet according to any one of claims 1 to 5, wherein the at least one groove body comprises a plurality of groove bodies, and the plurality of groove bodies are arranged around the circumference of the carrier region.
  8. 根据权利要求7所述的电极片,其特征在于,所述多个槽体中的至少一个为凹槽或缺口槽。8. The electrode sheet according to claim 7, wherein at least one of the plurality of groove bodies is a groove or a notch groove.
  9. 一种载片器,其特征在于,包括至少一个权利要求1~8任一项所述电极片。A slide carrier, characterized by comprising at least one electrode sheet according to any one of claims 1-8.
  10. 一种镀膜系统,其特征在于,包括镀膜设备和权利要求9所述载片器,所述镀膜设备具有用于镀膜的镀膜腔;A coating system, characterized by comprising a coating equipment and the slide carrier according to claim 9, the coating equipment having a coating cavity for coating;
    所述镀膜系统处在镀膜状态时,所述载片器位于所述镀膜腔内。When the coating system is in the coating state, the slide carrier is located in the coating cavity.
PCT/CN2020/100197 2020-01-20 2020-07-03 Electrode piece, carrier, and coating system WO2021147255A1 (en)

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CN113130359A (en) * 2021-04-09 2021-07-16 深圳市捷佳伟创新能源装备股份有限公司 Tray and slide glass device

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JPH06283439A (en) * 1993-03-29 1994-10-07 Nissin Electric Co Ltd Substrate holder and plasma treatment device
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CN209418475U (en) * 2019-04-01 2019-09-20 盐城阿特斯协鑫阳光电力科技有限公司 A kind of graphite boat boat piece, graphite boat and silicon chip film-coated equipment

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JPH06283439A (en) * 1993-03-29 1994-10-07 Nissin Electric Co Ltd Substrate holder and plasma treatment device
CN108475653A (en) * 2015-11-18 2018-08-31 商先创国际股份有限公司 Wafer boat and apparatus for processing plasma for chip
CN106929828A (en) * 2017-05-12 2017-07-07 中国工程物理研究院应用电子学研究所 A kind of chip bench that diamond film is prepared for MPCVD method
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