WO2021147040A1

WO2021147040A1 - Integrated circuit

Info

Publication number: WO2021147040A1
Application number: PCT/CN2020/073912
Authority: WO
Inventors: 胡俊伟; 彭嵘
Original assignee: 华为技术有限公司
Priority date: 2020-01-22
Filing date: 2020-01-22
Publication date: 2021-07-29
Also published as: CN114982076B; CN114982076A

Abstract

Provided is an integrated circuit, which relates to the technical field of electronics, and is used for reducing the area of an integrated circuit occupied by a transmission line switch. A transmission line switch is provided in the integrated circuit. The transmission line switch is provided with a positive-phase differential input port, a negative-phase differential input port, a first positive-phase differential output port, a first negative-phase differential output port, a second positive-phase differential output port, and a second negative-phase differential output port. The transmission line switch is provided with a first coil and a second coil, which are coupled to each other, and a third coil and a fourth coil, which are coupled to each other. The positive-phase differential input port is arranged at one end of the first coil and the third coil, the negative-phase differential input port is arranged at one end of the second coil and the fourth coil, the first positive-phase differential output port and the first negative-phase differential output port are respectively arranged at the other end of the first coil and the second coil, and the second positive-phase differential output port and the second negative-phase differential output port are respectively arranged at the other end of the third coil and the fourth coil.

Description

An integrated circuit

Technical field

This application relates to the field of electronic technology, in particular to an integrated circuit.

Background technique

Microwave usually refers to electromagnetic waves with a wavelength of 1 m to 1 mm and a corresponding frequency range of 300 MHz to 300 GHz. Microwave communication refers to a wireless communication method that uses microwaves as a carrier to carry information and transmit it through space waves. Single pole double throw (SPDT) switches are widely used in microwave communication equipment, and are usually used to switch signal flow in microwave communication equipment. The SPDT includes two paths sharing one input terminal, each path corresponds to an output terminal, and the input signal can switch the signal flow direction through the switching states of the two paths.

In the prior art, the principle of microstrip transmission line is usually used to design SPDT. As shown in Figure 1, the SDPT includes a first channel transmission line and a second channel transmission line. The output end of each channel transmission line is connected to the ground terminal through a switch. The switching function of SPDT can be realized through the impedance change characteristics of the transmission line in each channel. IN in Figure 1 represents the input terminal, and OUT1 and OUT2 represent the two output terminals. The SPDT based on the principle of the microstrip transmission line is a single-port SPDT. Two microstrip transmission lines are routed on a shared ground plane. In an integrated circuit, two microstrip transmission lines and a shared ground plane need to be implemented at the same time.

In order to transmit quasi-transverse electric and magnetic (TEM) waves, SPDT in this way also achieves a specific port impedance. It has a certain degree of line width for the microstrip transmission line and the distance between the microstrip transmission line and the ground plane. Therefore, the area occupied by the integrated circuit is relatively large.

Summary of the invention

This application provides an integrated circuit for reducing the area in the integrated circuit occupied by the SPDT.

In order to achieve the above objectives, this application adopts the following technical solutions:

In a first aspect, an integrated circuit is provided, including: the integrated circuit is provided with a transmission line switch, for example, the transmission line switch may be a single-pole double-throw switch SPDT; the transmission line switch is provided with a positive-phase differential input port and a negative-phase differential input Port, the first positive-phase differential output port, the first negative-phase differential output port, the second positive-phase differential output port and the second negative-phase differential output port; the transmission line switch is provided with a first coil and a second coil coupled to each other , And the third coil and the fourth coil coupled to each other; the positive phase differential input port is set at one end of the first coil and the third coil, the negative phase differential input port is set at one end of the second coil and the fourth coil, the first positive The phase differential output port and the first negative phase differential output port are respectively arranged on the other end of the first coil and the second coil, and the second positive phase differential output port and the second negative phase differential output port are respectively arranged on the third coil and the fourth coil. The other end of the coil.

In the above technical solution, the mutual coupling of the first coil and the second coil can be used as the first path of the transmission line switch, and the mutual coupling of the third coil and the fourth coil can be used as the second path of the transmission line switch. Four coils realize the design of a six-port differential transmission line switch. At the same time, the first coil and the second coil, the third coil and the fourth coil are respectively implemented as two sets of two-wire transmission lines. There is no need to set a ground plane, which eliminates the limitation of the ground plane on the integrated circuit, thereby reducing the switch on the transmission line. The area in an integrated circuit.

In a possible implementation of the first aspect, the first coil and the second coil are nested with each other and have the same number of turns. In the foregoing possible implementation manners, the performance of the two-wire transmission line composed of the first coil and the second coil can be optimized.

In a possible implementation of the first aspect, the line widths of the first coil and the second coil are the same. In the foregoing possible implementation manners, the coupling performance of the first coil and the second coil can be improved.

In a possible implementation of the first aspect, the coupling gap between the first coil and the second coil is kept constant. In the foregoing possible implementation manners, it can be ensured that the electrical coupling amount at any position when the first coil and the second coil are coupled to each other is the same, thereby ensuring the continuity of the port impedance.

In a possible implementation of the first aspect, the third coil and the fourth coil are nested with each other and have the same number of turns. In the foregoing possible implementation manners, the performance of the two-wire transmission line composed of the third coil and the fourth coil can be optimized.

In a possible implementation of the first aspect, the line width of the third coil and the fourth coil are the same. In the foregoing possible implementation manners, the coupling performance of the third coil and the fourth coil can be improved.

In a possible implementation of the first aspect, the coupling gap between the third coil and the fourth coil is kept constant. In the foregoing possible implementation manner, it can be ensured that the electrical coupling amount at any position when the third coil and the fourth coil are coupled to each other is the same, thereby ensuring the continuity of the port impedance.

In a possible implementation of the first aspect, the first coil and the second coil respectively have a via hole, and the first coil and the second coil are coupled to each other through the via hole on the same metal layer. In the foregoing possible implementation manners, the area of the integrated circuit occupied when the first coil and the second coil are wired can be reduced.

In a possible implementation of the first aspect, the third coil and the fourth coil respectively have a via hole, and the third coil and the fourth coil are coupled to each other through the via hole on the same metal layer. In the foregoing possible implementation manners, the area of the integrated circuit occupied when the third coil and the fourth coil are wired can be reduced.

In a possible implementation of the first aspect, the first coil and the second coil are symmetrically arranged with the third coil and the fourth coil and are located on the same metal layer. In the above possible implementation manner, the symmetry of the two sets of two-wire transmission lines can be improved, thereby optimizing the coupling performance of the two sets of two-wire transmission lines.

In a possible implementation of the first aspect, the number of turns of the first coil, the second coil, the third coil, and the fourth coil is the same. In the above possible implementation manner, the symmetry of the two sets of two-wire transmission lines can be improved, thereby optimizing the coupling performance of the two sets of two-wire transmission lines.

In a possible implementation of the first aspect, the first positive-phase differential output port is grounded through the first switch, the first negative-phase differential output port is grounded through the second switch, and the second positive-phase differential output port is grounded through the third switch. Ground, the second negative phase differential output port is grounded through the fourth switch. In the above possible implementations, the first switch and the second switch are linked, and the third switch and the fourth switch are linked. The opening or closing of the first switch and the second switch, and the connection between the third switch and the fourth switch can be adjusted. Open or close, realize the switching of different paths of the transmission line switch, and the transmission error is small at the same time.

In a possible implementation of the first aspect, the integrated circuit is provided with at least one channel, each of the at least one channel includes at least one transmission line switch, a receiving path, and a transmitting path, and the at least one transmission line switch includes a first Transmission line switch; the positive phase differential input port and negative phase differential input port of the first transmission line switch are used for coupling with the differential port of the antenna, and the first positive phase differential output port and the first negative phase differential output port of the first transmission line switch are connected to the receiver The differential receiving port of the channel is coupled, and the second positive-phase differential output port and the second negative-phase differential output port of the first transmission line switch are coupled with the differential transmitting port of the transmitting channel. In the above possible implementation manners, the provided TDD system can reduce the area of the integrated circuit.

In a possible implementation of the first aspect, at least one channel includes at least two channels, at least two channels are coupled by a combiner, at least one transmission line switch further includes a second transmission line switch, and the positive phase difference of the second transmission line switch The sub-input port and the negative-phase differential input port are coupled with the differential input port of the combiner, the first positive-phase differential output port and the first negative-phase differential output port of the second transmission line switch are coupled with the differential transmitting port of the receiving path, and the second The second positive-phase differential output port and the second negative-phase differential output port of the transmission line switch are coupled with the differential receiving port of the transmission path. In the above possible implementation manners, the area of the TDD phased array system in the integrated circuit can be reduced.

In a possible implementation of the first aspect, each channel further includes a phase shifter, and the receiving channel and the transmitting channel in the channel share the phase shifter. In the foregoing possible implementation manners, the receiving path and the transmitting path in each channel share a phase shifter, which can reduce the area of the TDD phased array system in the integrated circuit.

In a possible implementation of the first aspect, the integrated circuit further includes a transmitter including a third transmission line switch, an up-conversion converter, and a down-conversion converter; wherein the differential output port of the combiner is connected to the The positive phase differential input port and the negative phase differential input port of the third SPDT are coupled, the first positive phase differential output port and the first negative phase differential output port of the third transmission line switch are coupled with the differential input port of the upconverter, and the third The second positive phase differential output port and the second negative phase differential output port of the transmission line switch are coupled with the differential input port of the down converter.

In a possible implementation of the first aspect, the receiving path of each channel includes at least one of the following: a low noise amplifier, an adjustable gain amplifier, and an amplifier; the transmitting path of each channel includes at least one of the following: a power amplifier, an adjustable gain amplifier, and an amplifier; Gain amplifier and amplifier.

In a second aspect, a communication device is provided. The communication device is a base station or a terminal. The communication device includes an integrated circuit in which a transmission line switch is provided; the transmission line switch is provided with a positive phase differential input port and a negative phase differential input Port, the first positive-phase differential output port, the first negative-phase differential output port, the second positive-phase differential output port and the second negative-phase differential output port; the transmission line switch is provided with a first coil and a second coil coupled to each other , And the third coil and the fourth coil coupled to each other; the positive phase differential input port is set at one end of the first coil and the third coil, the negative phase differential input port is set at one end of the second coil and the fourth coil, the first positive The phase differential output port and the first negative phase differential output port are respectively arranged on the other end of the first coil and the second coil, and the second positive phase differential output port and the second negative phase differential output port are respectively arranged on the third coil and the fourth coil. The other end of the coil.

In a possible implementation of the second aspect, the first coil and the second coil are nested with each other with the same number of turns; and/or, the line width of the first coil and the second coil are the same; and/or, the first coil The coupling gap between the coil and the second coil remains constant.

In a possible implementation of the second aspect, the third coil and the fourth coil are nested with each other with the same number of turns; and/or, the line width of the third coil and the fourth coil are the same; and/or, the third coil The coupling gap between the coil and the fourth coil remains constant.

In a possible implementation of the second aspect, the first coil and the second coil respectively have via holes, and the first coil and the second coil are coupled to each other through the via holes on the same metal layer; and/or, the third coil The fourth coil and the fourth coil respectively have a via hole, and the third coil and the fourth coil are coupled to each other through the via hole on the same metal layer.

In a possible implementation of the second aspect, the first coil and the second coil are symmetrically arranged with the third coil and the fourth coil and are located on the same metal layer; and/or, the first coil, the second coil, and the The number of turns of the third coil and the fourth coil is the same. In the above possible implementation manner, the symmetry of the two sets of two-wire transmission lines can be improved, thereby optimizing the coupling performance of the two sets of two-wire transmission lines.

In a possible implementation of the second aspect, the first positive-phase differential output port is grounded through the first switch, the first negative-phase differential output port is grounded through the second switch, and the second positive-phase differential output port is grounded through the third switch. Ground, the second negative phase differential output port is grounded through the fourth switch.

In a possible implementation of the second aspect, the integrated circuit is provided with at least one channel, each of the at least one channel includes at least one transmission line switch, a receiving path, and a transmitting path, and the at least one transmission line switch includes a first Transmission line switch; the positive phase differential input port and negative phase differential input port of the first transmission line switch are used for coupling with the differential port of the antenna, and the first positive phase differential output port and the first negative phase differential output port of the first transmission line switch are connected to the receiver The differential receiving port of the channel is coupled, and the second positive-phase differential output port and the second negative-phase differential output port of the first transmission line switch are coupled with the differential transmitting port of the transmitting channel.

In a possible implementation of the second aspect, at least one channel includes at least two channels, at least two channels are coupled by a combiner, at least one transmission line switch further includes a second transmission line switch, and the positive phase difference of the second transmission line switch The sub-input port and the negative-phase differential input port are coupled with the differential input port of the combiner, the first positive-phase differential output port and the first negative-phase differential output port of the second transmission line switch are coupled with the differential transmitting port of the receiving path, and the second The second positive-phase differential output port and the second negative-phase differential output port of the transmission line switch are coupled with the differential receiving port of the transmission path.

In a possible implementation of the second aspect, each channel further includes a phase shifter, and the receiving channel and the transmitting channel in the channel share the phase shifter.

In a possible implementation of the second aspect, a transmitter is further included, and the transmitter includes a third transmission line switch, an up-conversion converter, and a down-conversion converter; wherein the differential output port of the combiner is connected to the third transmission line The positive phase differential input port and the negative phase differential input port of the switch are coupled, the first positive phase differential output port and the first negative phase differential output port of the third transmission line switch are coupled with the differential input port of the upconverter, and the third transmission line switch The second positive-phase differential output port and the second negative-phase differential output port are coupled with the differential input port of the down converter.

In a possible implementation of the second aspect, the receiving path of each channel includes at least one of the following: a low noise amplifier, an adjustable gain amplifier, and an amplifier; the transmitting path of each channel includes at least one of the following: a power amplifier, Gain-tuning amplifiers and amplifiers.

In a third aspect, a non-transitory computer-readable medium for use with a computer is provided. The computer has software for creating integrated circuits, and the computer-readable medium stores one or more computer-readable data structures, one or more Each computer-readable data structure has photomask data used to manufacture the above-mentioned first aspect or the integrated circuit provided by any possible implementation of the first aspect.

It is understandable that any of the above-provided communication devices and non-transitory computer-readable media used with computers include the integrated circuits provided above. Therefore, the beneficial effects that can be achieved can be referred to the above The beneficial effects of the provided corresponding integrated circuits will not be repeated here.

Description of the drawings

Figure 1 is a schematic diagram of the structure of an SPDT;

FIG. 2 is a schematic diagram of a two-wire transmission line provided by an embodiment of the application;

FIG. 3 is a schematic structural diagram of an integrated circuit provided by an embodiment of the application;

4 is a schematic structural diagram of another integrated circuit provided by an embodiment of the application;

FIG. 5 is a schematic structural diagram of yet another integrated circuit provided by an embodiment of the application;

6 is a schematic circuit diagram of a transmission line switch provided by an embodiment of the application;

FIG. 7 is a schematic diagram of a simulation result of a transmission line switch provided by an embodiment of the application;

FIG. 8 is a schematic structural diagram of a TDD system provided by an embodiment of this application;

FIG. 9 is a schematic structural diagram of another TDD system provided by an embodiment of the application.

Detailed ways

The production and use of each embodiment will be discussed in detail below. However, it should be understood that many applicable inventive concepts provided in this application can be implemented in a variety of specific environments. The specific embodiments discussed only illustrate specific ways to implement and use the description and the technology, and do not limit the scope of the application.

Unless otherwise defined, all scientific and technological terms used herein have the same meanings as those commonly known to those of ordinary skill in the art.

Each circuit or other component can be described or referred to as "used to" perform one or more tasks. In this case, "for" is used to imply structure by indicating that the circuit/component includes a structure (such as a circuit system) that performs one or more tasks during operation. Therefore, even when the specified circuit/component is currently inoperable (e.g., not opened), the circuit/component can be said to be used to perform the task. Circuits/components used with the term "for" include hardware, such as circuits that perform operations, and the like.

The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. In this application, "at least one" refers to one or more, and "multiple" refers to two or more. "And/or" describes the association relationship of the associated objects, indicating that there can be three relationships, for example, A and/or B, which can mean: A alone exists, A and B exist at the same time, and B exists alone, where A, B can be singular or plural. The character "/" generally indicates that the associated objects are in an "or" relationship. "The following at least one item (a)" or similar expressions refers to any combination of these items, including any combination of a single item (a) or a plurality of items (a). For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c or a, b and c, where a, b and c can be It can be single or multiple. In addition, in the embodiments of the present application, words such as "first" and "second" do not limit the number and order.

It should be noted that in this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or illustrations. Any embodiment or design solution described as "exemplary" or "for example" in this application should not be construed as being more preferable or advantageous than other embodiments or design solutions. To be precise, words such as "exemplary" or "for example" are used to present related concepts in a specific manner.

FIG. 2 is a schematic structural diagram of a two-wire transmission line provided by an embodiment of the application. As shown in Figure 2(a), the two-wire transmission line includes a positive-phase transmission line and a negative-phase transmission line coupled with each other. Both ends of the positive-phase transmission line are provided with a positive-phase differential input port INP and a positive-phase differential output port OUTP. Both ends of the negative-phase transmission line are provided with a negative-phase differential input port INN and a negative-phase differential output port OUTN. In the two-wire transmission line, the signal transmitted in the positive-phase transmission line and the signal transmitted in the negative-phase transmission line have the same amplitude, phase difference of 180 degrees, and opposite polarity, and are used to transmit one signal, which is the same as the signal transmitted in the microstrip transmission line. In contrast, the ground plane is not required as a reference.

In an integrated circuit, the positive-phase transmission line and the negative-phase transmission line in the two-wire transmission line can be nested and coupled with each other. At the same time, different characteristic impedances and different characteristic impedances can be realized by setting the length, line width and line distance of the positive-phase transmission line and the negative-phase transmission line. The electrical length of the two-wire transmission line, Figure 2 (b) is a schematic diagram of the layout of a two-wire transmission line in an integrated circuit. (C) in Figure 2 is an equivalent schematic diagram of the two-wire transmission line. The positive-phase transmission line and the negative-phase transmission line can be respectively equivalent to the inductance L, and the parasitic capacitance between the positive-phase transmission line and the negative-phase transmission line can be expressed as C.

Through the high-precision technology of integrated circuits, the technical problem that the two-wire transmission line cannot be applied in the high-frequency field can be solved. At the same time, compared with the application of microwave transmission lines in integrated circuits, two-wire transmission lines do not need to be provided with a ground plane, thus getting rid of the restriction of the ground plane on integrated circuits. Based on this, the embodiments of the present application provide a transmission line switch based on a two-wire transmission line. For example, the transmission line switch may be a single pole double throw (SPDT) switch, which is used to reduce the area of an integrated circuit occupied by the transmission line switch. .

3 is a schematic structural diagram of an integrated circuit provided by an embodiment of the application. The integrated circuit is provided with a transmission line switch. For example, the transmission line switch may be a single-pole double-throw switch (SPDT).

Wherein, the transmission line switch is provided with a positive phase differential input port INP, a negative phase differential input port INN, a first positive phase differential output port OUT1P, a first negative phase differential output port OUT1N, a second positive phase differential output port OUT2P, and a first positive phase differential input port INN. Two negative-phase differential output ports OUT2N. The transmission line switch is also provided with a first coil L1 and a second coil L2 coupled with each other, and a third coil L3 and a fourth coil L4 coupled with each other. The positive phase differential input port INP is arranged at one end of the first coil L1 and the third coil L3; the negative phase differential input port INN is arranged at one end of the second coil L2 and the fourth coil L4; the first positive phase differential output port OUT1P and the first coil A negative-phase differential output port OUT1N is respectively arranged at the other end of the first coil L1 and the second coil L2 of the metal layer; the second positive-phase differential output port OUT2P and the second negative-phase differential output port OUT2N are respectively arranged at the third coil and the first coil. The other end of the four-coil.

In the embodiment of the present application, the first coil L1 and the second coil L2 can be coupled with each other as the first path of the transmission line switch, and the third coil L3 and the fourth coil L4 can be coupled with each other as the second path of the transmission line switch. The design of a six-port differential transmission line switch is realized by four coils coupled with each other in pairs. At the same time, the first coil L1 and the second coil L2, the third coil L3 and the fourth coil L4 are respectively implemented as two sets of two-wire transmission lines. There is no need to set a ground plane, which eliminates the limitation of the ground plane on the integrated circuit, thereby reducing The area of the transmission line switch in the integrated circuit.

In a possible embodiment, when the first coil L1 and the second coil L2 are coupled to each other, the first coil L1 and the second coil L2 are nested with each other with the same number of turns. Wherein, the same number of turns of the first coil L1 and the second coil L2 may mean that the lengths of the first coil L1 and the second coil L2 are the same, and two coils with the same length are wired in an integrated circuit in a nested manner. The performance of the two-wire transmission line formed by the first coil L1 and the second coil L2 can be optimized. In addition, the line width of the first coil L1 and the second coil L2 can be the same, which can improve the symmetry of the first coil L1 and the second coil, thereby optimizing the coupling performance of the first coil L1 and the second coil L2.

Further, as shown in FIG. 4, the first coil L1 and the second coil L2 respectively have via holes, and the first coil L1 and the second coil L2 are coupled to each other through the via holes on the same metal layer. When the first coil L1 and the second coil L2 are nested and coupled with each other on the same metal layer, the two coils will cross. By providing a via in the metal layer, the two coils can be crossed by layer jump. Segment wiring to achieve mutual coupling of two coils on the same metal layer. For example, the first coil L1 and the second coil L2 are nested and coupled to each other on the top metal layer or the second top metal layer. When the first coil L1 and the second coil L2 are nested with each other, the cross section of the coils can be located on the top metal layer and the second Metal layers other than the top metal layer.

Optionally, the coupling gap between the first coil L1 and the second coil L2 remains constant. Among them, the coupling gap between the first coil L1 and the second coil L2 is kept constant, which can ensure that the amount of electrical coupling at any position when the first coil L1 and the second coil L2 are coupled to each other is the same, thereby ensuring the positive phase differential input port INP The impedance continuity of the input port formed with the negative-phase differential input port INN and the through port formed of the positive-phase differential through port TP and the negative-phase differential through port TN.

In another possible embodiment, when the third coil L3 and the fourth coil L4 are coupled to each other, the third coil L3 and the fourth coil L4 are nested with each other and have the same number of turns. Wherein, the third coil L3 and the fourth coil L4 have the same number of turns, which may mean that the third coil L3 and the fourth coil L4 have the same length, and two coils with the same length are wired in an integrated circuit in a nested manner. In this way, the performance of the two-wire transmission line formed by the third coil L3 and the fourth coil L4 can be optimized. In addition, the line width of the third coil L3 and the fourth coil L4 can be the same, which can improve the coupling performance of the third coil L3 and the fourth coil L4.

Further, as shown in FIG. 5, the third coil L3 and the fourth coil L4 respectively have via holes, and the third coil L3 and the fourth coil L4 are coupled to each other through the via holes on the same metal layer. When the third coil L3 and the fourth coil L4 are nested and coupled with each other on the same metal layer, the two coils will cross. By providing a via in the metal layer, the two coils can be crossed by layer jump. Segment wiring to achieve mutual coupling of two coils on the same metal layer. For example, the third coil L3 and the fourth coil L4 are nested and coupled with each other on the top metal layer, and the cross sections of the coils when the third coil L3 and the fourth coil L4 are nested with each other can be respectively located on other metal layers other than the top metal layer.

Optionally, the coupling gap between the third coil L3 and the fourth coil L4 remains constant. Among them, the coupling gap between the third coil L3 and the fourth coil L4 is kept constant, which can ensure that the amount of electrical coupling at any position when the third coil L3 and the fourth coil L4 are coupled to each other is the same, thereby ensuring the positive phase differential coupling port CP The impedance continuity of the coupling port formed with the negative phase differential coupling port CN, and the isolated port composed of the positive phase differential isolation port ISOP and the negative phase differential isolation port ISON.

In another possible embodiment, the first coil L1 and the second coil L2 are symmetrically arranged with the third coil L3 and the fourth coil L4 and are located on the same metal layer. For example, the metal layer where the first coil L1 and the second coil L2 are coupled to each other may be the top metal layer, and the metal layer where the third coil L3 and the fourth coil L4 are coupled to each other is also the top metal layer. The layout of the coil L2 is symmetrical to the layout of the third coil L3 and the fourth coil L4. In practical applications, the metal layer of the first coil L1 and the second coil L2 coupled to each other and the metal layer of the third coil L3 and the fourth coil L4 coupled to each other may also be different. The embodiments of the present application do not specifically limit this.

Optionally, the number of turns of the first coil L1, the second coil L2, the third coil L3, and the fourth coil L4 are the same, which can improve the symmetry of the two sets of two-wire transmission lines, thereby optimizing the coupling performance of the two sets of two-wire transmission lines .

Further, as shown in FIG. 3, the first positive-phase differential output port OUT1P is grounded through the first switch S1, the first negative-phase differential output port OUT1N is grounded through the second switch S2, and the second positive-phase differential output port OUT2P is grounded through the third switch S2. The switch S3 is grounded, and the second negative-phase differential output port OUT2N is grounded through the fourth switch S4. Among them, the first switch S1 and the second switch S2 can be linked, that is, the open or closed state of the first switch S1 and the second switch S2 is the same; the third switch S3 and the fourth switch S4 can be linked, that is, the third switch S3 and The open or closed state of the fourth switch S4 is the same.

Figure 6 is a schematic circuit diagram of the transmission line switch. The positive phase differential input port INP, the negative phase differential input port INN, the first positive phase differential output port OUT1P, the first negative phase differential output port OUT1N, the second positive phase differential output Port OUT2P, second negative-phase differential output port OUT2N, first coil L1, second coil L2, third coil L3, fourth coil L4, first switch S1, second switch S2, third switch S, and fourth switch The relationship of S4 can be specifically shown in FIG. 6.

The transmission line switch provided in the embodiment of the present application passes the simulation test, and the result parameter shown in FIG. 7 can be obtained. In Figure 7, S11dB20 represents the return loss of the positive phase differential input port INP and the negative phase differential input port INN, S22dB20 represents the first positive phase differential output port OUT1P and the first negative phase differential output port OUT1N, or the second positive phase difference The return loss of any one of the output port OUT2P and the second negative-phase differential output port OUT2N. S21dB20 represents the insertion loss of any one of the differential output ports. Compared with the SPDT of the microstrip transmission line structure, the insertion loss of the transmission line switch provided by the embodiment of the present application is increased by 0.3 dB. The area of the integrated circuit occupied by the transmission line switch is 120×340um ² .

In the integrated circuit provided by the embodiment of the present application, the transmission line switch realizes the first path and the second path through the coils that are coupled to each other. There is no need to set a ground plane, which eliminates the limitation of the ground plane on the integrated circuit, thereby reducing the The area of the transmission line switch in the integrated circuit. At the same time, the transmission line switch can be set with coil lengths of different turns to achieve different characteristic impedances, and no additional capacitors and other devices are required, so that the transmission error is small.

The integrated circuit provided by the embodiments of the present application may also include other devices. The other devices and the transmission line switch form different electronic circuits. That is, the transmission line switch can be applied to a variety of different electronic circuits, such as time division duplex (time division duplex). division duplex, TDD) system, TDD phased array system, etc.

FIG. 8 is a schematic structural diagram of a TDD system provided by an embodiment of the application. The TDD system includes at least one channel. Each of the at least one channel includes at least one transmission line switch, a receiving path RX and a transmitting path TX, and at least one transmission line The switch includes a first transmission line switch. In FIG. 8, at least one channel includes one channel as an example for description. In this TDD system, the positive phase differential input port INP1 and the negative phase differential input port INN1 of the first transmission line switch are used for coupling with the differential port of the antenna, and the first positive phase differential output port OUT1P1 of the first transmission line switch and the first negative The phase differential output port OUT1N1 is coupled to the differential receiving port of the receiving path RX, and the second positive phase differential output port OUT2P1 and the second negative phase differential output port OUT2N1 of the first transmission line switch are coupled to the differential transmitting port of the transmitting path TX. In FIG. 8, the first transmission line switch is represented as transmission line switch 1, INP1 and INN1 are represented as IN1, OUT1P1 and OUT1N1 are represented as OUT11, and OUT2P1 and OUT2N1 are represented as OUT12.

Optionally, the receiving path may include a low noise amplifier (LNA), a gain variable amplifier (VGA), an amplifier (amplifier, AMP), etc.; the transmitting path may include a power amplifier (power amplifier). , PA), VGA and AMP, etc.

Specifically, when the channel is used as a receiving channel, the first transmission line switch can be switched to the first positive-phase differential output port OUT1P1 and the first negative-phase differential output port OUT1N1; the received signal of the antenna is from the positive phase differential of the first transmission line switch. Input port INP1 and negative-phase differential input port INN1; the first transmission line switch outputs the received signal from the first positive-phase differential output port OUT1P1 and the first negative-phase differential output port OUT1N1 to the differential receiving port of the receiving channel RX; The receiving path RX performs a series of processing such as noise reduction, gain adjustment and amplification on the received signal. When this channel is used as a transmitting channel, the first transmission line switch can be switched to the second positive-phase differential output port OUT2P1 and the second negative-phase differential output port OUT2N1; the transmitting channel TX performs power amplification, gain adjustment, and amplification on the transmitted signal. After serial processing, the transmission signal is output through the differential transmission port; the transmission signal is injected from the second positive-phase differential output port OUT2P1 and the second negative-phase differential output port OUT2N1 of the first transmission line switch, and from the positive of the first transmission line switch. Phase differential input port INP1 and negative phase differential input port INN1 output; the output transmission signal is sent out through the antenna.

It should be noted that the layout design of the first transmission line switch in the integrated circuit in the TDD system can be specifically as shown in Figs. 3 to 5 above. In addition, for the detailed working principle of the TDD system, reference may be made to the description in the related technology, which is not described in detail in the embodiment of the present application.

In the embodiment of the present application, applying the transmission line switch to the TDD system can make the TDD system have the advantage of small transmission error. At the same time, the layout design of the transmission line switch described above can be used in the integrated circuit including the TDD system, which can make the The area of the integrated circuit occupied by the TDD system is relatively small.

FIG. 9 is a schematic structural diagram of another TDD system provided by an embodiment of the application. The TDD system may also be called a TDD phased array system, including: at least two channels, and at least two channels pass through a combiner (combiner, COM). ) Coupling, each channel includes at least two transmission line switches, a receiving path RX and a transmitting path TX, and the at least two transmission line switches include a first transmission line switch and a second transmission line switch. In FIG. 9, at least two channels including N channels are used as an example for description. The first transmission line switch is represented as transmission line switch 1 and the second transmission line switch is represented as transmission line switch 2.

In this TDD phased array system, the positive phase differential input port INP1 and the negative phase differential input port INN1 of the first transmission line switch are used for coupling with the differential port of the antenna, and the first positive phase differential output port OUT1P1 and The first negative-phase differential output port OUT1N1 is coupled with the differential receiving port of the receiving channel RX, and the second positive-phase differential output port OUT2P1 and the second negative-phase differential output port OUT2N1 of the first transmission line switch are coupled with the differential transmitting port of the transmitting channel TX. The positive phase differential input port INP2 and the negative phase differential input port INN2 of the second transmission line switch are coupled with the differential input port of the combiner, and the first positive phase differential output port OUT1P2 and the first negative phase differential output port OUT1N2 of the second transmission line switch Coupled with the differential transmitting port of the receiving path RX, the second positive phase differential output port OUT2P2 and the second negative phase differential output port OUT2N2 of the second transmission line switch are coupled with the differential receiving port of the transmitting path TX.

Optionally, the receiving path RX in each channel may include a low noise amplifier (LNA) and an adjustable gain amplifier (VGA), etc.; the transmitting path TX may include PA, VGA, etc.

Specifically, when at least two channels are both used as receiving channels, the combiner CMB can be used to synthesize multiple received signals in at least two channels into one signal; when at least two channels are both used as transmitting channels, the combiner CMB can be used to divide a signal into multiple transmission signals, and each transmission signal in the multiple transmission signals corresponds to a transmission channel. It should be noted that the working principle when each of the at least two channels is used as a transmitting channel or a receiving channel is the same as the working principle when the channel in Figure 8 is used as a transmitting channel or a receiving channel. For details, please refer to the relevant information in Figure 8. Description, the embodiments of this application will not be repeated here.

Further, as shown in FIG. 9, each channel also includes a phase shifter PS, and the receiving channel and the transmitting channel in the channel share the phase shifter PS. Among them, the phase shifter in each channel can be used to perform phase shift processing on the signal in the channel. Optionally, the receiving path and the transmitting path in each channel may also each use one phase shifter PS, that is, each channel may include two phase shifters PS, which is not specifically limited in the embodiment of the present application.

In a possible embodiment, the TDD phased array system further includes a transmitter. The transmitter includes a third transmission line switch, an up converter and a down converter. FIG. 9 shows the third transmission line switch as the transmission line switch 3.

Among them, the differential output port of the combiner COM is coupled to the positive phase differential input port INP3 and the negative phase differential input port INN3 of the third transmission line switch, and the first positive phase differential output port OUT1P3 of the third transmission line switch and the first negative phase differential The output port OUT1N3 is coupled with the differential input port of the up-converter, and the second positive-phase differential output port OUT2P3 and the second negative-phase differential output port OUT2N3 of the third transmission line switch are coupled with the differential input port of the down-converter.

Specifically, when the third transmission line switch is switched to the first positive-phase differential output port OUT1P3 and the first negative-phase differential output port OUT1N3, the up-conversion converter may perform up-conversion processing on the signal transmitted by the third transmission line switch; when the third transmission line switch is switched to the first positive-phase differential output port OUT1P3 and the first negative-phase differential output port OUT1N3; When the transmission line switch is switched to the second positive-phase differential output port OUT2P3 and the second negative-phase differential output port OUT2N3, the down-conversion converter can perform down-conversion processing on the signal transmitted by the third transmission line switch.

It should be noted that the layout design of each transmission line switch in the TDD phased array system in the integrated circuit can be specifically as shown in FIGS. 3 to 5 above. In addition, for the detailed working principle of the TDD phased array system, reference may be made to the description in the related art, which is not described in detail in the embodiment of the present application.

In the embodiment of the present application, the transmission line switch is applied to the TDD phased array system, which can make the TDD phased array system have the advantage of small transmission error, and at the same time adopt the above-mentioned integrated circuit in the integrated circuit including the TDD phased array system. The layout design of the transmission line switch can make the area of the integrated circuit occupied by the TDD phased array system smaller.

Based on this, an embodiment of the present application also provides a communication device, which may be a terminal or a base station. In the embodiment of the present application, the communication device includes an integrated circuit, which is provided with a single-pole double-throw switch transmission line switch; the transmission line switch is provided with a positive phase differential input port, a negative phase differential input port, and the first positive phase differential The output port, the first negative phase differential output port, the second positive phase differential output port and the second negative phase differential output port; the transmission line switch is provided with a first coil and a second coil coupled to each other, and a third coil coupled to each other And the fourth coil; the positive phase differential input port is set at one end of the first coil and the third coil, the negative phase differential input port is set at one end of the second coil and the fourth coil, the first positive phase differential output port and the first negative The phase differential output port is respectively arranged at the other end of the first coil and the second coil, and the second positive phase differential output port and the second negative phase differential output port are respectively arranged at the other end of the third coil and the fourth coil.

In a possible implementation manner, the communication device may include any transmission line switch shown in FIG. 3 to FIG. 6, or the TDD system provided in FIG. 8 or FIG. 9, etc. For specific related descriptions of the transmission line switch and the TDD system, reference may be made to the corresponding descriptions above, and details are not repeated in the embodiments of the present application.

In another aspect of this application, there is also provided a non-transitory computer-readable medium for use with a computer, the computer has software for creating integrated circuits, and one or more computer-readable media are stored on the computer-readable medium. Read the data structure. One or more computer-readable data structures have photomask data for manufacturing the circuit as provided in FIGS. 3-6, 8 or 9 above.

It should be understood that in this application, the size of the sequence numbers of the above-mentioned processes does not mean the order of execution. The execution order of the processes should be determined by their functions and internal logic, and should not constitute any implementation process of the embodiments of this application. limited. The term "coupling" mentioned in this application is used to express the intercommunication or interaction between different components, and may include direct connection or indirect connection through other components.

Finally, it should be noted that the above are only specific implementations of this application, but the scope of protection of this application is not limited to this. Any changes or substitutions within the technical scope disclosed in this application shall be covered by this application. Within the scope of protection applied for. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

An integrated circuit, characterized in that it comprises:

A transmission line switch is provided in the integrated circuit;

The transmission line switch is provided with a positive-phase differential input port, a negative-phase differential input port, a first positive-phase differential output port, a first negative-phase differential output port, a second positive-phase differential output port, and a second negative-phase differential output port. ；

The transmission line switch is provided with a first coil and a second coil that are coupled to each other, and a third coil and a fourth coil that are coupled to each other;

The positive phase differential input port is provided at one end of the first coil and the third coil, the negative phase differential input port is provided at one end of the second coil and the fourth coil, the first The positive-phase differential output port and the first negative-phase differential output port are respectively arranged at the other end of the first coil and the second coil, and the second positive-phase differential output port and the second negative-phase differential output port The output ports are respectively arranged at the other ends of the third coil and the fourth coil.
The integrated circuit of claim 1, wherein the first coil and the second coil are nested with each other and have the same number of turns.
The integrated circuit according to claim 1 or 2, wherein the line width of the first coil and the second coil are the same.
The integrated circuit according to any one of claims 1 to 3, wherein the coupling gap between the first coil and the second coil is kept constant.
The integrated circuit according to any one of claims 1 to 4, wherein the third coil and the fourth coil are nested with each other and have the same number of turns.
The integrated circuit according to any one of claims 1-5, wherein the line width of the third coil and the fourth coil are the same.
The integrated circuit according to any one of claims 1 to 6, wherein the coupling gap between the third coil and the fourth coil is kept constant.
The integrated circuit according to any one of claims 1-7, wherein the first coil and the second coil respectively have via holes, and the first coil and the second coil are on the same metal layer. They are coupled to each other through the via holes.
The integrated circuit according to any one of claims 1-8, wherein the third coil and the fourth coil respectively have via holes, and the third coil and the fourth coil are on the same metal layer. They are coupled to each other through the via holes.
The integrated circuit according to any one of claims 1-9, wherein the first coil and the second coil are symmetrically arranged with the third coil and the fourth coil and are located on the same metal layer .
The integrated circuit of claim 10, wherein the number of turns of the first coil, the second coil, the third coil, and the fourth coil is the same.
The integrated circuit according to any one of claims 1-11, wherein the first positive-phase differential output port is grounded through a first switch, and the first negative-phase differential output port is grounded through a second switch, so The second positive-phase differential output port is grounded through a third switch, and the second negative-phase differential output port is grounded through a fourth switch.
The integrated circuit according to any one of claims 1-12, wherein at least one channel is provided on the integrated circuit, and the at least one channel includes a transmission line switch, a receiving path and a transmitting path, and At least one of the transmission line switches includes a first transmission line switch;

The positive-phase differential input port and the negative-phase differential input port of the transmission line switch are used for coupling with the differential port of an antenna, and the first positive-phase differential output port of the first transmission line switch and the first The negative-phase differential output port is coupled with the differential receiving port of the receiving path, and the second positive-phase differential output port and the second negative-phase differential output port of the first transmission line switch are coupled with the differential transmission of the transmitting path. Port coupling.
The integrated circuit according to claim 13, wherein the at least one channel comprises at least two channels, the at least two channels are coupled by a combiner, and the at least one transmission line switch further comprises a second transmission line Switch, the positive phase differential input port and the negative phase differential input port of the second transmission line switch are coupled with the differential input port of the combiner, and the first positive phase differential input port of the second transmission line switch The output port and the first negative-phase differential output port are coupled with the differential transmitting port of the receiving path, and the second positive-phase differential output port and the second negative-phase differential output port of the second transmission line switch are coupled with The differential receiving ports of the transmitting path are coupled.
The integrated circuit according to claim 14, wherein each channel further comprises a phase shifter, and the receiving channel and the transmitting channel in the channel share the phase shifter.
The integrated circuit according to any one of claims 13-15, wherein the receiving path of each channel includes at least one of the following: a low noise amplifier, an adjustable gain amplifier, and an amplifier; the transmitting path of each channel includes at least the following One: power amplifier, adjustable gain amplifier and amplifier.
A communication device, characterized in that the communication device comprises the integrated circuit according to any one of claims 1-16.
A non-transitory computer-readable medium for use with a computer, characterized in that the computer has software for creating integrated circuits, and one or more computer-readable data structures are stored on the computer-readable medium, The one or more computer-readable data structures have photomask data for manufacturing the integrated circuit according to any one of claims 1-16.