WO2021140753A1 - Élément de réception de lumière et dispositif de réception de lumière - Google Patents

Élément de réception de lumière et dispositif de réception de lumière Download PDF

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Publication number
WO2021140753A1
WO2021140753A1 PCT/JP2020/043034 JP2020043034W WO2021140753A1 WO 2021140753 A1 WO2021140753 A1 WO 2021140753A1 JP 2020043034 W JP2020043034 W JP 2020043034W WO 2021140753 A1 WO2021140753 A1 WO 2021140753A1
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Prior art keywords
unit
charge
potential
coupling region
light receiving
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PCT/JP2020/043034
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English (en)
Japanese (ja)
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健一郎 安城
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ソニーセミコンダクタソリューションズ株式会社
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Priority to JP2021569746A priority Critical patent/JPWO2021140753A1/ja
Publication of WO2021140753A1 publication Critical patent/WO2021140753A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Definitions

  • the present disclosure relates to a light receiving element and a light receiving device. More specifically, the present invention relates to a light receiving element in which an electric charge generated by an element performing photoelectric conversion is transmitted to a circuit formed on a semiconductor substrate, and a light receiving device in which the light receiving element is arranged.
  • a light receiving element that performs photoelectric conversion of incident light to generate an electric charge, detects the amount of the generated electric charge, and converts it into a light receiving signal.
  • An example of such a light receiving element is an image pickup device that detects incident light from a subject and generates an image signal.
  • This image pickup device includes a plurality of pixels in which photoelectric conversion units for performing photoelectric conversion of incident light are arranged, and performs photoelectric conversion of incident light irradiated during the light receiving period (exposure period) for each pixel.
  • the electric charge generated by this photoelectric conversion is converted into a light receiving signal (image signal) by a pixel circuit which is a circuit for each pixel arranged on the semiconductor substrate.
  • This photoelectric conversion unit can be arranged on the semiconductor substrate on which the pixel circuit is arranged.
  • the photoelectric conversion unit and the pixel circuit can be formed on a semiconductor substrate made of, for example, silicon (Si).
  • the photoelectric conversion unit is composed of a photodiode composed of a semiconductor region formed on a semiconductor substrate, and is arranged for each pixel.
  • the pixel circuit resets before the exposure period to discharge all the charges in the semiconductor region constituting the photodiode.
  • the pixel circuit accumulates the charge generated by the photoelectric conversion unit during the exposure period. After the lapse of the exposure period, the pixel circuit generates an image signal according to the electric charge accumulated in the exposure period.
  • a photoelectric conversion unit made of a material other than Si can also be used.
  • a photoelectric conversion unit made of a compound semiconductor or an organic material is used in an image pickup device that detects light having a specific wavelength such as infrared light.
  • the photoelectric conversion unit is arranged adjacent to the semiconductor substrate, and the electric charge generated by the photoelectric conversion unit is transmitted to the pixel circuit of the semiconductor substrate.
  • the pixel circuit accumulates the electric charges transmitted during the exposure period, and generates an image signal according to the accumulated charges after the elapse of the exposure period.
  • the photoelectric conversion unit since the photoelectric conversion unit is not arranged on the semiconductor substrate on which the pixel circuit is arranged, there is a problem that it is difficult to reset to discharge all the charges. Therefore, the error of the image signal increases.
  • An image sensor that performs this reset has been proposed.
  • a photoelectric conversion film that performs photoelectric conversion, a contact portion that injects the charge generated by the photoelectric conversion film into a semiconductor substrate, and a solid-state imaging device in which a storage portion that stores charges are arranged in pixels have been proposed (for example, See Patent Document 1).
  • the pixels of this solid-state image sensor are arranged between the injection unit and the storage unit to form a potential barrier between the injection unit and the storage unit, and the discharge unit and the storage unit that discharge and inject the electric charge of the barrier unit and the injection unit.
  • a transfer transistor that transfers the charge of the unit is further arranged.
  • reset is performed as follows. First, an excessive charge (electron) is injected into the injection portion by the discharge transistor. This excessively injected charge overcomes the potential barrier, flows into the storage section, and is stored. Next, the injection of electric charge by the discharge transistor is stopped, and the charge of the storage portion is transferred and discharged by the transfer transistor. As a result, the excess charge of the storage portion injected by the discharge transistor is discharged, and the charge injected into the contact portion by the photoelectric conversion film is also discharged via the potential barrier and the storage portion. After that, the charge of the contact portion is reduced and the potential of the contact portion is aligned with the potential barrier. That is, only the electric charge injected from the photoelectric conversion film flows into the storage unit and is discharged to the transfer transistor. As a result, the reset is performed, and then the exposure can be started by shifting the transfer transistor to the non-conducting state.
  • an excessive charge electron
  • the above-mentioned conventional technology has a problem that it takes time to reset. As described above, at the time of reset, an excessive charge exceeding the potential barrier is injected into the contact portion by the discharge transistor, so that it takes time for the potential of the contact portion to be aligned with the potential barrier. Therefore, there is a problem that the start of exposure is delayed and a high-speed image signal cannot be generated.
  • This disclosure was made in view of the above-mentioned problems, and aims to shorten the reset time.
  • the present disclosure has been made in order to solve the above-mentioned problems, and the first aspect thereof is formed on a photoelectric conversion unit that generates electric charges by performing photoelectric conversion of incident light and a semiconductor substrate.
  • a potential barrier is formed between the coupling region which is coupled to the photoelectric conversion unit and the generated charge is transmitted, the charge holding portion which holds the charge, and the coupling region and the charge holding portion to form the coupling.
  • the above is based on a charge transfer unit that controls the transfer of the electric charge transferred to the region to the charge holding unit and a transfer reference potential that is a reference potential when transferring the transferred charge to the charge holding unit.
  • It includes a potential adjusting unit that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer unit, and a light receiving signal generating unit that generates a light receiving signal based on the charge held in the charge holding unit. It is a light receiving element.
  • the charge transfer unit is provided with a control input terminal to form the potential barrier according to the control voltage applied to the control input terminal, and the potential adjustment unit is the transfer reference.
  • the potential barrier may be adjusted by generating a control voltage based on the potential and applying the generated control voltage to the control input terminal.
  • the charge transfer unit may be composed of a MOS transistor having a gate as the control input terminal.
  • the source in the charge transfer unit, the source may be connected to the coupling region and the drain may be connected to the charge holding unit.
  • the potential adjusting unit may generate the control voltage based on the difference between the potential of the coupling region and the transfer reference potential.
  • the potential adjusting unit may be composed of a MOS transistor and a load unit connected to the drain of the MOS transistor to convert a change in current into a change in voltage.
  • the potential of the coupling region may be applied to the gate of the MOS transistor, and the transfer reference potential may be applied to the source of the MOS transistor.
  • the coupling region initialization unit that initializes the coupling region to a predetermined initial potential by injecting a charge into the coupling region and the charge held in the charge holding portion are discharged.
  • This further includes a reset unit that resets the charge holding unit, and the potential adjusting unit adjusts the potential barrier at the time of the initialization to transfer the charge injected into the coupling region to the charge holding unit. Transferred, the reset unit resets the charge holding unit at the start of adjustment by the potential adjusting unit after the initialization, and the received light signal generating unit resets the predetermined exposure after the initialization.
  • the received signal may be generated based on the charge transferred to and retained by the charge holding unit during the period.
  • the coupling region initialization unit may further discharge the electric charge in the coupling region after the lapse of the predetermined exposure period.
  • the second charge holding unit that holds the charge and the second charge transfer unit that transfers the charge held by the charge holding unit to the second charge holding unit are provided.
  • the light receiving signal generation unit may generate the light receiving signal based on the charge held in the second charge holding unit.
  • the photoelectric conversion unit may be composed of a compound semiconductor.
  • the photoelectric conversion unit may include an organic photoelectric conversion film.
  • a second aspect of the present disclosure is a photoelectric conversion unit that generates an electric charge by performing a photoelectric conversion of incident light, and a charge that is formed on a semiconductor substrate and coupled to the photoelectric conversion unit to transmit the generated charge.
  • a potential barrier is formed between the coupling region to be formed, the charge holding portion that holds the charge, and the coupling region and the charge holding portion, and the charge transmitted to the coupling region is transferred to the charge holding portion.
  • the coupling region by adjusting the potential barrier of the charge transfer unit based on the charge transfer unit to be controlled and the transfer reference potential which is the reference potential when transferring the transferred charge to the charge holding unit.
  • a light receiving device including a potential adjusting unit for adjusting the potential of the light receiving signal, a light receiving signal generating unit for generating a light receiving signal based on the charge held in the charge holding unit, and a processing circuit for processing the generated light receiving signal.
  • the aspects of the present disclosure provide the effect of adjusting the potential barrier between the binding region and charge retention. It is assumed that the amount of charge diffused from the coupling region to the charge holding portion at the time of reset is adjusted.
  • FIG. 1 is a diagram showing a configuration example of a light receiving element according to an embodiment of the present disclosure.
  • the figure is a diagram showing a configuration example of an image pickup device 1 which is an example of a light receiving element. Taking this image pickup device 1 as an example, the light receiving element according to the embodiment of the present disclosure will be described.
  • the image sensor 1 in the figure includes a pixel array unit 10, a vertical drive unit 20, a column signal processing unit 30, and a control unit 40.
  • the pixel array unit 10 is configured by arranging the pixels 100 in a two-dimensional grid pattern.
  • the pixel 100 generates an image signal according to the irradiated light.
  • the pixel 100 has a photoelectric conversion unit that generates an electric charge according to the irradiated light.
  • the pixel 100 further has a pixel circuit. This pixel circuit generates an image signal based on the electric charge generated by the photoelectric conversion unit. The generation of the image signal is controlled by the control signal generated by the vertical drive unit 20 described later.
  • the signal lines 11 and 12 are arranged in the pixel array unit 10 in an XY matrix.
  • the signal line 11 is a signal line that transmits a control signal of the pixel circuit in the pixel 100, is arranged for each line of the pixel array unit 10, and is commonly wired to the pixel 100 arranged in each line.
  • the signal line 12 is a signal line for transmitting an image signal generated by the pixel circuit of the pixel 100, is arranged in each row of the pixel array unit 10, and is commonly wired to the pixel 100 arranged in each row.
  • the pixel circuit is formed on the semiconductor substrate, and the photoelectric conversion unit is arranged adjacent to the semiconductor substrate.
  • the vertical drive unit 20 generates a control signal for the pixel circuit of the pixel 100.
  • the vertical drive unit 20 transmits the generated control signal to the pixel 100 via the signal line 11 in the figure.
  • the column signal processing unit 30 processes the image signal generated by the pixel 100.
  • the column signal processing unit 30 processes the image signal transmitted from the pixel 100 via the signal line 12 in the figure.
  • the processing in the column signal processing unit 30 corresponds to, for example, analog-to-digital conversion that converts an analog image signal generated in the pixel 100 into a digital image signal.
  • the image signal processed by the column signal processing unit 30 is output as an image signal of the image sensor 1.
  • the control unit 40 controls the entire image sensor 1.
  • the control unit 40 controls the image sensor 1 by generating and outputting a control signal for controlling the vertical drive unit 20 and the column signal processing unit 30.
  • the control signal generated by the control unit 40 is transmitted to the vertical drive unit 20 and the column signal processing unit 30 by the signal lines 41 and 42, respectively.
  • the image sensor 1 is an example of the light receiving element described in the claims.
  • the image signal is an example of the received light signal described in the claims.
  • the image sensor 1 is an example of the light receiving device according to the claims.
  • the pixel array unit 10 is an example of the light receiving element described in the claims
  • the column signal processing unit 30 is an example of the processing circuit described in the claims.
  • FIG. 2 is a diagram showing a configuration example of pixels according to the first embodiment of the present disclosure.
  • the figure is a circuit diagram showing a configuration example of the pixel 100.
  • the pixel 100 in the figure is a photoelectric conversion unit 101, a coupling region initialization unit 104, a charge transfer unit 105, a second charge transfer unit 106, a reset unit 107, a coupling region 119, and a potential adjustment unit 110. And a charge holding unit 102, and a second charge holding unit 103. Further, the pixel 100 in the figure further includes an image signal generation unit 115.
  • the elements other than the photoelectric conversion unit 101 form the above-mentioned pixel circuit.
  • the generation unit 115 constitutes a pixel circuit. This pixel circuit is arranged on a semiconductor substrate (semiconductor substrate 120 described later).
  • a signal line Vini, a signal line INI, a signal line TR, a signal line RST, a signal line SEL, and a signal line 12 are connected to the pixel 100.
  • the signal line Vini, the signal line INI, the signal line TR, the signal line RST, and the signal line SEL constitute the signal line 11.
  • a power supply line Vdd, a power supply line Vtop, a power supply line Vrst, and a power supply line Vref for supplying various power sources are arranged on the pixel 100.
  • the coupling region 119 is represented by a node on the circuit diagram.
  • the coupling region initialization unit 104, the charge transfer unit 105, the second charge transfer unit 106, and the reset unit 107 can be configured by a p-channel MOS transistor.
  • the image signal generation unit 115 can be composed of MOS transistors 108 and 109. An n-channel MOS transistor can be used for the MOS transistors 108 and 109.
  • the cathode of the photoelectric conversion unit 101 is connected to the power supply line Vtop.
  • the anode of the photoelectric conversion unit 101 is connected to the drain of the coupling region initialization unit 104, the source of the charge transfer unit 105, and the inverting input of the potential adjustment unit 110.
  • the source of the coupling region initialization unit 104 is connected to the signal line Vini, and the gate is connected to the signal line INI.
  • the non-inverting input of the potential adjusting unit 110 is connected to the power supply line Vref, and the inverting input is connected to the gate of the charge transfer unit 105.
  • the drain of the charge transfer unit 105 is connected to the source of the second charge transfer unit 106 and one end of the charge holding unit 102.
  • the other end of the charge holding portion 102 is grounded.
  • the gate of the second charge transfer unit 106 is connected to the signal line TR.
  • the drain of the second charge transfer unit 106 is connected to the source of the reset unit 107, the gate of the MOS transistor 108, and one end of the second charge holding unit 103.
  • the other end of the second charge holding portion 103 is grounded.
  • the drain of the reset unit 107 is connected to the power supply line Vrst.
  • the drain of the MOS transistor 108 is connected to the power supply line Vdd, and the source is connected to the drain of the MOS transistor 109.
  • the gate of the MOS transistor 109 is connected to the signal line SEL, and the source is connected to the signal line 12.
  • the photoelectric conversion unit 101 is an element that performs photoelectric conversion of incident light.
  • the photoelectric conversion unit 101 in the figure is made of a compound semiconductor and is arranged on a semiconductor substrate different from the semiconductor substrate on which the pixel circuit is arranged.
  • the power supply line Vtop is connected to the cathode of the photoelectric conversion unit 101.
  • This power supply line Vtop is a power supply line that supplies the cathode voltage of the photoelectric conversion unit 101.
  • holes are output from the anode and transmitted to the coupling region 119.
  • the coupling region 119 is a semiconductor region of the semiconductor substrate 120 in which the photoelectric conversion unit 101 is coupled to the semiconductor substrate 120 in which the pixel circuit is arranged.
  • the holes generated by the photoelectric conversion unit 101 are transmitted to the pixel circuit via the coupling region 119.
  • the potential of the coupling region 119 changes according to the transferred charge.
  • the charge transfer unit 105 is an element that transfers the electric charge of the coupling region 119 to the charge holding unit 102, which will be described later.
  • the charge transfer unit 105 is arranged between the coupling region 119 and the charge holding unit 102 to form a potential barrier. By adjusting this potential barrier, the transfer of charge from the coupling region 119 to the charge holding unit 102 can be controlled.
  • the potential barrier can be adjusted by adjusting the voltage applied to the gate of the charge transfer unit 105.
  • the charge transfer unit 105 transfers the electric charge transferred from the photoelectric conversion unit 101 to the coupling region 119 during the exposure period.
  • the charge holding unit 102 holds a charge.
  • the charge holding unit 102 is composed of a semiconductor region of the semiconductor substrate 120, and holds the charge transferred by the charge transfer unit 105. As described above, since the charge transfer unit 105 transfers the charge from the photoelectric conversion unit 101 during the exposure period, the charge holding unit 102 holds the charge transferred from the photoelectric conversion unit 101 to the coupling region 119 during the exposure period. ..
  • the second charge transfer unit 106 is an element that transfers the charge of the charge holding unit 102 to the second charge holding unit 103, which will be described later.
  • the second charge transfer unit 106 is controlled by a control signal transmitted by the signal line TR, and transfers charges by conducting electricity between the charge holding unit 102 and the second charge holding unit 103.
  • the second charge transfer unit 106 transfers the charge held in the charge holding unit 102 during the exposure period to the second charge holding unit 103 after the exposure period.
  • the second charge holding unit 103 holds a charge.
  • the second charge holding unit 103 is composed of a semiconductor region of the semiconductor substrate 120, and holds the charge transferred by the charge transfer unit 105.
  • the image signal generation unit 115 is a circuit that generates an image signal.
  • the image signal generation unit 115 generates an image signal based on the electric charge held by the second charge holding unit 103.
  • the image signal generation unit 115 is composed of MOS transistors 108 and 109.
  • the MOS transistor 108 is a MOS transistor that generates an image signal.
  • the MOS transistor 108 constitutes a source follower circuit and generates an image signal based on the charge held by the second charge holding unit 103 by amplifying the voltage of the second charge holding unit 103 connected to the gate. To do.
  • the MOS transistor 109 is a MOS transistor that outputs an image signal generated by the MOS transistor 108 to the signal line 12.
  • the MOS transistor 109 is controlled by a control signal transmitted by the signal line SEL.
  • the image signal generation unit 115 is an example of the light receiving signal generation unit described in the claims.
  • the coupling region initialization unit 104 is an element that initializes the coupling region 119.
  • the coupling region initialization unit 104 initializes the coupling region 119 to a predetermined initial potential by injecting an electric charge into the coupling region 119.
  • the coupling region initialization unit 104 is controlled by a control signal transmitted by the signal line INI, and conducts the signal line Vini and the coupling region 119.
  • the initialization voltage is output to the signal line Vini by the vertical drive unit 20, and the initialization voltage from the signal line Vini is applied to the coupling region 119.
  • the coupling region 119 is initialized to the initial potential.
  • the initialization of the coupling region 119 is performed before the start of the exposure period.
  • the initial potential can be, for example, a potential of 2.4 V.
  • the coupling region initialization unit 104 can further discharge the electric charge in the coupling region 119. This can be done by the vertical drive unit 20 outputting the reset voltage of the coupling region 119 to the signal line Vini and inputting the control signal to the coupling region initialization unit 104 via the signal line INI to conduct the connection.
  • the reset voltage of the coupling region 119 is a voltage lower than the initialization voltage, and is a voltage that makes the potential of the coupling region 119 lower than the potential during the exposure period described later. The exposure can be stopped by discharging the electric charge in the coupling region 119.
  • the reset potential (voltage) of the coupling region 119 can be, for example, the ground potential.
  • the reset unit 107 is an element that resets the second charge holding unit 103.
  • the reset unit 107 resets by discharging the electric charge of the second charge holding unit 103.
  • the reset unit 107 is controlled by a control signal transmitted by the signal line RST, and conducts the power line Vrst and the second charge holding unit 103.
  • the power supply line Vrst is a power supply line that transmits a reset voltage.
  • the reset voltage from the power supply line Vrst is applied to the second charge holding unit 103.
  • the second charge holding unit 103 is reset.
  • the charge of the charge holding unit 102 can be further discharged by conducting the second charge transfer unit 106.
  • the reset unit 107 can reset the charge holding unit 102.
  • the potential adjusting unit 110 adjusts the potential of the coupling region 119.
  • the potential adjusting unit 110 adjusts the potential of the coupling region 119 by adjusting the potential barrier of the charge transfer unit 105. At this time, the potential adjusting unit 110 makes adjustments based on the transfer reference potential.
  • This transfer reference potential is a reference potential when the charge in the coupling region 119 is transferred to the charge holding unit 102.
  • the potential adjusting unit 110 adjusts by generating a control voltage based on the transfer reference potential and applying it to the gate which is the control input terminal of the charge transfer unit 105.
  • This transfer reference potential is supplied by the power supply line Vref.
  • the transfer reference potential can be, for example, a potential of 1.7 V.
  • the potential of the coupling region 119 changes according to the electric charge transmitted from the photoelectric conversion unit 101.
  • the photoelectric conversion unit 101 transmits an electric charge corresponding to the incident light to the constant coupling region 119.
  • the potential rises.
  • the potential adjusting unit 110 can maintain the potential of the coupling region 119 at a constant potential by controlling the charge transferred from the coupling region 119 via the charge transfer unit 105. This constant potential corresponds to the transfer reference potential.
  • the power supply line Vref supplies a transfer reference voltage which is a voltage corresponding to the transfer reference potential.
  • the potential adjusting unit 110 generates a control voltage based on the difference between the supplied transfer reference potential and the potential of the coupling region 119, and applies it to the gate of the charge transfer unit 105.
  • the potential adjusting unit 110 in the figure is configured as a differential amplifier, and a transfer reference potential is input to the non-inverting input, and the potential of the coupling region 119 is input to the inverting input. The difference between these input potentials is amplified and output as a control voltage. In this way, the potential adjusting unit 110 operates as a negative feedback amplifier. Thereby, the accuracy of adjusting the potential of the coupling region 119 can be improved.
  • the potential adjusting unit 110 can improve the detection accuracy of the electric charge transmitted from the photoelectric conversion unit 101.
  • the potential of the coupling region 119 changes according to the balance between the electric charge transmitted from the photoelectric conversion unit 101 and the electric charge transferred to the charge holding unit 102.
  • the charge in the coupling region 119 is transferred to the charge holding unit 102 by overcoming the potential barrier of the charge transfer unit 105 and diffusing. That is, the charge overflowing from the potential barrier of the coupling region 119 moves to the charge holding portion 102. If the potential of the coupling region 119 fluctuates greatly, it affects the diffusion of this charge, and the amount of charge transferred from the coupling region 119 to the charge holding unit 102 fluctuates, causing an error.
  • By keeping the potential barrier of the charge transfer unit 105 at a constant potential (transfer reference potential) by the potential adjusting unit 110 it is possible to reduce the fluctuation of the potential of the coupling region 119 and improve the charge detection accuracy. it can.
  • the configuration of the pixel 100 is not limited to this example.
  • p-channel MOS transistors can also be used as the MOS transistors 108 and 109.
  • FIG. 3 is a cross-sectional view showing a configuration example of a pixel according to the first embodiment of the present disclosure.
  • the figure is a schematic cross-sectional view showing a configuration example of the pixel 100.
  • the pixel 100 in the figure includes an on-chip lens 179, a protective film 172, a transparent electrode 171, a compound semiconductor chip 192, and a silicon chip 191.
  • the compound semiconductor chip 192 is a semiconductor chip including a substrate of a compound semiconductor. This compound semiconductor chip 192 performs photoelectric conversion of incident light, and transmits holes in the charges generated by the photoelectric conversion to the silicon chip 191 described later.
  • the compound semiconductor chip 192 includes a compound semiconductor substrate 150, a first compound semiconductor layer 151, a second compound semiconductor layer 152, a separation region 153, a protective layer 154, an electrode 155, an insulating layer 161 and a bump. It is provided with an electrode 162.
  • the compound semiconductor substrate 150 is a substrate made of a compound semiconductor.
  • the compound semiconductor substrate 150 can be made of, for example, indium phosphide (InP). Further, the compound semiconductor substrate 150 can be configured as an n-type having a relatively high impurity concentration.
  • the first compound semiconductor layer 151 is a compound semiconductor layer formed on the compound semiconductor substrate 150.
  • the first compound semiconductor layer 151 can be made of, for example, indium gallium arsenide (InGaAs). Further, the first compound semiconductor layer 151 can be formed in an n-type. Photoelectric conversion of incident light is performed on the first compound semiconductor layer 151. Of the charges generated by photoelectric conversion, electrons are diffused to the n-type compound semiconductor substrate 150, and holes are diffused to the p-type second compound semiconductor layer 152, which will be described later.
  • the first compound semiconductor layer 151 is commonly arranged for the plurality of pixels 100. Such compound semiconductors have high sensitivity in the infrared light region.
  • the second compound semiconductor layer 152 is a semiconductor layer arranged for each pixel 100 and bonded to the first compound semiconductor layer 151.
  • the second compound semiconductor layer 152 can be configured by, for example, InP. Further, the second compound semiconductor layer 152 can be formed in a p-type having a relatively high impurity concentration.
  • the photodiode formed by the pn junction formed by the first compound semiconductor layer 151 and the second compound semiconductor layer 152 corresponds to the photoelectric conversion unit 101 described in FIG.
  • the separation region 153 separates the pixel 100.
  • the separation region 153 is arranged at the boundary of the pixel 100 and separates the adjacent second compound semiconductor layers 152 from each other.
  • the separation region 153 can be composed of an n-type InP.
  • the protective layer 154 protects the surface of the compound semiconductor layer.
  • the protective layer 154 can be made of an inorganic material such as silicon nitride (SiN), aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ) and hafnium oxide (HfO 2 ).
  • the electrode 155 is an electrode arranged adjacent to the second compound semiconductor layer 152.
  • the electrode 155 can be made of, for example, titanium (Ti) or tungsten (W).
  • the insulating layer 161 insulates and protects the surface of the compound semiconductor chip 192.
  • the insulating layer 161 can be made of, for example, SiO 2 .
  • the bump electrode 162 is a bump arranged on the surface of the insulating layer 161.
  • the bump electrode 162 is arranged so as to penetrate the insulating layer 161 and is connected to the electrode 155. Further, the bump electrode 162 is bonded to the bump electrode 145 of the silicon chip 191 described later and transmits holes generated by photoelectric conversion.
  • the bump electrode 162 can be made of, for example, copper (Cu).
  • Silicon chip 191 is a semiconductor chip including a substrate made of silicon (Si).
  • the silicon chip 191 generates an image signal based on the holes generated by the compound semiconductor chip 192.
  • the pixel circuit described in FIG. 2 is arranged on the silicon chip 191. Further, the vertical drive unit 20 and the like described in FIG. 1 can be arranged on the silicon chip 191.
  • the silicon chip 191 includes a semiconductor substrate 120 and a wiring region 140.
  • the semiconductor substrate 120 is a semiconductor substrate composed of Si.
  • a diffusion region such as an element of the pixel 100 is arranged in the well region formed on the semiconductor substrate 120.
  • a well region 121 configured in an n-shape is shown.
  • the p-channel MOS transistor described in FIG. 2 can be arranged in the n-type well region 121.
  • the p-channel MOS transistor can be arranged by arranging the p-type semiconductor region in the n-type well region 121.
  • p-type semiconductor regions 122 to 126 are shown.
  • the p-type semiconductor region 122 constitutes the coupling region 119.
  • the contact plug 143 is connected to the coupling region 119.
  • the p-type semiconductor regions 122 and 123 constitute the drain region and the source region of the coupling region initialization unit 104, and the gate electrode 131 is located close to the n-type well region 121 between the p-type semiconductor regions 122 and 123. Be placed. Channels are formed in the n-type well region 121 between the p-type semiconductor regions 122 and 123.
  • the p-type semiconductor regions 122 and 124 form a source region and a drain region of the charge transfer unit 105, and the gate electrode 132 is located close to the n-type well region 121 between the p-type semiconductor regions 122 and 123. Be placed.
  • the p-type semiconductor region 122 constitutes the coupling region 119, the drain region of the coupling region initialization unit 104, and the source region of the charge transfer unit 105.
  • the p-type semiconductor region 124 constitutes the charge holding unit 102.
  • the p-type semiconductor regions 124 and 125 constitute the source region and drain region of the second charge transfer unit 106, and the gate electrode 133 is close to the n-type well region 121 between the p-type semiconductor regions 124 and 125. Is placed.
  • the p-type semiconductor region 125 constitutes a second charge holding unit 103.
  • the p-type semiconductor regions 125 and 126 form a source region and a drain region of the reset portion 107, and the gate electrode 134 is arranged in the vicinity of the n-type well region 121 between the p-type semiconductor regions 125 and 126. ..
  • the input signal line of the potential adjusting unit 110 is connected to the p-type semiconductor region 122 constituting the coupling region 119, and the output signal line of the potential adjusting unit 110 is connected to the gate electrode 132 of the charge transfer unit 105. .. Further, the input signal line of the image signal generation unit 115 is connected to the p-type semiconductor region 125 constituting the second charge holding unit 103.
  • the image signal generation unit 115 in the figure can be formed in a p-shaped well region (not shown). These signal lines are formed by the wiring layer 142 described later.
  • the wiring region 140 is a wiring region formed on the surface side of the semiconductor substrate 120, and is a region in which wiring connected to the above-mentioned coupling region 119 or the like is formed.
  • the wiring region 140 includes an insulating layer 141, a wiring layer 142, a contact plug 143, a via plug 144, and a bump electrode 145.
  • the wiring layer 142 transmits a signal to the coupling region 119 and the like.
  • the wiring layer 142 can be made of a metal such as Cu.
  • the insulating layer 141 insulates the wiring layer 142.
  • the insulating layer 141 can be made of, for example, an insulating material such as SiO 2.
  • the wiring layer 142 and the insulating layer 141 can be configured in multiple layers.
  • the insulating layer 141 between the gate electrodes 131 to 134 and the semiconductor substrate 120 corresponds to a gate insulating film.
  • the contact plug 143 connects the semiconductor region of the semiconductor substrate 120 and the wiring layer 142.
  • the contact plug 143 can be configured by, for example, W or the like.
  • the via plug 144 connects the wiring layers 142 to each other or the wiring layer 142 to the bump electrode 145.
  • the via plug 144 can be made of, for example, Cu or the like.
  • the bump electrode 145 is a bump arranged on the surface of the insulating layer 141.
  • the bump electrode 145 is connected to the wiring layer 142 by a via plug 144.
  • the bump electrode 145 is bonded to the bump electrode 162 of the compound semiconductor chip 192.
  • the image pickup device 1 provided with the pixel 100 in the figure is configured by laminating individually manufactured compound semiconductor chips 192 and silicon chips 191. At the time of this bonding, the bump electrodes 145 and 162 are joined to transmit signals between the respective chips.
  • the bump electrode 145 can be made of Cu in the same manner as the bump electrode 162.
  • the transparent electrode 171 is a transparent electrode arranged on the back surface of the compound semiconductor chip 192.
  • the power supply line Vtop described in FIG. 2 is connected to the transparent electrode 171 to supply a bias voltage to the compound semiconductor substrate 150.
  • ITO Indium Tin Oxide
  • the protective film 172 is a film that protects the back surface of the compound semiconductor chip 192 and the transparent electrode 171.
  • the on-chip lens 179 is a lens that collects incident light on the photoelectric conversion unit.
  • the on-chip lens 179 collects incident light on the first compound semiconductor layer 151.
  • the on-chip lens 179 can be made of an inorganic material such as silicon nitride (SiN) or an organic material such as an acrylic resin.
  • the holes generated by the photoelectric conversion of the first compound semiconductor layer 151 of the compound semiconductor chip 192 are transmitted to the silicon chip 191 via the second compound semiconductor layer 152, the electrode 155, and the bump electrode 162.
  • the transmitted holes are transmitted to the semiconductor region 122 constituting the coupling region 119 via the bump electrode 145, the via plug 144, the wiring layer 142, and the contact plug 143.
  • FIG. 4 is a diagram showing an example of image signal generation according to the first embodiment of the present disclosure.
  • the figure is a time chart showing an example of generation of an image signal in the pixel 100.
  • SEL”, “RST”, “TR” and “INI” represent binarized control signals transmitted by signal line SEL, signal line RST, signal line TR and signal line INI, respectively. ..
  • the signal line SEL corresponding to "SEL” outputs a control signal corresponding to the gate-source voltage Vgs that causes the MOS transistor 109 to transition to the conductive state when the value is "1".
  • the control signal for transitioning the MOS transistor to the conduction state is referred to as an on signal.
  • the signal line RST, signal line TR, and signal line INI corresponding to "RST”, “TR”, and “INI” output an ON signal when the value is "0".
  • “Vini” in the figure represents a voltage output by the signal line Vini.
  • the “coupling region 119", “charge transfer unit 105 gate”, and “charge holding unit 102” represent the potential of the coupling region 119, the voltage applied to the gate of the charge transfer unit 105, and the potential of the charge holding unit 102, respectively.
  • the potential adjusting unit 110 compares the potential of the coupling region 119 with the transfer reference potential supplied by the power supply line Vref.
  • the charge holding unit 103 is in a state of being reset to the reset potential Vrst.
  • the signal line Vini outputs the initialization voltage (2.4V).
  • the potential of the potential of the coupling region 119 rises to 2.4V. Since the potential of the coupling region 119 is higher than the transfer reference potential, the potential barrier of the charge transfer unit 105 becomes shallow due to the action of the potential adjusting unit 110, holes flow in from the coupling region 119, and the potential of the charge holding unit 102 also becomes 2. It rises to .4V.
  • the input of the on signal from the signal line INI is stopped, and the coupling region initialization unit 104 is in a non-conducting state.
  • an on signal is input to the signal line RST, and the reset unit 107 becomes conductive. Further, an on signal is input to the signal line TR, and the second charge transfer unit 106 becomes conductive. As a result, the charge of the charge holding unit 102 is discharged via the second charge transfer unit 106 and the second charge holding unit 103. At this time, due to the action of the potential adjusting unit 110, the potential of the coupling region 119 becomes 1.7 V, which is the transfer reference potential.
  • the input of the ON signal of the signal line TR is stopped, and the second charge transfer unit 106 transitions to the non-conducting state.
  • the electric charge transmitted from the photoelectric conversion unit 101 is accumulated in the charge holding unit 102.
  • the potential of the charge holding unit 102 rises as the charge accumulates.
  • the input of the on signal from the signal line RST is stopped, and the reset unit 107 is in a non-conducting state. Further, an on signal is input from the signal line SEL, and the MOS transistor 109 becomes conductive. As a result, the image signal generated by the image signal generation unit 115 is output from the pixel 100. The image signal output at this time corresponds to the image signal at the time of reset.
  • the input of the on signal from the signal line SEL is stopped. Further, an on signal is input from the signal line TR, and the second charge transfer unit 106 becomes conductive. As a result, the charge held in the charge holding unit 102 is transferred to the second charge holding unit 103.
  • an on signal is input from the signal line SEL, and the MOS transistor 109 becomes conductive.
  • the image signal generation unit 115 outputs an image signal based on the electric charge held by the second electric charge holding unit 103.
  • the input of the on signal from the signal line SEL is stopped. Further, an on signal is input from the signal line RST, and the reset unit 107 becomes conductive. As a result, the electric charge held by the second electric charge holding unit 103 is discharged.
  • the input of the on signal from the signal line RST is stopped, and the reset unit 107 is in a non-conducting state.
  • the image signal can be generated by the above procedure.
  • the period of T4 corresponds to the exposure period.
  • the processes of T1 to T5 are simultaneously performed on all the pixels 100 arranged in the pixel array unit 10 described with reference to FIG.
  • the processes of T6 to T9 are sequentially performed for each pixel 100 arranged in the row of the pixel array unit 10.
  • Such an imaging method is called a global shutter method.
  • the reset image signal generated in T6 is subtracted from the image signal generated in T8.
  • Such a method of generating an image signal is called Correlated Double Sampling (CDS).
  • This CDS can be performed by, for example, the column signal processing unit 30 described in FIG.
  • FIGS. 5 to 7 are diagrams showing an example of the potential according to the first embodiment of the present disclosure.
  • 5 to 7 are diagrams showing an example of the potential in the pixel 100 corresponding to the processing of FIG.
  • FIGS. 5 to 7 show the signal line Vini, the coupling region initialization unit 104, the coupling region 119, the charge transfer unit 105, the charge holding unit 102, the second charge transfer unit 106, the second charge holding unit 103, and the reset. It is a figure showing the change of the electric charge of the part 107 and the power supply line Vrst.
  • the shaded rectangles represent the potential barriers of the coupling region initialization unit 104 and the charge transfer unit 105.
  • the area with dot hatching represents the accumulated charge.
  • the coupling region initialization unit 104 is in a conductive state, and the reset potential Vr is output to the signal line Vini.
  • the charge in the coupling region 119 is discharged to the signal line Vini by the coupling region initialization unit 104 (T0 in FIG. 4).
  • the initial potential (2.4V) is output to the signal line Vini.
  • the potential of the coupling region 119 rises to the initialization voltage. Due to the action of the potential adjusting unit 110, the potential barrier of the charge transfer unit 105 becomes shallow, the charge flows in, and the potential of the charge holding unit 102 also becomes the initial potential (T1 in FIG. 4).
  • the coupling region initialization unit 104 is in a non-conducting state (T2 in FIG. 4).
  • the second charge transfer unit 106 and the reset unit 107 are in a conductive state.
  • the charges of the coupling region 119 and the charge holding unit 102 are discharged to the power supply line Vrst.
  • the barrier of the charge transfer unit 105 becomes relatively shallow due to the action of the potential adjusting unit 110. Therefore, a large amount of electric charge flows out from the coupling region 119 (D in FIG. 5).
  • the second charge transfer unit 106 is in a non-conducting state.
  • the charge that overflows from the potential barrier of the charge transfer unit 105 and diffuses to the charge holding unit 102 is held.
  • the electric charge transferred from the photoelectric conversion unit 101 to the coupling region 119 is started to be accumulated by the charge holding unit 102, and the exposure period is started (T4 in FIG. 4).
  • the coupling region initialization unit 104 becomes conductive, and the reset potential Vr is output to the signal line Vini.
  • the charge in the coupling region 119 is discharged to the signal line Vini.
  • the potential barrier of the charge transfer unit 105 becomes deeper, and the charge of the charge holding unit 102 is retained (T5 in FIG. 4).
  • the reset unit 107 is in a non-conducting state, and the image signal generation unit 115 generates an image signal at the time of reset (T6 in FIG. 4).
  • the second charge transfer unit 106 conducts, and the charge held in the charge holding unit 102 is transferred to the second charge holding unit 103 (T7 in FIG. 4).
  • the second charge transfer unit 106 is in a non-conducting state.
  • An image signal is generated by the image signal generation unit 115 (T8 in FIG. 4).
  • the reset unit 107 is in a conductive state.
  • the charge held by the second charge holding unit 103 is discharged (T9 in FIG. 4).
  • the height of the potential barrier of the charge transfer unit 105 changes according to the potential of the coupling region 119.
  • the potential of the coupling region 119 is near the initial potential, a large amount of electric charge flows out from the coupling region 119 and a large current flows.
  • the reset time can be shortened in the coupling region 119 in which the electric charge generated by the photoelectric conversion unit 101 made of a semiconductor different from the semiconductor substrate 120 is transmitted.
  • the potential adjusting unit 110 adjusts the potential barrier of the charge transfer unit 105 to stabilize the potential of the coupling region 119, the error of the image signal is reduced and a high-speed response is obtained. Can be done.
  • the potential adjusting unit 110 adjusts the height of the potential barrier of the charge transfer unit 105 based on the difference between the potential of the coupling region 119 and the transfer reference potential, the potential of the coupling region 119 is adjusted with relatively high accuracy. be able to. It is possible to reduce the occurrence of an error in the image signal due to the fluctuation of the potential of the coupling region 119.
  • the example of the pixel 100 which is formed by sticking the compound semiconductor chip 192 and the silicon chip 191 which were manufactured individually respectively is shown.
  • the pixel 100 (image sensor 1) can be manufactured by laminating a compound semiconductor chip 192 and a silicon chip 191 separated from a wafer. Further, the wafers in which the plurality of compound semiconductor chips 192 and the silicon chips 191 are arranged are bonded together, and the wafers after the bonding are individualized to manufacture the pixel 100 (image sensor 1). It is also possible to do.
  • the compound semiconductor chip 192 and the silicon chip 191 can also be referred to as substrates, respectively. Further, the compound semiconductor chip 192 can also be referred to as a semiconductor portion in which an electrode 155 and an insulating layer 161 are arranged on a compound semiconductor substrate 150 or the like. Similarly, the silicon chip 191 can be referred to as a semiconductor portion in which the wiring region 140 is arranged on the semiconductor substrate 120. As described above, different names can be used for the compound semiconductor chip 192 and the silicon chip 191.
  • FIG. 3 an example in which the bump electrode 162 and the bump electrode 145 are bonded when the compound semiconductor chip 192 and the silicon chip 191 are bonded to each other is shown.
  • the bonding of the compound semiconductor chip 192 and the silicon chip 191 is not limited to this example.
  • the bump electrode 162 and the bump electrode 145 are wirings arranged on the surface of the wiring region of each chip, and bond these wirings by directly joining them.
  • the image sensor 1 which is the light receiving element of the first embodiment of the present disclosure arranges the potential adjusting unit 110 which adjusts the potential barrier of the charge transfer unit 105 according to the potential of the coupling region 119. ..
  • the potential adjusting unit 110 quickly converges the potential of the coupling region 119 from the initial potential to the transfer reference potential. As a result, the time required for resetting can be shortened.
  • the potential adjusting unit 110 is arranged to adjust the potential barrier of the charge transfer unit 105.
  • a specific circuit configuration of the potential adjusting unit 110 is proposed.
  • FIG. 8 is a diagram showing a configuration example of pixels according to the second embodiment of the present disclosure. Similar to FIG. 2, the figure is a circuit diagram showing a configuration example of the pixel 100. It differs from the pixel 100 in FIG. 2 in that it includes a potential adjusting unit 110 composed of a MOS transistor.
  • the potential adjusting unit 110 in the figure includes MOS transistors 111 and 112.
  • a p-channel MOS transistor can be used as the MOS transistor 111.
  • an n-channel MOS transistor can be used as the MOS transistor 112.
  • a power supply line Vb is arranged in the pixel 100 in the figure.
  • the source of the MOS transistor 111 is connected to the power supply line Vref, and the gate is connected to the coupling region 119.
  • the drain of the MOS transistor 111 is connected to the drain of the MOS transistor 112 and the gate of the charge transfer unit 105.
  • the gate of the MOS transistor 112 is connected to the power supply line Vb, and the source is grounded.
  • the power supply line Vb is a power supply line that supplies the gate bias voltage Vb of the MOS transistor 112.
  • the MOS transistor 112 constitutes a constant current load of the MOS transistor 111.
  • the MOS transistor 111 constitutes a grounded-source circuit and amplifies the potential of the coupling region 119 applied to the gate. Since the source of the MOS transistor 111 is connected to the power supply line Vref, a current corresponding to the difference between the transfer reference potential supplied by the power supply line Vref and the potential of the coupling region 119 applied to the gate is output to the drain. This current is converted into a voltage by the MOS transistor 112 that constitutes the load, and is output to the gate of the charge transfer unit 105.
  • a voltage drop based on the threshold voltage Vgs occurs between the source and the gate of the MOS transistor 111. Therefore, the voltage supplied by the power supply line Vref needs to be supplied with a high voltage in anticipation of this voltage drop. Specifically, a voltage of 2.4 V can be supplied by the power supply line Vref with respect to the transfer reference potential of 1.7 V.
  • the configuration of the potential adjusting unit 110 is not limited to this example.
  • a resistive load can be arranged instead of the MOS transistor 112.
  • the image sensor 1 of the second embodiment of the present disclosure can simplify the configuration of the pixel 100 by using the potential adjusting unit 110 composed of the MOS transistors 111 and 112. it can.
  • the image sensor 1 of the first embodiment described above used the photoelectric conversion unit 101 composed of a compound semiconductor.
  • the image pickup device 1 of the third embodiment of the present disclosure is different from the above-described first embodiment in that a photoelectric conversion unit composed of an organic photoelectric conversion film is used.
  • FIG. 9 is a diagram showing a configuration example of pixels according to the third embodiment of the present disclosure. Similar to FIG. 2, the figure is a circuit diagram showing a configuration example of pixels.
  • a photoelectric conversion unit 201 is arranged instead of the photoelectric conversion unit 101, and the coupling region initialization unit 104, the charge transfer unit 105, the second charge transfer unit 106, and the reset unit 107 are formed by an n-channel MOS transistor. It differs from the pixel 100 in FIG. 2 in that it is configured.
  • the photoelectric conversion unit 201 is a photoelectric conversion unit composed of an organic photoelectric conversion film.
  • the photoelectric conversion unit 201 is configured by sandwiching an organic photoelectric conversion film between an upper electrode and a lower electrode.
  • the upper electrode is connected to the power line Vtop, and the lower electrode is connected to the coupling region 119.
  • the photoelectric conversion unit 201 generates an electric charge by photoelectric conversion of incident light.
  • the power supply line Vtop in the figure supplies a power supply voltage lower than that of the lower electrode to the upper electrode. As a result, electrons of the generated charges are transferred to the bonding region 119.
  • the lower electrode (lower electrode 282 described later) of the photoelectric conversion unit 201 is connected to the coupling region 119, and the upper electrode (upper electrode 284 described later) is connected to the power supply line Vtop.
  • the wiring of the other elements is the same as that of the pixel 100 in FIG. 2, and thus the description thereof will be omitted.
  • FIG. 10 is a cross-sectional view showing a configuration example of a pixel according to a third embodiment of the present disclosure.
  • the figure is a schematic cross-sectional view showing a configuration example of the pixel 200. It differs from the pixel 100 in FIG. 2 in that the semiconductor substrate 220 and the wiring area 240 are arranged in place of the semiconductor substrate 120 and the wiring area 140, and the photoelectric conversion unit 201 is arranged in place of the photoelectric conversion unit 101.
  • the pixel 200 in the figure includes a semiconductor substrate 220, a wiring region 240, an insulating film 229, an insulating layer 281, a photoelectric conversion unit 201, a through electrode 244, a protective film 172, and an on-chip lens 179. ..
  • the semiconductor substrate 220 is a semiconductor substrate composed of Si and in which pixel circuits are arranged.
  • a p-type well region 221 is formed on the semiconductor substrate 220, and an n-type semiconductor region is arranged.
  • the n-type semiconductor region 222 constitutes a coupling region 119.
  • a through electrode 244 is connected to the coupling region 119.
  • the n-type semiconductor regions 222 and 223 constitute a drain region and a source region of the coupling region initialization unit 104, and the gate electrode 231 is located close to the n-type well region 221 between the n-type semiconductor regions 222 and 223. Be placed.
  • the n-type semiconductor regions 222 and 224 form a source region and a drain region of the charge transfer unit 105, and the gate electrode 232 is located close to the n-type well region 221 between the n-type semiconductor regions 222 and 224. Be placed.
  • the n-type semiconductor region 224 constitutes the charge holding unit 102.
  • the n-type semiconductor regions 224 and 225 constitute the source region and drain region of the second charge transfer unit 106, and the gate electrode 233 is close to the p-type well region 221 between the n-type semiconductor regions 224 and 225. Is placed.
  • the n-type semiconductor region 225 constitutes a second charge holding unit 103.
  • the n-type semiconductor regions 225 and 226 form a source region and a drain region of the reset unit 107, and the gate electrode 234 is arranged in the vicinity of the p-type well region 221 between the n-type semiconductor regions 225 and 226. ..
  • the wiring area 240 is a wiring area formed on the surface side of the semiconductor substrate 220, and includes an insulating layer 241, a wiring layer 242, and a contact plug 243.
  • the insulating film 229 is a film that protects the back surface side of the semiconductor substrate 220.
  • the insulating layer 281 is an insulating layer arranged between the photoelectric conversion unit 201 and the semiconductor substrate 220, which will be described later.
  • the photoelectric conversion unit 201 includes an upper electrode 284, a photoelectric conversion film 283, and a lower electrode 282.
  • the upper electrode 284 is a transparent electrode arranged adjacent to the upper layer of the photoelectric conversion film 283.
  • the upper electrode 284 can be made of, for example, ITO.
  • the photoelectric conversion film 283 is composed of an organic photoelectric conversion film and is a film that performs photoelectric conversion of incident light.
  • the photoelectric conversion film 283 can be made of an organic photoelectric conversion material containing, for example, a rhodamine-based dye, a melanicin-based dye, quinacridone, a phthalocyanine-based dye, a coumarin-based dye, and tris-8-hydroxyquinoline Al. Further, the photoelectric conversion film 283 can be configured to absorb light having a specific wavelength among the incident light to perform photoelectric conversion.
  • the lower electrode 282 is a film that is arranged adjacent to the lower layer of the photoelectric conversion film 283 and transmits the electric charge generated by the photoelectric conversion film 283.
  • the lower electrode 282 can be made of, for example, a metal such as Ti.
  • the through electrode 244 is an electrode that penetrates the semiconductor substrate 220.
  • the through electrode 244 is arranged between the lower electrode 282 and the wiring layer 242 of the wiring region 240, and transmits the electric charge generated by the photoelectric conversion unit 201.
  • the electric charge (electrons) generated by the photoelectric conversion unit 201 is transmitted to the coupling region 119 via the through electrode 244, the wiring layer 242, and the contact plug 243.
  • the time required for the potential of the coupling region 119 to converge to the transfer reference potential can be shortened by the action of the potential adjusting unit 110.
  • the image pickup device 1 of the third embodiment of the present disclosure can shorten the time required for resetting the image pickup device 1 using the photoelectric conversion unit 201 composed of the organic photoelectric conversion film. ..
  • FIG. 11 is a plan view showing a configuration example of the light receiving element according to the embodiment of the present disclosure.
  • FIG. 6 is a plan view showing a configuration example of an image pickup device 1 which is an example of a light receiving element. Further, the figure shows the configuration of the image sensor 1 as viewed from the light receiving surface side, which is the surface on which the incident light is irradiated.
  • the compound semiconductor chip 192 described in FIG. 3 is arranged on the light receiving surface side of the image sensor 1. Further, a plurality of pad electrodes 149 are arranged on the light receiving surface of the image sensor 1. The pad electrode 149 is arranged on the peripheral edge of the light receiving surface of the image sensor 1 and is an electrode for making an electrical connection with the outside. As will be described later, the pad electrode 149 is arranged at the bottom of the holes 184 formed in the compound semiconductor chip 192 and the silicon chip 191.
  • a conductive film 183 having an opening 185 in the center is arranged inside the pad electrode on the light receiving surface of the compound semiconductor chip 192.
  • the hatched region in the figure represents the region of the conductive film 183.
  • a plurality of holes 181 are arranged in the lower layer of the conductive film 183.
  • the plurality of holes 181 are arranged at the peripheral edge of the region where the conductive film 183 is arranged.
  • the broken line rectangle in the figure represents the hole 181.
  • a wiring layer 148 which will be described later, is arranged at the bottom of these holes 181.
  • the conductive film 183 is arranged along the bottom and side walls of the hole 181 and is electrically connected to the wiring layer 148. Further, an opening 174 of the protective film 172 described with reference to FIG.
  • the opening 174 is an opening for bringing the conductive film 183 and the transparent electrode 171 described in FIG. 3 into contact with each other and electrically connecting them.
  • the conductive film 183 is arranged along the bottom and side walls of the opening 174.
  • the dotted rectangle in the figure represents the element region 90.
  • the element region 90 corresponds to the pixel array unit 10 described with reference to FIG. 1, and a plurality of pixels 100 are arranged.
  • FIG. 12 is a cross-sectional view showing a configuration example of the light receiving element according to the embodiment of the present disclosure.
  • FIG. 3 is a cross-sectional view showing a configuration example of the image pickup device 1, and is a cross-sectional view taken along the line aa'in FIG.
  • the image pickup device 1 in the figure is configured by laminating a compound semiconductor chip 192 and a silicon chip 191.
  • the compound semiconductor chip 192 in the figure includes an element region 90, a protective layer 154, an embedded layer 180, a conductive film 183, and an insulating layer 161.
  • the element region 90 is arranged in the central portion of the compound semiconductor chip 192.
  • the compound semiconductor substrate 150 described in FIG. 3 the first compound semiconductor layer 151, the second compound semiconductor layer 152, the separation region 153, and the electrode 155 are arranged. That is, the element region 90 in the figure is composed of a compound semiconductor, electrodes, and the like. Further, a transparent electrode 171 and a protective film 172 are arranged adjacent to the compound semiconductor substrate 150.
  • the embedded layer 180 is a region in which the element region 90 is formed in an embedded shape.
  • the embedded layer 180 is arranged around the element region 90 and has a film thickness thicker than that of the element region 90.
  • the embedded layer 180 can be made of an insulating material.
  • the embedded layer 180 can be composed of SiO 2 , SiN, silicon oxynitride (SiON), carbon-containing silicon (SiOC), and silicon carbide (SiC).
  • the protective layer 154 in the figure is arranged between the element region 90 and the embedded layer 180.
  • the insulating layer 161 in the figure is arranged adjacent to the back surface side of the embedded layer 180.
  • the conductive film 183 is a conductive film that supplies power to the transparent electrode 171.
  • the conductive film 183 can be made of metal.
  • the conductive film 183 can be made of a metal containing tungsten (W), aluminum (Al), titanium (Ti), molybdenum (Mo), tantalum (Ta), Cu and the like.
  • the above-mentioned hole 181 is arranged in the embedded layer 180.
  • the hole 181 is formed in a shape that reaches the wiring layer 148 arranged in the wiring region 140 of the silicon chip 191 from the light receiving surface of the compound semiconductor chip 192.
  • the conductive film 183 is arranged adjacent to the wiring layer 148 on the inner wall and the bottom of the hole 181 and is electrically connected to the wiring layer 148.
  • the above-mentioned opening 174 is arranged in the protective film 172 arranged adjacent to the transparent electrode 171.
  • the conductive film 183 is arranged adjacent to the transparent electrode 171 in the opening 174 and is electrically connected to the transparent electrode 171.
  • the cathode voltage is supplied from the wiring layer 148 of the silicon chip 191 to the transparent electrode 171 via the conductive film 183 as a power source.
  • the wiring layer 148 and the conductive film 183 correspond to the power supply line Vtop described in FIG.
  • the conductive film 183 further shields the incident light.
  • the opening 185 is arranged at the center of the conductive film 183. Pixels 100 are arranged directly below the opening 185, and photoelectric conversion of incident light is performed.
  • the pixel 190 is arranged directly below the conductive film 183. The pixel 190 is shielded from light by the conductive film 183.
  • Such a pixel 190 is referred to as an OPB (Optical Black) pixel, and is a pixel arranged for acquiring the black level of the image signal output by the image sensor 1.
  • a protective film 173 is arranged on the surface of the conductive film 183.
  • a hole 184 is further arranged in the embedded layer 180.
  • the hole 184 is formed in a shape that reaches the pad electrode 149 arranged in the wiring region 140 of the silicon chip 191 from the light receiving surface of the compound semiconductor chip 192.
  • the image sensor 1 can be connected to an external circuit by performing wire bonding to the pad electrode 149 through the hole 184.
  • the silicon chip 191 includes the semiconductor substrate 120 and the wiring area 140 described in FIG.
  • the pixel circuit 116 is shown instead of the potential adjusting unit 110 and the like.
  • the pixel circuit 116 corresponds to a circuit other than the photoelectric conversion unit 101 of the pixel 100 in FIG.
  • a pixel circuit 116 is connected to the wiring layer 142 in the figure.
  • FIG. 13 is a cross-sectional view showing another configuration example of the light receiving element according to the embodiment of the present disclosure.
  • FIG. 6 is a cross-sectional view showing another configuration example of the image sensor 1.
  • the image sensor 1 in the figure is configured by laminating a compound semiconductor chip 193 and a silicon chip 191.
  • the compound semiconductor chip 193 includes an element region 90, an embedded layer 180, an antireflection film 177, a color filter 178, and an on-chip lens 179. Pixels 100 are arranged in the element region 90.
  • the compound semiconductor substrate 150 of the pixel 100 is supplied with a cathode voltage via an electrode (not shown).
  • the antireflection film 177 prevents reflection of incident light.
  • the antireflection film 177 is made of, for example, SiN, hafnium oxide (HfO 2 ), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), tantalum oxide (Ta 2 O 5 ) and titanium oxide (TIO 2 ). Can be configured.
  • the color filter 178 is an optical filter that is arranged for each pixel 100 and transmits incident light having a predetermined wavelength.
  • As the color filter 178 three types of color filters that transmit red light, green light, and blue light can be used.
  • One of three types of color filters 178 is arranged on the pixel 100.
  • the compound semiconductor chip 193 is attached to the silicon chip 191 via the bump 194. Specifically, the bump electrode 162 of the compound semiconductor chip 193 and the bump electrode 145 of the silicon chip 191 are joined by the bump 194. For the bump 194, for example, a solder bump can be used. An insulating layer 195 is arranged around the bump 194.
  • the technology according to the present disclosure can be applied to various products.
  • the present technology may be realized as an image pickup device mounted on an image pickup device such as a camera.
  • FIG. 14 is a block diagram showing a schematic configuration example of a camera which is an example of an imaging device to which the present technology can be applied.
  • the camera 1000 in the figure includes a lens 1001, an image pickup element 1002, an image pickup control unit 1003, a lens drive unit 1004, an image processing unit 1005, an operation input unit 1006, a frame memory 1007, a display unit 1008, and the like.
  • a recording unit 1009 is provided.
  • the lens 1001 is a photographing lens of the camera 1000.
  • the lens 1001 collects light from the subject and causes the light to be incident on the image pickup device 1002 described later to form an image of the subject.
  • the image sensor 1002 is a semiconductor element that captures light from a subject focused by the lens 1001.
  • the image sensor 1002 generates an analog image signal according to the irradiated light, converts it into a digital image signal, and outputs the signal.
  • the image pickup control unit 1003 controls the image pickup in the image pickup device 1002.
  • the image pickup control unit 1003 controls the image pickup device 1002 by generating a control signal and outputting the control signal to the image pickup device 1002. Further, the image pickup control unit 1003 can perform autofocus on the camera 1000 based on the image signal output from the image pickup device 1002.
  • the autofocus is a system that detects the focal position of the lens 1001 and automatically adjusts it.
  • a method (image plane phase difference autofocus) in which the image plane phase difference is detected by the phase difference pixels arranged in the image sensor 1002 to detect the focal position can be used. It is also possible to apply a method (contrast autofocus) of detecting the position where the contrast of the image is highest as the focal position.
  • the image pickup control unit 1003 adjusts the position of the lens 1001 via the lens drive unit 1004 based on the detected focus position, and performs autofocus.
  • the image pickup control unit 1003 can be configured by, for example, a DSP (Digital Signal Processor) equipped with firmware.
  • DSP Digital Signal Processor
  • the lens driving unit 1004 drives the lens 1001 based on the control of the imaging control unit 1003.
  • the lens driving unit 1004 can drive the lens 1001 by changing the position of the lens 1001 using a built-in motor.
  • the image processing unit 1005 processes the image signal generated by the image sensor 1002. This processing includes, for example, demosaic to generate an image signal of a color that is insufficient among the image signals corresponding to red, green, and blue for each pixel, noise reduction to remove noise of the image signal, and coding of the image signal. Applicable.
  • the image processing unit 1005 can be configured by, for example, a microcomputer equipped with firmware.
  • the operation input unit 1006 receives the operation input from the user of the camera 1000.
  • a push button or a touch panel can be used for the operation input unit 1006.
  • the operation input received by the operation input unit 1006 is transmitted to the image pickup control unit 1003 and the image processing unit 1005. After that, processing according to the operation input, for example, processing such as imaging of the subject is activated.
  • the frame memory 1007 is a memory that stores a frame that is an image signal for one screen.
  • the frame memory 1007 is controlled by the image processing unit 1005 and holds frames in the process of image processing.
  • the display unit 1008 displays the image processed by the image processing unit 1005.
  • a liquid crystal panel can be used.
  • the recording unit 1009 records the image processed by the image processing unit 1005.
  • a memory card or a hard disk can be used for the recording unit 1009.
  • the cameras to which this disclosure can be applied have been described above.
  • the present technology can be applied to the image pickup device 1002 among the configurations described above.
  • the image pickup device 1 described with reference to FIG. 1 can be applied to the image pickup device 1002.
  • the image processing unit 1005 is an example of the processing circuit described in the claims.
  • the camera 1000 is an example of the light receiving device according to the claims.
  • the technology according to the present disclosure may be applied to other devices such as a monitoring device.
  • the present disclosure can be applied to a semiconductor device in the form of a semiconductor module in addition to an electronic device such as a camera.
  • the technique according to the present disclosure can be applied to an image pickup module which is a semiconductor module in which the image pickup element 1002 and the image pickup control unit 1003 of FIG. 14 are enclosed in one package.
  • the configuration of the pixel 100 of the second embodiment can be combined with the third embodiment. Specifically, the potential adjusting unit 110 of FIG. 8 can be applied to the potential adjusting unit 110 of FIG.
  • the present technology can have the following configurations.
  • a photoelectric conversion unit that generates electric charges by performing photoelectric conversion of incident light, and A coupling region formed on a semiconductor substrate and coupled to the photoelectric conversion unit to transmit the generated charge, A charge holding unit that holds the charge and A charge transfer unit that forms a potential barrier between the coupling region and the charge holding unit to control the transfer of the charge transmitted to the coupling region to the charge holding unit.
  • Potential adjustment that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer unit based on the transfer reference potential, which is the reference potential when transferring the transferred charge to the charge holding unit.
  • Department and A light receiving element including a light receiving signal generating unit that generates a light receiving signal based on the charge held in the charge holding unit.
  • the charge transfer unit includes a control input terminal and forms the potential barrier according to the control voltage applied to the control input terminal.
  • the charge transfer unit is composed of a MOS transistor having a gate as the control input terminal.
  • the charge transfer unit has a source connected to the coupling region and a drain connected to the charge holding unit.
  • the potential adjusting unit applies the potential of the coupling region to the gate of the MOS transistor, and the transfer reference potential is applied to the source of the MOS transistor.
  • a coupling region initialization unit that initializes the coupling region to a predetermined initial potential by injecting an electric charge into the coupling region.
  • the charge holding unit is further provided with a reset unit that resets the charge holding unit by discharging the charge held in the charge holding unit, and the potential adjusting unit adjusts the potential barrier at the time of the initialization and the coupling.
  • the charge injected into the region is transferred to the charge holding unit, and the charge is transferred to the charge holding unit.
  • the reset unit resets the charge holding unit at the start of adjustment by the potential adjusting unit after the initialization.
  • the light receiving signal generation unit generates any of the light receiving signals (1) to (7) based on the charge transferred to and held by the charge holding unit during a predetermined exposure period after the initialization.
  • the light receiving element according to.
  • a second charge holding unit that holds the charge and It further includes a second charge transfer unit that transfers the charge held in the charge holding unit to the second charge holding unit.
  • the photoelectric conversion unit is composed of a compound semiconductor.
  • the photoelectric conversion unit includes an organic photoelectric conversion film.
  • a photoelectric conversion unit that generates electric charges by performing photoelectric conversion of incident light, and A coupling region formed on a semiconductor substrate and coupled to the photoelectric conversion unit to transmit the generated charge, A charge holding unit that holds the charge and A charge transfer unit that forms a potential barrier between the coupling region and the charge holding unit to control the transfer of the charge transmitted to the coupling region to the charge holding unit.
  • Potential adjustment that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer unit based on the transfer reference potential, which is the reference potential when transferring the transferred charge to the charge holding unit.
  • Department and A light receiving signal generation unit that generates a light receiving signal based on the charge held in the charge holding unit, and a light receiving signal generating unit.
  • a light receiving device including a processing circuit for processing the generated light receiving signal.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

La présente invention réduit le temps de réinitialisation d'un élément de réception de lumière. Cet élément de réception de lumière comprend une section de conversion photoélectrique, une région de couplage, une section de maintien de charge, une section de transfert de charge, une section de réglage de potentiel et une section de génération de signal de réception de lumière. La section de conversion photoélectrique génère des charges en soumettant la lumière incidente à une conversion photoélectrique. La région de couplage est formée dans un substrat semi-conducteur et est couplée à la section de conversion photoélectrique pour que les charges générées lui soient transférées. La section de maintien de charge maintient les charges. La section de transfert de charge forme une barrière de potentiel entre la région de couplage et la section de maintien de charge pour commander le transfert vers la section de maintien de charge des charges transférées à la région de couplage. La section de réglage de potentiel règle le potentiel de la région de couplage par réglage de la barrière de potentiel de la section de transfert de charge sur la base d'un potentiel de référence de transfert, qui est un potentiel de référence pendant le transfert des charges transférées à la section de maintien de charge. La section de génération de signal de réception de lumière génère un signal de réception de lumière sur la base des charges maintenues par la section de maintien de charge.
PCT/JP2020/043034 2020-01-07 2020-11-18 Élément de réception de lumière et dispositif de réception de lumière WO2021140753A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024100767A1 (fr) * 2022-11-08 2024-05-16 ソニーセミコンダクタソリューションズ株式会社 Dispositif de détection de lumière, procédé de commande de dispositif de détection de lumière et appareil électronique

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Publication number Priority date Publication date Assignee Title
EP1887626A1 (fr) * 2006-08-09 2008-02-13 Tohoku University Capteur optique à grille de débordement et condensateur de stockage
JP2011130364A (ja) * 2009-12-21 2011-06-30 Sony Corp 固体撮像装置およびその駆動方法、カメラ
JP2016086407A (ja) * 2014-10-23 2016-05-19 パナソニックＩｐマネジメント株式会社 撮像装置および画像取得装置
WO2017081847A1 (fr) * 2015-11-12 2017-05-18 パナソニックＩｐマネジメント株式会社 Dispositif de détection de lumière

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1887626A1 (fr) * 2006-08-09 2008-02-13 Tohoku University Capteur optique à grille de débordement et condensateur de stockage
JP2011130364A (ja) * 2009-12-21 2011-06-30 Sony Corp 固体撮像装置およびその駆動方法、カメラ
JP2016086407A (ja) * 2014-10-23 2016-05-19 パナソニックＩｐマネジメント株式会社 撮像装置および画像取得装置
WO2017081847A1 (fr) * 2015-11-12 2017-05-18 パナソニックＩｐマネジメント株式会社 Dispositif de détection de lumière

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024100767A1 (fr) * 2022-11-08 2024-05-16 ソニーセミコンダクタソリューションズ株式会社 Dispositif de détection de lumière, procédé de commande de dispositif de détection de lumière et appareil électronique

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