WO2021138779A1 - 一种时钟切换方法、设备及存储介质 - Google Patents

一种时钟切换方法、设备及存储介质 Download PDF

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Publication number
WO2021138779A1
WO2021138779A1 PCT/CN2020/070534 CN2020070534W WO2021138779A1 WO 2021138779 A1 WO2021138779 A1 WO 2021138779A1 CN 2020070534 W CN2020070534 W CN 2020070534W WO 2021138779 A1 WO2021138779 A1 WO 2021138779A1
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WIPO (PCT)
Prior art keywords
clock device
master clock
backup
indication information
clock
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PCT/CN2020/070534
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English (en)
French (fr)
Inventor
李超
张兴新
王学寰
鲍鹏鑫
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华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN202080002475.8A priority Critical patent/CN113396553B/zh
Priority to PCT/CN2020/070534 priority patent/WO2021138779A1/zh
Priority to EP20911777.9A priority patent/EP4072053A4/en
Publication of WO2021138779A1 publication Critical patent/WO2021138779A1/zh
Priority to US17/857,661 priority patent/US20220334930A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0641—Change of the master or reference, e.g. take-over or failure of the master
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1604—Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability

Definitions

  • This application relates to the field of communications, and in particular to a clock switching method, device and storage medium.
  • the position of the clock is very important, and various control and data transmission parts are inseparable from the clock.
  • the clock is equivalent to the "heart" of the communication device. If there is no clock, the communication device will stop working. In order to ensure the robustness of the system, the system will configure two clock sources, a master clock device and a backup clock device. During normal operation, the system clock of each node device is synchronized with the time information of the master clock device. If the main clock device fails, the system needs to switch to the standby clock device as soon as possible to ensure the time synchronization error requirements.
  • the master clock device periodically sends synchronization (sync) messages in a normal working state.
  • the protocol stipulates that if the node device detects that two or more consecutive synchronization messages are lost, the master clock device is determined error occured.
  • Each node device in the system sends an announcement message carrying its own capability indication information.
  • Each node device combines the capabilities of each node device in the system to calculate the best master clock algorithm (Best Master Clock Algorithm, BMCA) algorithm.
  • the optimal master clock switches the current working clock to the calculated optimal master clock after receiving the synchronization (sync) message sent by the determined optimal master clock.
  • the node device loses the synchronization message sent by the master clock device until the current working clock is switched to the calculated optimal master clock.
  • This process needs to include the transmission of two synchronization messages.
  • This process takes a long time, and in this process,
  • the clock of the node device is in an autonomous state. Since the system clock of the node device does not have a clock source as a reference, the system clock of the node device will shift, resulting in a large time error, which will cause the entire system to run unstable and even crash.
  • the present application provides a clock switching method, device, and storage medium, which are used to shorten the time of clock switching when the master clock device is in a fault state.
  • an embodiment of the present application provides a clock switching method, including: the standby clock device monitors the working state of the main clock device, the working state includes being in a normal working state or in a faulty state; when the standby clock device determines that the main clock device is in a fault Status, the standby clock device sends first indication information, and the first indication information is used to instruct to synchronize the system clock according to the time information of the standby clock device. Since the working state of the main clock device can be monitored by the standby clock device, and when the main clock device is found to be in a fault state, the first indication information is sent, so that the first communication device synchronizes the first communication device according to the time information of the standby clock device System clock.
  • this process can save the time it takes to execute the BMCA algorithm used to determine the optimal master clock device.
  • the standby clock sends out the first indication message after discovering that the main clock device is faulty, the duration of this part is mainly the time consumed by the command and data interaction within the system, which is at the ns level, and the duration can be ignored.
  • the solution of the embodiment of the present application can greatly reduce the time consumption of clock switching.
  • the standby clock device monitors the working status of the master clock device, including: the standby clock device continuously or periodically monitors the working status of the master clock device.
  • the standby clock device continuously monitors the working status of the master clock device, including: the standby clock device continuously monitors the working status of the master clock device through a signal output by a link connected to the master clock device; wherein, The signal transmitted in the link includes electrical or optical signals.
  • the signal transmitted in the link is used to indicate that the main clock device is in a normal working state; the standby clock device determines that the main clock device is in a fault state, including: if the standby clock device passes the link If the signal is not received, it is determined that the master clock device is in a fault state.
  • the backup clock device does not receive a signal within the second preset time period through the link, it is determined that the master clock device is in a fault state. In this way, if the master clock device fails, it can be found in a more timely manner, and the time spent on clock switching is further increased.
  • the standby clock device continuously monitors the working status of the master clock device, including: the standby clock device continuously monitors the working status of the master clock device through the electrical signal output by the link connected to the master clock device; where , The electrical signal includes a first level signal and a second level signal, the first level signal in the electrical signal is used to indicate that the master clock device is in working state, and the second level signal in the electrical signal is used to indicate the master clock device In a fault state; the standby clock device determines that the main clock device is in a fault state, including: if the electrical signal received by the standby clock device through the link is a second-level signal, determining that the main clock device is in a fault state. In this way, the flexibility of the scheme can be improved.
  • the clock backup device periodically monitors the working status of the master clock device, including:
  • the standby clock device monitors the working status of the master clock device by periodically receiving the first message with the first duration as the period; where the first message is that the master clock device uses the first duration as the period, and periodically sends the message to the master clock in the normal working state.
  • Sent by the backup clock device; determining that the master clock device is in a fault state includes: if the backup clock device does not successfully receive the next first message within a second time period after the first message was recently received, the second time length includes all According to the first duration and the first preset duration, it is determined that the master clock device is in a fault state.
  • the first duration satisfies one of the following: the first duration is shorter than the duration between two adjacent first synchronization messages sent by the master clock device to the standby clock device, and the first synchronization message includes the master clock The time information of the device; the first duration is shorter than the duration between two adjacent first notification messages sent by the master clock device to the standby clock device, and the first notification message includes the capability indication information of the master clock device; The duration is shorter than the third duration.
  • the third duration is the longer between the duration between two adjacent first synchronization messages sent by the master clock device to the standby clock device and the duration between two adjacent first notification messages.
  • the first duration is shorter than the duration between two adjacent second synchronization messages sent by the master clock device to the switch device, and the second synchronization message includes the time information of the master clock device; the first duration is shorter than the master clock device.
  • the length of time between two adjacent second notification messages sent by the clock device to the switch device, and the second notification message includes the capability indication information of the master clock device.
  • the clock-backup device sends the first indication information, including one of the following: the clock-backup device sends a second notification message, and the second notification message includes the capability indication information of the clock-backup device, And first indication information; the standby clock device sends a second synchronization message, the second synchronization message includes the time information of the standby clock device, and the first indication information; the standby clock device sends a preset bit sequence, the preset bit sequence includes the first 1. Indication information; the clock standby device sends preset frame encapsulation signaling, and the preset frame encapsulation signaling includes the first indication information. In this way, more solutions for sending the first indication information can be provided.
  • a clock switching method including: a first communication device receives first indication information sent by a clock-backup device, the first indication information is used to instruct to synchronize a system clock according to time information of the clock-backup device; and the first communication device Acquire the time information of the clock-backup device; the first communication device synchronizes the system clock of the first communication device according to the time information of the clock-backup device.
  • this process can save the time it takes to execute the BMCA algorithm used to determine the optimal master clock device.
  • the standby clock sends out the first indication message after discovering that the main clock device is faulty
  • the duration of this part is mainly the time consumed by the command and data interaction within the system, which is at the ns level, and the duration can be ignored.
  • the solution in the embodiment of the present application can greatly reduce the time consumption of clock switching.
  • the time period between the first synchronization message sent by the master clock device and the first indication information that is newly received by the first communication device is less than one of two adjacent first synchronization messages.
  • the time between the first notification message sent by the master clock device and the reception of the first indication information that is newly received by the first communication device is less than the time between two adjacent first notification messages
  • the time period between the first synchronization message sent by the master clock device and the reception of the first indication information that is newly received by the first communication device is less than the third time length, where the third time length is two adjacent first synchronizations
  • the duration between the messages is the smaller value of the duration between two adjacent first notification messages; or, the first notification message sent by the master clock device that the first communication device has recently received is the same as the first notification message received by the first communication device.
  • the duration between one indication information is less than the third duration, where the third duration is the smaller of the duration between two adjacent first synchronization messages and the duration between two adjacent first notification messages .
  • the first communication device receives the first indication information, including one of the following: the first communication device sends a second notification message according to the received clock-backup device, and obtains the first indication information ,
  • the second notification message includes the capability indication information of the standby clock device, and the first indication information;
  • the first communication device sends the second synchronization message according to the received standby clock device to obtain the first indication information, and the second synchronization message Including the time information of the clock-backup device and the first indication information;
  • the first communication device sends a preset bit sequence according to the received clock-backup device to obtain the first indication information, and the preset bit sequence includes the first indication information;
  • first communication The device sends the preset frame encapsulation signaling according to the received clock-backup device to obtain the first indication information, and the preset frame encapsulation signaling includes the first indication information.
  • acquiring the time information of the backup clock device by the first communication device includes: the first communication device determines the time information of the backup clock device according to the pre-maintained time information of the backup clock device.
  • the first communication device may maintain the time information of multiple backup clock devices in advance, and when needed, it may use the one closest to the current time, or it can be said that all the backup clock devices maintained The latest time information of a standby clock device in the time information.
  • the first communication device acquiring time information of the backup clock device includes: the first communication device receives a second synchronization message sent by the backup clock device, and the second synchronization message includes the time of the backup clock device information.
  • the method further includes: the first communication device sends the first indication information to other nodes. In this way, other nodes can be synchronized to the system clock.
  • an embodiment of the present application provides a clock switching method, including: the master clock device sends second indication information indicating the operation of the master clock device to the standby clock device according to the working status of the master clock device. status. In this way, the standby clock device can monitor the working status of the master clock device.
  • the master clock device sends the second indication information to the backup clock device according to the working state of the master clock device, including: if the master clock device is in a normal working state, through the link connected to the backup clock device The first level signal is output, and if the main clock device is in a faulty working state, the second level signal is output through the link connected to the standby clock device.
  • the master clock device sends the second indication information to the backup clock device according to the working state of the master clock device, including: if the master clock device is in a normal working state, through the link connected to the backup clock device Output signal, the signal is an electrical signal or an optical signal; if the main clock device is in a faulty working state, stop outputting the signal through the link connected to the standby clock device.
  • the master clock device sends the second indication information to the standby clock device according to the working state of the master clock device, including: if the master clock device is in the normal working state, the first time length is used as the period, and the period is sexually sends the first message to the standby clock device; where the first duration satisfies one of the following content: the first message is different from the first synchronization message, and the first duration is shorter than the neighbor sent by the master clock device to the standby clock device The time length between two first synchronization messages.
  • the first synchronization message includes the time information of the master clock device; the first message is different from the first notification message, and the first time length is shorter than that of the master clock device to the standby clock device
  • the first message is different from the first synchronization message, and the first message is different from the first notification message.
  • the first time length is shorter than the third time length. The smaller of the time between a synchronization message and the time between two adjacent first notification messages; the first message is the first synchronization message, and the first time length is shorter than the master clock device to the switch device The length of time between two adjacent second synchronization messages sent.
  • the second synchronization message includes the time information of the master clock device; the first message is the first notification message, and the first time length is shorter than that of the master clock device.
  • the present application also provides a communication device.
  • the communication device may be any type of device at the sending end or at the receiving end that performs data transmission in a wireless manner. For example, communication chips, network equipment, etc.
  • the device on the sending end and the device on the receiving end are relative.
  • the communication device can be used as the aforementioned clock-backup device, master clock device, or first communication device, or can be used as the communication chip of the clock-backup device, master clock device, or first communication device.
  • a communication device including a transceiving unit and a processing unit, so as to execute any one of the communication methods of the first aspect to the third aspect.
  • the transceiver unit is used to perform functions related to sending and receiving.
  • the transceiver unit includes a receiving unit and a sending unit.
  • the communication device is a communication chip, and the transceiver unit may be an input/output circuit or port of the communication chip.
  • the transceiver unit can be a transmitter and a receiver, or the transceiver unit can be a transmitter and a receiver.
  • the communication device further includes various modules that can be used to implement any one of the implementation manners of any one of the communication methods of the first aspect to the third aspect.
  • a communication device is provided, and the communication device is the above-mentioned standby clock device, master clock device, or first communication device. Including processor and memory.
  • the memory is used to store computer programs or instructions
  • the processor is used to call and run the computer programs or instructions from the memory, and when the processor executes the computer programs or instructions in the memory, the The communication device executes any one of the implementation manners of any one of the methods from the first aspect to the third aspect described above.
  • processors there are one or more processors, and one or more memories.
  • the memory may be integrated with the processor, or the memory and the processor may be provided separately.
  • the transceiver may include a transmitter (transmitter) and a receiver (receiver).
  • a communication device including a processor.
  • the processor is coupled with the memory and can be used to execute any one of the first aspect to the third aspect, and the method in any one of the first aspect to the third aspect.
  • the communication device further includes a memory.
  • the communication device further includes a communication interface, and the processor is coupled with the communication interface.
  • the communication device is a clock backup device, a master clock device, or the first communication device.
  • the communication interface may be a transceiver, or an input/output interface.
  • the transceiver may be a transceiver circuit.
  • the input/output interface may be an input/output circuit.
  • the communication device is a chip or a chip system.
  • the communication interface may be an input/output interface, interface circuit, output circuit, input circuit, pin or related circuit on the chip or chip system.
  • the processor can also be embodied as a processing circuit or a logic circuit.
  • a system in a seventh aspect, includes the foregoing clock backup device, master clock device, or first communication device.
  • a computer program product includes: a computer program (also called code, or instruction), which when the computer program is executed, enables the computer to execute any one of the above-mentioned first aspects. Or make the computer execute the method in any one of the foregoing first aspect to the third aspect.
  • a computer program also called code, or instruction
  • a computer-readable storage medium stores a computer program (also referred to as code, or instruction) when it runs on a computer, so that the computer executes any of the above-mentioned first aspects.
  • the method in one possible implementation manner, or the computer is caused to execute the method in any one of the foregoing first aspect to the third aspect.
  • a processing device including: an input circuit, an output circuit, and a processing circuit.
  • the processing circuit is configured to receive signals through the input circuit and transmit signals through the output circuit, so that any one of the first aspect to the third aspect, and the method in any one of the first aspect to the third aspect may be implemented.
  • the above-mentioned processing device may be a chip
  • the input circuit may be an input pin
  • the output circuit may be an output pin
  • the processing circuit may be a transistor, a gate circuit, a flip-flop, and various logic circuits.
  • the input signal received by the input circuit may be received and input by, for example, but not limited to, a receiver
  • the signal output by the output circuit may be, for example, but not limited to, output to the transmitter and transmitted by the transmitter
  • the circuit can be the same circuit, which is used as an input circuit and an output circuit at different times.
  • the embodiments of the present application do not limit the specific implementation manners of the processor and various circuits.
  • FIG. 1 is a schematic diagram of a system architecture to which an embodiment of this application is applicable;
  • FIG. 2 is a schematic diagram of another network architecture applicable to the embodiments of this application.
  • Figure 3 is a schematic diagram of a clock switching process method
  • FIG. 4 is a schematic diagram of a process method of clock switching provided by an embodiment of this application.
  • Figure 5 is a schematic structural diagram of a communication device
  • Figure 6 is a schematic structural diagram of another communication device
  • Figure 7 is a schematic structural diagram of another communication device.
  • the embodiments of the present application are applicable to various networks that require clock synchronization, such as in-vehicle networks and 5G networks.
  • the in-vehicle network may include one or more of the following network elements:
  • Sensors such as millimeter wave radar, lidar, ultrasonic radar, camera, positioning system (such as GPS), inertial sensor (Inertial measurement unit, IMU), speed sensor, acceleration sensor, humidity sensor, light intensity sensor, etc. Sensor information transmitted to sensors, on-board T-Box (Telematics BOX), etc.
  • the playback device for example, can include a display screen, a speaker, and a power amplifier.
  • Switch equipment can be used to undertake routing and switching functions, and can be a switch or router, which can be used to converge and transfer various data services, such as audio and video, synchronization messages, and control messages.
  • the controller can be a computing center, which can be used to perform the calculation and control of a certain function, and can be independent or integrated with the gateway. Specifically, it can be a vehicle-mounted computing platform or a vehicle-mounted computer, a domain controller, and a multi-domain controller, such as Autopilot controllers, infotainment controllers, etc., can also be storage centers, data centers, used to store important data, such as black boxes in the car, driving recorders, etc.
  • the above network elements are only the logical concepts of the in-vehicle network.
  • the above network elements can be in the form of a physical device, box, or a single board, or implemented by a chip or area on a single board. Function.
  • multiple network elements may also be combined into one device, for example, the switch device and the controller may be on the same circuit board.
  • a master clock device and a backup clock device are configured in the network.
  • the physical location distribution of the master clock device and the backup clock device is arbitrary, and can be in different or the same box, or on the same circuit board.
  • Each node in the network maintains time synchronization with the master clock device under normal working conditions.
  • Fig. 1 exemplarily shows a schematic diagram of a system architecture to which an embodiment of the present application is applicable.
  • the nodes in the system include switch devices and end nodes (such as end node S1 to end node S5).
  • the nodes may be collectively referred to as the first communication device, and the first communication device mentioned in the embodiment of the present application may refer to a switch device or an end node.
  • the switch device and the end node device are respectively identified in FIG. 1.
  • the network includes an external clock signal 101, and the external clock signal may be, for example, the Global Positioning System (GPS), Beidou, etc.
  • the main clock device 102 and the backup clock device 103 maintain time synchronization with an external clock signal.
  • the switch device 1, the switch device 2, and the switch device 3 maintain time synchronization with the master clock device 102
  • the end node S1 maintains time synchronization with the master clock device 102 through the switch device 1.
  • the end node S2 maintains time synchronization with the master clock device 102 through the switch device 2.
  • the end node S3 maintains time synchronization with the master clock device 102 through the switch device 3.
  • the end node S4 maintains time synchronization with the master clock device 102 through the switch device 3.
  • the end node S5 maintains time synchronization with the master clock device 102 through the switch device 3. In this way, the time and frequency of operation of the entire network can be aligned to ensure that the accuracy of the system clock is within the required range and drive the network to work in an orderly manner.
  • Figure 2 exemplarily shows another schematic diagram of a network architecture to which the embodiments of the present application are applicable.
  • the modification of Figure 2 relative to Figure 1 is that all nodes in Figure 2 (including switch device 1, switch device 2, switch device 3, end Node S1, end node S2, end node S3, end node S4, and end node S5) establish a master clock synchronization tree and a backup clock synchronization tree respectively with the master and backup clocks.
  • each node maintains the clock with the master clock device Synchronization, but each node also maintains the time information of the standby clock device. It can also be said that the delay and frequency between the nodes of the standby clock synchronization tree are always measured and saved.
  • the system can directly switch from the master clock synchronization tree to the standby clock synchronization tree to achieve clock switching.
  • the switch device 1 is respectively connected to the master clock device 102 and the backup clock device 103 through two interfaces.
  • the master clock device 102 fails, it receives the time information sent by the backup clock device 103 through the interface connected to the backup clock device 103.
  • the end node S1 is connected to the switch device 1 through two interfaces.
  • the master clock device 102 is in a normal working state, the end node S1 communicates with the master clock device 102 through one of the interfaces.
  • the time information of the standby clock device 103 is received through another interface and stored.
  • the clock synchronization is performed through the time information of the backup clock device 103 received through the other interface, so as to realize the switch from the master clock synchronization tree to the backup clock synchronization tree.
  • the master clock device and the backup clock device in the system are pre-configured.
  • the optimal master clock in the system can be determined according to the BMCA algorithm and used as the current master clock device.
  • the BMCA algorithm may refer to the optimal master clock algorithm proposed by the 802.1AS or 802.1AS REV protocol. The algorithm mainly determines the optimal master clock of the system by comparing the capabilities of each node.
  • the factors that affect the time synchronization error include: asymmetric time delay of the physical layer, crystal oscillator operating frequency, and crystal oscillator frequency accuracy.
  • the first two factors are determined by the inherent characteristics of the system, and the third factor and the duration of the unsynchronized clock together affect the size of the error.
  • the frequency accuracy of the crystal oscillator may be mainly considered.
  • the following uses a schematic diagram of a clock switching process method shown in FIG. 3 to analyze the defects of a possible clock switching process. As shown in Figure 3, the method includes:
  • Step 201 The master clock device periodically sends the first synchronization message.
  • the first synchronization message includes time information of the master clock device.
  • Step 202 When the first communication device does not monitor the first synchronization message for two consecutive cycles, it determines that the master clock device has a failure.
  • Step 203 When the standby clock device does not monitor the first synchronization message for two consecutive cycles, it determines that the master clock device is faulty.
  • Step 204 The standby clock device sends a second notification message, and the second notification message carries the capability indication information of the standby clock device.
  • the first communication device of each other node will also send its own capability indication information.
  • Each node executes the BMCA algorithm to determine the optimal master clock device, such as the following steps 205 and 206.
  • Step 205 The first communication device executes the BMCA algorithm to determine that the backup clock device is the optimal master clock device.
  • Step 206 The backup clock device executes the BMCA algorithm to determine that the backup clock device is the optimal master clock device.
  • Step 207 The standby clock device sends a second synchronization message, where the second synchronization message includes time information of the standby clock device.
  • Step 208 The first communication device performs clock synchronization according to the time information of the clock backup device.
  • the backup clock device when it is determined that the backup clock device is the optimal master clock device, the backup clock device will be changed to the master clock device. That is to say, the identities of the master clock device and the standby clock device in the embodiment of the present application will be changed.
  • the identity of the clock When a clock is set as a backup clock device at the beginning, and then the clock is selected as the best master clock device, the identity of the clock will be changed to the master clock device.
  • the clock switching duration mainly includes: the first communication device detects the failure of the master clock device (Figure 3 is the transmission period of the two first synchronization messages (Ts)), and the synchronization establishment duration of the first communication device and the standby clock device (Figure 3 includes a second notification message transmission period (Ta) and a second synchronization message transmission period.
  • many current systems have high requirements for time synchronization accuracy, for example, TD-SCDMA and LTE TDD time synchronization requirements are ⁇ 1.5us, the CDMA2000 time synchronization requirement is ⁇ 3us.
  • the in-vehicle communication network also has higher requirements for time synchronization accuracy.
  • the time synchronization accuracy error of the scheme described in Figure 3 is relatively large, which cannot meet the system synchronization accuracy requirements.
  • the embodiment of the present application provides a clock switching method, which is used to shorten the clock switching time, so as to reduce the time synchronization error of the switching process.
  • FIG. 4 exemplarily shows a clock switching method provided by an embodiment of the present application, including:
  • Step 401 The standby clock device monitors the working state of the main clock device, and the working state includes being in a normal working state or in a faulty state.
  • Step 402 When the backup clock device determines that the main clock device is in a fault state, the backup clock device sends first indication information, where the first indication information is used to instruct to synchronize the system clock according to the time information of the backup clock device.
  • the first communication device receives the first indication information sent by the clock-backup device, where the first indication information is used to instruct to synchronize the system clock according to the time information of the clock-backup device.
  • step 403 executed on the side of the first communication device may also be included.
  • Step 403 The first communication device obtains time information of the standby clock device.
  • Step 404 The first communication device synchronizes the system clock of the first communication device according to the time information of the clock backup device.
  • the first communication device switching the system clock device to the standby clock device.
  • the first communication device has two interfaces, one interface receives the time information of the master clock device, and the other interface receives the time information of the standby clock device.
  • the first communication device synchronizes the system clock of the first communication device according to the time information of the clock-backup device. It can also be described as that the first communication device activates the interface for receiving the time information of the clock-backup device. Or it can be described as that the first communication device switches to the interface that receives the time information of the clock-backup device.
  • the first communication device of the network performs clock device switching.
  • the identity of the clock device as the standby clock device is updated as the master clock device.
  • the original clock device that was the master clock device has failed, so its identity will be updated as a non-master clock device. That is to say, for a clock device in a system, the identity of the clock device can be changed with the current system performance.
  • the clock device can be the master clock device at the beginning, but after a failure, the identity Change to a non-master clock device; for another example, a clock device is used as a backup clock device at the beginning, and when the master device fails, the identity of the clock device is updated as the master clock device.
  • the clock backup device in step 401 refers to a clock device whose identity is the clock backup device
  • the master clock device refers to a clock device whose identity is the master clock device.
  • the first indication information is sent, so that the first communication device is based on the time of the backup clock device.
  • the information synchronizes the system clock of the first communication device.
  • this process can save the time it takes to execute the BMCA algorithm used to determine the optimal master clock device.
  • the standby clock sends out the first indication message after discovering that the main clock device is faulty, the duration of this part is mainly the time consumed by the command and data interaction within the system, which is at the ns level, and the duration can be ignored.
  • the solution of the embodiment of the present application can greatly reduce the time consumption of clock switching.
  • the clock switching process can be shortened by shortening the time for the backup clock to detect the failure of the master clock device, thereby further increasing the speed of clock switching, which can reduce The deviation amount of the system clock of each first communication device, thereby improving the robustness of system time synchronization and the reliability of system operation.
  • step 401 there is a link between the master clock device and the backup clock device, and the link can transmit information such as synchronization messages or notification messages.
  • the synchronization message can be written as a sync message
  • the notification message can be written as an announce message.
  • the standby clock device can monitor the working status of the master clock device through the original link.
  • a link can be added between the standby clock device and the master clock device to monitor the working status of the master clock device.
  • the newly added link can be copper wire, printed circuit board (Printed Circuit Board) , PCB) wiring, optical fiber, etc.
  • the clock backup device continuously monitors the working status of the master clock device.
  • Continuous monitoring means that the standby clock device receives a continuous signal (such as an optical signal or an electrical signal) to determine the working status of the master clock device.
  • the clock backup device periodically monitors the working status of the master clock device. Periodic monitoring refers to periodically judging the working status of the master clock device at a certain time interval.
  • the master clock device may send second indication information to the standby clock device according to the working status of the master clock device, and the second indication information is used to indicate the working status of the master clock device.
  • a link is connected between the main clock device and the standby clock device.
  • the link may be a cable capable of outputting electrical signals, or an optical cable capable of outputting optical signals, or other transmission media, which is not limited in this application.
  • the master clock device sends a signal to the standby clock device when it is in a normal working state and a faulty state.
  • a signal may be sent to the standby clock device only when the master clock device is in a fault state, that is, when the master clock device is in a normal working state, no signal may be sent.
  • a signal may be sent to the standby clock device only when the master clock device is in a normal working state, that is, when the master clock device is in a fault state, the signal may not be sent.
  • the second indication information may include third indication information and fourth indication information, where the third indication information is used to indicate that the master clock device is in a normal working state, and the fourth indication information is used to indicate that the master clock device is in failure. status.
  • the second indication information may be sent periodically or continuously.
  • the master clock device when the master clock device is in a normal working state, it can periodically or continuously send the third indication information to the backup clock device, and when the master clock device is in a fault state, it can periodically or continuously send the fourth indication information to the backup clock device.
  • the standby clock device receives the fourth indication information, it is determined that the master clock device is in a fault state.
  • the master clock device can continuously send electrical signals to the standby clock device according to the working state of the master clock device, and can indicate the master clock device through the high level and low level of the electrical signal
  • the electrical signal includes a first-level signal and a second-level signal.
  • the first-level signal in the electrical signal is used to indicate that the master clock device is in the working state
  • the second-level signal in the electrical signal is used It indicates that the main clock device is in a fault state. If the first level signal is at a high level, the second level signal is at a low level. If the first level signal is low level, the second level signal is high level.
  • the output is output through a link connected to the backup clock device (the link may be, for example, a cable or other link capable of outputting electrical signals) The first level signal. If the main clock device is in a faulty working state, the second level signal is output through the link connected to the standby clock device.
  • hardware improvements can be used to make the master clock device continuously or periodically send a high level in a normal working state.
  • scheme a1 if the master clock device is in a normal working state, there will be continuous or periodic high level transmission in the link, and when the master clock device is in a fault state, because the master clock device It has failed, so the electrical signal level in the link is pulled low, and the low level is output in the link.
  • the software of the master clock device can be improved, so that the master clock device continuously sends a high level in a normal working state.
  • the master clock device can actively pull down the level of the electrical signal to make the link output a low level.
  • the master clock device is in a fault state.
  • the electrical signal received by the backup clock device through the link is at the first level, it is determined that the master clock device is in a working state.
  • fourth indication information when the master clock device is in a faulty working state, fourth indication information may be sent, and the fourth indication information is used to indicate that the master clock device is in a faulty state. In other words, when the master clock device is in a normal working state, it may not send any signal for indicating that the master clock device is in a normal working state.
  • the fourth indication information can be an optical signal, an electrical signal, or a preset signaling, and so on.
  • the third indication information is output periodically through the link continuity connected to the backup clock device or the first time period is the period, and the third indication information is used to indicate the master clock device In normal working condition. If the master clock device is in a faulty working state, stop periodically outputting the third indication information through the link connected to the backup clock device. That is to say, when the master clock device is in a fault state, it may not send any signal for indicating that the master clock device is in a fault state.
  • the standby clock device periodically monitors the working status of the master clock device through the third indication information output by the link connected to the master clock device.
  • the third indication information can be an optical signal, a first message, or an electrical signal, etc.
  • the electrical signal can be implemented in multiple forms, for example, it can be a high level, or a low level, or include There are high-level and low-level electrical signals and so on.
  • the third indication information is continuously output through the link connected to the backup clock device, and if the master clock device is in a faulty working state, it stops passing The link connected to the standby clock device outputs the third indication information.
  • the standby clock device continuously monitors the working status of the master clock device through the third indication information output by the link connected to the master clock device. That is to say, in solution a3, if the master clock device is in a normal working state, there will be continuous third indication information being transmitted in the link, and if the third indication information (also It can be said that there is no third indication information in the link), it is determined that the master clock device is in a fault state.
  • the backup clock device does not receive a signal within the second time period through the link, it is determined that the master clock device is in a fault state.
  • the third indication information transmitted in the link is used to indicate that the master clock device is in a normal working state.
  • the standby clock device monitors the working status of the master clock device by periodically receiving the third indication information with the first duration as a period.
  • the third indication information is periodically sent by the master clock device to the standby clock device in a normal working state with the first duration as a period.
  • the standby clock device correspondingly, if the standby clock device does not successfully receive the next piece of third indication information within a second time period after the latest third indication information is received, it is determined that the master clock device is in a fault state. It can also be said that the backup clock device loses a third indication message, or that the backup clock device fails to receive a first message, then it is determined that the master clock device is in a fault state.
  • the second duration may include the first duration and the first preset duration.
  • the first message when the third indication information is the first message, the first message may be existing signaling, such as a synchronization message or notification message sent by the master clock device, and the first message may also be other Newly added signaling is used to indicate that the master clock device is in working state.
  • the first duration in solution a3 can also be implemented in multiple forms.
  • Various implementations of the scheme a3 are exemplarily introduced below through the following scheme b1, scheme b2, scheme b3, scheme b4, and scheme b5.
  • the synchronization message sent by the master clock device is referred to as the first synchronization message, and the master clock device may send the first synchronization message to the standby clock device or other devices such as switch devices.
  • the first synchronization message includes time information of the master clock device.
  • the synchronization message sent by the standby clock device is referred to as the second synchronization message, and the standby clock device may send the second synchronization message to other devices such as switch devices.
  • the second synchronization message includes time information of the standby clock device.
  • the first time length is shorter than the time length between two adjacent first synchronization messages sent by the master clock device to the switch device. It can also be said that the first duration is shorter than the sending period of the first synchronization message sent by the master clock device to the switch device. In this way, only the frequency at which the master clock device sends the first synchronization message to the standby clock device can be adjusted, so that the frequency at which the master clock device sends synchronization messages to the standby clock device is higher than the frequency of the master clock device sending synchronization messages to the switch device.
  • this solution can make the standby clock device find that the master clock device is faulty faster than the switch device.
  • This solution can also be compatible with the prior art. When two consecutive first synchronization messages are lost, it is determined that the master clock device is faulty.
  • the first message may be a first synchronization message.
  • the notification message sent by the master clock device is referred to as the first notification message, and the master clock device may send the first notification message to the standby clock device or other devices such as switch devices.
  • the first notification message includes capability indication information of the master clock device.
  • the notification message sent by the standby clock device is referred to as the second notification message, and the standby clock device may send the second notification message to other devices such as a switch device.
  • the second notification message includes the capability indication information of the standby clock device.
  • the first time length is shorter than the time length between two adjacent first notification messages sent by the master clock device to the switch device. It can also be said that the first duration is shorter than the sending period of the first notification message sent by the master clock device to the switch device. In this way, only the frequency of the primary clock device sending the first notification message to the standby clock device can be adjusted, so that the frequency of the primary clock device sending notification messages to the standby clock device is higher than that of the primary clock device sending notification messages to the switch device. Frequency, compared to the solution in which the switch device determines that the master clock device is faulty by successively losing two first notification messages, this solution can make the standby clock device find that the master clock device is faulty faster than the switch device.
  • the first message may be a first notification message.
  • the first duration is shorter than the duration between two adjacent first synchronization messages sent by the master clock device to the standby clock device. It can also be said that the first duration is shorter than the sending period of the first synchronization message sent by the master clock device to the switch device. In this way, the frequency of the first message is higher than the frequency of the master clock device sending the first synchronization message to the backup clock device, compared to the solution where the backup clock device determines that the master clock device is in failure by continuously losing two first synchronization messages This solution can increase the speed at which the standby clock device finds the master clock device, thereby reducing the time spent in the clock switching process.
  • the first message in the foregoing solution a3 is different from the first synchronization message.
  • the first message may be the same as or different from the first notification message.
  • the first time length is shorter than the time length between two adjacent first notification messages sent by the master clock device to the standby clock device. It can also be said that the first duration is shorter than the sending period of the first notification message sent by the master clock device to the switch device. In this way, the frequency of the first message is higher than the frequency of the master clock device sending the first notification message to the backup clock device, compared to the solution where the backup clock device determines that the master clock device is faulty by successively losing two first notification messages.
  • This solution can increase the speed at which the standby clock device finds the master clock device, thereby reducing the time spent in the clock switching process.
  • the first message in the foregoing solution a3 is different from the first notification message.
  • the first message may be the same as or different from the first synchronization message.
  • the first duration is shorter than the third duration
  • the third duration is the duration between two adjacent first synchronization messages sent by the master clock device to the standby clock device and the two adjacent first notification messages The smaller value of the duration between. It can also be said that the third duration is the smaller of the transmission period of the first synchronization message sent by the master clock device to the standby clock device and the transmission period of the first notification message sent by the master clock device to the standby clock device.
  • the frequency of the first message is higher than the frequency of the master clock device sending the first notification message to the standby clock device, and the frequency of the first message is higher than the frequency of the master clock device sending the first synchronization message to the standby clock device, which is relatively Compared with the scheme in which the backup clock device determines that the master clock device is in failure by continuously losing two first synchronization messages, or compared to the backup clock device determining that the master clock device is in failure by continuously losing two first notification messages.
  • This solution can increase the speed at which the standby clock device discovers the master clock device, thereby shortening the time spent in the clock switching process.
  • the first message in the foregoing solution a3 is different from the first synchronization message, and the first message is different from the first notification message.
  • the first duration can be replaced with the second duration. That is, the sum of the first duration and the first preset duration may be shorter than a certain value.
  • a possible implementation manner may also be included.
  • the standby clock device determines that the master clock device is in a fault state, and then sends the first indication information.
  • the time period between the first synchronization message sent by the master clock device and the reception of the first indication information that is newly received by the first communication device is less than the time period between two first synchronization messages , Can also be said to be less than the sending period of the first synchronization message sent by the master clock device to the first communication device.
  • the time period between the first synchronization message sent by the master clock device that is newly received by the first communication device and the first indication information is received is less than the third time period.
  • the time between the first notification message sent by the master clock device and the reception of the first indication information that is newly received by the first communication device is less than the time between two first notification messages.
  • the duration can also be said to be less than the sending period of the first notification message sent by the master clock device to the first communication device.
  • the duration between the first notification message sent by the master clock device that is newly received by the first communication device and the first indication information is received is less than the third duration.
  • step 402 there are many ways for the standby clock to send the first indication information, which can be sent in a display mode (for example, sending a piece of first indication information separately), or in an implicit way (for example, carried in other signaling).
  • the following exemplarily introduces the method of sending the first indication information through the method c1, the method c2, the method c3, and the method c4.
  • the standby clock device sends the second notification message.
  • the first communication device obtains the first indication information according to the received second notification message sent by the clock-backup device.
  • the second notification message includes the capability indication information of the standby clock device and the first indication information.
  • the first indication information may be carried in a reserved field of the second notification message. In this way, the first indication information can be carried by the existing second notification message, which is compatible with the existing technology, avoids newly constructing signaling, and can simplify the solution.
  • the standby clock device sends the second synchronization message.
  • the first communication device obtains the first indication information according to the received second synchronization message sent by the clock-backup device.
  • the second synchronization message includes the time information of the standby clock device and the first indication information.
  • the first indication information may be carried in a reserved field of the second synchronization message. In this way, the first indication information can be carried by the existing second synchronization message, which is compatible with the existing technology, avoids newly constructing signaling, and can simplify the solution.
  • the clock-ready device sends a preset bit sequence.
  • the first communication device obtains the first indication information according to the received clock-backup device sending the preset bit sequence.
  • the preset bit sequence includes first indication information. It can also be said that during the interval between sending the second notification message and the second synchronization message, the preset sequence of 0 and 1 can be sent, and the first communication device receives the preset sequence of 0 and 1, then it switches to the standby Clock equipment. In this way, the first communication device can be instructed to perform clock switching through the preset bit sequence, which can simplify the solution.
  • the standby clock device sends preset frame encapsulation signaling.
  • the first communication device sends the preset frame encapsulation signaling according to the received clock-backup device to obtain the first indication information.
  • the preset frame encapsulation signaling includes the first indication information. It can also be said that during the interval between the second notification message and the second synchronization message, the preset frame encapsulation signaling can be sent, and the first communication device receives the preset frame encapsulation signaling, and then switches to the standby clock device .
  • the preset frame encapsulation signaling may be a separate frame encapsulation signaling, for example, may include a frame header, a frame trailer, and so on. In this way, the preset frame encapsulation signaling can be used to instruct the first communication device to perform clock switching, which can simplify the solution.
  • step 403 there are multiple ways for the first communication device to obtain the time information of the clock-backup device, which are exemplified based on the foregoing FIG. 1 and FIG. 2 respectively.
  • the first communication device in step 403 when the first communication device in step 403 is a switch device (such as switch device 1, switch device 2, etc.), the first communication device can receive the second synchronization message (the first synchronization message) sent by the clock-backup device.
  • the second synchronization message includes time information of the backup clock device), and the backup clock device may send the second synchronization message after determining that the main clock device has failed.
  • the second synchronization message may be sent after sending the first indication information.
  • it may also be sent before the first indication information is sent, or the first indication information may be carried in the second synchronization message and sent.
  • the switch device forwards the first instruction information to other node devices, and the switch device forwards the second synchronization message to other node devices after receiving the second synchronization message.
  • Other node devices such as the end node S1 in Figure 1.
  • the end node S1 After the end node S1 receives the second synchronization message and the first indication information, the end node S1 will update the system clock of the end node S1 according to the time information of the clock backup device.
  • each node such as the switch device 1 and the end node S1 maintains the time information of the standby clock device
  • the first communication device in the above step 403 is a switch device or an end node device
  • the first communication device determines the time information of the standby clock device according to the pre-maintained time information of the standby clock device.
  • the first communication device may maintain the time information of multiple backup clock devices in advance, and when needed, it may use the one closest to the current time, or it can be said that all the backup clock devices maintained The latest time information of a standby clock device in the time information.
  • the standby clock synchronization tree When the standby clock device sends the first indication information, the standby clock synchronization tree is activated, and all the cut points on the standby clock synchronization tree are switched to the standby clock synchronization tree. It can also be described as all nodes on the standby clock synchronization tree are enabled to receive the standby clock.
  • each network element described above includes hardware structures and/or software modules corresponding to each function.
  • the present invention can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed by hardware or computer software-driven hardware depends on the specific application and design constraint conditions of the technical solution. Professionals and technicians can use different methods for each specific application to implement the described functions, but such implementation should not be considered as going beyond the scope of the present invention.
  • FIG. 5 is a schematic structural diagram of a communication device provided by an embodiment of the application.
  • the communication device may be a standby clock device, a master clock device, or a first communication device, or a chip or a circuit.
  • a chip or circuit that can be set in a clock-backup device another example is a chip or circuit that can be set in a master clock device, or a chip or circuit that can be set in the first communication device.
  • the communication device 1301 may further include a bus system, where the processor 1302, the memory 1304, and the transceiver 1303 may be connected through the bus system.
  • the aforementioned processor 1302 may be a chip.
  • the processor 1302 may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a system on chip (SoC). It can be a central processor unit (CPU), a network processor (NP), a digital signal processing circuit (digital signal processor, DSP), or a microcontroller (microcontroller). unit, MCU), and may also be a programmable logic device (PLD) or other integrated chips.
  • FPGA field programmable gate array
  • ASIC application specific integrated circuit
  • SoC system on chip
  • CPU central processor unit
  • NP network processor
  • DSP digital signal processing circuit
  • microcontroller microcontroller
  • unit, MCU and may also be a programmable logic device (PLD) or other integrated chips.
  • PLD programmable logic device
  • the steps of the foregoing method can be completed by an integrated logic circuit of hardware in the processor 1302 or instructions in the form of software.
  • the steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed and completed by a hardware processor, or executed and completed by a combination of hardware and software modules in the processor 1302.
  • the software module can be located in a mature storage medium in the field, such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers.
  • the storage medium is located in the memory 1304, and the processor 1302 reads the information in the memory 1304, and completes the steps of the foregoing method in combination with its hardware.
  • the processor 1302 in the embodiment of the present application may be an integrated circuit chip with signal processing capability.
  • the steps of the foregoing method embodiments can be completed by hardware integrated logic circuits in the processor or instructions in the form of software.
  • the above-mentioned processor may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components .
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed.
  • the general-purpose processor may be a microprocessor or the processor may also be any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed and completed by a hardware decoding processor, or executed and completed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a mature storage medium in the field, such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers.
  • the storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.
  • the memory 1304 in the embodiment of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory can be read-only memory (ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), and electrically available Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • the volatile memory may be random access memory (RAM), which is used as an external cache.
  • RAM random access memory
  • static random access memory static random access memory
  • dynamic RAM dynamic RAM
  • DRAM dynamic random access memory
  • synchronous dynamic random access memory synchronous DRAM, SDRAM
  • double data rate synchronous dynamic random access memory double data rate SDRAM, DDR SDRAM
  • enhanced synchronous dynamic random access memory enhanced SDRAM, ESDRAM
  • synchronous connection dynamic random access memory serial DRAM, SLDRAM
  • direct rambus RAM direct rambus RAM
  • the communication device may include a processor 1302, a transceiver 1303, and a memory 1304.
  • the memory 1304 is used to store instructions
  • the processor 1302 is used to execute the instructions stored in the memory 1304, so as to realize the correlation of the standby clock device in any one or more of the corresponding methods shown in FIGS. 1 to 4 above. Program.
  • the processor 1302 is used to monitor the working state of the main clock device.
  • the working state includes the normal working state or the malfunctioning state; when it is determined that the main clock device is In the fault state, the first indication information is sent through the transceiver 1303, and the first indication information is used to indicate the synchronization of the system clock according to the time information of the clock-backup device.
  • the processor 1302 is specifically configured to continuously or periodically monitor the working state of the master clock device.
  • the processor 1302 is specifically configured to: continuously monitor the working status of the master clock device through the signal output from the link connected to the master clock device;
  • the signal transmitted in the path includes electrical or optical signals.
  • the signal transmitted in the link is used to indicate that the master clock device is in a normal working state; if the signal is not received through the link, it is determined that the master clock device is in a fault state.
  • the processor 1302 is specifically configured to: continuously monitor the working state of the master clock device through the electrical signal output by the link connected to the master clock device; where, The electrical signal includes a first-level signal and a second-level signal.
  • the first-level signal in the electrical signal is used to indicate that the master clock device is in working state
  • the second-level signal in the electrical signal is used to indicate that the master clock device is in the working state. Fault state; if the electrical signal received through the link is a second-level signal, it is determined that the master clock device is in a fault state.
  • the processor 1302 is specifically configured to: monitor the working state of the master clock device by periodically receiving the first message with the first duration as a period; Among them, the first message is sent by the master clock device to the standby clock device periodically with the first duration as the period under normal working conditions; if the next message is not successfully received within the second duration after the first message is received recently A message that the second duration includes the first duration and the first preset duration, then it is determined that the master clock device is in a fault state.
  • the length of a second duration may be the length of a first duration. In this case, the duration of the first preset duration is zero.
  • the length of a second duration may also be greater than the length of a first duration.
  • the first preset duration is a value greater than zero.
  • the first duration satisfies one of the following: the first message is different from the first synchronization message, and the first duration is shorter than between two adjacent first synchronization messages sent by the master clock device to the standby clock device
  • the first synchronization message includes the time information of the master clock device; the first message is different from the first notification message, and the first duration is shorter than the two adjacent first notifications sent by the master clock device to the standby clock device
  • the duration between messages, the first notification message includes the capability indication information of the master clock device; the first message is different from the first synchronization message, and the first message is different from the first notification message, and the first duration is shorter than
  • the third duration which is the smaller of the duration between two adjacent first synchronization messages sent by the master clock device to the standby clock device and the duration between two adjacent first notification messages;
  • the first message is a first synchronization message, and the first duration is shorter than the duration between two adjacent second synchronization messages sent by the master clock device to the switch device, and the second synchronization message includes the time
  • the transceiver 1303 is specifically configured to perform one of the following: sending a second notification message, which includes the clock-backup device’s Capability indication information, and first indication information; sending a second synchronization message, the second synchronization message including the time information of the standby clock device, and first indication information; sending a preset bit sequence, the preset bit sequence including the first indication Information; sending the preset frame encapsulation signaling, the preset frame encapsulation signaling includes the first indication information.
  • the communication device may include a processor 1302, a transceiver 1303, and a memory 1304.
  • the memory 1304 is used to store instructions
  • the processor 1302 is used to execute the instructions stored in the memory 1304, so as to realize the operation of the first communication device in any one or more of the corresponding methods shown in FIGS. 1 to 4 above.
  • Related programs are used to realize the operation of the first communication device in any one or more of the corresponding methods shown in FIGS. 1 to 4 above.
  • the transceiver 1303 is configured to receive the first indication information sent by the clock-backup device, and the first indication information is used to indicate the time information according to the clock-backup device Synchronize the system clock; the processor 1302 is used to obtain the time information of the clock-backup device; synchronize the system clock of the communication device according to the time information of the clock-back device.
  • the time between the first synchronization message sent by the master clock device and the first indication information received is less than two adjacent ones.
  • the duration between the first synchronization messages; or, the duration between the latest received first notification message sent by the master clock device and the reception of the first indication information is less than the time between two adjacent first notification messages
  • the time period between the first synchronization message sent by the master clock device and the first indication information received is less than the third time length, where the third time length is two adjacent first synchronization messages
  • the length of time between two adjacent first notification messages is the smaller value; or, the time between the first notification message sent by the latest master clock device and the first indication message received
  • the duration is less than the third duration, where the third duration is the smaller value of the duration between two adjacent first synchronization messages and the duration between two adjacent first notification messages.
  • the transceiver 1303 is specifically configured to perform one of the following contents: according to the received clock-backup device, send a second notification message and obtain the second notification message.
  • the second notification message includes the capability indication information of the standby clock device, and the first indication information; according to the received standby clock device, the second synchronization message is sent to obtain the first indication information, and the second synchronization message includes The time information of the standby clock device and the first indication information; according to the received standby clock device sending a preset bit sequence to obtain the first indication information, the preset bit sequence includes the first indication information; according to the received standby clock device sending The preset frame encapsulation signaling obtains the first indication information, and the preset frame encapsulation signaling includes the first indication information.
  • the processor 1302 is specifically configured to: determine the time information of the backup clock device according to the time information of the backup clock device maintained in advance; or;
  • the transceiver 1303 is specifically configured to: receive a second synchronization message sent by the clock-backup device, where the second synchronization message includes time information of the clock-backup device.
  • the transceiver 1303 is further configured to: send first indication information to other nodes.
  • the communication device may include a processor 1302, a transceiver 1303, and a memory 1304.
  • the memory 1304 is used to store instructions
  • the processor 1302 is used to execute the instructions stored in the memory 1304 to implement the correlation of the master clock device in any one or more of the corresponding methods shown in FIGS. 1 to 4 above. Program.
  • the processor 1302 is configured to send the second instruction information to the standby clock device through the transceiver 1303 according to the working state of the master clock device, and the second instruction Information is used to indicate the working status of the master clock device. In this way, the standby clock device can monitor the working status of the master clock device.
  • the processor 1302 is specifically configured to output the first level signal through the link connecting the standby clock device if the master clock device is in a normal working state, If the main clock device is in a faulty working state, the second level signal is output through the link connected to the standby clock device.
  • the processor 1302 is specifically configured to output a signal through a link connected to the standby clock device if the master clock device is in a normal working state, and the signal is an electrical signal Or optical signal; if the main clock device is in a faulty working state, stop outputting signals through the link connected to the standby clock device.
  • the processor 1302 is specifically configured to, if the master clock device is in a normal working state, take the first time period as the period, and periodically pass the transceiver 1303 to the backup device.
  • the clock device sends the first message; where the first duration satisfies one of the following: the first message is different from the first synchronization message, and the first duration is shorter than the two adjacent ones sent by the master clock device to the standby clock device.
  • the duration between the first synchronization messages, the first synchronization message includes the time information of the master clock device; the first message is different from the first notification message, and the first duration is shorter than that sent by the master clock device to the standby clock device
  • the first notification message includes the capability indication information of the master clock device.
  • the first message is different from the first synchronization message, and the first message is different from the first notification message.
  • the first time length is shorter than the third time length.
  • the second synchronization message includes the time information of the master clock device; the first message is the first notification message, and the first time length is shorter than that of the master clock device.
  • FIG. 6 is a schematic structural diagram of a communication device provided by an embodiment of the application.
  • the communication device 1401 may include a communication interface 1403, a processor 1402, and a memory 1404.
  • the communication interface 1403 is used to input and/or output information;
  • the processor 1402 is used to execute computer programs or instructions, so that the communication device 1401 implements the clock-preparation device side method in the above-mentioned related solutions of FIGS. 1 to 4, or enables communication
  • the device 1401 implements the method on the first communication device side in the related solutions of FIGS. 1 to 4, or enables the communication device 1401 to implement the method on the master clock device side in the related solutions of FIGS. 1 to 4 above.
  • the communication interface 1403 can implement the solution implemented by the transceiver 1303 in FIG. 5
  • the processor 1402 can implement the solution implemented by the processor 1302 in FIG. 5
  • the memory 1404 can implement the memory 1304 in FIG. The implemented scheme will not be repeated here.
  • FIG. 7 is a schematic diagram of a communication device provided by an embodiment of this application.
  • the communication device 1501 may be a standby clock device, a master clock device, or a first communication device, or
  • the chip or circuit for example, a chip or circuit that can be installed in a clock-ready device, or a chip or circuit that can be installed in a master clock device, or a chip or circuit that can be installed in the first communication device.
  • the communication device 1501 may include a processing unit 1502, a transceiver unit 1503, and a storage unit 1504.
  • the storage unit 1504 is used to store instructions
  • the processing unit 1502 is used to execute the instructions stored in the storage unit 1504 to implement any one or more of the corresponding methods shown in FIGS. 1 to 4 above.
  • Related programs are used to store instructions, and the processing unit 1502 is used to execute the instructions stored in the storage unit 1504 to implement any one or more of the corresponding methods shown in FIGS. 1 to 4 above. Related programs.
  • the processing unit 1502 is used to monitor the working state of the main clock device, the working state includes being in a normal working state or in a fault state; when it is determined that the main clock device is in In the fault state, the first indication information is sent through the transceiver unit 1503, and the first indication information is used to instruct to synchronize the system clock according to the time information of the clock-backup device.
  • the communication device 1501 may include a processing unit 1502, a transceiver unit 1503, and a storage unit 1504.
  • the storage unit 1504 is used to store instructions
  • the processing unit 1502 is used to execute the instructions stored in the storage unit 1504 to implement the first communication in any one or more of the corresponding methods shown in FIGS. 1 to 4 above.
  • Equipment related programs are used to store instructions.
  • the transceiver unit 1503 is configured to receive the first indication information sent by the clock-backup device, and the first indication information is used to indicate the time information according to the clock-back device Synchronize the system clock; the processing unit 1502 is used to obtain the time information of the clock-backup device; synchronize the system clock of the communication device according to the time information of the clock-back device.
  • the communication device 1501 may include a processing unit 1502, a transceiver unit 1503, and a storage unit 1504.
  • the storage unit 1504 is used to store instructions
  • the processing unit 1502 is used to execute the instructions stored in the storage unit 1504 to implement the master clock device in any one or more of the corresponding methods shown in FIGS. 1 to 4 above.
  • Related programs are used to store instructions, and the processing unit 1502 is used to execute the instructions stored in the storage unit 1504 to implement the master clock device in any one or more of the corresponding methods shown in FIGS. 1 to 4 above.
  • the processing unit 1502 is configured to send the second instruction information to the standby clock device through the transceiver unit 1503 according to the working state of the master clock device, and the second instruction Information is used to indicate the working status of the master clock device. In this way, the standby clock device can monitor the working status of the master clock device.
  • the division of the units of the above communication device is only a division of logical functions, and may be fully or partially integrated into one physical entity during actual implementation, or may be physically separated.
  • the transceiving unit 1503 may be implemented by the transceiver 1303 in FIG. 5, and the processing unit 1502 may be implemented by the processor 1302 in FIG. 5 mentioned above.
  • the present application also provides a computer program product, the computer program product includes: computer program code, when the computer program code runs on a computer, the computer executes the steps shown in FIGS. 1 to 4 The method of any one of the embodiments is shown.
  • the present application also provides a computer-readable storage medium, the computer-readable medium stores program code, and when the program code runs on a computer, the computer executes FIGS. 1 to 4 The method of any one of the illustrated embodiments.
  • the present application also provides a system, which includes the aforementioned standby clock device, a master clock device, and one or more first communication devices.
  • the above embodiments it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof.
  • software it can be implemented in the form of a computer program product in whole or in part.
  • the computer program product includes one or more computer instructions.
  • the computer instructions When the computer instructions are loaded and executed on the computer, the processes or functions according to the embodiments of the present application are generated in whole or in part.
  • the computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • Computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • computer instructions may be transmitted from a website, computer, server, or data center through a cable (such as Coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL) or wireless (such as infrared, wireless, microwave, etc.) transmission to another website site, computer, server or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center integrated with one or more available media.
  • the usable medium can be a magnetic medium (for example, a floppy disk, a hard disk, and a magnetic tape), an optical medium (for example, a high-density digital video disc (DVD)), or a semiconductor medium (for example, a solid state disc (SSD)) )Wait.
  • a magnetic medium for example, a floppy disk, a hard disk, and a magnetic tape
  • an optical medium for example, a high-density digital video disc (DVD)
  • DVD high-density digital video disc
  • SSD solid state disc
  • the network devices in the above-mentioned device embodiments correspond to the network devices or terminal devices in the terminal devices and method embodiments, and the corresponding modules or units execute the corresponding steps.
  • the communication unit transmits the receiving or sending in the method embodiments.
  • other steps can be executed by the processing unit (processor).
  • the processing unit processor
  • the functions of specific units refer to the corresponding method embodiments. Among them, there may be one or more processors.
  • component used in this specification are used to denote computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution.
  • the component may be, but is not limited to, a process, a processor, an object, an executable file, an execution thread, a program, and/or a computer running on a processor.
  • the application running on the computing device and the computing device can be components.
  • One or more components may reside in processes and/or threads of execution, and components may be located on one computer and/or distributed between two or more computers.
  • these components can be executed from various computer readable media having various data structures stored thereon.
  • the component can be based on, for example, a signal having one or more data packets (e.g. data from two components interacting with another component in a local system, a distributed system, and/or a network, such as the Internet that interacts with other systems through a signal) Communicate through local and/or remote processes.
  • a signal having one or more data packets (e.g. data from two components interacting with another component in a local system, a distributed system, and/or a network, such as the Internet that interacts with other systems through a signal) Communicate through local and/or remote processes.
  • the disclosed system, device, and method can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or integrated. To another system, or some features can be ignored, or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection between devices or units through some interfaces, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • the functional units in the various embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the function is realized in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of the present application essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods in the various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (read-only memory, ROM), random access memory (random access memory, RAM), magnetic disk or optical disk and other media that can store program code .

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Abstract

本申请公开了一种时钟切换方法、设备及存储介质，用于在主时钟设备处于故障状态时，缩短时钟切换的时长。本申请实施例中，由于可以通过备时钟设备监测主时钟设备的工作状态，且在发现主时钟设备处于故障状态时，则发送第一指示信息，以使通信设备根据所述备时钟设备的时间信息同步所述通信设备的系统时钟。该过程可以节省掉执行用于确定最优主时钟设备的BMCA算法所花费的时间。

Description

一种时钟切换方法、设备及存储介质 技术领域
本申请涉及通信领域，尤其涉及一种时钟切换方法、设备及存储介质。
背景技术
在通信系统中，时钟的地位至关重要，各种控制、数据传输部离不开时钟。时钟相当于通讯设备的"心脏"如果没有时钟，通讯设备将停止工作。为了保证系统的鲁棒性，系统会配置主时钟设备和备时钟设备两个时钟源。正常工作时，每个节点设备的系统时钟与主时钟设备的时间信息保持同步。若主时钟设备出现故障，则系统需尽快切换到备时钟设备，以保证时间同步误差需求。
现有技术中，主时钟设备在正常工作状态会周期性发送同步(sync)报文，协议规定，若节点设备检测到连续的两个或两个以上的同步报文丢失，则确定主时钟设备出现故障。系统中各个节点设备发送携带自身能力指示信息的通知(announce)报文，每个节点设备结合系统中各个节点设备的能力，通过最优主时钟算法(Best Master Clock Algorithm，BMCA)算法计算出最优的主时钟，等到接收到确定出的最优的主时钟发送的同步(sync)报文之后，将当前工作时钟切换为计算出的最优的主时钟。
从上述过程中可以看出，从节点设备丢失主时钟设备发送的同步报文开始，直到将当前工作时钟切换为计算出的最优的主时钟，该过程中需要包括两个同步报文的发送时长、接收其它节点发送的通知报文的时长、执行BMCA算法的时长，等待接收最优的主时钟发送的同步(sync)报文的时长，该过程占用时长较长，且在该过程中，节点设备的时钟处于自治状态。由于节点设备的系统时钟无时钟源作为参考，因此节点设备的系统时钟会发生偏移，产生较大的时间误差，这会导致整个系统运行不稳定，甚至崩溃。
发明内容
本申请提供一种时钟切换方法、设备及存储介质，用于在主时钟设备处于故障状态时，缩短时钟切换的时长。
第一方面，本申请实施例提供一种时钟切换方法，包括：备时钟设备监测主时钟设备的工作状态，工作状态包括处于正常工作状态或处于故障状态；当备时钟设备确定主时钟设备处于故障状态，则：备时钟设备发送第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟。由于可以通过备时钟设备监测主时钟设备的工作状态，且在发现主时钟设备处于故障状态时，则发送第一指示信息，以使第一通信设备根据备时钟设备的时间信息同步第一通信设备的系统时钟。一方面，该过程可以节省掉执行用于确定最优主时钟设备的BMCA算法所花费的时间。且由于备时钟发现主时钟设备出现故障后，发出第一指示信息，该部分的时长主要是系统内部的命令数据交互耗时，为ns级，时长可以忽略。相比现有技术中还要再次发送通知报文并进行BMCA算法来算出最优主时钟设备的方案，本申请实施例的方案可以很大程度的减少时钟切换的耗时。
为了提供方案的灵活性，在一种可能地实现方式中，备时钟设备监测主时钟设备的工作状态，包括：备时钟设备持续性或周期性监测主时钟设备的工作状态。
在一种可能地实现方式中，备时钟设备持续性监测主时钟设备的工作状态，包括：备 时钟设备通过连接主时钟设备的链路输出的信号持续性监测主时钟设备的工作状态；其中，链路中的传输的信号包括电信号或光信号，链路中传输的信号用于指示主时钟设备处于正常工作状态；备时钟设备确定主时钟设备处于故障状态，包括：若备时钟设备通过链路未接收到的信号，则确定主时钟设备处于故障状态。一种可选地实施方式中，若备时钟设备通过链路在第二预设时长内未接收到的信号，则确定主时钟设备处于故障状态。如此，若主时钟设备出现故障，则可以更加及时的发现，进一步提高时钟切换所花费的时长。
在一种可能地实现方式中，备时钟设备持续性监测主时钟设备的工作状态，包括：备时钟设备通过连接主时钟设备的链路输出的电信号持续性监测主时钟设备的工作状态；其中，电信号包括第一电平信号和第二电平信号，电信号中的第一电平信号用于指示主时钟设备处于工作状态，电信号中的第二电平信号用于指示主时钟设备处于故障状态；备时钟设备确定主时钟设备处于故障状态，包括：若备时钟设备通过链路接收到的电信号为第二电平信号，则确定主时钟设备处于故障状态。如此，可以提高方案灵活性。
在一种可能地实现方式中，备时钟设备周期性监测主时钟设备的工作状态，包括：
备时钟设备通过以第一时长为周期，周期性接收第一消息的方式监测主时钟设备的工作状态；其中，第一消息是主时钟设备以第一时长为周期，在正常工作状态下周期性向备时钟设备发送的；确定主时钟设备处于故障状态，包括：若备时钟设备在最近接收到第一消息后的第二时长内未成功接收到下一条第一消息，所述第二时长包括所述第一时长和第一预设时长，则确定主时钟设备处于故障状态。其中，第一时长满足以下内容中的一项：第一时长短于主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长，第一同步报文中包括主时钟设备的时间信息；第一时长短于主时钟设备向备时钟设备发送的相邻两个第一通知报文之间的时长，第一通知报文中包括主时钟设备的能力指示信息；第一时长短于第三时长，第三时长为主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值；第一时长短于主时钟设备向交换机设备发送的相邻两个第二同步报文之间的时长，第二同步报文中包括主时钟设备的时间信息；第一时长短于主时钟设备向交换机设备发送的相邻两个第二通知报文之间的时长，第二通知报文中包括主时钟设备的能力指示信息。如此，可以提供较多的对主时钟设备的工作状态进行监控的方案。
在一种可能地实现方式中，备时钟设备发送第一指示信息，包括以下内容中的一项：备时钟设备发送第二通知报文，第二通知报文包括备时钟设备的能力指示信息，以及第一指示信息；备时钟设备发送第二同步报文，第二同步报文包括备时钟设备的时间信息，以及第一指示信息；备时钟设备发送预设比特序列，预设比特序列包括第一指示信息；备时钟设备发送预设帧封装信令，预设帧封装信令包括第一指示信息。如此，可以提供较多的发送第一指示信息的方案。
第二方面，提供一种时钟切换方法，包括：第一通信设备接收备时钟设备发送的第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟；第一通信设备获取备时钟设备的时间信息；第一通信设备根据备时钟设备的时间信息同步第一通信设备的系统时钟。一方面，该过程可以节省掉执行用于确定最优主时钟设备的BMCA算法所花费的时间。且由于备时钟发现主时钟设备出现故障后，发出第一指示信息，该部分的时长主要是系统内部的命令数据交互耗时，为ns级，时长可以忽略。相比现有技术中还要再次发送通知报文并进行BMCA算法来算出最优主时钟设备的方案，本申请实施例的方案可 以很大程度的减少时钟切换的耗时。
在一种可能地实现方式中，第一通信设备最新接收到的主时钟设备发送的第一同步报文与接收到第一指示信息之间的时长，小于相邻两个第一同步报文之间的时长；或者，第一通信设备最新接收到的主时钟设备发送的第一通知报文与接收到第一指示信息之间的时长，小于相邻两个第一通知报文之间的时长；或者，第一通信设备最新接收到的主时钟设备发送的第一同步报文与接收到第一指示信息之间的时长小于第三时长，其中，第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值；或者，第一通信设备最新接收到的主时钟设备发送的第一通知报文与接收到第一指示信息之间的时长小于第三时长，其中，第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值。
在一种可能地实现方式中，第一通信设备接收第一指示信息，包括以下内容中的一项：第一通信设备根据接收到的备时钟设备发送第二通知报文，获取第一指示信息，第二通知报文包括备时钟设备的能力指示信息，以及第一指示信息；第一通信设备根据接收到的备时钟设备发送第二同步报文，获取第一指示信息，第二同步报文包括备时钟设备的时间信息，以及第一指示信息；第一通信设备根据接收到的备时钟设备发送预设比特序列，获取第一指示信息，预设比特序列包括第一指示信息；第一通信设备根据接收到的备时钟设备发送预设帧封装信令，获取第一指示信息，预设帧封装信令包括第一指示信息。如此，可以提供较多的对主时钟设备的工作状态进行监控的方案。
在一种可能地实现方式中，第一通信设备获取备时钟设备的时间信息，包括：第一通信设备根据预先维护的备时钟设备的时间信息中，确定出备时钟设备的时间信息。一种可选的实施方式中，第一通信设备可以预先维护有多个备时钟设备的时间信息，在需要使用时，可以采用距离当前时间最近的，也可以说是所维护的所有备时钟设备的时间信息里最新的一个备时钟设备的时间信息。
在一种可能地实现方式中，第一通信设备获取备时钟设备的时间信息，包括：第一通信设备接收备时钟设备发送的第二同步报文，第二同步报文包括备时钟设备的时间信息。
在一种可能地实现方式中，第一通信设备接收第一指示信息之后，还包括：第一通信设备向其他节点发送第一指示信息。如此，可以使其它节点对系统时钟进行同步。
第三方面，本申请实施例提供一种时钟切换方法，包括：主时钟设备根据主时钟设备的工作状态向备时钟设备发送指示第二指示信息，第二指示信息用于指示主时钟设备的工作状态。如此，备时钟设备可以监测主时钟设备的工作状态。
在一种可能地实现方式中，主时钟设备根据主时钟设备的工作状态向备时钟设备发送指示第二指示信息，包括：若主时钟设备在正常工作状态下，通过连接备时钟设备的链路输出第一电平信号，若主时钟设备在故障工作状态下，通过连接备时钟设备的链路输出第二电平信号。
在一种可能地实现方式中，主时钟设备根据主时钟设备的工作状态向备时钟设备发送指示第二指示信息，包括：若主时钟设备在正常工作状态下，通过连接备时钟设备的链路输出信号，信号为电信号或光信号；若主时钟设备在故障工作状态下，停止通过连接备时钟设备的链路输出信号。
在一种可能地实现方式中，主时钟设备根据主时钟设备的工作状态向备时钟设备发送指示第二指示信息，包括：若主时钟设备在正常工作状态下，以第一时长为周期，周期性 向备时钟设备发送第一消息；其中，第一时长满足以下内容中的一项：第一消息与第一同步报文不同，且第一时长短于主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长，第一同步报文中包括主时钟设备的时间信息；第一消息与第一通知报文不同，且第一时长短于主时钟设备向备时钟设备发送的相邻两个第一通知报文之间的时长，第一通知报文中包括主时钟设备的能力指示信息。第一消息与第一同步报文不同，且第一消息与第一通知报文不同，第一时长短于第三时长，第三时长为主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值；第一消息为第一同步报文，且第一时长短于主时钟设备向交换机设备发送的相邻两个第二同步报文之间的时长，第二同步报文中包括主时钟设备的时间信息；第一消息为第一通知报文，且第一时长短于主时钟设备向交换机设备发送的相邻两个第二通知报文之间的时长，第二通知报文中包括主时钟设备的能力指示信息。
相应于第一方面至第三方面任一种通信方法，本申请还提供了一种通信设备。通信设备可以是以无线方式进行数据传输的任意一种发送端的设备或接收端的设备。例如，通信芯片、网络设备等。在通信过程中，发送端的设备和接收端的设备是相对的。在某些通信过程中，通信设备可以作为上述备时钟设备、主时钟设备或第一通信设备，或可用于备时钟设备、主时钟设备或第一通信设备的通信芯片。
第四方面，提供了一种通信设备，包括收发单元和处理单元，以执行上述第一方面至第三方面任一种通信方法中的任一种实施方式。收发单元用于执行与发送和接收相关的功能。可选地，收发单元包括接收单元和发送单元。在一种设计中，通信设备为通信芯片，收发单元可以为通信芯片的输入输出电路或者端口。
在另一种设计中，收发单元可以为发射器和接收器，或者收发单元为发射机和接收机。
可选的，通信设备还包括可用于执行上述第一方面至第三方面任一种通信方法中的任一种实施方式的各个模块。
第五方面，提供了一种通信设备，该通信设备为上述备时钟设备、主时钟设备或第一通信设备。包括处理器和存储器。可选的，还包括收发器，该存储器用于存储计算机程序或指令，该处理器用于从存储器中调用并运行该计算机程序或指令，当处理器执行存储器中的计算机程序或指令时，使得该通信设备执行上述第一方面至第三方面任一种方法中的任一种实施方式。
可选的，处理器为一个或多个，存储器为一个或多个。
可选的，存储器可以与处理器集成在一起，或者存储器与处理器分离设置。
可选的，收发器中可以包括，发射机(发射器)和接收机(接收器)。
第六方面，提供了一种通信设备，包括处理器。该处理器与存储器耦合，可用于执行第一方面至第三方面任一方面，以及第一方面至第三方面中任一种可能实现方式中的方法。可选地，该通信设备还包括存储器。可选地，该通信设备还包括通信接口，处理器与通信接口耦合。
在另一种实现方式中，该通信设备为备时钟设备、主时钟设备或第一通信设备。当该通信设备为备时钟设备、主时钟设备或第一通信设备时，通信接口可以是收发器，或，输入/输出接口。可选地，收发器可以为收发电路。可选地，输入/输出接口可以为输入/输出电路。
在又一种实现方式中，该通信设备为芯片或芯片系统。当该通信设备为芯片或芯片系 统时，通信接口可以是该芯片或芯片系统上的输入/输出接口、接口电路、输出电路、输入电路、管脚或相关电路等。处理器也可以体现为处理电路或逻辑电路。
第七方面，提供了一种系统，系统包括上述备时钟设备、主时钟设备或第一通信设备。
第八方面，提供了一种计算机程序产品，计算机程序产品包括：计算机程序(也可以称为代码，或指令)，当计算机程序被运行时，使得计算机执行上述第一方面中任一种可能实现方式中的方法，或者使得计算机执行上述第一方面至第三方面任一种实现方式中的方法。
第九方面，提供了一种计算机可读存储介质，计算机可读介质存储有计算机程序(也可以称为代码，或指令)当其在计算机上运行时，使得计算机执行上述第一方面中任一种可能实现方式中的方法，或者使得计算机执行上述第一方面至第三方面任一种实现方式中的方法。
第十方面，提供了一种处理设备，包括：输入电路、输出电路和处理电路。处理电路用于通过输入电路接收信号，并通过输出电路发射信号，使得第一方面至第三方面任一方面，以及第一方面至第三方面中任一种可能实现方式中的方法被实现。
在具体实现过程中，上述处理设备可以为芯片，输入电路可以为输入管脚，输出电路可以为输出管脚，处理电路可以为晶体管、门电路、触发器和各种逻辑电路等。输入电路所接收的输入的信号可以是由例如但不限于接收器接收并输入的，输出电路所输出的信号可以是例如但不限于输出给发射器并由发射器发射的，且输入电路和输出电路可以是同一电路，该电路在不同的时刻分别用作输入电路和输出电路。本申请实施例对处理器及各种电路的具体实现方式不做限定。
附图说明
图1为本申请实施例适用的一种系统架构示意图；
图2为本申请实施例适用的另外一种网络架构示意图；
图3为一种时钟切换的流程方法示意图；
图4为本申请实施例提供的一种时钟切换的流程方法示意图；
图5为一种通信设备的结构示意图；
图6为另一种通信设备的结构示意图；
图7为另一种通信设备的结构示意图。
具体实施方式
本申请实施例适用于有时钟同步需求的多种网络，比如车内网络、5G网络等。以车内网络为例，本申请实施例中涉及的车内网络可以包括以下一项或多项网元：
传感器，比如可以包括毫米波雷达、激光雷达、超声波雷达、摄像头、定位系统(如GPS)、惯性传感器(Inertial measurement unit，IMU)、速度传感器、加速度传感器、湿度传感器、光强度传感器等车上用到传感器、车载T-Box(Telematics BOX)传递的传感器信息等。
播放设备，比如可以包括显示屏、扬声器、功放等。
交换机设备，可以用于承担路由交换功能，可以是一个交换机或路由器，可用于汇聚中转各种数据业务，如音视频、同步消息、控制消息等。
控制器，可以是计算中心，可用于承担某一个功能的计算和控制，可以独立也可以与网关集成，具体的，比如可以是车载计算平台或车载电脑、域控制器、多域控制器，如自动驾驶控制器、信息娱乐控制器等，也可以是存储中心、数据中心，用于存储重要的数据，如车内的黑匣子、行车记录仪等。
以上几项网元仅仅是车内网络的逻辑概念，在实际中以上几项网元的形态可以是一个实体设备，盒子，也可能是一块单板，或者单板上的一个芯片或者区域所实现的功能。在实际中多个网元还可能会合成一个设备，例如交换机设备和控制器可能在一个电路板上。
在网络中，为了保证系统的鲁棒性，网络中配置有主时钟设备和备时钟设备。本申请实施例中主时钟设备和备时钟设备的物理位置的分布是任意的，可以在不同或相同盒子里，也可以在同一块电路板。网络中的各个节点在正常工作状态下与主时钟设备保持时间同步。图1示例性示出了本申请实施例适用的一种系统架构示意图，如图1所示，系统中的节点包括有交换机设备和端节点(如端节点S1至端节点S5)。节点可以统称为第一通信设备，本申请实施例中提到的第一通信设备可是指交换机设备或端节点。为了区分，在图1中以交换机设备和端节点设备来分别进行标识。
如图1所示，该网络包括外部时钟信号101，外部时钟信号比如可以为全球定位系统(Global Positioning System，GPS)、北斗等。主时钟设备102和备时钟设备103与外部时钟信号保持时间同步。主时钟设备102与备时钟设备103之间有直连的物理链路。在正常工作状态下，交换机设备1、交换机设备2和交换机设备3与主时钟设备102保持时间同步，端节点S1通过交换机设备1与主时钟设备102保持时间同步。端节点S2通过交换机设备2与主时钟设备102保持时间同步。端节点S3通过交换机设备3与主时钟设备102保持时间同步。端节点S4通过交换机设备3与主时钟设备102保持时间同步。端节点S5通过交换机设备3与主时钟设备102保持时间同步。如此，可以对准整个网络运行的时间和频率，保证系统时钟精度在要求范围内，驱动网络有条不紊的工作。
图2示例性示出了本申请实施例适用的另外一种网络架构示意图，图2相对于图1的改动在于，图2中所有节点(包括交换机设备1、交换机设备2、交换机设备3，端节点S1、端节点S2、端节点S3、端节点S4和端节点S5)与主备时钟分别建立主时钟同步树和备时钟同步树，在正常工作状态下，各个节点保持与主时钟设备的时钟同步，但是各个节点也维持备时钟设备的时间信息，也可以说，备时钟同步树各个节点之间时延和频率一直被测量保存。当各个节点检测到主时钟设备发生故障时，系统可以从主时钟同步树直接切换到备时钟同步树，以实现时钟的切换。可以说，交换机设备1通过两个接口分别连接主时钟设备102和备时钟设备103，当确定主时钟设备102发生故障，则通过连接备时钟设备103的接口接收备时钟设备103发送的时间信息。以端节点S1为例对端节点的方案进行描述，端节点S1通过两个接口分别连接交换机设备1，当主时钟设备102处于正常工作状态时，端节点S1通过其中一个接口实现与主时钟设备102的时间同步，通过另外一个接口接收到备时钟设备103的时间信息，并进行存储。当端节点S1确定主时钟设备102发生故障，则通过该另一个接口接收到的备时钟设备103的时间信息进行时钟同步，从而实现从主时钟同步树到备时钟同步树的切换。
系统中的主时钟设备和备时钟设备是预先配置的，比如，可以根据BMCA算法确定出系统中的最优主时钟，将其作为当前的主时钟设备。一种可选地实施方式中，BMCA算法可以是指802.1AS或802.1AS REV协议提出的最优主时钟算法。该算法主要通过对比各个 节点的能力，确定系统最优的主时钟。
在具体实施中，影响时间同步误差的因素包括：物理层非对称时延、晶振工作频率以及晶振频率精度。前两个因素是由系统固有的特性决定的，第三个因素与无同步时钟持续时长共同影响误差大小。本申请实施例中可以主要考虑晶振频率精度，下面通过图3所示的一种时钟切换的流程方法示意图，对一种可能时钟切换流程的缺陷进行分析。如图3所示，该方法包括：
步骤201，主时钟设备周期性发送第一同步报文。第一同步报文中包括有主时钟设备的时间信息。
步骤202，第一通信设备在连续两个周期未监测到第一同步报文时，确定主时钟设备发生故障。
步骤203，备时钟设备在连续两个周期未监测到第一同步报文时，确定主时钟设备发生故障。
步骤204，备时钟设备发送第二通知报文，第二通知报文携带备时钟设备的能力指示信息。
其它各个节点的第一通信设备也会发送自身的能力指示信息。每个节点执行BMCA算法，确定最优主时钟设备，例如下述步骤205和步骤206。
步骤205，第一通信设备执行BMCA算法，确定备时钟设备为最优主时钟设备。
步骤206，备时钟设备执行BMCA算法，确定备时钟设备为最优主时钟设备。
步骤207，备时钟设备发送第二同步报文，第二同步报文包括备时钟设备的时间信息。
步骤208，第一通信设备根据备时钟设备的时间信息进行时钟同步。
在上述步骤208中，当确定备时钟设备为最优主时钟设备后，备时钟设备会变更为主时钟设备。也就是说，本申请实施例中主时钟设备和备时钟设备的身份会发生变更。当一个时钟在开始被设置为备时钟设备，当之后该时钟被选为最优主时钟设备，则该时钟的身份会变更为主时钟设备。
基于上述图3所示的方法进行分析，如图3所示，时钟切换时长主要包括：第一通信设备检测主时钟设备发生故障的时长(图3中为两个第一同步报文的发送周期(Ts))，以及第一通信设备与备用时钟设备同步建立时长(图3中包括1个第二通知报文发送周期(Ta)和1个第二同步报文发送周期。假设第一同步报文、第二同步报文、第一通知报文的发送频率均为100毫秒(ms)，第一通信设备的晶振频率精度为200ppm(其中，百万分之一(ppm)：表示晶振频率精度)，则时钟切换时长总共为400ms，则此过程导致的系统时间同步误差为0.4*200＝80us。而当前许多系统对时间同步的精度要求很高，例如TD-SCDMA和LTE TDD时间同步要求为±1.5us，CDMA2000时间同步要求为±3us。车内通信网络对时间同步精度也有较高的要求。图3所描述的方案的时间同步的精度误差较大，无法满足系统同步精度的要求。
经分析，导致时钟切换过程中时间同步的精度误差较大的主要原因有2个：第一晶振频率精度，这只能依靠选择更高精度的晶振；第二，第一通信设备检测主时钟设备发生故障的时长和第一通信设备与备用时钟设备同步建立时长过长。因此，本申请实施例提供一种时钟切换方法，用于缩短时钟切换时长，从而可以减小切换过程的时间同步误差。
图4示例性示出了本申请实施例提供的一种时钟切换方法，包括：
步骤401，备时钟设备监测主时钟设备的工作状态，工作状态包括处于正常工作状态 或处于故障状态。
步骤402，当备时钟设备确定主时钟设备处于故障状态，则：备时钟设备发送第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟。
相对应地，第一通信设备接收备时钟设备发送的第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟。
在步骤402之后，还可以包括第一通信设备侧执行的步骤403。
步骤403，第一通信设备获取备时钟设备的时间信息。
步骤404，第一通信设备根据备时钟设备的时间信息同步第一通信设备的系统时钟。
上述步骤404中，也可以描述为第一通信设备将系统时钟设备切换为该备时钟设备。具体来说，第一通信设备会有两个接口，一个接口接收主时钟设备的时间信息，另一个接口接收备时钟设备的时间信息。可选地，第一通信设备根据备时钟设备的时间信息同步第一通信设备的系统时钟，也可以描述为，第一通信设备启用接收备时钟设备的时间信息的接口。或者描述为，第一通信设备切换到接收备时钟设备的时间信息的接口。
网络的第一通信设备进行时钟设备切换，可选地，作为该备时钟设备的时钟设备的身份会更新为主时钟设备。原来作为主时钟设备的时钟设备因为出现了故障，因此其身份会被更新为非主时钟设备。也就是说，针对一个系统中的一个时钟设备，该时钟设备的身份可以随着当前系统性能进行改变，比如该时钟设备可以在一个开始的时候作为主时钟设备，但在出现故障后，则身份更改为非主时钟设备；再比如，一个时钟设备在开始的时候作为备时钟设备，当主设备故障后，该时钟设备的身份更新为主时钟设备。本申请实施例中上述步骤401中的备时钟设备指的就是身份作为备时钟设备的一个时钟设备，而主时钟设备指的就是身份作为主时钟设备的一个时钟设备。
本申请实施例中，由于可以通过备时钟设备监测主时钟设备的工作状态，且在发现主时钟设备处于故障状态时，则发送第一指示信息，以使第一通信设备根据备时钟设备的时间信息同步第一通信设备的系统时钟。一方面，该过程可以节省掉执行用于确定最优主时钟设备的BMCA算法所花费的时间。且由于备时钟发现主时钟设备出现故障后，发出第一指示信息，该部分的时长主要是系统内部的命令数据交互耗时，为ns级，时长可以忽略。相比现有技术中还要再次发送通知报文并进行BMCA算法来算出最优主时钟设备的方案，本申请实施例的方案可以很大程度的减少时钟切换的耗时。
另一方面，由于备时钟设备在检测主时钟设备的工作状态，因此可以通过缩短备时钟发现主时钟设备出现故障的时间的方式来缩短时钟切换进程，从而进一步提升时钟切换的速度，进而可以减少各个第一通信设备的系统时钟出现的偏差量，从而提高系统时间同步鲁棒性和系统运行的可靠性。
在上述步骤401中，主时钟设备和备时钟设备之间有链路，该链路可以传输同步报文或通知报文等等信息。同步报文可以写为sync报文，通知报文可以写为announce报文。备时钟设备可以通过该原有的链路监测主时钟设备的工作状态。可选地，也可以在备时钟设备和主时钟设备之间新增一条链路，用于监测主时钟设备的工作状态，该新增的链路可以是铜线、印刷电路板(Printed Circuit Board，PCB)走线、光纤等等。
上述步骤401中，一种可选地实施方式中，备时钟设备持续性监测主时钟设备的工作状态。持续性监测是指备时钟设备收到持续性的信号(比如光信号或电信号)来判断主时钟设备的工作状态。另一种可选地实施方式中，备时钟设备周期性监测主时钟设备的工作 状态。周期性监测是指以一定时间为间隔，周期性判断主时钟设备的工作状态。
上述步骤401中主时钟设备可以根据主时钟设备的工作状态向备时钟设备发送第二指示信息，第二指示信息用于指示主时钟设备的工作状态。可选地，在主时钟设备和备时钟设备之间连接有链路。该链路可以是能够输出电信号的电缆，也可以是能够输出光信号的光缆，或者其它传输介质，本申请不作限制。一种可选地实施方式中，主时钟设备处于正常工作状态和故障状态下都会向备时钟设备发送信号。又一种可选地实施方式中，可以仅仅在主时钟设备处于故障状态下都会向备时钟设备发送信号，也就是说，当主时钟设备处于正常工作状态下时，可以不发送信号。又一种可选地实施方式中，可以仅仅在主时钟设备处于正常工作状态下都会向备时钟设备发送信号，也就是说，当主时钟设备处于故障状态下时，可以不发送信号。下面通过方案a1、方案a2和方案a3进行示例性介绍。
方案a1
在方案a1中，第二指示信息可以包括第三指示信息和第四指示信息，其中，第三指示信息用于指示主时钟设备处于正常工作状态，第四指示信息用于指示主时钟设备处于故障状态。
第二指示信息可以是周期性发送的，也可以是持续性发送的。比如当主时钟设备处于正常工作状态下，可以周期性或持续性向备时钟设备发送第三指示信息，当主时钟设备处于故障状态下，可以周期性或持续性向备时钟设备发送第四指示信息。当备时钟设备收到第四指示信息，则确定主时钟设备处于故障状态。
一种可选地方案a1的实施方式中，主时钟设备可以根据主时钟设备的工作状态向备时钟设备持续性发送电信号，并可以通过电信号的高电平和低电平来指示主时钟设备的工作状态，比如，电信号包括第一电平信号和第二电平信号，电信号中的第一电平信号用于指示主时钟设备处于工作状态，电信号中的第二电平信号用于指示主时钟设备处于故障状态。若第一电平信号为高电平，则第二电平信号为低电平。若第一电平信号为低电平，则第二电平信号为高电平。
又一种可选地方案a1的实施方式中，若主时钟设备在正常工作状态下，通过连接备时钟设备的链路(该链路比如可以是电缆或其它能够输出电信号的链路)输出第一电平信号。若主时钟设备在故障工作状态下，通过连接备时钟设备的链路输出第二电平信号。一种示例，可以通过硬件上的改进，使主时钟设备在正常工作状态下，持续性或周期性发送高电平。也就是说，在方案a1中，若主时钟设备处于正常工作状态，则链路中会有持续的或周期的高电平在传输，而在主时钟设备处于故障状态下，由于该主时钟设备已经故障了，因此该链路中的电信号电平被拉低，则该链路中输出低电平。又一种示例，可以通过对主时钟设备的软件进行改进，使主时钟设备在正常工作状态下，持续性发送高电平。而在主时钟设备处于故障状态下，该主时钟设备可以主动将电信号的电平拉低，以使该链路中输出低电平。相对应地，若备时钟设备通过链路接收到的电信号为第二电平信号，则确定主时钟设备处于故障状态。可选地，若备时钟设备通过链路接收到的电信号为第一电平，则确定主时钟设备处于工作状态。
方案a2
在方案a2中，当主时钟设备处于故障工作状态时，可以发送第四指示信息，第四指示信息用于指示主时钟设备处于故障状态。也就是说，当主时钟设备处于正常工作状态时，可以不发送任何用于指示主时钟设备处于正常工作状态的信号。在方案a2中，第四指示信 息可以是光信号、电信号，或者是一个预设的信令等等。
方案a3
在方案a3中，若主时钟设备在正常工作状态下，通过连接备时钟设备的链路持续性或以第一时长为周期周期性输出第三指示信息，第三指示信息用于指示主时钟设备处于正常工作状态。若主时钟设备在故障工作状态下，停止通过连接备时钟设备的链路周期性输出第三指示信息。也就是说，当主时钟设备处于故障状态时，可以不发送任何用于指示主时钟设备处于故障状态的信号。相对应地，备时钟设备通过连接主时钟设备的链路输出的第三指示信息周期性监测主时钟设备的工作状态。在方案a3中，第三指示信息可以是光信号、第一消息、或者是电信号等等，该电信号的实现形式有多种，比如可以是高电平，或者低电平，或者是包括有高电平和低电平的电信号等等。
一种可选地方案a3的实施方式中，若主时钟设备在正常工作状态下，通过连接备时钟设备的链路持续性输出第三指示信息，若主时钟设备在故障工作状态下，停止通过连接备时钟设备的链路输出第三指示信息。相对应地，备时钟设备通过连接主时钟设备的链路输出的第三指示信息持续性监测主时钟设备的工作状态。也就是说，在方案a3中，若主时钟设备处于正常工作状态，则链路中会有持续的第三指示信息在传输，若备时钟设备通过链路未接收到的第三指示信息(也可以说链路中没有第三指示信息了)，则确定主时钟设备处于故障状态。一种可选地实施方式中，若备时钟设备通过链路在第二时长内未接收到的信号，则确定主时钟设备处于故障状态。其中，链路中的传输的第三指示信息用于指示主时钟设备处于正常工作状态。
又一种可选地方案a3的实施方式中，备时钟设备通过以第一时长为周期，周期性接收第三指示信息的方式监测主时钟设备的工作状态。其中，第三指示信息是主时钟设备以第一时长为周期，在正常工作状态下周期性向备时钟设备发送的。在方案a3中，相对应地，若备时钟设备在最近接收到第三指示信息后的第二时长内未成功接收到下一条第三指示信息，则确定主时钟设备处于故障状态。也可以说是备时钟设备丢掉一个第三指示信息，或者说备时钟设备接收失败一个第一消息，则确定主时钟设备处于故障状态。
可选的，第二时长可以包括第一时长和第一预设时长。
在方案a3中，当第三指示信息为第一消息时，第一消息可以是现有的信令，比如是主时钟设备的发送的同步报文或者通知报文，第一消息也可以是其它新增的信令，用于指示主时钟设备处于工作状态。方案a3中的第一时长也可以有多种实现形式。下面通过下述方案b1、方案b2、方案b3、方案b4和方案b5对方案a3的多种实施方式进行示例性介绍。
方案b1
本申请实施例中将主时钟设备发送的同步报文称为第一同步报文，主时钟设备可以向备时钟设备或其他比如交换机设备发送第一同步报文。第一同步报文中包括主时钟设备的时间信息。本申请实施例中将备时钟设备发送的同步报文称为第二同步报文，备时钟设备可以向其他比如交换机设备发送第二同步报文。第二同步报文中包括备时钟设备的时间信息。
在方案b1中，第一时长短于主时钟设备向交换机设备发送的相邻两个第一同步报文之间的时长。也可以说，第一时长短于主时钟设备向交换机设备发送第一同步报文的发送周期。如此，可以仅仅调整了主时钟设备向备时钟设备发送第一同步报文的频率，以使主时钟设备向备时钟设备发送同步报文的频率高于主时钟设备向交换机设备发送同步报文 的频率，相比于交换机设备需要通过连续丢失两个第一同步报文来确定主时钟设备处于故障的方案，该方案可以使备时钟设备相比交换机设备更快的发现主时钟设备出现了故障。该方案中可以采用一旦丢失一个第一同步报文则确定主时钟设备出现故障的方案。该方案也可以与现有技术兼容，当连续丢失两个第一同步报文则确定主时钟设备出现故障。
可选的，在方案b1中，第一消息可以为第一同步报文。
方案b2
本申请实施例中将主时钟设备发送的通知报文称为第一通知报文，主时钟设备可以向备时钟设备或其他比如交换机设备发送第一通知报文。第一通知报文中包括主时钟设备的能力指示信息。本申请实施例中将备时钟设备发送的通知报文称为第二通知报文，备时钟设备可以向其他比如交换机设备发送第二通知报文。第二通知报文中包括备时钟设备的能力指示信息。
在方案b2中，第一时长短于主时钟设备向交换机设备发送的相邻两个第一通知报文之间的时长。也可以说，第一时长短于主时钟设备向交换机设备发送第一通知报文的发送周期。如此，可以仅仅调整了主时钟设备向备时钟设备发送第一通知报文的频率，以使主时钟设备向备时钟设备发送通知报文的频率高于主时钟设备向交换机设备发送通知报文的频率，相比于交换机设备通过连续丢失两个第一通知报文来确定主时钟设备处于故障的方案，该方案可以使备时钟设备相比交换机设备更快的发现主时钟设备出现了故障。该方案中可以采用一旦丢失一个第一通知报文则确定主时钟设备出现故障的方案。该方案也可以与现有技术兼容，当连续丢失两个第一通知报文则确定主时钟设备出现故障。
可选的，在方案b2中，第一消息可以为第一通知报文。
方案b3
在方案b3中，第一时长短于主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长。也可以说，第一时长短于主时钟设备向交换机设备发送第一同步报文的发送周期。如此，第一消息的频率高于主时钟设备向备时钟设备发送第一同步报文的频率，相比于备时钟设备通过连续丢失两个第一同步报文来确定主时钟设备处于故障的方案，该方案可以提高备时钟设备发现主时钟设备的速度，进而缩短时钟切换进程所花费的时间。
可选的，上述方案a3中的第一消息与第一同步报文不同。可选地，第一消息可以与第一通知报文相同或不同。
方案b4
在方案b4中，第一时长短于主时钟设备向备时钟设备发送的相邻两个第一通知报文之间的时长。也可以说，第一时长短于主时钟设备向交换机设备发送第一通知报文的发送周期。如此，第一消息的频率高于主时钟设备向备时钟设备发送第一通知报文的频率，相比于备时钟设备通过连续丢失两个第一通知报文来确定主时钟设备处于故障的方案，该方案可以提高备时钟设备发现主时钟设备的速度，进而缩短时钟切换进程所花费的时间。
可选的，上述方案a3中的第一消息与第一通知报文不同。可选地，第一消息可以与第一同步报文相同或不同。
方案b5
在方案b5中，第一时长短于第三时长，第三时长为主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值。也可以说，第三时长是主时钟设备向备时钟设备发送第一同步报文的发送周期，以及主时钟设 备向备时钟设备发送第一通知报文的发送周期中的较小值。如此，第一消息的频率高于主时钟设备向备时钟设备发送第一通知报文的频率，且第一消息的频率高于主时钟设备向备时钟设备发送第一同步报文的频率，相比于备时钟设备通过连续丢失两个第一同步报文来确定主时钟设备处于故障的方案，或者，相比于备时钟设备通过连续丢失两个第一通知报文来确定主时钟设备处于故障的方案，该方案可以提高备时钟设备发现主时钟设备的速度，进而缩短时钟切换进程所花费的时间。
可选的，上述方案a3中的第一消息与第一同步报文不同，且第一消息与第一通知报文不同。
上述方案b1-方案b5中，第一时长可以替换成第二时长。即第一时长与第一预设时长之和可以短于某个值。
在上述步骤403中，还可以包括一种可能地实现方式，备时钟设备确定主时钟设备处于故障状态，则发送第一指示信息。一种可能地实施方式中，第一通信设备最新接收到的主时钟设备发送的第一同步报文与接收到第一指示信息之间的时长，小于两个第一同步报文之间的时长，也可以说小于主时钟设备向第一通信设备发送的第一同步报文的发送周期。如此，相比第一通信设备需要通过连续丢失两个第一同步报文才能确定主时钟设备处于故障的方案来讲，该方案可以更快的发现主时钟设备处于故障，从而可以加快时钟切换进程。
第二种可能地实施方式中，第一通信设备最新接收到的主时钟设备发送的第一同步报文与接收到第一指示信息之间的时长小于第三时长。如此，相比第一通信设备需要通过连续丢失两个第一同步报文或连续丢失两个第一通知报文才能确定主时钟设备处于故障的方案来讲，该方案可以更快的发现主时钟设备处于故障，从而可以加快时钟切换进程。
第三种可能地实施方式中，第一通信设备最新接收到的主时钟设备发送的第一通知报文与接收到第一指示信息之间的时长，小于两个第一通知报文之间的时长，也可以说小于主时钟设备向第一通信设备发送的第一通知报文的发送周期。如此，相比第一通信设备需要通过连续丢失两个第一通知报文或连续丢失两个第一通知报文才能确定主时钟设备处于故障的方案来讲，该方案可以更快的发现主时钟设备处于故障，从而可以加快时钟切换进程。
第四种可能地实施方式中，第一通信设备最新接收到的主时钟设备发送的第一通知报文与接收到第一指示信息之间的时长小于第三时长。如此，相比第一通信设备需要通过连续丢失两个第一同步报文或连续丢失两个第一通知报文才能确定主时钟设备处于故障的方案来讲，该方案可以更快的发现主时钟设备处于故障，从而可以加快时钟切换进程。
上述步骤402中，备时钟发送第一指示信息的方式有多种，可以通过显示方式(比如单独发送一条第一指示信息)发送，也可以通过隐式方式(比如携带在其他信令中)发送。下面通过方式c1、方式c2、方式c3和方式c4对发送第一指示信息的方式进行示例性介绍。
方案c1
备时钟设备发送第二通知报文。相对应地，第一通信设备根据接收到的备时钟设备发送的第二通知报文，获取第一指示信息。第二通知报文包括备时钟设备的能力指示信息，以及第一指示信息。可选地，可以在第二通知报文的预留字段上携带该第一指示信息。如此，可以通过现有的第二通知报文携带第一指示信息，从而兼容了现有技术，避免新构建信令，可以简化方案。
方案c2
备时钟设备发送第二同步报文。相对应地，第一通信设备根据接收到的备时钟设备发送的第二同步报文，获取第一指示信息。第二同步报文包括备时钟设备的时间信息，以及第一指示信息。可选地，可以在第二同步报文的预留字段上携带该第一指示信息。如此，可以通过现有的第二同步报文携带第一指示信息，从而兼容了现有技术，避免新构建信令，可以简化方案。
方案c3
备时钟设备发送预设比特序列。相对应地，第一通信设备根据接收到的备时钟设备发送预设比特序列，获取第一指示信息。预设比特序列包括第一指示信息。也可以说，可以在第二通知报文和第二同步报文发送的间隔期间，发送预设的0、1序列，第一通信设备收到该预设的0、1序列，则切换至备时钟设备。如此，可以通过预设比特序列指示第一通信设备进行时钟切换，可以简化方案。
方案c4
备时钟设备发送预设帧封装信令。相对应地，第一通信设备根据接收到的备时钟设备发送预设帧封装信令，获取第一指示信息。预设帧封装信令包括第一指示信息。也可以说，可以在第二通知报文和第二同步报文发送的间隔期间，发送预设帧封装信令，第一通信设备收到该预设帧封装信令，则切换至备时钟设备。该预设帧封装信令可以是单独的帧封装信令，比如可以包括帧头、帧尾等。如此，可以通过预设帧封装信令指示第一通信设备进行时钟切换，可以简化方案。
上述步骤403中，第一通信设备获取备时钟设备的时间信息有多种方式，基于上述图1和图2分别进行示例性说明。
如图1所示，当上述步骤403中的第一通信设备为交换机设备(比如交换机设备1、交换机设备2等)，则第一通信设备可以接收备时钟设备发送的第二同步报文(第二同步报文中包括有备时钟设备的时间信息)，备时钟设备可以在确定主时钟设备发生故障后发送第二同步报文。第二同步报文可以在发送第一指示信息之后发送。可选地，也可以在发送第一指示信息之前发送，或者将第一指示信息携带在第二同步报文中发送过去。如图1所示，可选地，交换机设备接收到第一指示信息后会将第一指示信息转发给其它节点设备，交换机设备接收到第二同步报文后会将第二同步报文转发给其它节点设备，比如图1中的端节点S1。端节点S1在接收到第二同步报文和第一指示信息后，会将端节点S1会根据备时钟设备的时间信息更新端节点S1的系统时钟。
如图2所示，由于各个节点(比如交换机设备1和端节点S1)都维护的有备时钟设备的时间信息，因此当上述步骤403中的第一通信设备为交换机设备或者是端节点设备，第一通信设备根据预先维护的备时钟设备的时间信息中，确定出备时钟设备的时间信息。一种可选的实施方式中，第一通信设备可以预先维护有多个备时钟设备的时间信息，在需要使用时，可以采用距离当前时间最近的，也可以说是所维护的所有备时钟设备的时间信息里最新的一个备时钟设备的时间信息。当备时钟设备发送第一指示信息后，备时钟同步树激活，备时钟同步树上的所有切点都切换到备时钟同步树，也可以描述为备时钟同步树上的所有节点都启用接收备时钟设备的时间信息的接口。该方案中，时钟切换时长包括：备时钟设备发现主时钟设备故障的时间、备时钟设备发送第一指示信息的时长、备时钟同步树激活的时间，以及主时钟同步树向备时钟同步树切换的时间，这些时间都属于内部信息处理传输时间，为纳秒ns级。如果按照1us的时长，则该方案的同步误差为0.001*200＝200ns。 相对比图3提供的方案，效果可以提升了400和200倍。
需要说明的是，上述各个消息的名称仅仅是作为示例，随着通信技术的演变，上述任意消息均可能改变其名称，但不管其名称如何发生变化，只要其含义与本申请上述消息的含义相同，则均落入本申请的保护范围之内。
上述主要从各个网元之间交互的角度对本申请提供的方案进行了介绍。可以理解的是，上述实现各网元为了实现上述功能，其包含了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，本发明能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
根据前述方法，图5为本申请实施例提供的通信设备的结构示意图，如图5所示，该通信设备可以为备时钟设备、主时钟设备或第一通信设备，也可以为芯片或电路，比如可设置于备时钟设备的芯片或电路，再比如可设置于主时钟设备内的芯片或电路，再比如可设置于第一通信设备内的芯片或电路。
进一步的，该通信设备1301还可以进一步包括总线系统，其中，处理器1302、存储器1304、收发器1303可以通过总线系统相连。
应理解，上述处理器1302可以是一个芯片。例如，该处理器1302可以是现场可编程门阵列(field programmable gate array，FPGA)，可以是专用集成芯片(application specific integrated circuit，ASIC)，还可以是系统芯片(system on chip，SoC)，还可以是中央处理器(central processor unit，CPU)，还可以是网络处理器(network processor，NP)，还可以是数字信号处理电路(digital signal processor，DSP)，还可以是微控制器(micro controller unit，MCU)，还可以是可编程控制器(programmable logic device，PLD)或其他集成芯片。
在实现过程中，上述方法的各步骤可以通过处理器1302中的硬件的集成逻辑电路或者软件形式的指令完成。结合本申请实施例所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器1302中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器1304，处理器1302读取存储器1304中的信息，结合其硬件完成上述方法的步骤。
应注意，本申请实施例中的处理器1302可以是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器可以是通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法的步骤。
可以理解，本申请实施例中的存储器1304可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(dynamic RAM，DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DR RAM)。应注意，本文描述的系统和方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
该通信设备1301对应上述方法中的备时钟设备的情况下，该通信设备可以包括处理器1302、收发器1303和存储器1304。该存储器1304用于存储指令，该处理器1302用于执行该存储器1304存储的指令，以实现如上图1至图4中所示的任一项或任多项对应的方法中备时钟设备的相关方案。
当通信设备1301为上述备时钟设备，一种可能地实施方式中，处理器1302，用于监测主时钟设备的工作状态，工作状态包括处于正常工作状态或处于故障状态；当确定主时钟设备处于故障状态，则：通过收发器1303发送第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟。
当通信设备1301为上述备时钟设备，一种可能地实施方式中，处理器1302，具体用于：持续性或周期性监测主时钟设备的工作状态。
当通信设备1301为上述备时钟设备，一种可能地实施方式中，处理器1302，具体用于：通过连接主时钟设备的链路输出的信号持续性监测主时钟设备的工作状态；其中，链路中的传输的信号包括电信号或光信号，链路中传输的信号用于指示主时钟设备处于正常工作状态；若通过链路未接收到的信号，则确定主时钟设备处于故障状态。
当通信设备1301为上述备时钟设备，一种可能地实施方式中，处理器1302，具体用于：通过连接主时钟设备的链路输出的电信号持续性监测主时钟设备的工作状态；其中，电信号包括第一电平信号和第二电平信号，电信号中的第一电平信号用于指示主时钟设备处于工作状态，电信号中的第二电平信号用于指示主时钟设备处于故障状态；若通过链路接收到的电信号为第二电平信号，则确定主时钟设备处于故障状态。
当通信设备1301为上述备时钟设备，一种可能地实施方式中，处理器1302，具体用于：通过以第一时长为周期，周期性接收第一消息的方式监测主时钟设备的工作状态；其中，第一消息是主时钟设备以第一时长为周期，在正常工作状态下周期性向备时钟设备发送的；若在最近接收到第一消息后的第二时长内未成功接收到下一条第一消息，所述第二时长包括所述第一时长和第一预设时长，则确定主时钟设备处于故障状态。一种可选的实施方式中，一个第二时长的长度可以为一个第一时长的长度，这种情况下第一预设时长的时间长度为零。另一种可选的实施方式中，一个第二时长的长度也可以大于一个第一时长的长度，这种情况下，第一预设时长为一个大于零的取值，如此，可以使判断主时钟设备是否处于故障状态的判断时长“第二时长”相对于“第一时长”有一个偏移量(第一预设 时长)，以便在实际操作中可以更加贴合实际，可以减少可能由于链路传输信号的延迟问题导致的误判。其中，第一时长满足以下内容中的一项：第一消息与第一同步报文不同，且第一时长短于主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长，第一同步报文中包括主时钟设备的时间信息；第一消息与第一通知报文不同，且第一时长短于主时钟设备向备时钟设备发送的相邻两个第一通知报文之间的时长，第一通知报文中包括主时钟设备的能力指示信息；第一消息与第一同步报文不同，且第一消息与第一通知报文不同，第一时长短于第三时长，第三时长为主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值；第一消息为第一同步报文，且第一时长短于主时钟设备向交换机设备发送的相邻两个第二同步报文之间的时长，第二同步报文中包括主时钟设备的时间信息；第一消息为第一通知报文，且第一时长短于主时钟设备向交换机设备发送的相邻两个第二通知报文之间的时长，第二通知报文中包括主时钟设备的能力指示信息。
当通信设备1301为上述备时钟设备，一种可能地实施方式中，收发器1303，具体用于执行以下内容中的一项：发送第二通知报文，第二通知报文包括备时钟设备的能力指示信息，以及第一指示信息；发送第二同步报文，第二同步报文包括备时钟设备的时间信息，以及第一指示信息；发送预设比特序列，预设比特序列包括第一指示信息；发送预设帧封装信令，预设帧封装信令包括第一指示信息。
该通信设备1301对应上述方法中的第一通信设备的情况下，该通信设备可以包括处理器1302、收发器1303和存储器1304。该存储器1304用于存储指令，该处理器1302用于执行该存储器1304存储的指令，以实现如上图1至图4中所示的任一项或任多项对应的方法中第一通信设备的相关方案。
当通信设备1301为上述第一通信设备，一种可能地实施方式中，收发器1303，用于接收备时钟设备发送的第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟；处理器1302，用于获取备时钟设备的时间信息；根据备时钟设备的时间信息同步通信设备的系统时钟。
当通信设备1301为上述第一通信设备，一种可能地实施方式中，最新接收到的主时钟设备发送的第一同步报文与接收到第一指示信息之间的时长，小于相邻两个第一同步报文之间的时长；或者，最新接收到的主时钟设备发送的第一通知报文与接收到第一指示信息之间的时长，小于相邻两个第一通知报文之间的时长；或者，最新接收到的主时钟设备发送的第一同步报文与接收到第一指示信息之间的时长小于第三时长，其中，第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值；或者，最新接收到的主时钟设备发送的第一通知报文与接收到第一指示信息之间的时长小于第三时长，其中，第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值。
当通信设备1301为上述第一通信设备，一种可能地实施方式中，收发器1303，具体用于执行以下内容中的一项：根据接收到的备时钟设备发送第二通知报文，获取第一指示信息，第二通知报文包括备时钟设备的能力指示信息，以及第一指示信息；根据接收到的备时钟设备发送第二同步报文，获取第一指示信息，第二同步报文包括备时钟设备的时间信息，以及第一指示信息；根据接收到的备时钟设备发送预设比特序列，获取第一指示信息，预设比特序列包括第一指示信息；根据接收到的备时钟设备发送预设帧封装信令，获 取第一指示信息，预设帧封装信令包括第一指示信息。
当通信设备1301为上述第一通信设备，一种可能地实施方式中，处理器1302，具体用于：根据预先维护的备时钟设备的时间信息中，确定出备时钟设备的时间信息；或者；收发器1303，具体用于：接收备时钟设备发送的第二同步报文，第二同步报文包括备时钟设备的时间信息。
当通信设备1301为上述第一通信设备，一种可能地实施方式中，收发器1303，还用于：向其他节点发送第一指示信息。
该通信设备1301对应上述方法中的主时钟设备的情况下，该通信设备可以包括处理器1302、收发器1303和存储器1304。该存储器1304用于存储指令，该处理器1302用于执行该存储器1304存储的指令，以实现如上图1至图4中所示的任一项或任多项对应的方法中主时钟设备的相关方案。
当通信设备1301为上述主时钟设备，一种可能地实施方式中，处理器1302，用于根据主时钟设备的工作状态向备时钟设备，通过收发器1303发送指示第二指示信息，第二指示信息用于指示主时钟设备的工作状态。如此，备时钟设备可以监测主时钟设备的工作状态。
当通信设备1301为上述主时钟设备，一种可能地实施方式中，处理器1302，具体用于若主时钟设备在正常工作状态下，通过连接备时钟设备的链路输出第一电平信号，若主时钟设备在故障工作状态下，通过连接备时钟设备的链路输出第二电平信号。
当通信设备1301为上述主时钟设备，一种可能地实施方式中，处理器1302，具体用于若主时钟设备在正常工作状态下，通过连接备时钟设备的链路输出信号，信号为电信号或光信号；若主时钟设备在故障工作状态下，停止通过连接备时钟设备的链路输出信号。
当通信设备1301为上述主时钟设备，一种可能地实施方式中，处理器1302，具体用于若主时钟设备在正常工作状态下，以第一时长为周期，周期性通过收发器1303向备时钟设备发送第一消息；其中，第一时长满足以下内容中的一项：第一消息与第一同步报文不同，且第一时长短于主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长，第一同步报文中包括主时钟设备的时间信息；第一消息与第一通知报文不同，且第一时长短于主时钟设备向备时钟设备发送的相邻两个第一通知报文之间的时长，第一通知报文中包括主时钟设备的能力指示信息。第一消息与第一同步报文不同，且第一消息与第一通知报文不同，第一时长短于第三时长，第三时长为主时钟设备向备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值；第一消息为第一同步报文，且第一时长短于主时钟设备向交换机设备发送的相邻两个第二同步报文之间的时长，第二同步报文中包括主时钟设备的时间信息；第一消息为第一通知报文，且第一时长短于主时钟设备向交换机设备发送的相邻两个第二通知报文之间的时长，第二通知报文中包括主时钟设备的能力指示信息。
该通信设备所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不做赘述。
根据前述方法，图6为本申请实施例提供的通信设备的结构示意图，如图6所示，通信设备1401可以包括通信接口1403、处理器1402和存储器1404。通信接口1403，用于输入和/或输出信息；处理器1402，用于执行计算机程序或指令，使得通信设备1401实现上述图1至图4的相关方案中备时钟设备侧的方法，或使得通信设备1401实现上述图1 至图4的相关方案中第一通信设备侧的方法，或使得通信设备1401实现上述图1至图4的相关方案中主时钟设备侧的方法。本申请实施例中，通信接口1403可以实现上述图5的收发器1303所实现的方案，处理器1402可以实现上述图5的处理器1302所实现的方案，存储器1404可以实现上述图5的存储器1304所实现的方案，在此不再赘述。
基于以上实施例以及相同构思，图7为本申请实施例提供的通信设备的示意图，如图7所示，该通信设备1501可以为备时钟设备、主时钟设备或第一通信设备，也可以为芯片或电路，比如可设置于备时钟设备的芯片或电路，再比如可设置于主时钟设备内的芯片或电路，再比如可设置于第一通信设备内的芯片或电路。
该通信设备1501对应上述方法中的备时钟设备的情况下，该通信设备可以包括处理单元1502、收发单元1503和存储单元1504。该存储单元1504用于存储指令，该处理单元1502用于执行该存储单元1504存储的指令，以实现如上图1至图4中所示的任一项或任多项对应的方法中备时钟设备的相关方案。
当通信设备1501为上述备时钟设备，一种可能地实施方式中，处理单元1502，用于监测主时钟设备的工作状态，工作状态包括处于正常工作状态或处于故障状态；当确定主时钟设备处于故障状态，则：通过收发单元1503发送第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟。
该通信设备1501对应上述方法中的第一通信设备的情况下，该通信设备可以包括处理单元1502、收发单元1503和存储单元1504。该存储单元1504用于存储指令，该处理单元1502用于执行该存储单元1504存储的指令，以实现如上图1至图4中所示的任一项或任多项对应的方法中第一通信设备的相关方案。
当通信设备1501为上述第一通信设备，一种可能地实施方式中，收发单元1503，用于接收备时钟设备发送的第一指示信息，第一指示信息用于指示根据备时钟设备的时间信息同步系统时钟；处理单元1502，用于获取备时钟设备的时间信息；根据备时钟设备的时间信息同步通信设备的系统时钟。
该通信设备1501对应上述方法中的主时钟设备的情况下，该通信设备可以包括处理单元1502、收发单元1503和存储单元1504。该存储单元1504用于存储指令，该处理单元1502用于执行该存储单元1504存储的指令，以实现如上图1至图4中所示的任一项或任多项对应的方法中主时钟设备的相关方案。
当通信设备1501为上述主时钟设备，一种可能地实施方式中，处理单元1502，用于根据主时钟设备的工作状态向备时钟设备，通过收发单元1503发送指示第二指示信息，第二指示信息用于指示主时钟设备的工作状态。如此，备时钟设备可以监测主时钟设备的工作状态。
该通信设备所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不做赘述。
可以理解的是，上述通信设备1501中各个单元的功能可以参考相应方法实施例的实现，此处不再赘述。
应理解，以上通信设备的单元的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。本申请实施例中，收发单元1503可以由上述图5的收发器1303实现，处理单元1502可以由上述图5的处理器1302实现。
根据本申请实施例提供的方法，本申请还提供一种计算机程序产品，该计算机程序产 品包括：计算机程序代码，当该计算机程序代码在计算机上运行时，使得该计算机执行图1至图4所示实施例中任意一个实施例的方法。
根据本申请实施例提供的方法，本申请还提供一种计算机可读存储介质，该计算机可读介质存储有程序代码，当该程序代码在计算机上运行时，使得该计算机执行图1至图4所示实施例中任意一个实施例的方法。
根据本申请实施例提供的方法，本申请还提供一种系统，其包括前述的备时钟设备、主时钟设备和一个或多于一个第一通信设备。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行计算机指令时，全部或部分地产生按照本申请实施例的流程或功能。计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程设备。计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，高密度数字视频光盘(digital video disc，DVD))、或者半导体介质(例如，固态硬盘(solid state disc，SSD))等。
上述各个设备实施例中网络设备与终端设备和方法实施例中的网络设备或终端设备对应，由相应的模块或单元执行相应的步骤，例如通信单元(收发器)执行方法实施例中接收或发送的步骤，除发送、接收外的其它步骤可以由处理单元(处理器)执行。具体单元的功能可以参考相应的方法实施例。其中，处理器可以为一个或多个。
在本说明书中使用的术语“部件”、“模块”、“系统”等用于表示计算机相关的实体、硬件、固件、硬件和软件的组合、软件、或执行中的软件。例如，部件可以是但不限于，在处理器上运行的进程、处理器、对象、可执行文件、执行线程、程序和/或计算机。通过图示，在计算设备上运行的应用和计算设备都可以是部件。一个或多个部件可驻留在进程和/或执行线程中，部件可位于一个计算机上和/或分布在两个或更多个计算机之间。此外，这些部件可从在上面存储有各种数据结构的各种计算机可读介质执行。部件可例如根据具有一个或多个数据分组(例如来自与本地系统、分布式系统和/或网络间的另一部件交互的二个部件的数据，例如通过信号与其它系统交互的互联网)的信号通过本地和/或远程进程来通信。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各种说明性逻辑块(illustrative logical block)和步骤(step)，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、设备和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、设备和方法，可以通 过其它的方式实现。例如，以上所描述的设备实施例仅仅是示意性的，例如，单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，设备或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机存取存储器(random access memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (25)

  1. 一种时钟切换方法，其特征在于，包括：
    备时钟设备监测主时钟设备的工作状态，所述工作状态包括处于正常工作状态或处于故障状态；
    当所述备时钟设备确定所述主时钟设备处于故障状态，则：
    所述备时钟设备发送第一指示信息，所述第一指示信息用于指示根据所述备时钟设备的时间信息同步系统时钟。
  2. 如权利要求1所述的方法，其特征在于，所述备时钟设备监测主时钟设备的工作状态，包括：
    所述备时钟设备持续性或周期性监测所述主时钟设备的工作状态。
  3. 如权利要求2所述的方法，其特征在于，所述备时钟设备持续性监测所述主时钟设备的工作状态，包括：
    所述备时钟设备通过连接主时钟设备的链路输出的信号持续性监测所述主时钟设备的工作状态；其中，所述信号包括电信号或光信号，所述信号用于指示所述主时钟设备处于正常工作状态；
    所述备时钟设备确定所述主时钟设备处于故障状态，包括：
    若所述备时钟设备通过所述链路未接收到的所述信号，则确定所述主时钟设备处于故障状态。
  4. 如权利要求2所述的方法，其特征在于，所述备时钟设备持续性监测所述主时钟设备的工作状态，包括：
    所述备时钟设备通过连接主时钟设备的链路输出的电信号持续性监测所述主时钟设备的工作状态；其中，所述电信号包括第一电平信号和第二电平信号，所述第一电平信号用于指示主时钟设备处于工作状态，所述第二电平信号用于指示主时钟设备处于故障状态；
    所述备时钟设备确定所述主时钟设备处于故障状态，包括：
    若所述备时钟设备通过所述链路接收到的所述电信号为所述第二电平信号，则确定所述主时钟设备处于故障状态。
  5. 如权利要求1或2所述的方法，其特征在于，所述备时钟设备周期性监测主时钟设备的工作状态，包括：
    所述备时钟设备通过以第一时长为周期，周期性接收第一消息的方式监测主时钟设备的工作状态；
    所述确定所述主时钟设备处于故障状态，包括：
    若所述备时钟设备在最近接收到第一消息后的第二时长内未成功接收到下一条第一消息，则确定所述主时钟设备处于故障状态；所述第二时长包括所述第一时长和第一预设时长；
    其中，所述第一时长满足以下内容中的一项：
    所述第一时长短于所述主时钟设备向所述备时钟设备发送的相邻两个第一同步报文之间的时长，所述第一同步报文中包括所述主时钟设备的时间信息；
    所述第一时长短于所述主时钟设备向所述备时钟设备发送的相邻两个第一通知报文之间的时长，所述第一通知报文中包括所述主时钟设备的能力指示信息；
    所述第一时长短于第三时长，所述第三时长为所述主时钟设备向所述备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值；
    所述第一时长短于所述主时钟设备向交换机设备发送的相邻两个第二同步报文之间的时长，所述第二同步报文中包括所述主时钟设备的时间信息；
    所述第一时长短于所述主时钟设备向交换机设备发送的相邻两个第二通知报文之间的时长，所述第二通知报文中包括所述主时钟设备的能力指示信息。
  6. 如权利要求1-4任一项所述的方法，其特征在于，所述备时钟设备发送第一指示信息，包括以下内容中的一项：
    所述备时钟设备发送第二通知报文，所述第二通知报文包括所述备时钟设备的能力指示信息，以及所述第一指示信息；
    所述备时钟设备发送第二同步报文，所述第二同步报文包括所述备时钟设备的时间信息，以及所述第一指示信息；
    所述备时钟设备发送预设比特序列，所述预设比特序列包括所述第一指示信息；
    所述备时钟设备发送预设帧封装信令，所述预设帧封装信令包括所述第一指示信息。
  7. 一种时钟切换方法，其特征在于，包括：
    通信设备接收备时钟设备发送的第一指示信息；
    所述通信设备获取所述备时钟设备的时间信息；
    所述通信设备根据所述第一指示信息和所述备时钟设备的时间信息同步所述通信设备的系统时钟。
  8. 如权利要求7所述的方法，其特征在于，所述通信设备最新接收到的所述主时钟设备发送的第一同步报文与接收到所述第一指示信息之间的时长，小于相邻两个第一同步报文之间的时长；
    或者，
    所述通信设备最新接收到的所述主时钟设备发送的第一通知报文与接收到所述第一指示信息之间的时长，小于相邻两个第一通知报文之间的时长；
    或者，
    所述通信设备最新接收到的所述主时钟设备发送的第一同步报文与接收到所述第一指示信息之间的时长小于第三时长，其中，所述第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值；
    或者，
    所述通信设备最新接收到的所述主时钟设备发送的第一通知报文与接收到所述第一指示信息之间的时长小于第三时长，其中，所述第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值。
  9. 如权利要求7或8所述的方法，其特征在于，所述通信设备接收第一指示信息，包括以下内容中的一项：
    所述通信设备根据接收到的所述备时钟设备发送第二通知报文，获取所述第一指示信息，所述第二通知报文包括所述备时钟设备的能力指示信息，以及所述第一指示信息；
    所述通信设备根据接收到的所述备时钟设备发送第二同步报文，获取所述第一指示信息，所述第二同步报文包括所述备时钟设备的时间信息，以及所述第一指示信息；
    所述通信设备根据接收到的所述备时钟设备发送预设比特序列，获取所述第一指示信 息，所述预设比特序列包括所述第一指示信息；
    所述通信设备根据接收到的所述备时钟设备发送预设帧封装信令，获取所述第一指示信息，所述预设帧封装信令包括所述第一指示信息。
  10. 如权利要求7-9任一项所述的方法，其特征在于，所述通信设备获取所述备时钟设备的时间信息，包括：
    所述通信设备根据预先维护的所述备时钟设备的时间信息中，确定出所述备时钟设备的时间信息；
    或者，
    所述通信设备接收所述备时钟设备发送的第二同步报文，所述第二同步报文包括所述备时钟设备的时间信息。
  11. 如权利要求7-10任一项所述的方法，其特征在于，所述通信设备接收第一指示信息之后，还包括：
    所述通信设备向其他节点发送所述第一指示信息。
  12. 一种备时钟设备，其特征在于，包括：
    处理器，用于监测主时钟设备的工作状态，所述工作状态包括处于正常工作状态或处于故障状态；
    当确定所述主时钟设备处于故障状态，则：
    通过收发器发送第一指示信息，所述第一指示信息用于指示根据所述备时钟设备的时间信息同步系统时钟。
  13. 如权利要求12所述的备时钟设备，其特征在于，所述处理器，具体用于：
    持续性或周期性监测所述主时钟设备的工作状态。
  14. 如权利要求13所述的备时钟设备，其特征在于，所述处理器，具体用于：
    通过连接主时钟设备的链路输出的信号持续性监测所述主时钟设备的工作状态；其中，所述信号包括电信号或光信号，所述信号用于指示所述主时钟设备处于正常工作状态；
    若通过所述链路未接收到的所述信号，则确定所述主时钟设备处于故障状态。
  15. 如权利要求13所述的备时钟设备，其特征在于，所述处理器，具体用于：
    通过连接主时钟设备的链路输出的电信号持续性监测所述主时钟设备的工作状态；其中，所述电信号包括第一电平信号和第二电平信号，所述电信号中的所述第一电平信号用于指示主时钟设备处于工作状态，所述电信号中的所述第二电平信号用于指示主时钟设备处于故障状态；
    若通过所述链路接收到的所述电信号为所述第二电平信号，则确定所述主时钟设备处于故障状态。
  16. 如权利要求12或13所述的备时钟设备，其特征在于，所述处理器，具体用于：
    通过以第一时长为周期，周期性接收第一消息的方式监测主时钟设备的工作状态；
    若在最近接收到第一消息后的第二时长内未成功接收到下一条第一消息，则确定所述主时钟设备处于故障状态；所述第二时长包括所述第一时长和第一预设时长；
    其中，所述第一时长满足以下内容中的一项：
    所述第一时长短于所述主时钟设备向所述备时钟设备发送的相邻两个第一同步报文之间的时长，所述第一同步报文中包括所述主时钟设备的时间信息；
    所述第一时长短于所述主时钟设备向所述备时钟设备发送的相邻两个第一通知报文 之间的时长，所述第一通知报文中包括所述主时钟设备的能力指示信息；
    所述第一消息与第一通知报文不同，所述第一时长短于第三时长，所述第三时长为所述主时钟设备向所述备时钟设备发送的相邻两个第一同步报文之间的时长和相邻两个第一通知报文之间的时长中的较小值；
    所述第一时长短于所述主时钟设备向交换机设备发送的相邻两个第二同步报文之间的时长，所述第二同步报文中包括所述主时钟设备的时间信息；
    所述第一时长短于所述主时钟设备向交换机设备发送的相邻两个第二通知报文之间的时长，所述第二通知报文中包括所述主时钟设备的能力指示信息。
  17. 如权利要求12-15任一项所述的备时钟设备，其特征在于，所述收发器，具体用于执行以下内容中的一项：
    发送第二通知报文，所述第二通知报文包括所述备时钟设备的能力指示信息，以及所述第一指示信息；
    发送第二同步报文，所述第二同步报文包括所述备时钟设备的时间信息，以及所述第一指示信息；
    发送预设比特序列，所述预设比特序列包括所述第一指示信息；
    发送预设帧封装信令，所述预设帧封装信令包括所述第一指示信息。
  18. 一种通信设备，其特征在于，包括：
    收发器，用于接收备时钟设备发送的第一指示信息；
    处理器，用于获取所述备时钟设备的时间信息；根据所述第一指示信息和所述备时钟设备的时间信息同步所述通信设备的系统时钟。
  19. 如权利要求18所述的通信设备，其特征在于，最新接收到的所述主时钟设备发送的第一同步报文与接收到所述第一指示信息之间的时长，小于相邻两个第一同步报文之间的时长；
    或者，
    最新接收到的所述主时钟设备发送的第一通知报文与接收到所述第一指示信息之间的时长，小于相邻两个第一通知报文之间的时长；
    或者，
    最新接收到的所述主时钟设备发送的第一同步报文与接收到所述第一指示信息之间的时长小于第三时长，其中，所述第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值；
    或者，
    最新接收到的所述主时钟设备发送的第一通知报文与接收到所述第一指示信息之间的时长小于第三时长，其中，所述第三时长为相邻两个第一同步报文之间的时长，和相邻两个第一通知报文之间的时长的较小值。
  20. 如权利要求18或19所述的通信设备，其特征在于，所述收发器，具体用于执行以下内容中的一项：
    根据接收到的所述备时钟设备发送第二通知报文，获取所述第一指示信息，所述第二通知报文包括所述备时钟设备的能力指示信息，以及所述第一指示信息；
    根据接收到的所述备时钟设备发送第二同步报文，获取所述第一指示信息，所述第二同步报文包括所述备时钟设备的时间信息，以及所述第一指示信息；
    根据接收到的所述备时钟设备发送预设比特序列，获取所述第一指示信息，所述预设比特序列包括所述第一指示信息；
    根据接收到的所述备时钟设备发送预设帧封装信令，获取所述第一指示信息，所述预设帧封装信令包括所述第一指示信息。
  21. 如权利要求18-20任一项所述的通信设备，其特征在于，所述处理器，具体用于：根据预先维护的所述备时钟设备的时间信息中，确定出所述备时钟设备的时间信息；
    或者；
    所述收发器，具体用于：接收所述备时钟设备发送的第二同步报文，所述第二同步报文包括所述备时钟设备的时间信息。
  22. 如权利要求18-21任一项所述的通信设备，其特征在于，所述收发器，还用于：
    向其他节点发送所述第一指示信息。
  23. 一种通信设备，其特征在于，所述设备包括处理器和存储器，
    所述存储器，用于存储计算机程序或指令；
    所述处理器，用于执行存储器中的计算机程序或指令，使得权利要求1-11中任一项所述的方法被执行。
  24. 一种通信设备，其特征在于，所述设备包括处理器和通信接口，
    所述通信接口，用于输入和/或输出信息；
    所述处理器，用于执行计算机程序或指令，使得权利要求1-11中任一项所述的方法被执行。
  25. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质存储有计算机可执行指令，所述计算机可执行指令在被计算机调用时，使所述计算机执行如权利要求1至11任一项所述的方法。
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