WO2021136433A1 - 一种电子设备及计算机系统 - Google Patents

一种电子设备及计算机系统 Download PDF

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Publication number
WO2021136433A1
WO2021136433A1 PCT/CN2020/141647 CN2020141647W WO2021136433A1 WO 2021136433 A1 WO2021136433 A1 WO 2021136433A1 CN 2020141647 W CN2020141647 W CN 2020141647W WO 2021136433 A1 WO2021136433 A1 WO 2021136433A1
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Prior art keywords
graphics
module
electronic device
communication module
rendering
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PCT/CN2020/141647
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English (en)
French (fr)
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王国庆
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华为技术有限公司
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Publication of WO2021136433A1 publication Critical patent/WO2021136433A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/60Memory management

Definitions

  • This application relates to the technical field of electronic equipment, and in particular to an electronic equipment and a computer system.
  • the amount of data to be processed by the processor in the computer system is increasing, which requires higher and higher processing capabilities of the processor.
  • the processor in the computer system can no longer meet the task requirements, and co-processing equipment is needed to coordinate processing.
  • a scene that requires a higher resolution (such as a large screen with 8k resolution); another example is a scene with a huge geometric model (such as a large triangle with a data size of more than 100 megabytes (MB)); another example is a large amount of texture data
  • Scenes (such as maps, 3D (3Dimensions, 3D) game models, etc.) usually require a graphics processing unit (GPU) as a co-processing device for the central processing unit (CPU) of the computer system.
  • GPU graphics processing unit
  • the cost of graphics rendering is higher; if a GPU with lower computing power is used, the efficiency of graphics rendering is lower.
  • the present application provides an electronic device and a computer system, which are used to implement a large number of graphics rendering calculation requirements through multiple GPUs with lower computing power, and the graphics rendering efficiency is high and the time delay is low.
  • the present application provides an electronic device, which may include a first communication module, a graphics rendering module, a graphics merging module, and a second communication module.
  • the graphics rendering module includes at least two systems on a chip (system on a chip, SoC), each of the at least two SoCs includes a GPU core.
  • SoC system on a chip
  • the first communication module can be used to receive at least two graphics rendering tasks, and transmit the at least two graphics rendering tasks to the corresponding SoC respectively.
  • One SoC corresponds to one graphics rendering task within a preset time; the graphics rendering module is used to use each The GPU kernel of the SoC performs rendering processing on the received graphics rendering task to obtain at least two rendered graphics results, and transmits the at least two rendered graphics results to the graphics merging module through the first communication module; the graphics The merging module is used for merging the received at least two rendered graphic results, and transmitting the merged graphic results to the second communication module; the second communication module is used for merging the received The graphical results are transferred to the target device.
  • the graphics rendering module of the electronic device includes at least two SoCs, and each SoC includes a GPU core, that is, the graphics rendering module uses a combination of SoC overlay and distributed graphics processing for rendering processing, which can be compared Multiple GPUs with low computing power meet a large number of graphics rendering computing needs, and the cost of GPUs with lower computing power is also lower, which can also reduce the cost of graphics rendering, and at least two SoCs are used for rendering processing, which helps to improve Graphics rendering efficiency.
  • the first communication module in the electronic device is used to transmit the graphics rendering task to the graphics rendering module, the graphics result obtained after the rendering processing of the graphics rendering module is transmitted to the graphics merging module, and the graphics merging module receives at least two The rendered graphic results are merged to obtain the merged graphic result, and the merged graphic result is transmitted to the target device through the second communication module, that is, the electronic device adopts the merged graphic obtained by the full-service pipeline method As a result, the combined graphic result is sent to the target device through the second communication module.
  • the graphics results rendered by the graphics rendering module do not need to be returned along the original path of the graphics rendering task to achieve the combined processing and further processing of the rendered graphics results, thereby helping to reduce the time required for graphics rendering processing. Delay, and help reduce the movement of data.
  • the electronic device may further include an encoding module; the encoding module is used to encode the merged graphics result from the graphics merging module to obtain the encoded graphics result, and the encoded graphics result Transmitted to the second communication module.
  • the electronic device may further include an encoding module; the encoding module is used to encode at least two rendered graphics results from the graphics rendering module to obtain the encoded graphics results, and The encoded graphics result is transmitted to the second communication module.
  • the electronic device may include an encoding module and a media streaming module.
  • the encoding module is configured to encode the combined graphics result from the graphics merging module, or to encode the at least two graphics results from the graphics rendering module to obtain the encoded graphics result, and Transmit the encoded graphic result to the media streaming module;
  • the media streaming module is used to stream the received encoded graphic result to obtain a code stream, and transmit the code stream to the second communication module;
  • second The communication module is used to transmit the code stream to the target device. In this way, the electronic device can send the rendered graphics result to the target device in the manner of streaming media.
  • the electronic device may further include a display driving module.
  • the graphics rendering module can also be used to transmit at least two rendered graphics results to the display driving module; the display driving module is used to drive the display to display at least two rendered graphics results.
  • the electronic device may further include a display driving module.
  • the graphic merging module may also be used to transmit the merged graphic result to the display driving module; the display driving module is used to drive a display to display the merged graphic result.
  • the display driving module can directly drive the display to play at least two rendered graphics results or a combined graphics result.
  • the graphics merging module, the encoding module, the media streaming module, and the second communication module are integrated on a field-programmable gate array (FPGA); or, the graphics merging module, The encoding module, the media streaming module, the second communication module, and the display driving module are integrated on an application specific integrated circuit (ASIC). It can also be understood that the FPGA or ASIC can implement the functions of the above-mentioned graphics merging module, encoding module, media streaming module, and second communication module.
  • FPGA field-programmable gate array
  • ASIC application specific integrated circuit
  • the first communication module, the graphics merging module, the encoding module, the media streaming module, and the second communication module are integrated in the FPGA; or, the first communication module, the graphics merging module, the encoding module, and the media The fluidization module and the second communication module are integrated on the ASIC. It can also be understood that the FPGA or ASIC can implement the functions of the above-mentioned first communication module, graphics merging module, encoding module, media streaming module, and second communication module.
  • the present application provides a computer system.
  • the computer system may include at least one electronic device of the first aspect, a processor, and a bus.
  • the processor is connected to each electronic device in the at least one electronic device through the bus;
  • the graphics to be rendered are divided into at least two graphics rendering tasks, and the at least two graphics rendering tasks are transmitted to one of the at least one electronic device through the bus.
  • the electronic device After the electronic device completes the graphics rendering task, it can send the rendered graphics result to the target device through the second communication module of the electronic device. In this way, the rendered graphics result does not need to follow the delivery path of the graphics rendering task.
  • the processor for merging and further processing and there is no need to send the rendered graphics result through the network card in the computer system that receives the service request message of the target device, thereby reducing the time of the graphics rendering process of the computer system. Extension; and can realize remote rendering services.
  • FIG. 1 is a schematic diagram of a process of distributed graphics processing provided by this application
  • FIG. 2 is a schematic structural diagram of an electronic device provided by this application.
  • Figure 3a is a schematic structural diagram of another electronic device provided by this application.
  • Figure 3b is a schematic structural diagram of another electronic device provided by this application.
  • Fig. 4a is a schematic structural diagram of another electronic device provided by this application.
  • Figure 4b is a schematic structural diagram of another electronic device provided by this application.
  • FIG. 5 is a schematic structural diagram of another electronic device provided by this application.
  • FIG. 6 is a schematic structural diagram of another electronic device provided by this application.
  • FIG. 7 is a schematic diagram of the architecture of a computer system provided by this application.
  • FIG. 8 is a schematic diagram of an application scenario of a computer system provided by this application.
  • SoC System on a chip
  • SoC refers to a technology that integrates a complete system on a single chip and groups all or part of the necessary electronic circuits.
  • the so-called complete system generally includes a central processing unit (CPU), memory, and peripheral circuits.
  • the GPU core is the core chip in the middle of the GPU.
  • NIC Network interface controller
  • NIC is also called the computer hardware of the network adapter (network adapter) or network interface card.
  • the NIC has a unique network node address, that is, the medium access control (MAC) address, which allows users to connect to each other via cable or wireless.
  • the main working principle of the network card is to organize (for example, convert the data to be transmitted by the user into a format that can be recognized by other devices on the network) the data sent from the computer to the network line, and the data is divided into data packets of appropriate size and then sent to the network Get out.
  • the network card There are two main functions of the network card: one is to encapsulate the data of the device where the network card is located into frames, and to send the data to the network through a network cable (electromagnetic waves for wireless networks); the other is to receive frames from other devices on the network , And reassemble the frame into data, and send it to the device where the network card is located.
  • a network cable electromagagnetic waves for wireless networks
  • Distributed graphics processing refers to the process of dividing a graphics rendering task into multiple graphics rendering tasks. Each graphics rendering task can be rendered in parallel or serially on different nodes, and finally the rendered graphics result is output.
  • a graphics rendering task takes the cow's 3D model data as an example.
  • the graphics rendering is considered to be divided into four graphics rendering tasks, and then the four graphics rendering tasks after the split are distributed to different GPUs for rendering processing, and the rendering process is obtained.
  • the graphical results Further, optionally, merge processing is performed on the rendered graphics results.
  • Encoding is the process of converting information from one form or format to another. For example, a code is used to identify each set of data, making it information that can be processed and analyzed by a computer.
  • Code stream refers to the data flow used by a video file in a unit of time, which is an important part of picture quality control in video coding. At the same resolution, the larger the code stream of the video file, the smaller the compression ratio and the better the picture quality.
  • the graphics rendering task refers to the data that needs to be processed by the GPU for applications running in the computer system (such as games, videos, and visual design, etc.), which is packaged by software, and the data that needs to be rendered and the commands for data operations are packaged into Task queue.
  • the first way is to use a GPU card with high computing power, but the cost of this type of GPU card is higher.
  • the second method is to use a GPU with a lower computing power, but the rendering processing efficiency of the GPU with a lower computing power is lower, resulting in a larger rendering delay.
  • this application proposes an electronic device that can efficiently meet the requirements of graphics rendering with a large amount of calculation under the condition of low rendering cost.
  • the electronic device may include a first communication module, a graphics rendering module, a graphics merging module, and a second communication module.
  • the graphics rendering module includes at least two SoCs, and each of the at least two SoCs includes a graphics processor GPU core.
  • the first communication module is configured to receive at least two graphics rendering tasks, and respectively transmit the at least two graphics rendering tasks to the corresponding SoC, and one SoC corresponds to one graphics rendering task within a preset time; for example, the first communication module After receiving the graphics rendering task A and the graphics rendering task B, the graphics rendering task A is transmitted to the corresponding SoC1, and the graphics rendering task B is transmitted to the corresponding SoC2.
  • the graphics rendering module is used to use the GPU cores of each of the at least two SoCs to perform rendering processing on the received graphics rendering tasks.
  • One SoC can get a rendered graphics result, that is, the graphics rendering module can output at least two The rendered graphic result (for example, image or video), and at least two rendered graphic results are transmitted to the graphic merging module through the first communication module.
  • the graphics merging module is configured to merge the received at least two rendered graphics results, and transmit the merged graphics results to the second communication module.
  • the second communication module is used for transmitting the received combined graphics result to the target device.
  • the electronic device may be a graphics processing card, or may be an independent graphics rendering server, etc.
  • the graphics rendering task includes graphics rendering commands and data that needs to be rendered, such as map model data, game model data, pictures or videos, and so on.
  • the graphics rendering module of the electronic device includes at least two SoCs, and each SoC includes a GPU core, that is, the graphics rendering module uses a combination of SoC overlay and distributed graphics processing to perform rendering processing, which can be processed by Multiple GPUs with lower computing power meet a large number of graphics rendering computing needs, and the cost of GPUs with lower computing power is also lower, which can also reduce the cost of graphics rendering, and rendering processing through at least two SoCs helps Improve graphics rendering efficiency.
  • the first communication module in the electronic device is used to transmit the graphics rendering task to the graphics rendering module, the graphics results obtained after rendering by the graphics rendering module are transmitted to the graphics merging module, and the merged module is obtained after the merging process of the graphics merging module
  • the combined graphical result is transmitted to the target device through the second communication module, that is, the electronic device adopts the combined graphical result obtained by the full-service pipeline method, and passes the combined graphical result through the second communication module.
  • the communication module sends to the target device. In this way, the graphics results rendered by the graphics rendering module do not need to be returned along the original path of the graphics rendering task to achieve the combined processing and further processing of the rendered graphics results, thereby helping to reduce the graphics rendering processing delay. And it helps reduce the movement of data.
  • the first communication module can be used to adapt to the bus interface in the computer system where the electronic device is located; that is, the electronic device can be plugged into the computer system through the first communication module, and can pass through the computer system where the electronic device is located.
  • the bus communicates with other devices in the computer system.
  • the electronic device can communicate with the processor in the computer system into which the electronic device is inserted through the first communication module.
  • the first communication module may receive at least two graphics rendering tasks distributed from a processor in a computer system where the electronic device is located.
  • the first communication module can also be used to implement communication between modules in the electronic device.
  • the graphics rendering module may transmit at least two rendered graphics results to the graphics merging module through the first communication module.
  • the first communication module may be a high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIE)-switch interface, or a chip-to-chip interconnection consistency protocol (chip-to-chip interconnection consistency protocol).
  • PCIE peripheral component interconnect express
  • chip-to-chip interconnection consistency protocol chip-to-chip interconnection consistency protocol
  • -chip coherent interconnect protocol CCIX
  • CXL compute express link
  • the graphics rendering module may include at least two SoCs, and the SoC is the core device of the graphics rendering module for performing graphics rendering tasks.
  • Each SoC includes a GPU core, and the GPU core can perform graphics rendering processing on the received graphics rendering task. That is, the graphics rendering module is used to perform graphics rendering processing on the received graphics rendering task using the GPU core of each SoC of the at least two SoCs.
  • the SoC also includes a memory, which is used to store temporary data during the graphics rendering process, so that the graphics rendering module can smoothly complete the graphics rendering task.
  • the memory can be a random-access memory (RAM), which can be built-in or external; it can also be a double-rate synchronous dynamic random access memory (double data rate, synchronous dynamic random access memory, DDR). SDRAM); it can also be static random access memory (SRAM); it can also be high bandwidth memory (HBM); it can also be storage class memory (SCM); A combination of the above-mentioned types of memories may be included.
  • RAM random-access memory
  • SDRAM double-rate synchronous dynamic random access memory
  • SRAM static random access memory
  • HBM high bandwidth memory
  • SCM storage class memory
  • At least two rendered graphics results can be output. It can be understood that the number of rendered graphics results output by the graphics rendering module is consistent with the number of graphics rendering tasks received by the graphics rendering module. In addition, the rendered graphics result output is the original graphics.
  • the graphics rendering module may transmit at least two rendered graphics results to the graphics merging module through the first communication module. In another possible implementation manner, the graphics rendering module may also transmit at least two rendered graphics results to the second communication module.
  • the graphics merging module is used to merge the received at least two rendered graphics results, and transmit the merged graphics results to the second communication module.
  • the graphics merging module may merge at least two rendered graphics results according to a preset merging algorithm. It can also be understood that before the graphics merging module merges the received at least two rendered graphics results, it is necessary to synchronize the rendered graphics results to achieve the merge processing of the graphics results belonging to the same graphics. .
  • a time stamp may be recorded for the rendered graphic result.
  • the electronic device may record the same time stamp for each rendered graphic result belonging to the same graphic, or it may be distributed by the computer system where the electronic device is located.
  • the algorithm software synchronizes the rendered graphics results. That is, the method for the graphics merging module to merge graphics can be determined by the distributed algorithm software running in the computer system where the electronic device is located or can also be determined by the electronic device, which is not limited in this application.
  • the graphics merging module receives two rendered graphics results, the two rendered graphics results have the same time stamp, and the graphics merging module may merge the two graphics results with the same time stamp to obtain The combined graphic result.
  • the graphics merging module may be an FPGA, a processor chip or a dedicated ASIC, or it may be implemented by the GPU kernel in the aforementioned SoC chip.
  • the second communication module Fourth, the second communication module
  • the second communication module may be a network card, or may be called a NIC, or a network adapter.
  • the second communication module may be used to transmit at least two rendered graphics results from the graphics rendering module to the target device.
  • the second communication module can transmit at least two rendered graphics results output by the graphics rendering module to other devices other than the computer system where the electronic device is located.
  • the address of the target device can be carried in the graphics rendering task. Therefore, the electronic device can obtain the address of the target device from the graphics rendering task.
  • the obtained at least two rendered graphics results or the combined graphics results can be transmitted to the target device, which helps to prevent the rendered graphics results from returning along the original path of the graphics rendering task. Helps reduce the latency of graphics rendering processing. Furthermore, the direct transmission from the second communication module of the electronic device to the target device via the network can reduce the delay in sending the graphics rendering result.
  • the electronic device may also include a display drive module and/or a combined encoding module and/or a media streaming module. It should be noted that if the electronic device includes a media streaming module, it must include an encoding module.
  • the merging of the encoding module, the media streaming module, and the display driver module are respectively introduced in detail, and an exemplary specific implementation scheme is given.
  • the electronic device may also include a display drive module. If the rendered graphics result needs to be played on the display, the graphics merging module can also transmit the combined graphics result to the display driver module, or the graphics rendering module can also transmit at least two rendered graphics results to the display driver Module.
  • the graphics merging module transmits the obtained merged graphics to the display driving module and the second communication module.
  • the electronic device may include a first communication module, a graphics rendering module, a second communication module, a graphics merging module, and a display driving module.
  • the graphics merging module can be used to implement the functions described in Figure 2 above, and can also be used to transmit the merged graphics result to the display driving module; the display driving module is used to drive the display to display the merged graphics result.
  • the combined graphics result from the graphics merging module can be transmitted to the display driving module, and the display driving module directly drives the display to present the combined graphics result. Picture.
  • the graphics merging module transmits the obtained merged graphics to the second communication module, and the graphics rendering module transmits the obtained at least two rendered graphics results to the display driving module.
  • the electronic device may include a first communication module, a graphics rendering module, a second communication module, a graphics merging module, and a display driving module.
  • the graphics rendering module can be used to implement the functions described in FIG. 2 above, and can also be used to transmit at least two rendered graphics results to the display driving module through the first communication module.
  • the display driving module is used to drive the display to display at least two rendered graphics results. In other words, if the rendered graphics result needs to be played on the display, at least two rendered graphics results from the graphics rendering module can be transmitted to the display driving module, and the display driving module directly drives the display to display at least two A picture of the rendered graphic result.
  • the graphics merging module transmits the obtained merged graphics to the display driving module, and the graphics rendering module transmits the obtained at least two rendered graphics results to the second communication module.
  • the functions of the first communication module and the second communication module shown in FIG. 3a and FIG. 3b can be referred to the introduction of FIG. 2 above, and will not be repeated here.
  • the display driving module may be a display driving circuit or a chip.
  • the electronic device may further include an encoding module, configured to encode at least two rendered graphics results from the graphics rendering module, or perform the merged graphics from the graphics merging module Encoding, obtaining the encoded graphic result, and transmitting the encoded graphic result to the second communication module and/or the display driving module.
  • an encoding module configured to encode at least two rendered graphics results from the graphics rendering module, or perform the merged graphics from the graphics merging module Encoding, obtaining the encoded graphic result, and transmitting the encoded graphic result to the second communication module and/or the display driving module.
  • the first communication module, the graphics rendering module, the second communication module, and the graphics merging module can be referred to the above description, which will not be repeated here.
  • the source of the graphics result encoded based on the encoding module is divided into the following two scenarios.
  • the encoding module is used to receive at least two rendered graphics results from the graphics rendering module.
  • FIG. 4a it is a schematic structural diagram of another electronic device provided in this application.
  • the electronic device includes a first communication module, a graphics rendering module, a second communication module, and an encoding module. Further, optionally, the electronic device may further include a display driving module.
  • the encoding module may be used to respectively encode each of the received at least two rendered graphical results to obtain at least two encoded graphical results.
  • the first communication module, the graphics rendering module, and the second communication module can be referred to the above introduction, which will not be repeated here.
  • the display driving module can drive the display to display at least two encoded graphics results.
  • the display driving module can drive the display to display sequentially, can also drive the display to display at the same time, or can drive the display to display according to a preset rule, which is not limited in this application.
  • the second communication module can be used to transmit at least two encoded graphics results to the target device.
  • the encoding module is used to receive the merged graphics result from the graphics merging module.
  • FIG. 4b it is a schematic structural diagram of another electronic device provided in this application.
  • the electronic device includes a first communication module, a graphics rendering module, a second communication module, a graphics merging module, and an encoding module. Further, optionally, the electronic device may further include a display driving module.
  • the encoding module can be used to encode the combined graphics result from the graphics merging module.
  • the first communication module, the graphics rendering module, the graphics merging module, and the second communication module can be referred to the above introduction, which will not be repeated here.
  • the display driving module can drive the display to display the encoded graphic result of the combined graphic result.
  • the second communication module may be used to transmit the encoded graphic result of the combined graphic result to the target device.
  • the encoding module can be used to encode images, and can also be used to encode videos.
  • the encoding module can be an encoder or a transcoder.
  • the electronic device shown in Fig. 4a or Fig. 4b may further include a media streaming module.
  • the encoding module can also be used to transmit the encoded graphics result to the media streaming module.
  • the media streaming module is used to perform streaming processing on the received encoded graphics result to obtain a code stream, and transmit the code stream to the second communication module.
  • the second communication module can be used to transmit the code stream to the target device.
  • the encoding module can transmit the encoded graphics results to the display drive module, and the display drive module can drive the display to display the encoded graphics results; the encoding module can also transmit the encoded graphics results to the media streaming module for processing Streaming; the encoding module can also transmit the encoded graphics to the display driver module for display, and also transmit to the media streaming module for streaming, which can be selected according to actual needs, and the application itself is not limited.
  • the electronic device may also include a support management module.
  • the support management module can be used to manage the power supply, firmware loading, operation monitoring, power-on and power-off control, and clock management of the electronic device.
  • the graphics merging module, encoding module, media streaming module, and second communication module of the electronic device can be integrated on FPGA or ASIC; or the first communication module, graphics merging module, and coding of the electronic device
  • the module, the media streaming module, and the second communication module are integrated on the FPGA or ASIC; or the first communication module, graphics merging module, encoding module, media streaming module, second communication module, and display driver module of the electronic device are integrated on the FPGA Or on the ASIC; or the graphic merging module, encoding module, media streaming module, second communication module, and display driver module of the electronic device can be integrated on the FPGA or ASIC; or the first communication module, the second communication module, and the graphic merging module , Encoding module, media streaming module, and display drive module are integrated on FPGA or ASIC; or any of the first communication module, second communication module, graphics merging module, encoding module, media streaming module, and display drive module Two are integrated on FPGA or ASIC; or any three of the first communication module, second communication
  • the electronic device includes a first communication module, a graphics rendering module, a second communication module, a graphics merging module, an encoding module, a media streaming module, and a display driving module as examples.
  • the graphic merging module, the encoding module, the media streaming module, the second communication module, and the display driving module of the electronic device can be integrated on the FPGA or ASIC.
  • the electronic device may include a first communication module, a graphics rendering module, and an FPGA.
  • the FPGA can realize the functions of the above-mentioned graphics merging module, encoding module, media streaming module, second communication module, and display driving module.
  • the first communication module is PCIE Switch;
  • the graphics rendering module includes SoC, and SoC includes GPU core and RAM. That is to say, the functions of the above-mentioned first communication module, graphics merging module, encoding module, media streaming module, second communication module, and display driving module can be specifically referred to the above description, and will not be repeated here.
  • the first communication module, graphics merging module, encoding module, media streaming module, second communication module, and display driving module of the electronic device are integrated on FPGA or ASIC.
  • the electronic device may include a graphics rendering module and an FPGA.
  • the FPGA integrates the functions of a first communication module, a graphics merging module, an encoding module, a media streaming module, a second communication module, and a display drive module. That is to say, the FPGA can realize the functions of the above-mentioned first communication module, graphics merging module, encoding module, media streaming module, second communication module, and display driving module.
  • the first communication module is PCIE Switch
  • the graphics rendering module includes at least two SoCs, and each SoC includes a GPU core and RAM.
  • first communication module graphics merging module, encoding module, media streaming module, second communication module, and display driver module can also be integrated on other possible hardware chips, such as programmable logic device , PLD), or complex programmable logic device (CPLD), or generic array logic (generic array logic, GAL), or any combination of FPGA, ASIC, PLD, CPLD, and GAL.
  • PLD programmable logic device
  • CPLD complex programmable logic device
  • GAL generic array logic
  • the electronic device can be applied to a computer system.
  • the computer system can be a terminal device, such as a mobile phone, a tablet computer, a camera, a video camera, a game console, a personal computer (PC), etc.; it can also be a server or a cloud server.
  • This application can also provide a computer system, refer to FIG. 7.
  • the computer system may include the above-mentioned at least one electronic device (in FIG. 7 to include electronic device 1, electronic device 2, electronic device n), a processor, and a bus.
  • the bus is used to connect the processor and each of the at least one electronic device. That is, the processor is connected to each electronic device in the at least one electronic device through a bus.
  • the bus can be a CCIX bus, or a CXL bus, or a PCIE bus.
  • the processor is used to divide the graphics to be rendered into at least two graphics rendering tasks, and transmit the at least two graphics rendering tasks to the SoC corresponding to one of the at least one electronic device through the bus.
  • the processor may be a central processing unit (central processing unit, processor), a network processor (network processor, NP), or a combination of a processor and NP.
  • the computer system may also run distributed algorithm software.
  • the distributed algorithm software is used to perform distributed graphics processing. For example, it can be used to schedule each graphics rendering task after the processor is split, that is, which graphics rendering task is transmitted to which SoC in which electronic device for rendering processing.
  • the distributed algorithm software for scheduling is used to perform distributed graphics processing. For example, it can be used to schedule each graphics rendering task after the processor is split, that is, which graphics rendering task is transmitted to which SoC in which electronic device for rendering processing.
  • the distributed algorithm software for scheduling is used to perform distributed graphics processing. For example, it can be used to schedule each graphics rendering task after the processor is split, that is, which graphics rendering task is transmitted to which SoC in which electronic device for rendering processing.
  • the processor can transmit the split at least two graphics rendering tasks to which electronic device among the at least one electronic device, which can be based on a preset rule, an equalization strategy, or a random selection.
  • An electronic device is not limited in this application.
  • the computer system may also include other devices, such as network cards, memory, sensors, touch screens, and display screens used to communicate with other devices.
  • other devices such as network cards, memory, sensors, touch screens, and display screens used to communicate with other devices.
  • all computer systems with graphics rendering functions can use the electronic equipment provided in this application.
  • the computer system shown in FIG. 7 can also be applied to remote rendering processing. That is, the graphics rendering task of the terminal device can be performed on the remote computer system.
  • the terminal device can be used to send a request message for requesting graphics rendering or a control command to an application running in a remote computer system to the computer system. For example, a game application is running on the remote computer system, and the game screen is played on the terminal device.
  • the instruction corresponding to the operation is sent to the remote computer system to control the game application running on it, and the game screen that changes accordingly is sent to the terminal device, and the terminal device plays the game screen.
  • FIG. 8 it is a schematic diagram of an applicable scenario of a computer system provided by this application.
  • the terminal device can run the client of the application that requires graphics rendering
  • the computer system can run the server of the application that requires graphics rendering
  • the client and the server can communicate through the network.
  • the client is used for interaction with users and screen display; the server runs the main program of the application that requires graphics rendering.
  • the computer system can select an electronic device to perform the above-mentioned graphics rendering process for the application that requires graphics rendering, so as to obtain the rendered graphics result.
  • the device can directly send the graphic result (electronic device 1 is taken as an example in FIG.
  • the rendered graphics result does not need to be returned along the original path of the graphics rendering task to achieve further processing of the rendered graphics result, and it does not need to be sent to the terminal device through the network card of the computer system, thereby reducing the computer system
  • At least one refers to one or more, and “multiple” refers to two or more.
  • And/or describes the association relationship of the associated objects, indicating that there can be three relationships, for example, A and/or B, which can mean: A alone exists, A and B exist at the same time, and B exists alone, where A, B can be singular or plural.
  • the following at least one item (a) or similar expressions refers to any combination of these items, including any combination of a single item (a) or a plurality of items (a).
  • At least one of a, b, or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c” ", where a, b, and c can be single or multiple.
  • the character "/" generally indicates that the associated objects before and after are in an "or" relationship.

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Abstract

一种电子设备及计算机系统,用于解决现有技术中因大量的图形渲染计算需求,造成图形渲染效率低且时延大的问题。电子设备包括第一通信模块、图形渲染模块、图形合并模块和第二通信模块。第一通信模块用于将接收到的至少两个图形渲染任务传输至对应的SoC; 图形渲染模块用于使用包括的至少两个SoC的每个SoC的GPU内核,对接收到的图形渲染任务进行渲染处理,将得到的至少两个渲染后的图形结果传输至图形合并模块,图形合并模块用于对接收到的至少两个图形结果进行合并处理,将得到的合并后的图形结果通过第二通信模块传输至目标设备。通过流水线的方式进行图形渲染,可提高图形渲染的效率且降低时延。

Description

一种电子设备及计算机系统
相关申请的交叉引用
本申请要求在2019年12月31日提交中国专利局、申请号为201911415838.6、申请名称为“一种电子设备及计算机系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子设备技术领域,尤其涉及一种电子设备及计算机系统。
背景技术
随着电子技术和信息技术的发展,计算机系统中的处理器需处理的数据量越来越大,这对处理器的处理能力要求越来越高。在一些场景中,计算机系统中的处理器已经无法满足任务需求,需要协处理设备来协作处理。例如需要较高分辨率的场景(如8k分辨率的大屏幕);再比如,巨型几何模型的场景(如数据规模超过100兆字节(MB)的大三角形规模);再比如大纹理数据量场景(如地图、三维(3Dimensions,3D)游戏模型等),通常需要图形处理器(graphic processing unit,GPU)作为计算机系统的中央处理器(central processing unit,CPU)的协处理设备。
目前,GPU实现的计算量越大,GPU的技术实现越难,相应地,GPU的成本也越高。在需要较大计算量的图形渲染场景中,若使用具有较大计算力的GPU,则图形渲染的成本较高;若使用具有较低计算力的GPU,则图形渲染的效率较低。
综上,如何能在较低成本的情况下,高效的实现较大计算量的图形渲染的需求,是当前亟需解决的技术问题。
发明内容
本申请提供一种电子设备及计算机系统,用于通过较低计算力的多个GPU实现大量图形渲染计算需求,且图形渲染的效率高且时延低。
第一方面,本申请提供一种电子设备,该电子设备可包括第一通信模块、图形渲染模块、图形合并模块和第二通信模块,图形渲染模块包括至少两个片上系统(system on a chip,SoC),至少两个SoC中的每个SoC包括GPU内核。第一通信模块可用于接收至少两个图形渲染任务,并将至少两个图形渲染任务分别传输至对应的SoC,一个SoC在预设时间内对应一个图形渲染任务;图形渲染模块用于使用每个SoC的GPU内核,对接收到的图形渲染任务进行渲染处理,得到至少两个渲染后的图形结果,并将至少两个渲染后的图形结果通过第一通信模块传输至图形合并模块;所述图形合并模块用于对接收到的所述至少两个渲染后的图形结果进行合并处理,并将合并后的图形结果传输至所述第二通信模块;第二通信模块用于将接收到的合并后的图形结果传输至目标设备。
基于该方案,该电子设备的图形渲染模块包括至少两个SoC,每个SoC包括GPU内核,即图形渲染模块采用的是SoC叠加与分布式图形处理相结合的方式进行渲染处理,从 而可通过较低计算力的多个GPU满足大量的图形渲染计算需求,较低计算力的GPU的成本也较低,从而也可降低图形渲染的成本,而且通过至少两个SoC进行渲染处理,有助于提升图形渲染效率。进一步,该电子设备中的第一通信模块用于将图形渲染任务传输至图形渲染模块,经图形渲染模块的渲染处理后得到的图形结果传输至图形合并模块,图形合并模块对接收到至少两个渲染后的图形结果进行合并处理,得到合并后的图形结果,将合并后的图形结果经第二通信模块传输至目标设备,即该电子设备采用的是全业务流水线的方式得到的合并后的图形结果,并将合并后的图形结果通过第二通信模块发送至目标设备。如此,不需要将经图形渲染模块渲染后的图形结果沿图形渲染任务的下发路径原路返回以实现对渲染后的图形结果进行合并处理和进一步处理,从而有助于降低图形渲染处理的时延,而且有助于减少数据的搬移。
在一种可能的实现方式中,电子设备还可包括编码模块;编码模块用于对来自所述图形合并模块的合并后的图形结果进行编码,得到编码后的图形结果,并将编码后图形结果传输至第二通信模块。
在另一种可能的实现方式中,电子设备还可包括编码模块;编码模块用于对来自所述图形渲染模块的至少两个渲染后的图形结果进行编码,得到编码后的图形结果,并将编码后图形结果传输至第二通信模块。
本申请中,电子设备可包括编码模块和包括媒体流化模块。编码模块用于对来自所述图形合并模块的所述合并后的图形结果进行编码,或者,对来自所述图形渲染模块的所述至少两个图形结果进行编码,得到编码后的图形结果,并将编码后的图形结果传输至媒体流化模块;媒体流化模块用于对接收到的编码后的图形结果进行流化处理,得到码流,并将码流传输至第二通信模块;第二通信模块用于将码流传输至目标设备。如此,该电子设备可实现以流媒体的方式向目标设备发送渲染后的图形结果。
在一种可能的实现方式中,电子设备还可包括显示驱动模块。图形渲染模块还可用于将至少两个渲染后的图形结果传输至显示驱动模块;显示驱动模块用于驱动显示器显示至少两个渲染后的图形结果。
在另一种可能的实现方式中,电子设备还可包括显示驱动模块。图形合并模块还可用于将所述合并后的图形结果传输至所述显示驱动模块;显示驱动模块用于驱动显示器显示所述合并后的图形结果。
电子设备包括显示驱动模块时,若需要将渲染后的图形结果在显示器上播放,则该显示驱动模块可直接驱动显示器播放得到的至少两个渲染后的图形结果或者合并后的图形结果。
在一种可能的实现方式中,图形合并模块、编码模块、媒体流化模块和第二通信模块集成于现场可编程逻辑门阵列(field-programmable gate array,FPGA)上;或者,图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块集成于供专门应用的集成电路(application specific integrated circuit,ASIC)上。也可以理解为,FPGA或ASIC可实现上述图形合并模块、编码模块、媒体流化模块和第二通信模块的功能。
在另一种可能的实现方式中,第一通信模块、图形合并模块、编码模块、媒体流化模块和第二通信模块集成于FPGA;或者,第一通信模块、图形合并模块、编码模块、媒体流化模块和第二通信模块集成于ASIC上。也可以理解为,FPGA或ASIC可以实现上述第一通信模块、图形合并模块、编码模块、媒体流化模块和第二通信模块的功能。
第二方面,本申请提供一种计算机系统,该计算机系统可包括第一方面的至少一个电子设备、处理器和总线,处理器与至少一个电子设备中的每个电子设备通过总线连接;处理器用于将待渲染的图形切分为至少两个图形渲染任务,并将至少两个图形渲染任务通过总线传输至至少一个的电子设备中的一个。
基于该方案,电子设备在完成图形渲染任务后,可通过电子设备的第二通信模块向目标设备发送渲染后的图形结果,如此,不需要将渲染后的图形结果沿图形渲染任务的下发路径原路返回至处理器做合并处理和进一步的处理,且不需要通过计算机系统中的接收目标设备的业务请求消息的网卡去发送渲染后的图形结果,从而可降低计算机系统的图形渲染处理的时延;而且可实现了远程渲染业务。
附图说明
图1为本申请提供的一种分布式图形处理的过程示意图;
图2为本申请提供的一种电子设备的结构示意图;
图3a为本申请提供的另一种电子设备的结构示意图;
图3b为本申请提供的再一种电子设备的结构示意图;
图4a为本申请提供的再一种电子设备的结构示意图;
图4b为本申请提供的另一种电子设备的结构示意图;
图5为本申请提供的又一种电子设备的结构示意图;
图6为本申请提供的又一种电子设备的结构示意图;
图7为本申请提供的一种计算机系统的架构示意图;
图8为本申请提供的一种计算机系统的应用场景示意图。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚,下面将结合附图对本申请作进一步地详细描述。
以下,对本申请中的部分用语进行解释说明,以便于本领域技术人员理解。
一、片上系统(system on a chip,SoC)
SoC是指单个芯片上集成一个完整的系统,对所有或部分必要的电子电路进行分组的技术。所谓完整的系统一般包括中央处理器(central processing unit,CPU)、存储器以及外围电路等。
二、GPU内核
GPU内核是GPU中间的核心芯片。
三、网络接口控制器(network interface controller,NIC)
NIC也称为网络适配器(network adapter)或网卡(network interface card)信的计算机硬件。NIC拥有一个唯一的网络节点地址,即媒体访问控制(medium access control,MAC)地址,它使得用户可以通过电缆或无线相互连接。网卡的主要工作原理是整理(例如将用户要传递的数据转换为网络上其它设备能够识别的格式)计算机上发往网线上的数据,并将数据分解为适当大小的数据包之后向网络上发送出去。
网卡功能主要有两个:一个是将网卡所在的设备的数据封装为帧,并通过网线(对无 线网来说是电磁波)将数据发送到网络上;二是接收网络上其它设备传过来的帧,并将帧重新组合成数据,发送到网卡所在的设备中。
四、分布式图形处理
分布式图形处理是指把一个图形渲染任务分成多个图形渲染任务,每个图形渲染任务可在不同的节点上并行或串行进行渲染处理,最终将渲染后的图形结果输出的过程。
如图1所示,示例性地的示出了一种分布式图形处理过程的示意图。一个图形渲染任务以牛的3D模型数据为例,该图形渲染认为被切分为四个图形渲染任务,再将切分后的四个图形渲染任务分发至不同的GPU进行渲染处理,得到渲染后的图形结果。进一步,可选地,再对渲染后的图形结果进行合并处理。
五、编码
编码是信息从一种形式或格式转换为另一种形式的过程。例如,用代码来标识各组数据,使其成为可利用计算机进行处理和分析的信息。
六、码流
码流是指视频文件在单位时间内使用的数据流量,是视频编码中画面质量控制中较重要的部分。同样分辨率下,视频文件的码流越大,压缩比就越小,画面质量就越好。
七、图形渲染任务
图形渲染任务是指运行在计算机系统中的应用(例如游戏、视频及可视化设计等)需要通过GPU处理的数据,通过软件进行封装,将需要进行渲染处理的数据和对数据操作的命令封装成的任务队列。
目前,对于要求高计算量的应用需要用到高计算力的图形处理设备,有两种比较常用的解决方式。方式一,使用高计算力的GPU卡,但是该类GPU卡成本较高。方式二,使用较低计算力的GPU,但是较低计算力的GPU的渲染处理的效率较低,从而导致渲染延迟较大。
鉴于上述问题,本申请提出一种电子设备,该电子设备可在渲染成本较低的情况下,高效率的满足较大计算量的图形渲染的需求。
下面结合附图2至附图8,对本申请提出的电子设备进行具体阐述。
基于上述内容,如图2所示,为本申请提供的一种电子设备的结构示意图。该电子设备可包括第一通信模块、图形渲染模块、图形合并模块和第二通信模块,图形渲染模块包括至少两个SoC,至少两个SoC中的每个SoC包括图形处理器GPU内核。其中,第一通信模块用于接收至少两个图形渲染任务,并将至少两个图形渲染任务分别传输至对应的SoC,一个SoC在预设时间内对应一个图形渲染任务;例如,第一通信模块接收到图形渲染任务A和图形渲染任务B,将图形渲染任务A传输至对应的SoC1,将图形渲染任务B传输至对应的SoC2。图形渲染模块用于使用至少两个SoC中的每个SoC的GPU内核,对接收到的图形渲染任务进行渲染处理,一个SoC可得到一个渲染后的图形结果,即图形渲染模块可输出至少两个渲染后的图形结果(例如图像或者视频),并将至少两个渲染后的图形结果通过第一通信模块传输至图形合并模块。所述图形合并模块用于对接收到的所述至少两个渲染后的图形结果进行合并处理,并将合并后的图形结果传输至所述第二通信模块。第二通信模块用于将接收到的合并后的图形结果传输至目标设备。
本申请中,该电子设备可以是图形处理卡,或者可以是独立的图形渲染服务器等。
在一种可能的实现方式中,图形渲染任务中包括图形渲染命令、需要进行图形渲染的数据,如地图模型数据、游戏模型数据、图片或视频等。
基于上述电子设备,该电子设备的图形渲染模块包括至少两个SoC,每个SoC包括GPU内核,即图形渲染模块采用的是SoC叠加与分布式图形处理相结合的方式进行渲染处理,从而可通过较低计算力的多个GPU满足大量的图形渲染计算需求,较低计算力的GPU的成本也较低,从而也可降低图形渲染的成本,而且通过至少两个SoC进行渲染处理,有助于提升图形渲染效率。进一步,该电子设备中的第一通信模块用于将图形渲染任务传输至图形渲染模块,经图形渲染模块渲染后得到的图形结果传输至图形合并模块,经图形合并模块的合并处理后得到合并后的图形结果,将合并后的图形结果经第二通信模块传输至目标设备,即该电子设备采用的是全业务流水线的方式得到的合并后的图形结果,并将合并后的图形结果通过第二通信模块发送至目标设备。如此,不需要将经图形渲染模块渲染后的图形结果沿图形渲染任务的下发路径原路返回以实现对渲染后的图形结果合并处理和进一步处理,从而有助于降低图形渲染处理时延,而且有助于减少数据的搬移。
下面对图2所示的各个功能模块和结构分别进行介绍说明,以给出示例性的具体实现方案。
一、第一通信模块
本申请中,第一通信模块可用于与该电子设备所在的计算机系统内的总线接口适配;也就是说,该电子设备可通过该第一通信模块插入计算机系统,且可通过所在的计算机系统的总线与计算机系统中的其它器件进行通信,例如,该电子设备可通过第一通信模块与电子设备所插入的计算机系统内的处理器进行通信。示例性地,该第一通信模块可接收来自电子设备所在的计算机系统内的处理器分发的至少两个图形渲染任务。
第一通信模块还可用于实现该电子设备内各模块之间的通信。示例性地,图形渲染模块的可通过第一通信模块将至少两个渲染后的图形结果传输至图形合并模块。
在一种可能的实现方式中,该第一通信模块可以是高速串行计算机扩展总线标准(peripheral component interconnect express,PCIE)-交换(switch)接口,或片到片互联一致性协议(chip-to-chip coherent interconnect protocol,CCIX)-交换(switch)接口,或计算快速链接(compute express link,CXL)-交换(switch)接口。
二、图形渲染模块
本申请中,图形渲染模块可包括至少两个SoC,SoC是图形渲染模块的进行图形渲染任务的核心器件。每个SoC包括GPU内核,GPU内核可对接收到的图形渲染任务进行图形渲染处理。也就是说,图形渲染模块用于使用至少两个SoC中的每个SoC的GPU内核对接收到的图形渲染任务进行图形渲染处理。
SoC还包括存储器,存储器用于存储图形渲染处理过程中的暂时性数据,以便于图形渲染模块可顺利完成图形渲染任务。存储器可以是随机读取存储器(random-access memory,RAM),RAM可以是内置的或者也可以是外置的;也可以是双倍速率同步动态随机存储器(double data rate synchronous dynamic random access memory,DDR SDRAM);也可以是静态随机存取存储器(static random access memory,SRAM);也可以是高带宽存储器(high bandwidth memory,HBM);也可以是储存级存储器(storage class memory,SCM);存储器还可以包括上述种类的存储器的组合。
在一种可能的实现方式中,经图形渲染模块执行完图形渲染任务后,可输出至少两个渲染后的图形结果。可以理解的是,图形渲染模块输出的渲染后的图形结果的数量与图形渲染模块接收到的图形渲染任务的数量一致。另外,输出的渲染后的图形结果为原始图形。
在一种可能的实现方式中,图形渲染模块可将至少两个渲染后的图形结果通过第一通信模块传输至图形合并模块。在另一种可能的实现方式中,图形渲染模块也可将至少两个渲染后的图形结果传输至第二通信模块。
三、图形合并模块
本申请中,图形合并模块用于对接收到的至少两个渲染后的图形结果进行合并处理,并将合并后的图形结果传输至第二通信模块。
在一种可能的实现方式中,图形合并模块可根据预设的合并算法对至少两个渲染后的图形结果进行合并处理。也可以理解为,在图形合并模块对接收到的至少两个渲染后的图形结果进行合并处理之前,需要对各个渲染后的图形结果进行同步,以实现将属于同一图形的各个图形结果进行合并处理。例如,可以对渲染后图形结果记录时间戳,具体可以由该电子设备对属于同一个图形的渲染后的各个图形结果记录相同的时间戳,也可以由该电子设备所在的计算机系统中运行的分布式算法软件对各个渲染后的图形结果进行同步。即图形合并模块合并图形的方法可由电子设备所在的计算机系统中运行的分布式算法软件决定或者也可以由电子设备决定,本申请对此不做限定。
示例性地,图形合并模块接收到两个渲染后的图形结果,这两个渲染后的图形结果有相同的时间戳,图形合并模块可将时间戳相同的这两个图形结果进行合并处理,得到合并后的图形结果。
在一种可能的实现方式中,该图形合并模块可以是FPGA,处理器芯片或专用ASIC,亦或是上述的SoC芯片中的GPU内核实现。
四、第二通信模块
第二通信模块可以是网卡,也可称为NIC,或网络适配器。该第二通信模块可用于将来自图形渲染模块的至少两个渲染后的图形结果传输至目标设备。当该电子设备插入计算机系统时,第二通信模块可将图形渲染模块输出的至少两个渲染后的图形结果均传输至该电子设备所在的计算机系统之外的其它设备。
在一种可能的实现方式中,目标设备的地址可以携带于图形渲染任务中,因此,电子设备可从图形渲染任务中获取到目标设备的地址。
通过第二通信模块可将得到的至少两个渲染后的图形结果或合并后的图形结果传输至目标设备,有助于避免渲染后的图形结果沿图形渲染任务的下发路径原路返回,从而有助于降低图形渲染处理延迟。进一步,从该电子设备第二通信模块经网络直接向目标设备传输,可降低图形渲染结果发送的时延。
本申请中,该电子设备还可包括显示驱动模块和/或合并编码模块和/或媒体流化模块。需要说明的是,若该电子设备包括媒体流化模块,则必须包含编码模块。
如下,对编码模块、媒体流化模块和显示驱动模块合并分别进行详细介绍,并给出示例性地的具体实现方案。
五、显示驱动模块
本申请中,该电子设备还可包括显示驱动模块。若需要将渲染后的图形结果在显示器 上播放,则图形合并模块还可将合并后的图形结果传输至显示驱动模块,或者图形渲染模块还可将至少两个渲染后的图形结果传输至显示驱动模块。
基于显示驱动模块和第二通信模块的可分以下三种情形。
情形1,图形合并模块将得到的合并后的图形传输至显示驱动模块和第二通信模块。
如图3a所示,为本申请提供的另一种电子设备的结构示意图。该电子设备可包括第一通信模块、图形渲染模块、第二通信模块、图形合并模块和显示驱动模块。图形合并模块除可用于实现上述图2所介绍的功能外,还可用于将合并后的图形结果传输至显示驱动模块;显示驱动模块用于驱动显示器显示合并后的图形结果。也就是说,若需要将合并后的图形结果在显示器上播放,则可将来自图形合并模块的合并后图形结果传输至显示驱动模块,由该显示驱动模块直接驱动显示器呈现合并后的图形结果的画面。
情形2,图形合并模块将得到的合并后的图形传输至第二通信模块,图形渲染模块将得到的至少两个渲染后的图形结果传输至显示驱动模块。
如图3b所示,为本申请提供的再一种电子设备的结构示意图。该电子设备可包括第一通信模块、图形渲染模块、第二通信模块、图形合并模块和显示驱动模块。图形渲染模块除可用于实现上述图2所介绍的功能外,还可用于通过第一通信模块将至少两个渲染后的图形结果传输至显示驱动模块。显示驱动模块用于驱动显示器显示至少两个渲染后的图形结果。也就是说,若需要将渲染后的图形结果在显示器上播放,则可将来自图形渲染模块的至少两个渲染后的图形结果传输至显示驱动模块,由该显示驱动模块直接驱动显示器呈现至少两个渲染后的图形结果的画面。
情形3,图形合并模块将得到的合并后的图形传输至显示驱动模块,图形渲染模块将得到的至少两个渲染后的图形结果传输至第二通信模块。
该情形3可将上述图3b中的显示驱动模块和第二通信模块的位置互换。
需要说明的是,上述图3a和图3b中所示的第一通信模块和第二通信模块的功能可参见上述图2的介绍,此处不再一一赘述。另外,该显示驱动模块可以是显示驱动电路或芯片。
六、编码模块
在一种可能的实现方式中,该电子设备还可包括编码模块,用于对来自图形渲染模块的至少两个渲染后的图形结果进行编码,或者,对来自图形合并模块的合并后的图形进行编码,得到编码后的图形结果,并将编码后图形结果传输至第二通信模块和/或显示驱动模块。其中,第一通信模块、图形渲染模块、第二通信模块、图形合并模块可参见上述描述,此处不再一一赘述。
本申请中,基于编码模块所编码的图形结果的来源分如下两种场景。
场景一,编码模块用于接收来自图形渲染模块的至少两个渲染后的图形结果。
如图4a所示,为本申请提供到的再一种电子设备的结构示意图。该电子设备包括第一通信模块、图形渲染模块、第二通信模块和编码模块。进一步,可选地,该电子设备还可包括显示驱动模块。基于该场景一,编码模块可用于分别对接收到的至少两个渲染后的图形结果中的每个图形结果进行编码,得到至少两个编码后的图形结果。其中,第一通信模块、图形渲染模块和第二通信模块可参见上述介绍,此处不再一一赘述。
基于该场景一,显示驱动模块可驱动显示器显示至少两个编码后的图形结果。示例性地,显示驱动模块可依次驱动显示器显示,也可以同时驱动显示器显示,也可以按预设规 律驱动显示器显示,本申请对此不做限定。
基于该场景一,第二通信模块可用于将至少两个编码后的图形结果传输至目标设备。
场景二,编码模块用于接收来自图形合并模块的合并后的图形结果。
如图4b所示,为本申请提供到的另一种电子设备的结构示意图。该电子设备包括第一通信模块、图形渲染模块、第二通信模块、图形合并模块和编码模块。进一步,可选地,该电子设备还可包括显示驱动模块。编码模块可用于对来自图形合并模块合并后的图形结果进行编码。其中,第一通信模块、图形渲染模块、图形合并模块和第二通信模块可参见上述介绍,此处不再一一赘述。
基于该场景二,显示驱动模块可驱动显示器显示合并后的图形结果的编码后的图形结果。第二通信模块可用于将合并后的图形结果的编码后的图形结果传输至目标设备。
在一种可能的实现方式中,该编码模块可以用于对图像进行编码,也可以用于对视频进行编码。该编码模块可以是编码器,或者是转码器。
七、媒体流化模块
参考上述图4a或图4b,该图4a或图4b所示的电子设备还可包括媒体流化模块。若图形渲染任务为需要以流媒体的方式发送至目标设备,则需要在流化环境中对编码后的图形结果进行流化处理。在一种可能的实现方式中,编码模块还可用于将编码后的图形结果传输至媒体流化模块。媒体流化模块用于对接收到的编码后的图形结果进行流化处理,得到码流,并将码流传输至第二通信模块。第二通信模块可用于将码流传输至目标设备。
需要说明的是,编码模块可以将编码后的图形结果传输至显示驱动模块,显示驱动模块可驱动显示器显示编码后的图形结果;编码模块也可以将编码后的图形结果传输至媒体流化模块进行流化;编码模块也可以既将编码后的图形传输至显示驱动模块以进行显示,同时也传输至媒体流化模块进行流化,具体可根据实际需求来选择,本身申请对此不做限定。
本申请中,该电子设备还可包括支撑管理模块。支撑管理模块可用于管理该电子设备的电源、固件加载、运行监控、上下电控制和时钟管理等。
在一种可能的实现方式中,电子设备的图形合并模块、编码模块、媒体流化模块和第二通信模块可集成于FPGA或者ASIC上;或者电子设备的第一通信模块、图形合并模块、编码模块、媒体流化模块和第二通信模块集成于FPGA或ASIC上;或者电子设备的第一通信模块、图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块集成于FPGA或ASIC上;或者电子设备的图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块可集成于FPGA或者ASIC上;或者第一通信模块、第二通信模块、图形合并模块、编码模块、媒体流化模块和显示驱动模块中任一个集成于FPGA或者ASIC上;或者第一通信模块、第二通信模块、图形合并模块、编码模块、媒体流化模块和显示驱动模块中任两个集成于FPGA或者ASIC上;或者第一通信模块、第二通信模块、图形合并模块、编码模块、媒体流化模块和显示驱动模块中任三个集成于FPGA或者ASIC上,此处不再一一列举。
基于上述内容,下面结合具体的硬件结构,给出上述电子设备的两种具体实现方式。以便于进一步理解上述电子设备的结构和电子设备实现图形渲染的过程。如下两种实现方 式中均以该电子设备包括第一通信模块、图形渲染模块、第二通信模块、图形合并模块、编码模块、媒体流化模块和显示驱动模块为例。
示例一
在该示例一种,电子设备的图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块可集成于FPGA或者ASIC上。
如图5所示,为本申请提供的又一种电子设备的结构示意图。该电子设备可包括第一通信模块、图形渲染模块和FPGA。其中,FPGA可实现上述图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块的功能。第一通信模块为PCIE Switch;图形渲染模块包括SoC,SoC包括GPU内核和RAM。也就是说,上述第一通信模块、图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块的功能,具体可参见上述描述,此处不再一一赘述。
示例二
在该示例二中,电子设备的第一通信模块、图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块集成于FPGA或ASIC上。
如图6所示,为本申请提供的又一种电子设备的结构示意图。该电子设备可包括图形渲染模块和FPGA。FPGA上集成有第一通信模块、图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块的功能。也就是说,FPGA可实现上述第一通信模块、图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块的功能,具体可参见上述描述,此处不再一一赘述。其中,第一通信模块为PCIE Switch,图形渲染模块包括至少两个SoC,每个SoC包括GPU内核和RAM。
需要说明的是,第一通信模块、图形合并模块、编码模块、媒体流化模块、第二通信模块和显示驱动模块还可以集成于其它可能的硬件芯片上,例如可编程逻辑器件(programmable logic device,PLD)、或复杂可编程逻辑器件(complex programmable logic device,CPLD)、或通用阵列逻辑(generic array logic,GAL)、或FPGA、ASIC、PLD、CPLD和GAL中任意组合,本申请对此不做限定。
基于上述描述的电子设备的结构和功能原理,该电子设备可以应用到计算机系统。该计算机系统可以是终端设备,例如手机、平板电脑、摄像头、摄像机、游戏机、个人计算机(personal computer,PC)等;也可以是服务器或者云端服务器等。本申请还可以提供一种计算机系统,参阅图7。
如图7所示,为本申请提供的一种计算机系统的架构示意图。该计算机系统可包括上述至少一个电子设备(图7中以包括电子设备1、电子设备2电子设备n)、处理器和总线。总线用于连接处理器和至少一个电子设备中的每个电子设备。即处理器与至少一个电子设备中的每个电子设备通过总线连接。总线可采用CCIX总线、或者CXL总线、或者PCIE总线等。处理器用于将待渲染的图形切分为至少两个图形渲染任务,并将至少两个图形渲染任务通过总线传输至至少一个电子设备中的一个电子设备对应的SoC。该电子设备可对接收到的图形渲染任务进行渲染过程可参见上述描述,此处不再赘述。处理器可以是中央处理器(central processing unit,处理器),网络处理器(network processor,NP)或者处理器和NP的组合。
在一种可能的实现方式中,该计算机系统还可运行有分布式算法软件。该分布式算法 软件用于进行分布式图形处理,例如,可用于对处理器切分后的各个图形渲染任务进行调度,即将哪个图形渲染任务传输给哪个电子设备中的哪个SoC进行渲染处理,由该分布式算法软件来调度。
需要说明的是,处理器传输将切分后的至少两个图形渲染任务传输至至少一个电子设备中的哪个电子设备可以是根据预设规则,也可以是基于均衡策略,或者也可以是随机选择一个电子设备,本申请对此不做限定。
本申请中,该计算机系统还可以包括其他器件,例如用于与其它设备进行通信的网卡、存储器、传感器和触摸屏、显示屏等。也就是说,具有图形渲染功能的计算机系统中均可以采用本申请所提供的电子设备。
图7所示的计算机系统也可应用于远程渲染处理。即终端设备的图形渲染任务可以在远端的计算机系统上进行。终端设备可用于向计算机系统发送用于请求图形渲染的请求消息或对远端计算机系统中运行的应用的控制命令,例如,游戏应用运行在远端计算机系统上,游戏画面在终端设备上播放,用户在终端设备上操作时,该操作对应的指令会发送到远端计算机系统上以控制其上运行的游戏应用,并将随之变化的游戏画面发给终端设备,终端设备播放游戏画面。
如图8所示,为本申请提供的一种计算机系统可应用的场景示意图。在该场景下,终端设备可运行需要图形渲染的应用的客户端,计算机系统可运行该需要图形渲染的应用的服务端,客户端和服务端之间可通过网络进行通信。客户端用于与用户交互和画面显示;服务端运行有该需要图形渲染的应用的主程序。当计算机系统接收到终端设备发送的用于请求图形渲染的请求消息后,计算机系统可选择一个电子设备为该需要图形渲染的应用进行上述图形渲染的过程,从而得到渲染后的图形结果,该电子设备可通过该电子设备的第二通信模块将图形结果(图8以电子设备1为例)直接发送至终端设备。如此,不需要将渲染后的图形结果沿图形渲染任务的下发路径原路返回以实现对渲染后的图形结果进一步处理,且不需要通过计算机系统的网卡发送至终端设备,从而可降低计算机系统的图形渲染处理的时延;而且实现了终端设备和计算机系统分离的远程渲染业务。
在本申请的各个实施例中,如果没有特殊说明以及逻辑冲突,不同的实施例之间的术语和/或描述具有一致性、且可以相互引用,不同的实施例中的技术特征根据其内在的逻辑关系可以组合形成新的实施例。
本申请中,“至少一个”是指一个或者多个,“多个”是指两个或两个以上。“和/或”,描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B的情况,其中A,B可以是单数或者复数。“以下至少一项(个)”或其类似表达,是指这些项中的任意组合,包括单项(个)或复数项(个)的任意组合。例如,a,b或c中的至少一项(个),可以表示:a,b,c,“a和b”,“a和c”,“b和c”,或“a和b和c”,其中a,b,c可以是单个,也可以是多个。在本申请的文字描述中,字符“/”,一般表示前后关联对象是一种“或”的关系。
可以理解的是,在本申请中涉及的各种数字编号仅为描述方便进行的区分,并不用来限制本申请的实施例的范围。上述各过程的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定。术语“第一”、“第二”等是用于分区别类似的 对象,而不必用于描述特定的顺序或先后次序。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元。方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
尽管结合具体特征及其实施例对本申请进行了描述,显而易见的,在不脱离本申请的精神和范围的情况下,可对其进行各种修改和组合。相应地,本说明书和附图仅仅是所附权利要求所界定的方案进行示例性说明,且视为已覆盖本申请范围内的任意和所有修改、变化、组合或等同物。
显然,本领域的技术人员可以对本申请进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。

Claims (6)

  1. 一种电子设备,其特征在于,包括第一通信模块、图形渲染模块、图形合并模块和第二通信模块,所述图形渲染模块包括至少两个片上系统SoC,所述至少两个SoC中的每个SoC包括图形处理器GPU内核;
    所述第一通信模块,用于接收至少两个图形渲染任务,并将所述至少两个图形渲染任务分别传输至对应的SoC,一个SoC在预设时间内对应一个图形渲染任务;
    所述图形渲染模块,用于使用所述至少两个SoC中的每个SoC的GPU内核,对接收到的图形渲染任务进行渲染处理,得到至少两个渲染后的图形结果,并将所述至少两个渲染后的图形结果通过所述第一通信模块传输至所述图形合并模块;
    所述图形合并模块,用于对接收到的所述至少两个渲染后的图形结果进行合并处理,并将合并后的图形结果传输至所述第二通信模块;
    所述第二通信模块,用于将接收到的所述合并后的图形结果传输至目标设备。
  2. 如权利要求1所述的电子设备,其特征在于,所述电子设备还包括编码模块;
    所述编码模块,用于对来自所述图形合并模块的所述合并后的图形结果进行编码,或者,对来自所述图形渲染模块的所述至少两个图形结果进行编码,得到编码后的图形结果,并将所述编码后图形结果传输至所述第二通信模块。
  3. 如权利要求1所述的电子设备,其特征在于,所述电子设备包括编码模块和媒体流化模块;
    所述编码模块,用于对来自所述图形合并模块的所述合并后的图形结果进行编码,或者,对来自所述图形渲染模块的所述至少两个图形结果进行编码,得到编码后的图形结果,并将所述编码后的图形结果传输至所述媒体流化模块;
    所述媒体流化模块,用于对接收到的所述编码后的图形结果进行流化处理,得到码流,并将所述码流传输至所述第二通信模块;
    所述第二通信模块用于将接收到的所述合并后的图形结果传输至目标设备,包括:
    所述第二通信模块用于将所述码流传输至所述目标设备。
  4. 如权利要求3所述的电子设备,其特征在于,所述图形合并模块、所述编码模块、所述媒体流化模块和所述第二通信模块集成于现场可编程逻辑门阵列FPGA或专用集成电路ASIC上;或者,
    所述第一通信模块、图形合并模块、所述编码模块、所述媒体流化模块和所述第二通信模块集成于FPGA或ASIC上。
  5. 如权利要求1至4任一项所述的电子设备,其特征在于,所述电子设备还包括显示驱动模块;
    所述显示驱动模块,用于驱动显示器显示来自所述图形合并模块的所述合并后的图形结果;或者,驱动显示器显示来自所述图形渲染模块的所述至少两个渲染后的图形结果。
  6. 一种计算机系统,其特征在于,包括如权利要求1~5任一项所述的至少一个电子设备、处理器和总线,所述处理器与所述至少一个电子设备中的每个电子设备通过所述总线连接;所述处理器,用于将待渲染的图形切分为至少两个图形渲染任务,并将所述至少两个图形渲染任务通过所述总线传输至所述至少一个电子设备中的一个。
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