WO2021136014A1 - 一种安全计算控制方法、数据包处理方法、装置及其系统 - Google Patents

一种安全计算控制方法、数据包处理方法、装置及其系统 Download PDF

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Publication number
WO2021136014A1
WO2021136014A1 PCT/CN2020/138355 CN2020138355W WO2021136014A1 WO 2021136014 A1 WO2021136014 A1 WO 2021136014A1 CN 2020138355 W CN2020138355 W CN 2020138355W WO 2021136014 A1 WO2021136014 A1 WO 2021136014A1
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Prior art keywords
data packet
data
security
message
algorithm
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PCT/CN2020/138355
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English (en)
French (fr)
Inventor
刘杰
王海波
王国强
徐毓斌
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中兴通讯股份有限公司
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Priority to EP20910529.5A priority Critical patent/EP4075743A4/en
Priority to US17/758,086 priority patent/US20230033312A1/en
Publication of WO2021136014A1 publication Critical patent/WO2021136014A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/606Protecting data by securing the transmission between two devices or processes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • H04L49/9057Arrangements for supporting packet reassembly or resequencing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40Network security protocols
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00Network architectures or network communication protocols for network security
    • H04L63/20Network architectures or network communication protocols for network security for managing network security; network security policies in general
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00Network architectures or network communication protocols for network security
    • H04L63/20Network architectures or network communication protocols for network security for managing network security; network security policies in general
    • H04L63/205Network architectures or network communication protocols for network security for managing network security; network security policies in general involving negotiation or determination of the one or more network security mechanisms to be used, e.g. by negotiation between the client and the server or between peers or by selection according to the capabilities of the entities involved

Definitions

  • This application relates to the field of information security, and in particular to secure computing control methods, data packet processing methods, devices and systems.
  • improving the efficiency of the algorithm itself is a consideration, that is, through pipeline processing, parallel computing, large data bit width processing, etc., to enhance the processing capability of a single algorithm.
  • the overhead when switching between data packets is reduced, thereby improving the algorithm efficiency of the entire data stream.
  • how to efficiently use the algorithm core, improve the processing efficiency of the data packet and the algorithm core, and improve the efficiency of the multi-level processing security algorithm is rarely involved.
  • the embodiments of the present application provide a secure computing control method and a data packet processing method, which can improve the efficiency of data packet processing and reduce the processing time of the data packet.
  • an embodiment of the present application provides a secure computing control method, including: receiving a first data packet message for secure computing from a processor, wherein the first data packet message includes data packet information and Security calculation configuration information corresponding to the data packet information; obtaining corresponding first data packet data from the memory according to the data packet information of the first data packet message; according to the security calculation corresponding to the first data packet message
  • the configuration information selects the corresponding security algorithm; performs security calculation processing on the first data packet data through the selected security algorithm, and generates the second data packet data after the security calculation and the second data corresponding to the second data packet data.
  • Data packet message sending the second data packet data to the memory; sending the second data packet message to the processor.
  • the embodiment of the present application also provides a data packet processing method, which is applied to a data packet processing system.
  • the system includes: a processor, a secure computing control device, and a memory.
  • the processor is connected to the memory, and the method includes: the processor sends a first data packet message used for safety calculation to a safety computing control device, wherein the first data packet message includes data packet information and The secure computing configuration information corresponding to the data packet information; the secure computing control device obtains corresponding first data packet data from the memory according to the data packet information of the first data packet message; the secure computing control device The corresponding security algorithm is selected according to the security calculation configuration information corresponding to the first data packet; the security calculation control device performs security calculation processing on the first packet data through the security algorithm, and generates the security calculation The second data packet data of the second data packet and the second data packet corresponding to the second data packet data, and the second data packet data is output to the memory; the safety computing control device sends the first data packet to the processor 2.
  • Data packet message is selected according to the security
  • an embodiment of the present application also provides a secure computing control device, including: a management module configured to receive a first data packet message for secure computing from a processor, wherein the first data packet message The message includes data packet information and security computing configuration information corresponding to the data packet information; and sends a second data packet message to the processor; a control module, connected to the management module, reports according to the first data packet
  • the data packet information of the text obtains the corresponding first data packet data from the memory; selects and calls the corresponding security algorithm according to the security calculation configuration information corresponding to the first data packet;
  • the data packet data is subjected to security calculation processing to generate the second data packet data after the security calculation and a second data packet message corresponding to the second data packet data; and the second data packet data is sent to the memory.
  • an embodiment of the present application also provides a secure computing control device, including: a storage device, a processing unit, and a computer program stored on the storage device and running on the processing unit, the processing unit When the computer program is executed, the above-mentioned safe computing control method is realized.
  • an embodiment of the present application also provides a data packet processing system, including: a memory; a processor connected to the memory; the above-mentioned secure computing control device is connected to the processor and the memory respectively.
  • an embodiment of the present application also provides a data packet processing system, including: a memory, a processor, a secure computing control device respectively connected to the memory and the processor, and a device stored in the memory and available on the The computer program running on the processor implements the aforementioned data packet processing method when the processor executes the computer program.
  • an embodiment of the present application also provides a storage medium that stores a computer program, and the computer program is used to execute the above-mentioned secure computing control method or the above-mentioned data packet processing method.
  • Figure 1 is a schematic frame diagram of a traditional secure computing system
  • Figure 2 is a schematic diagram of a system environment for secure computing control and data packet processing according to an embodiment of the application
  • FIG. 3 is an overall flowchart of a safe computing control method according to an embodiment of the present application.
  • FIG. 4 is an overall flowchart of a data packet processing method according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of modules of a safety computing control device according to an embodiment of the application.
  • FIG. 6 is a schematic frame diagram of a safety computing control device according to an embodiment of the application.
  • FIG. 7 is a schematic structural diagram of an encryption engine according to an embodiment of the application.
  • FIG. 8 is a schematic diagram of a parallel work flow of an encryption engine according to an embodiment of the application.
  • FIG. 9 is a flowchart of a data packet processing method according to an embodiment of the application.
  • Fig. 10 is a schematic diagram of a secure computing control device according to an embodiment of the application.
  • multiple means two or more, greater than, less than, exceeding, etc. are understood to not include the number, and above, below, and within are understood to include the number. If there are descriptions of "first”, “second”, etc., which are only used to distinguish technical features, they cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the indicated The precedence of technical characteristics.
  • the security computing control and processing related methods, devices, and systems of this application are improved and optimized on the traditional secure computing system, and part of the data packet processing functions are executed from the processor 101 (that is, the software is executed through the processor 101, It is equivalent to the software environment), released to the hardware to complete, and realize the combination of software and hardware. In this way, the purpose of reducing the delay of data packet processing in the entire computing environment is achieved.
  • the secure computing control device 104 is the main unit used to improve the efficiency and performance of data packet processing.
  • the entire data packet processing system can include 4 parts:
  • the processor 101 encapsulates and sends a data packet message, where the data packet message includes data packet information that requires safe calculation and safe calculation configuration information corresponding to the data packet information.
  • the secure computing control device 104 may be referred to as a control device or a controller for short herein, and those skilled in the art can understand it as a control device for controlling secure computing, especially for controlling the secure computing of data packets.
  • the secure computing control device 104 accesses data packet data to the memory 102 according to the data packet message through the process and each unit described below, and performs accelerated processing on the data packet.
  • One to N algorithm cores 103 can also be referred to as a security algorithm in this article, which completes the realization of specific security calculations.
  • the memory 102 mainly stores data of the algorithm core 103 and data packet data.
  • Fig. 3 is an overall flowchart of a safe computing control method according to an embodiment of the application. As shown in FIG. 3, this method can be applied to the aforementioned secure computing control device 104 to perform hardware acceleration processing on data packets, including but not limited to the following steps:
  • Step S301 Receive a first data packet message used for secure computing from the processor 101, where the first data packet message includes data packet information and secure computing configuration information corresponding to the data packet information;
  • Step S302 Acquire corresponding first data packet data from the memory 102 according to the data packet information of the first data packet message;
  • Step S303 Select a corresponding security algorithm according to the security calculation configuration information corresponding to the first data packet;
  • Step S304 Perform security calculation processing on the first data packet data through the selected security algorithm, and generate second data packet data after the security calculation and a second data packet message corresponding to the second data packet data;
  • Step S305 Send the second data packet data to the memory 102;
  • Step S306 Send the second data packet message to the processor 101.
  • the processor 101 may be a central processing unit of a general-purpose computer, or an embedded processor or a microprocessor used for specific tasks.
  • the memory 102 may be an external memory or a storage part integrated in the hardware.
  • the method in this embodiment may be a control flow or control logic for hardware, but it should be understood that it may also be a control flow for software.
  • a queue method is used to further improve the interaction efficiency between software and hardware.
  • the receiving of the first data packet message used for safe calculation from the processor 101 in step S301 may include: receiving one or more first data packet messages used for the safe calculation from the processor 101, The one or more first data packets constitute a packet input queue 5011.
  • Performing security calculation processing on the first data packet data through the selected security algorithm in step S304 may include: according to the message input queue 5011, according to the security algorithm pair corresponding to each of the first data packet data The first data packet data is subjected to security calculation processing.
  • the sending of the second data packet message to the processor 101 in step S306 includes: obtaining a second data packet message corresponding to the one or more first data packet messages, and converting the second data packet message Packet messages form a message output queue 5012, and the message output queue 5012 is sent to the processor 101.
  • the second data packet message may include information about completed data packet tasks, such as data packet information processed by secure computing and secure computing processing information corresponding to the data packet information.
  • the following methods can be used to efficiently allocate hardware resources. Specifically, according to the sequence of each first data packet message in the input queue 5011, one or more free secure computing space resources are allocated for secure computing processing; and according to the security data corresponding to each first data packet The algorithm performs security calculation processing on the first data packet data.
  • multiple secure computing space resources can be built in the hardware, such as the encryption engine 5031 described below, through reasonable deployment, all hardware resources are fully used to accelerate the secure computing of data packets.
  • the output queue 5012 after processing needs to be kept corresponding to the order of the input queue 5011, so that proper order-preserving processing can be used, for example, A sequence-preserving label is added to each data packet to perform sequence-preserving output after the safety calculation is completed.
  • the data packet information of the first data packet message includes segmentation information of the data packet
  • the first data packet data includes segmentation data corresponding to the segmentation information
  • step S302 may specifically include:
  • the data packet segmentation information acquires the segment data of the corresponding data packet from the memory 102, and splices the segment data to generate data packet buffer data.
  • the spliced data can be processed immediately, and at the same time, the remaining segmented data in the memory 102 can be continuously accessed, thereby forming a pipeline operation, effectively shortening the processing time of the data packet.
  • step S303 may specifically include: selecting corresponding one or more security algorithms from the memory 102 according to the security calculation configuration information corresponding to the first data packet, and combining the one or Multiple security algorithms are allocated to the secure computing space resources.
  • the security calculation configuration information of the first data packet message includes the security algorithm information to be selected, the processing sequence information of the security algorithm, and the security algorithm configuration information.
  • Step S303 may include: selecting and acquiring corresponding one or more security algorithms from the memory 102 according to the security calculation configuration information corresponding to the first data packet.
  • Performing secure calculation processing on the first data packet data through the selected security algorithm in step S304 may include: according to the secure calculation configuration information, in accordance with the processing sequence of the security algorithm, through the selected one or more security algorithms Perform single-level security calculations or multi-level security calculations on the data packet buffer data.
  • a single-level security calculation is performed on the data packet cache data through a selected security algorithm, or a multi-level security calculation is performed on the data packet cache data through a plurality of selected security algorithms.
  • Multi-level secure computing refers to the use of multiple security algorithms to perform multi-level secure computing processing on the first packet data.
  • the first-level secure computing uses an encryption algorithm for encryption processing
  • the second-level secure computing uses an authentication algorithm for processing.
  • Authentication processing Multi-level security calculations can be further subdivided into level-by-level secure calculations and non-level-by-level secure calculations. For example, after the first level of encryption processing is completed, the second level of authentication processing is not required according to actual needs, and the third level is directly skipped.
  • Single-level secure computing refers to a single-level secure computing process for the first data packet using only one security algorithm. For example, for processing some data packets, only an encryption algorithm needs to be called for encryption processing.
  • a corresponding secure computing control device including: a storage device 1001, a processing unit 1002, and a storage device 1001 that is stored on the storage device 1001 and can run on the processing unit 1002 A computer program.
  • the processing unit 1002 can implement the above-mentioned safe computing control method when the computer program is executed.
  • FIG. 4 is an overall flowchart of a data packet processing method according to an embodiment of the application, which can be applied to the data packet processing system in FIG. 2.
  • the system includes: a processor 101, a secure computing control device 104, and a memory 102.
  • the computing control device 104 is connected to the processor 101 and the memory 102 respectively.
  • the method includes but is not limited to the following steps:
  • Step S401 The processor 101 sends a first data packet message for safety calculation to the safety computing control device 104, where the first data packet message includes data packet information and safety computing configuration information corresponding to the data packet information ;
  • Step S402 The secure computing control device 104 obtains corresponding first data packet data from the memory 102 according to the data packet information of the first data packet message;
  • Step S403 The secure computing control device 104 selects the corresponding algorithm core 103 (that is, the secure algorithm) according to the secure computing configuration information corresponding to the first data packet;
  • Step S404 The safety computing control device 104 performs safety computing processing on the first data packet data through the algorithm core 103, and generates second data packet data after safety calculation and a second data packet corresponding to the second data packet data Message, and output the second data packet data to the memory 102;
  • Step S405 The secure computing control device 104 sends the second data packet message to the processor 101.
  • the data packet processing method of this embodiment is applied to the entire data packet processing system as shown in FIG. 2 to perform efficient processing of a combination of software and hardware on data packets.
  • FIG. 5 is a schematic diagram of modules in the secure computing control device 104 according to an embodiment of the application. As shown in FIG. 5, the secure computing control device 104 includes:
  • the management module 401 is configured to receive a first data packet message used for secure computing from the processor 101, where the first data packet message includes data packet information and secure computing configuration information corresponding to the data packet information; And send a second data packet message to the processor 101;
  • the control module 402 is connected to the management module 401, and obtains corresponding first data packet data from the memory 102 according to the data packet information of the first data packet message; according to the security calculation configuration corresponding to the first data packet message Information selection calls the corresponding security algorithm; the security calculation process is performed on the first data packet data through the selected security algorithm, and the second data packet data after the security calculation and the second data corresponding to the second data packet data are generated Data packet message; and send the second data packet data to the memory 102.
  • the management module 401 includes:
  • the queue management unit 501 includes: an input queue, which composes one or more of the first data packet messages into a message input queue; an output queue, which corresponds to the first data packet of one or more first data packets; Two data packet messages form a message output queue to send the output queue to the processor 101;
  • the task management unit 502 is connected to the queue management unit 501, and performs sequence preserving processing on each first data packet message according to the order of each first data packet message in the input queue, and inputs each first data packet message in the queue
  • the data packet message is allocated to one or more encryption engines of the control module 402 for security calculation processing; and the second data packet message is sent to the output queue of the queue management unit 501;
  • the control module 402 includes:
  • the encryption control unit 503 includes one or more encryption engines.
  • the encryption engine selects and invokes the corresponding one or more security algorithms according to the security calculation configuration information of the first data packet, and according to each of the first data packets.
  • a security algorithm corresponding to the data packet data performs security calculation processing on the first packet data.
  • the corresponding one or more security algorithms are read from the memory 102;
  • the arbitration selector 504 connected to the encryption control unit 503, is configured to establish a routing link between one or more encryption engines of the encryption control unit and the selected one or more security algorithms according to the allocated first data packet message .
  • the secure computing control device 104 of this embodiment can be applied to the data packet processing system shown in FIG. 2. Those skilled in the art can understand that the secure computing control device 104 can also be applied to other hardware environments or environments that require secure computing or a combination of software and hardware to efficiently control the secure computing processing of data packets.
  • FIG. 6 is a more specific schematic internal framework diagram of the secure computing control device 104 according to an embodiment of the application. As shown in Figure 6, it includes the following units:
  • the queue management unit 501 includes an input queue 5011 and an output queue 5012.
  • the input queue 5011 includes one or more first data packet messages received from the processor 101 for safe computing, wherein the first data packet message
  • the message includes data packet information and security computing configuration information corresponding to the data packet information
  • the output queue 5012 includes a second data packet message processed by the secure computing, and is configured to send the second data to the processor 101 Packet message.
  • the task management unit 502 is connected to the queue management unit 501, and is configured to perform sequence preserving processing on the received one or more first data packet messages, and to perform sequence preserving processing on the one or more first data packet messages subjected to the sequence preserving processing
  • the encryption engine 5031 allocated to the encryption control unit 503 performs security calculation processing, and sends the second data packet to the queue management unit 501;
  • the encryption control unit 503 is connected to the task management unit 502.
  • the encryption control unit 503 includes one or more encryption engines 5031, and the encryption engines 5031 are configured to read according to the allocated data packet information of the first data packet message. Fetch the corresponding first data packet data from the memory 102, and at the same time select and read the corresponding one or more security algorithms from the memory 102 according to the security calculation configuration information of the allocated first data packet;
  • the one or more security algorithms perform security calculation processing on the allocated first data packet data to generate the second data packet data after the security calculation and a second data packet message corresponding to the second data packet data, and Sending the second data packet data to the memory 102;
  • the arbitration selector 504, connected to the encryption control unit 503, is configured to establish a connection between one or more encryption engines 5031 of the encryption control unit 503 and the selected one or more security algorithms according to the allocated first data packet message Routing link.
  • the secure computing control device 104 can be implemented as an application specific integrated circuit (ASIC), a programmable logic device, a system-on-chip (SOC), etc., and the above-mentioned hardware control logic can be written in a solidification or programming manner.
  • ASIC application specific integrated circuit
  • SOC system-on-chip
  • the queue management unit 501 is used for interaction with the processor 101, which can be understood as interaction with software via the processor 101 in essence.
  • the input queue 5011 stores task information of the data packet to be processed, that is, the one or more first data packet messages. It can be judged according to the status of the queue whether there are tasks to be processed. When the status of the input queue 5011 is not empty, one or more first data packets are extracted from the input queue 5011 and sent to the task management unit 502.
  • the output queue 5012 stores the data packet task information for which the safety calculation has been completed, that is, the second data packet message. After the safety calculation is completed, the task management unit 502 sends it to the output queue 5012 for subsequent follow-up. Processing.
  • the task management unit 502 is used for order preserving processing and scheduling processing.
  • order-preserving processing exemplarily, a sequence-preserving label is added to each first data packet message, so that the sequence-preserving output can be performed after the safety calculation is completed.
  • the device or the entire system including the device can support order-preserving processing.
  • the first data packet messages can be allocated to the idle encryption engine 5031 according to their order in the input queue (for example, the encryption engine has completed the last security calculation Task, so it is in the idle state), because there may be multiple encryption engines 5031, the order in which they are in the idle state is uncertain, so when the data packet security calculation corresponding to multiple first data packets is completed in multiple encryption engines 5031 Later, through the order-preserving label, the order of each first data packet in the input queue can be restored, and output to the output queue, so that the processor can subsequently call and process the data packets in sequence.
  • the task management unit 502 applies to the encryption control unit 503 for an idle encryption engine 5031.
  • the task management unit 502 will output the pending data packet security calculation tasks in the queue 5012 (Ie, one or more first data packet messages) are distributed to the one or more encryption engines 5031, so as to realize scheduling.
  • the secure computing space resources such as the encryption engine 5031 are fully utilized, so that multiple sets of encryption engines 5031 can be processed in parallel, which improves the efficiency of data packet processing, and at the same time improves the scalability of the device or the entire system including the device .
  • the encryption control unit 503 is used to complete the control and data processing of secure calculations such as encryption, decryption, authentication, and additional authentication of the data packet.
  • the encryption control unit 503 may include M sets of encryption engines 5031 to process multiple data packets in parallel. Each encryption engine 5031 controls and completes multi-level or single-level security algorithm operations.
  • FIG. 7 is a schematic structural diagram of an encryption engine 5031 according to an embodiment of the application.
  • the encryption engine 5031 of the encryption control unit 503 corresponds to the secure computing space resources of the foregoing method, and the encryption engine 5031 may include the following subunits:
  • the data group packet subunit 601 is configured to read the segment data of the corresponding data packet from the memory 102 according to the data packet segmentation information, and to splice the segment data to generate data packet buffer data;
  • the data management subunit 602 is connected to the data group packet subunit 601, matches the applicable security algorithm with the data packet buffer data, and sends the data packet buffer data to the algorithm adaptation subunit 603 according to the matching result;
  • Multiple algorithm adaptation subunits 603 are connected to the data management subunit 602, and multiple algorithm adaptation subunits 603 are connected step by step.
  • the algorithm adaptation subunits 603 of each level are configured to be configured according to the selected security algorithm and the first A data packet message, the data packet buffered data is routed to the applicable security algorithm for multi-stage operation or single-stage operation, and the final stage, for example, the J-level algorithm adaptation subunit 603 of FIG.
  • the calculated second data packet data is sent to the output subunit 604; in this document, the security algorithm may also be referred to as the algorithm core 103.
  • the output subunit 604 is connected to the last-stage algorithm adaptation subunit 603, and is configured to send the second data packet data processed by the secure calculation to the memory 102.
  • the data packet information of the first data packet message includes segmentation information of the data packet
  • the first data packet data includes segmentation data corresponding to the segmentation information
  • the time of accessing from the memory is saved by two paths in parallel.
  • the data packet subunit 601 can read from the memory 102 in parallel. Segment data to achieve parallel processing.
  • the data group packet subunit 601 also reads the segmented data of the memory 102 in a pipeline, and then splices the segmented data through splicing technology, and finally sends the spliced data packet buffer data to all levels of algorithms through the data management subunit 602
  • the adaptation subunit 603 realizes centralized processing of data.
  • the data packet subunit 601 performs data packet by splicing segmented data, and at the same time, buffers the assembled data packet data through the data management subunit 602. Assigned to the algorithm adaptation subunit 603.
  • the time for data packet processing is effectively shortened.
  • the algorithm adaptation subunit 603 allocates the data packet buffer data to each corresponding algorithm core 103 for safe calculation processing, and sends the second data packet data processed by the safe calculation to the output subunit 604.
  • a pipeline operation may be performed on the packet buffer data between the algorithm adaptation subunits 603 at all levels.
  • the security calculation of the algorithm core 103 can be started.
  • the packet buffer data then flows in the algorithm adaptation subunits 603 at all levels. For the data that can be shared by the algorithm core 103 of the algorithm adaptation subunits 603 at all levels, it is cached level by level through the pipeline operation; for the algorithms at all levels Different data that needs to be processed separately by the algorithm core 103 of the adaptation subunit 603 can be separately sent to the algorithm adaptation subunit 603 for separate processing through the data management subunit 602.
  • Single-stage processing sending data to the assigned algorithm core 103 of a single algorithm adapting subunit 603, if only encryption is required;
  • Step-by-step processing in multi-level processing the data is sent to the algorithm core 103 assigned to the first-level algorithm adaptation subunit 603 for processing, and then sent to the lower level after the processing is completed, so as to realize the step-by-level caching to the subsequent level.
  • the first level calls the encryption algorithm for encryption
  • the second level calls the authentication algorithm for authentication
  • Non-gradual processing in multi-level processing directly forward the data to the subsequent algorithm adaptation unit without sending it to the algorithm core 103 allocated by the algorithm adaptation subunit 603 of the current level. For example, when the algorithm core 103 of this level does not need Participate in safe calculations.
  • the encryption engine 5031 of the present application compared with all levels of algorithm adaptation word units individually reading data packet buffer data, processing time is effectively saved, and the calculation performance of the multi-level security algorithm is greatly improved.
  • related configuration information such as the key and context required by the algorithm core 103 is processed in parallel with the data packet data, which saves time and overhead compared with the serial method.
  • the arbitration selector 504 completes the arbitration and routing link between the encryption control unit 503 and the algorithm core 103.
  • the arbitration selector 504 establishes the routing relationship between the encryption control unit 503 and the algorithm core 103, and completes the arbitration of the algorithm core 103.
  • the routing between M sets of encryption engines 5031 and N algorithm cores 103 is established through the data packet information of the first data packet message and the secure computing configuration information, especially the secure algorithm processing sequence information in the secure computing configuration information relationship. Since the algorithm core 103 is equivalent to a resource pool, M sets of encryption engines 5031 actually share N algorithm cores 103.
  • the use of the algorithm core 103 is guaranteed through arbitration, for example, After the processing of each level of algorithm adaptation subunit 603 in the current encryption engine 5031 is completed, the algorithm core 103 can be released for use by other encryption engines 5031 or next time.
  • the arbitration selector 504 may also forward the packet buffer data to the next-level algorithm adaptation subunit 603 for processing.
  • the secure computing control device 104 of this embodiment can be applied to the data packet processing system shown in FIG. 2.
  • the data packet processing system may include: a processor 101; a memory 102; and a secure computing control device 104, which are respectively connected to the processor 101 and the memory 102.
  • the processor 101 of the data packet processing system only needs to process light-weight tasks.
  • the processor 101 can encapsulate the first data packet message according to the data format of the hardware, which is subsequently interpreted by the encryption engine 5031 to obtain Message content.
  • the data packet to be securely calculated can support multiple data segments.
  • the processor 101 does not require the processor 101 to form a complete data packet and then send it to the hardware.
  • the secure computing control device 104 of this embodiment processes it, and the packaged data packet The task is moved down to the hardware to complete, which improves the performance of the entire system.
  • the processor 101 sends the encapsulated data packet information to the secure computing control device 104, specifically, as shown in FIG. 6, to the input queue 5011 of the queue management unit 501 of the secure computing control device 104.
  • the software and hardware interaction is completed through the queue, which is simple and efficient.
  • FIG. 9 it is a flowchart of an exemplary application scenario of a data packet processing system according to an embodiment of the present application.
  • the structure of the secure computing system of the data packet is as described above.
  • Step 801 The processor 101 encapsulates the first data packet message
  • Step 802 The processor 101 sends the first data packet to the input queue 5011 of the secure computing control device 104;
  • Step 803 The security computing control device 104 determines whether there is a first data packet message in the input queue 5011, that is, the data packet security computing task;
  • step 804 if the determination in step 803 is true, the secure computing control device 104 extracts one or more first data packet messages from the input queue 5011, the first data packet messages including data packet information and corresponding to the data packet Information security calculation configuration information;
  • Step 805 The secure computing control device 104 performs sequence preservation processing on the extracted one or more first data packets and sends them to the idle encryption engine 5031;
  • Step 806 the encryption engine 5031 interprets the encapsulated first data packet message
  • Step 807 The encryption engine 5031 configures the interpreted data packet information and secure computing configuration information of the first data packet message to each subunit;
  • Step 808, the encryption engine 5031 reads one or more algorithm core 103 information from the memory 102;
  • step 809 the encryption engine 5031 uses the arbitration selector 504 to establish a routing link between the one or more algorithm cores 103 and one or more algorithm adaptation subunits 603 according to the interpreted data packet information and secure calculation configuration information;
  • Step 810 in parallel with step 809, the encryption engine 5031 reads the segmented data from the memory 102 in a pipeline, and performs data grouping through the grouping subunit;
  • Step 811 Determine whether the algorithm core 103 is ready, and whether there is packet cache data in the encryption engine 5031;
  • step 812 if it is judged to be true in step 811, the data packet buffered data is sent to the corresponding algorithm core 103 for security calculation in a multi-stage or single-stage among the algorithm adaptation subunits 603 of all levels;
  • Step 813 Determine whether the second data packet data that has been safely calculated is cached in the last-level algorithm adaptation subunit 603;
  • Step 814 if it is judged as true in step 813, write the second data packet data into the memory 102 in a pipeline;
  • Step 815 Judge whether all the data of the second data packet has been written into the memory 102;
  • step 816 if the determination in step 815 is true, the secure computing control device 104 performs sequence preservation processing on the second data packet corresponding to the second data packet data, and sends it to the output queue 5012;
  • step 817 the secure computing control device 104 interacts with the processor 101 via the output queue 5012, and sends the second data packet to the processor 101.
  • the network-side IPSEC (Internet Protocol Security) protocol when it processes data packets, it may use ESP (Encapsulating Security Payload) encryption algorithm, ESP authentication algorithm, and AH (Authentication Header). Authentication algorithm, at this time, a maximum of 3 algorithm cores 103 are required to complete the security calculation.
  • the ZUC f9 authentication algorithm and the ZUC F8 encryption algorithm may be used. At this time, a maximum of two algorithm cores 103 are required to complete the secure calculation.
  • the secure computing control device 104 and the data packet processing system according to the embodiments of the present application are suitable for efficient use of multi-level security algorithms, improve the processing efficiency of the cooperation of data packets and the algorithm core 103, and improve the efficiency of multi-level processing security algorithms.
  • the secure computing control device 104 and the data packet processing system adopt various methods such as task scheduling management, centralized processing of data packets, and resource sharing during secure computing, using data splicing technology, parallel computing, and multi-level security algorithm shared storage processing, etc.
  • the combination of technologies can efficiently realize the processing of data packets and reduce the processing time of data packets.
  • a computer-readable storage medium which stores a computer program, and the computer program is used to execute the above-mentioned secure computing control method or the above-mentioned data packet processing method.
  • the embodiment of the application includes: obtaining a first data packet message from a processor, obtaining corresponding first data packet data from a memory, selecting a corresponding security algorithm, performing packet grouping and security calculation processing on the first data packet data, and generating The second data packet data after safe calculation and the corresponding second data packet message.
  • part of the process or environment of data packet processing is executed from software via the processor and released to the hardware to complete, and the interaction between the software and the hardware is accelerated through the queue on the hardware; the data packet is processed by segmentation To release the software load to improve the performance of the entire secure computing system; to centrally process data packets through pipeline processing and splicing technology to improve the efficiency of access from external storage; through pipelined parallel processing among algorithm adaptation units at all levels , Especially the safe calculation of multi-level algorithms, greatly reducing the time of data packet processing.
  • the time for data packet processing can be saved, the processing efficiency of the system can be improved, and the overall secure computing performance can be improved.
  • the embodiments of the present application have good processing performance, flexibility, and scalability, and can meet computing scenarios of different protocols and different security algorithms.
  • the device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • computer storage medium includes volatile and non-volatile data implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data).
  • Information such as computer-readable instructions, data structures, program modules, or other data.
  • Computer storage media include but are not limited to RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or Any other medium used to store desired information and that can be accessed by a computer.
  • communication media usually include computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as carrier waves or other transmission mechanisms, and may include any information delivery media. .

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Abstract

一种安全计算控制方法、数据包处理方法、装置及其系统。该方法包括:接收来自处理器的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息(S301);根据所述第一数据包报文的数据包信息获取来自存储器的对应的第一数据包数据(S302);根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法(S303);通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文(S304);向所述存储器发送所述第二数据包数据(S305);向所述处理器发送所述第二数据包报文(S306)。

Description

一种安全计算控制方法、数据包处理方法、装置及其系统
相关申请的交叉引用
本申请基于申请号为201911421497.3、申请日为2019年12月31日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及信息安全领域,尤其涉及安全计算控制方法、数据包处理方法、装置及其系统。
背景技术
在通讯或信息安全领域,随着网络和通信的大发展,信息交换和传播的速度越来越快,因此信息安全显得愈发重要,即保证数据传输的机密性、完整性、抗抵赖、鉴别等能力。在此基础上,出现了大量的安全算法和安全协议,几乎在每一个网络传输协议栈中,都可以看到与安全相关的算法和协议。
但安全带来的另一个问题就是效率,由于安全算法都要涉及对数据的处理,而且还要经过各类复杂的运算才能达到一定的安全标准,因此会消耗较多的系统资源,进而影响整个通信系统的处理能力。所以如何高效的进行安全算法的处理就显得尤为重要。
在传统效率提升方法中,提升算法本身的效率是一种考虑方向,即通过流水线处理、并行计算、大数据位宽处理等方式,来增强单一算法的处理能力。另外通过密钥保留、共享上下文等方式,减少数据包之间切换时的开销,从而提升整条数据流的算法效率。但对于如何高效利用算法核,提升数据包和算法核配合的处理效率、并对多级处理的安全算法进行效率提升,却鲜有涉及。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
一方面,本申请实施例提供了一种安全计算控制方法及数据包处理方法,能够提升数据包处理效率,缩减数据包的处理时间。
另一方面,本申请实施例提供了一种安全计算控制方法,包括:接收来自处理器的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;根据所述第一数据包报文的数据包信息获取来自存储器的对应的第一数据包数据;根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法;通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文;向所述存储器发送所述第二数据包数据;向所述处理器发送所述第二数据包报文。
另一方面,本申请实施例还提供了一种数据包处理方法,应用于数据包处理系统,所述系统包括:处理器、安全计算控制装置、存储器,其中所述安全计算控制装置分别与所述处理器和所述存储器连接,所述方法包括:所述处理器向安全计算控制装置发送用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;所述安全计算控制装置根据所述第一数据包报文的数据包信息,获取来自存储器的对应的第一数据包数据;所述安全计算控制装置根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法;所述安全计算控制装置通过所述安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后 的第二数据包数据及对应所述第二数据包数据的第二数据包报文,并向所述存储器输出第二数据包数据;所述安全计算控制装置向所述处理器发送所述第二数据包报文。
另一方面,本申请实施例还提供了一种安全计算控制装置,包括:管理模块,配置为接收来自处理器的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;并向所述处理器发送第二数据包报文;控制模块,与所述管理模块连接,根据所述第一数据包报文的数据包信息获取来自存储器的对应的第一数据包数据;根据对应所述第一数据包报文的安全计算配置信息选择调用相应的安全算法;通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文;并向所述存储器发送所述第二数据包数据。
另一方面,本申请实施例还提供了一种安全计算控制装置,包括:存储装置、处理单元及存储在所述存储装置上并可在所述处理单元上运行的计算机程序,所述处理单元执行所述计算机程序时实现上述的安全计算控制方法。
另一方面,本申请实施例还提供了一种数据包处理系统,包括:存储器;处理器,与所述存储器连接;上述的安全计算控制装置,分别与所述处理器和存储器连接。
另一方面,本申请实施例还提供了一种数据包处理系统,包括:存储器、处理器、分别与所述存储器和处理器连接的安全计算控制装置,以及存储在所述存储器上并可在所述处理器上运行的计算机程序,所述处理器执行所述计算机程序时实现上述的数据包处理处理方法。
再一方面,本申请实施例还提供了一种存储介质,存储有计算机程序,所述计算机程序用于执行上述的安全计算控制方法或用于执行上述的数据包处理方法。
本申请的其他特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本申请而了解。本申请的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本申请技术方案的进一步理解,并且构成说明书的一部分,与本申请的实施例一起用于解释本申请的技术方案,并不构成对本申请技术方案的限制。
图1为传统的安全计算系统的示意性框架图
图2为本申请一个实施例的用于安全计算控制和数据包处理的系统环境示意图
图3是本申请一个实施例的安全计算控制方法的整体流程图;
图4是本申请一个实施例的数据包处理的方法的整体流程图;
图5为本申请一个实施例的安全计算控制装置的模块示意图;
图6为本申请一个实施例的安全计算控制装置的示意性的框架图;
图7为本申请一个实施例的加密引擎的示意性结构图;
图8为本申请一个实施例的加密引擎的并行工作流程示意图;
图9为本申请一个实施例的数据包处理的方法流程图;
图10为本申请一个实施例的安全计算控制装置的示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本申请进行进一步详细说明。应当理解,此处所描述的具体实施例仅用以解释本申请,并不用于限定本申请。
应了解,在本申请实施例的描述中,多个(或多项)的含义是两个以上,大于、小于、超过等理解为不包括本数,以上、以下、以内等理解为包括本数。如果有描述到“第一”、“第二”等只是 用于区分技术特征为目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或者隐含指明所指示的技术特征的先后关系。
在通讯或信息安全领域,需要大量的基于安全算法的安全计算。由于安全算法都要涉及对数据,特别是对数据包的处理,而且还要经过各类复杂的运算才能达到一定的安全标准,因此会消耗较多的系统资源,进而影响整个通信系统的处理能力。所以如何高效的进行安全算法的处理就显得尤为重要。此外,还需要考虑,如何高效利用算法核,提升数据包和算法核配合的处理效率、并对多级处理的安全算法进行效率提升。
下面根据附图对本申请的实施方式进行详细说明。
在传统的安全计算系统中,如图1所示,所有与安全计算有关的运算,均在处理器101内完成,例如中央处理器(CPU)从存储器102存取需要安全计算的数据,调用1到N个的安全算法(也可称为算法核103),在CPU内完成安全计算。在这种计算环境下,即使能提高单个算法核103的效率,但由于CPU工作负荷太大,整个安全计算系统的性能和效率仍受制于CPU。
本申请的安全计算控制和处理的相关方法、装置和系统是在传统的安全计算系统上进行改进和优化,将对数据包处理的部分功能从处理器101(即软件通过处理器101来执行,相当于软件环境),释放到硬件来完成,实现软硬结合。以此来达到减小整个计算环境使数据包处理延时的目的。如图2所示的软硬结合的数据包处理系统,其中的安全计算控制装置104就是用来提升数据包处理效率和性能的主要单元。
参照图2,整个数据包处理系统可包括4部分:
处理器101,将数据包报文进行封装和发送,其中所述数据包报文包括需要安全计算的数据包信息和对应所述数据包信息的安全计算配置信息。
安全计算控制装置104,在本文中可简称为控制装置或控制器,本领域技术人员可理解为用于控制安全计算,特别是用于控制数据包的安全计算的控制装置。安全计算控制装置104通过下文所述的流程和各单元,根据所述数据包报文,向存储器102存取数据包数据,针对数据包进行加速处理。
1到N个的算法核103,在本文中也可称为安全算法,完成具体的安全计算的实现。
存储器102,主要存储算法核103的数据以及数据包数据。
下文将基于图2的环境,更详细地描述所述安全计算控制装置104的工作流程和具体结构。
图3为本申请一个实施例的安全计算控制方法的整体流程图。如图3所示,该方法可应用于上述的安全计算控制装置104,以对数据包进行硬件加速处理,包括但不限于以下步骤:
步骤S301:接收来自处理器101的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;
步骤S302:根据所述第一数据包报文的数据包信息获取来自存储器102的对应的第一数据包数据;
步骤S303:根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法;
步骤S304:通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文;
步骤S305:向所述存储器102发送所述第二数据包数据;
步骤S306:向所述处理器101发送所述第二数据包报文。
基于硬件的高速、并行运算的优势,上述的一个或多个步骤可并行进行。
其中,所述处理器101可以为通用计算机的中央处理器,或用于特定任务的嵌入式处理器,微 处理器等。存储器102可以为外部存储器,或集成于硬件内部的存储部分。
在一些实施方式中,本实施例的方法可为针对硬件的控制流程或控制逻辑,但应理解,也可为针对软件的控制流程。
在一些实施方式中,采用队列的方式来进一步提升软件和硬件之间的交互效率。具体地,步骤S301中的接收来自处理器101的用于安全计算的第一数据包报文,可包括:接收来自处理器101的用于安全计算的一个或多个第一数据包报文,所述一个或多个第一数据包报文组成报文输入队列5011。步骤S304中的通过所选择的安全算法对所述第一数据包数据进行安全计算处理,可包括:依据所述报文输入队列5011,根据每个所述第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理。步骤S306中的向所述处理器101发送所述第二数据包报文,包括:获取对应所述一个或多个第一数据包报文的第二数据包报文,将所述第二数据包报文组成报文输出队列5012,向所述处理器101发送所述报文输出队列5012。其中,所述第二数据包报文可包括已完成的数据包任务的信息,例如经安全计算处理的数据包信息和对应该数据包信息的安全计算处理信息。
在一些实施方式中,可采用以下手段来高效调配硬件的资源。具体地,根据所述输入队列5011中的各个第一数据包报文的顺序,分配一个或多个空闲安全计算空间资源用于安全计算处理;以及根据与每个第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理。其中,硬件中可构建有多个安全计算空间资源,如下文所述的加密引擎5031,通过合理的调配,充分地使用了所有硬件资源来加速对数据包的安全计算。由于对数据包报文按队列管理,并按资源情况来灵活调配,因此,处理完后的输出队列5012,需与输入队列5011的顺序保持对应,由此可采用合适的保序处理,例如,针对每个数据包报文添加保序标签,以在安全计算完成后进行保序输出。
在一些实施方式中,可采用拼接技术,在硬件环境中实现高效和集中的组包。具体地,所述第一数据包报文的数据包信息包括数据包的分段信息,所述第一数据包数据包括与所述分段信息对应的分段数据,步骤S302具体可包括:根据所述数据包分段信息获取来自所述存储器102的对应的数据包的分段数据,并对所述分段数据进行拼接,生成数据包缓存数据。拼接好后的数据可立即往下处理,并同时继续存取存储器102中的剩余的分段数据,从而形成流水式的操作,有效缩短数据包的处理时间。
在硬件环境中,可并行进行安全算法和数据包数据的读取,以进一步缩短数据包的处理时间。在一些实施方式中,步骤S303可具体包括:根据对应所述第一数据包报文的安全计算配置信息,选择来自所述存储器102的相应的一个或多个安全算法,并将所述一个或多个安全算法分配到所述安全计算空间资源。
在一些实施方式中,采用逐级缓存,多级并行,流水线式的处理方式,减少对存储器102的读取次数,实现高效的数据包安全计算处理。具体地,所述第一数据包报文的安全计算配置信息包括待选择的安全算法信息、安全算法的处理顺序信息、安全算法配置信息。步骤S303可包括:根据对应所述第一数据包报文的安全计算配置信息选择获取来自所述存储器102的相应的一个或多个安全算法。步骤S304中的通过所选择的安全算法对所述第一数据包数据进行安全计算处理可包括:根据所述安全计算配置信息,按照安全算法的处理顺序,通过所选择的一个或多个安全算法对所述数据包缓存数据进行单级安全计算或多级安全计算。示例性地,通过所选择的一个安全算法对所述数据包缓存数据进行单级安全计算,或通过所选择的多个安全算法对所述数据包缓存数据进行多级安全计算。多级安全计算是指使用多种安全算法对第一数据包数据进行多级的安全计算处理,例如,第一级安全计算使用了加密算法进行加密处理,第二级安全计算调用了认证算法进行认证处理。多级安全计算还可再细分为逐级安全计算和不逐级安全计算,例如在完成第一级的加密处理后,按实 际需求无需进行第二级的认证处理,而直接跳到第三级的处理。单级安全计算是指仅使用一种安全算法对第一数据包数据进行单级的安全计算处理,例如,有些数据包的处理,仅需要调用加密算法进行加密处理。
根据本申请的一个实施例还提供了一种对应的安全计算控制装置,如图10所示,包括:存储装置1001、处理单元1002及存储在存储装置1001上并可在处理单元1002上运行的计算机程序,处理单元1002执行所述计算机程序时可实现上述的安全计算控制方法。
图4为本申请一个实施例的数据包处理方法的整体流程图,可应用于图2中的数据包处理系统,所述系统包括:处理器101、安全计算控制装置104、存储器102,其中安全计算控制装置104分别与处理器101和存储器102连接。如图4所示,所述方法包括但不限于以下步骤:
步骤S401:处理器101向安全计算控制装置104发送用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;
步骤S402:安全计算控制装置104根据所述第一数据包报文的数据包信息,获取来自存储器102的对应的第一数据包数据;
步骤S403:安全计算控制装置104根据对应所述第一数据包报文的安全计算配置信息选择相应的算法核103(即安全算法);
步骤S404:安全计算控制装置104通过算法核103对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文,并向存储器102输出第二数据包数据;
步骤S405:安全计算控制装置104向处理器101发送所述第二数据包报文。
在一些实施方式中,本实施例的数据包处理方法应用于如图2所示的整个数据包处理系统,以对数据包进行软硬结合的高效处理。
图5为本申请一个实施例的安全计算控制装置104内的模块示意图。如图5所示,安全计算控制装置104包括:
管理模块401,配置为接收来自处理器101的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;并向所述处理器101发送第二数据包报文;
控制模块402,与管理模块401连接,根据所述第一数据包报文的数据包信息获取来自存储器102的对应的第一数据包数据;根据对应所述第一数据包报文的安全计算配置信息选择调用相应的安全算法;通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文;并向所述存储器102发送所述第二数据包数据。
在一些实施方式中,管理模块401包括:
队列管理单元501,包括:输入队列,将一个或多个所述第一数据包报文组成报文输入队列;输出队列,将对应一个或多个所述第一数据包报文的所述第二数据包报文,组成报文输出队列,以向处理器101发送所述输出队列;
任务管理单元502,与队列管理单元501连接,根据所述输入队列中的各个第一数据包报文的顺序,对各个第一数据包报文进行保序处理,将输入队列中的各个第一数据包报文分配到控制模块402的一个或多个加密引擎进行安全计算处理;并将所述第二数据包报文发送到队列管理单元501的输出队列;
控制模块402包括:
加密控制单元503,包括一个或多个加密引擎,所述加密引擎依据所述第一数据包报文的安全计算配置信息,选择调用相应的一个或多个安全算法,根据与每个所述第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理,在一些实施方式中,从存储器102读取的相应的一个或多个安全算法;
仲裁选择器504,与加密控制单元503连接,配置为根据所分配的第一数据包报文,建立加密控制单元的一个或多个加密引擎和选择的一个或多个安全算法之间的路由链接。
本实施例的安全计算控制装置104可应用在如图2所示的数据包处理系统中。本领域技术人员可理解,该安全计算控制装置104也可应用于于其他需要安全计算的硬件环境或软硬结合的环境中,以对数据包安全计算处理进行高效的控制。
图6为本申请一个实施例的安全计算控制装置104的更具体的示意性的内部框架图。如图6所示,包括以下单元:
队列管理单元501,包括输入队列5011和输出队列5012,所述输入队列5011包括接收自处理器101的用于安全计算的一个或多个第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;所述输出队列5012包括经安全计算处理的第二数据包报文,配置为向所述处理器101发送所述第二数据包报文。
任务管理单元502,与队列管理单元501连接,配置为对接收的所述一个或多个第一数据包报文进行保序处理,将经保序处理的一个或多个第一数据包报文分配至加密控制单元503的加密引擎5031进行安全计算处理,以及将所述第二数据包报文发送到队列管理单元501;
加密控制单元503,与任务管理单元502连接,所述加密控制单元503包括一个或多个加密引擎5031,所述加密引擎5031配置为:根据所分配的第一数据包报文的数据包信息读取来自存储器102的对应的第一数据包数据,同时根据所分配的第一数据包报文的安全计算配置信息选择读取来自存储器102的相应的一个或多个安全算法;通过所选择的所述一个或多个安全算法对所分配的第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文,并向所述存储器102发送第二数据包数据;
仲裁选择器504,与加密控制单元503连接,配置为根据所分配的第一数据包报文,建立加密控制单元503的一个或多个加密引擎5031和选择的一个或多个安全算法之间的路由链接。
在一些实施方式中,安全计算控制装置104可实施为专用集成电路(ASIC),可编程逻辑器件,片上系统(SOC)等,通过固化或编程的方式,写入上述硬件控制逻辑。
在一些实施方式中,队列管理单元501用于与处理器101的交互,实质上可理解为经由处理器101与软件的交互。其中,输入队列5011存储待处理的数据包任务信息,即所述一个或多个第一数据包报文。可根据队列的状态判断是否存有待处理任务,当输入队列5011的状态非空时,从输入队列5011中提取一个或多个第一数据包报文发送给任务管理单元502。在一些实施方式中,输出队列5012存储已完成安全计算的数据包任务信息,即所述第二数据包报文,当完成安全计算后,由任务管理单元502发送到输出队列5012,以便进行后续的处理。
在一些实施方式中,任务管理单元502用于保序处理和调度处理。在保序处理中,示例性地,为每个第一数据包报文添加保序标签,以使得在安全计算完成后可进行保序输出。基于安全算法和协议的共性考虑,该装置或包括该装置的整个系统可支持保序处理。添加保序标签后,示例性地,使得所述各个第一数据包报文可按照其在输入队列中的顺序,被分配至空闲的加密引擎5031中(例如该加密引擎已完成上一安全计算任务,因此处于空闲状态),由于可能有多个加密引擎5031,它们处于空闲状态的次序不定,因此当对应多个第一数据包报文的数据包安全计算在多个加密引擎 5031中先后完成后,通过保序标签,可还原各个第一数据包报文在输入队列中的顺序,输出至输出队列,以便处理器后续也按序调用和处理数据包。在调度处理中,示例性地,假设加密控制单元503设有M套加密引擎5031,则任务管理单元502对空闲的加密引擎5031向加密控制单元503进行申请。当存在有一个或多个空闲的加密引擎5031,例如当该一个或多个加密引擎5031已完成之前分配的安全计算时,任务管理单元502将输出队列5012中的待处理的数据包安全计算任务(即一个或多个第一数据包报文)分配至该一个或多个加密引擎5031中,从而实现调度。通过调度处理,充分利用了加密引擎5031这样的安全计算空间资源,使得多套加密引擎5031可并行处理,提升对数据包处理的效率,同时提高了该装置或包括该装置的整个系统的扩展性。
在一些实施方式中,加密控制单元503用于完成对数据包的加密、解密、认证、额外认证等安全计算的控制和数据处理。如图4-5所示,加密控制单元503可包括M套加密引擎5031,以并行处理多个数据包。每套加密引擎5031控制并完成多级或单级的安全算法的运算。
图7为本申请一个实施例的加密引擎5031的示意性结构图。如图7所示,加密控制单元503的加密引擎5031与前述方法的安全计算空间资源对应,加密引擎5031可包括以下子单元:
数据组包子单元601,配置为根据所述数据包分段信息读取来自所述存储器102的对应的数据包的分段数据,并对所述分段数据进行拼接,生成数据包缓存数据;
数据管理子单元602,与数据组包子单元601连接,对适用的安全算法和所述数据包缓存数据进行匹配,根据匹配结果,将所述数据包缓存数据发送至算法适配子单元603;
多个算法适配子单元603,与数据管理子单元602连接,且多个算法适配子单元603之间逐级连接,各级算法适配子单元603配置为根据所选择的安全算法和第一数据包报文,将所述数据包缓存数据路由至适用的安全算法进行多级运算或单级运算,并由最后级,例如由图7的第J级算法适配子单元603将经安全计算处理的第二数据包数据发送至输出子单元604;在本文中,安全算法也可称为算法核103。
输出子单元604,与最后级算法适配子单元603连接,配置为向所述存储器102发送经安全计算处理的第二数据包数据。
其中,所述第一数据包报文的数据包信息包括数据包的分段信息,所述第一数据包数据包括与所述分段信息对应的分段数据。
在一些实施方式中,通过两路并行节省从存储器存取的时间。具体地,如图8的加密引擎5031的并行工作流程示意图的T2时刻所示,在加密引擎5031启动从存储器102读取算法核103时,数据组包子单元601可配合并行地从存储器102读取分段数据,实现并行处理。数据组包子单元601还通过流水式地读取存储器102的分段数据,再通过拼接技术对分段数据进行拼接,最后通过数据管理子单元602将拼接好的数据包缓存数据发送给各级算法适配子单元603,实现数据的集中处理。
具体地,如图8中的T2-T5时间段所示,数据组包子单元601在通过拼接分段数据进行数据组包的同时,将已组好的数据包缓存数据陆续通过数据管理子单元602分配给算法适配子单元603。通过并行处理、数据拼接、数据集中管理等多种技术手段相结合,有效缩短了数据包处理的时间。
在一些实施方式中,算法适配子单元603将数据包缓存数据分配给各个相应的算法核103进行安全计算处理,并将经安全计算处理的第二数据包数据发送至输出子单元604。对于需要多级安全算法的安全计算,可以在各级算法适配子单元603之间对数据包缓存数据进行流水式的操作。
如图8中的T4时刻所示,当算法核103准备就绪,且当数据包缓存数据也准备就绪,就可以启动算法核103的安全计算。数据包缓存数据随即在各级算法适配子单元603中流动起来,对于各级算法适配子单元603的算法核103能够共享的数据,通过流水操作逐级向后级缓存;对于各级算 法适配子单元603的算法核103需要单独处理的不同的数据,可通过数据管理子单元602单独发送给进行单独处理的算法适配子单元603。
示例性地,各级算法适配子单元603中只要存有数据,且下级算法适配子单元603准备就绪,即可输出给下级处理,具体可分为三种情况:
单级处理:将数据发送给单个算法适配子单元603所被分配的算法核103,如仅需要加密;
多级处理中的逐级处理:将数据发送给第1级算法适配子单元603所被分配的算法核103进行处理,并且在处理完成后随即往下级发送,实现逐级向后级缓存,如第1级调用加密算法进行加密,第2级调用认证算法进行认证;
多级处理中的非逐级处理:直接将数据转发给后级算法适配单元而不发送至本级算法适配子单元603所被分配的算法核103,如当本级算法核103不需要参与安全计算。
由此,让各级算法核103并行工作,大大提升了数据的利用率,同时,当最后一级算法适配子单元603有输出数据时,送给输出子单元604进行处理,通过流水的方式将经安全计算处理的第二数据包数据写到存储器102中。这样,在输入和输出数据的过程,也是并行操作,如图8中的T4-T6时间段所示。
根据本申请的加密引擎5031的结构,相比各级算法适配字单元单独读取数据包缓存数据,有效节省了处理时间,极大的提升多级安全算法的计算性能。同时,算法核103需要的密钥、上下文等相关配置信息,和数据包数据并行处理,相比较串行方式节省了时间开销。
在一些实施方式中,仲裁选择器504完成加密控制单元503和算法核103之间的仲裁和路由链接。仲裁选择器504建立加密控制单元503和算法核103的路由关系,并完成对算法核103的仲裁。具体地,通过第一数据包报文的数据包信息和安全计算配置信息,特别是安全计算配置信息中的安全算法处理顺序信息,建立M套加密引擎5031和N个算法核103之间的路由关系。由于算法核103相当于一个资源池,M套加密引擎5031实际共享N个算法核103,当一个算法核103被多个加密引擎5031同时申请调用时,通过仲裁保证算法核103的使用,例如在当前加密引擎5031中的每级算法适配子单元603处理完成后即可以释放算法核103,供其它加密引擎5031或下次使用。在算法核103的安全计算过程中,仲裁选择器504还可将数据包缓存数据转发到下一级算法适配子单元603进行处理。
再参照图2,本实施例的安全计算控制装置104可应用在如图2所示的数据包处理系统中。数据包处理系统可包括:处理器101;存储器102;安全计算控制装置104,分别与所述处理器101和存储器102连接。
在一些实施方式中,所述数据包处理系统的处理器101仅需要处理轻量的工作,处理器101可按照硬件的数据格式封装第一数据包报文,后续由加密引擎5031进行解释以获取报文内容。待进行安全计算的数据包可以支持多个数据分段,不需要处理器101将各分段组成完整数据包后再送给硬件,例如本实施例的安全计算控制装置104处理,而将组包的任务下移给硬件完成,提升了整个系统的性能。
处理器101将封装后的数据包信息发送给安全计算控制装置104,具体地如图6所示,发送给安全计算控制装置104的队列管理单元501的输入队列5011。通过队列完成软硬件的交互,简单高效。
参照图9,为根据本申请一个实施例的数据包处理系统的示例性应用场景的流程图。
所述数据包的安全计算系统的结构如前所述。
步骤801,处理器101封装第一数据包报文;
步骤802,处理器101将第一数据包报文发送到安全计算控制装置104的输入队列5011;
步骤803,安全计算控制装置104判断输入队列5011中是否有第一数据包报文,即数据包安全计算任务;
步骤804,若步骤803判断为真,安全计算控制装置104从输入队列5011中提取一个或多个第一数据包报文,所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;
步骤805,安全计算控制装置104将提取的一个或多个第一数据包报文进行保序处理并发送给空闲的加密引擎5031;
步骤806,加密引擎5031对经封装的第一数据包报文进行解释;
步骤807,加密引擎5031将经解释的第一数据包报文的数据包信息和安全计算配置信息配置到各子单元;
步骤808,加密引擎5031从存储器102读取一个或多个算法核103信息;
步骤809,加密引擎5031根据经解释的数据包信息和安全计算配置信息,利用仲裁选择器504在一个或多个算法核103和一个或多个算法适配子单元603之间建立路由链接;
步骤810,与步骤809并行地,加密引擎5031流水式地从存储器102读取分段数据,经由组包子单元进行数据组包;
步骤811,判断算法核103是否已准备就绪,且加密引擎5031中是否缓存有数据包缓存数据;
步骤812,若步骤811判断为真,在各级算法适配子单元603之间,多级或单级地,将数据包缓存数据发送至相应的算法核103进行安全计算;
步骤813,判断最后一级算法适配子单元603中是否缓存有经安全计算的第二数据包数据;
步骤814,若步骤813判断为真,流水式地将第二数据包数据写入存储器102;
步骤815,判断将第二数据包数据是否已全部写入存储器102;
步骤816,若步骤815判断为真,安全计算控制装置104将对应第二数据包数据的第二数据包报文进行保序处理,发送到输出队列5012;
步骤817,安全计算控制装置104经由输出队列5012与处理器101交互,将第二数据包报文发送给处理器101。
在应用中,网络侧IPSEC(互联网协议安全性)协议对数据包进行处理时,可能要使用到ESP(Encapsulating Security Payload,封装安全载荷)加密算法、ESP认证算法及AH(Authentication Header,认证头)认证算法,这时最大需要3种算法核103来完成安全计算。而无线侧PDCP协议对数据包进行处理时,可能使用到ZUC f9认证算法以及ZUC F8的加密算法,这时最大需要2种算法核103来完成安全计算。根据本申请实施例的安全计算控制装置104和数据包处理系统适合于多级安全算法的高效利用,提升数据包和算法核103配合的处理效率、并对多级处理的安全算法进行效率提升。
在基站无线接入系统中,对网络侧的IP(Internet Protocol,互联网协议)层和无线侧PDCP(Packet Data Convergence Protocol,分组数据汇聚协议)层的安全处理的应用上,根据本申请实施例的安全计算控制装置104和数据包处理系统,在安全计算时,通过任务调度管理、数据包集中处理、资源共享等方法,采用数据拼接技术、并行计算、以及多级安全算法共享存储处理等多种技术相结合,高效地实现对数据包处理,减小数据包的处理时间。
此外,根据本申请的一个实施例还提供了一种计算机可读存储介质,存储有计算机程序,所述计算机程序用于执行上述的安全计算控制方法或用于执行上述的数据包处理方法。
本申请实施例包括:从处理器获取第一数据包报文,并从存储器获取对应的第一数据包数据, 选择相应的安全算法,对第一数据包数据进行组包和安全计算处理,生成经安全计算后的第二数据包数据及对应的第二数据包报文。基于本申请实施例的技术方案,将数据包处理的部分流程或环境从软件经由处理器执行,释放到硬件来完成,还通过硬件上的队列加速软件和硬件的交互;通过数据包分段处理来释放软件的负荷从而提升整个安全计算系统的性能;通过流水线处理和拼接技术对数据包进行集中处理从而提升从外部存储存取的效率;通过在各级算法适配单元间流水式的并行处理,特别是对多级算法的安全计算,大大减小了数据包处理的时间。总体而言,通过本申请实施例,可节省数据包处理的时间、提升系统的处理效率,从而提升整体的安全计算性能。本申请实施例,处理性能佳、灵活、可扩展性好,可以满足不同协议和不同的安全算法的计算场景。
以上所描述的装置实施例仅仅是示意性的,其中作为分离部件说明的单元可以是或者也可以不是物理上分开的,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
本领域普通技术人员可以理解,上文中所公开方法中的全部或某些步骤、系统可以被实施为软件、固件、硬件及其适当的组合。某些物理组件或所有物理组件可以被实施为由处理器,如处理器、数字信号处理器或微处理器执行的软件,或者被实施为硬件,或者被实施为集成电路,如专用集成电路或可编程逻辑器件。这样的软件可以分布在计算机可读介质上,计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的,术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外,本领域普通技术人员公知的是,通信介质通常包括计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据,并且可包括任何信息递送介质。
以上是对本申请的较佳实施进行了具体说明,但本申请并不局限于上述实施方式,熟悉本领域的技术人员在不违背本申请精神的前提下还可作出种种的等同变形或替换,这些等同的变形或替换均包含在本申请权利要求所限定的范围内。

Claims (14)

  1. 一种安全计算控制方法,包括:
    接收来自处理器的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;
    根据所述第一数据包报文的数据包信息获取来自存储器的对应的第一数据包数据;
    根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法;
    通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文;
    向所述存储器发送所述第二数据包数据;
    向所述处理器发送所述第二数据包报文。
  2. 根据权利要求1所述的安全计算控制方法,其中,所述接收来自处理器的用于安全计算的第一数据包报文,包括:
    接收来自处理器的用于安全计算的一个或多个第一数据包报文,所述一个或多个第一数据包报文组成报文输入队列;
    所述通过所选择的安全算法对所述第一数据包数据进行安全计算处理,包括:
    依据所述报文输入队列,根据每个所述第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理;
    所述向所述处理器发送所述第二数据包报文,包括:
    获取对应所述一个或多个第一数据包报文的第二数据包报文,将所述第二数据包报文组成报文输出队列,向所述处理器发送所述报文输出队列。
  3. 根据权利要求2所述的安全计算控制方法,其中,所述依据所述报文输入队列,根据每个所述第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理,还包括:
    根据所述输入队列中的各个第一数据包报文的顺序,分配一个或多个空闲安全计算空间资源用于安全计算处理;
    根据每个所述第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理。
  4. 根据权利要求1所述的安全计算控制方法,其中,所述第一数据包报文的数据包信息包括数据包的分段信息,所述第一数据包数据包括与所述分段信息对应的分段数据,所述的根据所述第一数据包报文的数据包信息获取来自所述存储器的对应的第一数据包数据的步骤包括:
    根据所述数据包分段信息获取来自所述存储器的对应的数据包的分段数据,并对所述分段数据进行拼接,生成数据包缓存数据。
  5. 根据权利要求3所述的安全计算控制方法,其中,所述的根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法的步骤包括:
    根据对应所述第一数据包报文的安全计算配置信息,选择来自所述存储器的相应的一个或多个安全算法,并将所述一个或多个安全算法分配到所述安全计算空间资源。
  6. 根据权利要求4所述的安全计算控制方法,其中,所述第一数据包报文的安全计算配置信息包括待选择的安全算法信息、安全算法的处理顺序信息、安全算法配置信息;
    所述的根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法包括:
    根据对应所述第一数据包报文的安全计算配置信息选择获取来自所述存储器的相应的一个或多个安全算法;
    所述的通过所选择的安全算法对所述第一数据包数据进行安全计算处理包括:
    根据所述安全计算配置信息,按照安全算法的处理顺序,通过所选择的一个安全算法对所述数据包缓存数据进行单级安全计算,或通过所选择的多个安全算法对所述数据包缓存数据进行多级安全计算。
  7. 一种数据包处理方法,应用于数据包处理系统,包括:处理器、安全计算控制装置、存储器,其中所述安全计算控制装置分别与所述处理器和所述存储器连接,所述方法包括:
    所述处理器向安全计算控制装置发送用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;
    所述安全计算控制装置根据所述第一数据包报文的数据包信息,获取来自存储器的对应的第一数据包数据;
    所述安全计算控制装置根据对应所述第一数据包报文的安全计算配置信息选择相应的安全算法;
    所述安全计算控制装置通过所述安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文,并向所述存储器输出第二数据包数据;
    所述安全计算控制装置向所述处理器发送所述第二数据包报文。
  8. 一种安全计算控制装置,包括:
    管理模块,配置为接收来自处理器的用于安全计算的第一数据包报文,其中所述第一数据包报文包括数据包信息和对应所述数据包信息的安全计算配置信息;并向所述处理器发送第二数据包报文;
    控制模块,与所述管理模块连接,根据所述第一数据包报文的数据包信息获取来自存储器的对应的第一数据包数据;
    所述控制模块根据对应所述第一数据包报文的安全计算配置信息选择调用相应的安全算法;
    所述控制模块通过所选择的安全算法对所述第一数据包数据进行安全计算处理,生成经安全计算后的第二数据包数据及对应所述第二数据包数据的第二数据包报文;并向所述存储器发送所述第二数据包数据。
  9. 根据权利要求8所述的安全计算控制装置,其中:
    所述管理模块包括:
    队列管理单元,包括:输入队列,将一个或多个所述第一数据包报文组成报文输入队列;输出队列,将对应一个或多个所述第一数据包报文的所述第二数据包报文,组成报文输出队列,以向所述处理器发送所述输出队列;
    任务管理单元,与所述队列管理单元连接,根据所述输入队列中的各个第一数据包报文的顺序,对各个第一数据包报文进行保序处理,将输入队列中的各个第一数据包报文分配到控制模块的一个或多个加密引擎进行安全计算处理;并将所述第二数据包报文发送到队列管理单元的输出队列;
    所述控制模块包括:
    加密控制单元,包括一个或多个加密引擎,所述加密引擎依据所述第一数据包报文的安全计算配置信息,选择调用相应的一个或多个安全算法,根据与每个所述第一数据包数据对应的安全算法对所述第一数据包数据进行安全计算处理;
    仲裁选择器,与所述加密控制单元连接,配置为根据所分配的第一数据包报文,建立加密控制单元的一个或多个加密引擎和选择的一个或多个安全算法之间的路由链接。
  10. 根据权利要求9所述的安全计算控制装置,其中,所述第一数据包报文的数据包信息包括 数据包的分段信息,所述第一数据包数据包括与所述分段信息对应的分段数据,所述加密引擎包括:
    数据组包子单元,根据所述数据包分段信息读取来自所述存储器的对应的数据包的分段数据,并对所述分段数据进行拼接,生成数据包缓存数据;
    数据管理子单元,与所述数据组包子单元连接,对适用的安全算法和所述数据包缓存数据进行匹配,根据匹配结果,将所述数据包缓存数据发送至算法适配子单元;
    多个算法适配子单元,与所述数据管理子单元连接,且多个算法适配子单元之间逐级连接,各级算法适配子单元配置为根据所选择的安全算法和第一数据包报文,将所述数据包缓存数据路由至适用的安全算法进行多级运算或单级运算,并由最后级算法适配子单元将经安全计算处理的第二数据包数据发送至输出子单元;
    输出子单元,与最后级算法适配子单元连接,配置为向所述存储器发送经安全计算处理的第二数据包数据。
  11. 一种安全计算控制装置,包括:存储装置、处理单元及存储在所述存储装置上并可在所述处理单元上运行的计算机程序,所述处理单元执行所述计算机程序时实现根据权利要求1至6中任一项所述的安全计算控制方法。
  12. 一种数据包处理系统,包括:
    存储器;
    处理器,与所述存储器连接;
    根据权利要求8至10中任一项所述的安全计算控制装置,分别与所述处理器和存储器连接。
  13. 一种数据包处理系统,包括:存储器、处理器、分别与所述存储器和处理器连接的安全计算控制装置,以及存储在所述存储器上并可在所述处理器上运行的计算机程序,所述处理器执行所述计算机程序时实现根据权利要求7所述的数据包处理方法。
  14. 一种存储介质,存储有计算机程序,所述计算机程序用于执行根据权利要求1至6中任意一项所述的安全计算控制方法或用于执行根据权利要求7所述的数据包处理方法。
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