WO2021128903A1 - 加快读取现场可更换单元信息的方法、系统、设备及介质 - Google Patents

加快读取现场可更换单元信息的方法、系统、设备及介质 Download PDF

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Publication number
WO2021128903A1
WO2021128903A1 PCT/CN2020/111234 CN2020111234W WO2021128903A1 WO 2021128903 A1 WO2021128903 A1 WO 2021128903A1 CN 2020111234 W CN2020111234 W CN 2020111234W WO 2021128903 A1 WO2021128903 A1 WO 2021128903A1
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information
data structure
field replaceable
node data
replaceable unit
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PCT/CN2020/111234
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English (en)
French (fr)
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梁盛楠
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苏州浪潮智能科技有限公司
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Priority to US17/757,977 priority Critical patent/US20230014098A1/en
Publication of WO2021128903A1 publication Critical patent/WO2021128903A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/105—Program control for peripheral devices where the programme performs an input/output emulation function
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2022—Flash memory

Definitions

  • the present invention relates to the field of port identification, and more specifically, to a method, system, computer equipment and readable medium for accelerating the reading of information of field replaceable units.
  • BMC Baseboard Management Controller
  • FRU Field Replacement Unit, field replaceable unit
  • the common method is to directly read data from the FRU's EEPROM (Electrically erasable programmable read-only memory) for each read and write, which is slower.
  • EEPROM Electrical erasable programmable read-only memory
  • the purpose of the embodiments of the present invention is to provide a method, system, computer equipment, and computer-readable storage medium for accelerating the reading of information of field replaceable units.
  • one aspect of the embodiments of the present invention provides a method for accelerating the reading of information of field replaceable units, including the following steps: creating a virtual bus of field replaceable units in memory; based on each field replaceable unit Respectively construct a node data structure, and mount the node data structure on the virtual bus; determine whether an instruction to read the information of the field replaceable unit is received; and in response to receiving the read field replaceable unit The instruction of the unit information determines the position of the field replaceable unit on the virtual bus, and reads the information of the field replaceable unit at the position.
  • the separately constructing the node data structure based on the information of each field replaceable unit includes: acquiring the addresses of the electrically erasable programmable read-only memory of all replaceable units, and reading each data structure separately according to the address.
  • the electrically erasable programmable read-only memory; and the binary information in the electrically erasable programmable read-only memory is converted into character string data, and a corresponding node data structure is constructed based on the character string data.
  • it further includes: setting unique identification information in the node data structure, and establishing a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, and mapping the The relationship is written to the mapping table.
  • the method further includes: checking every predetermined time whether the node data structure on the virtual bus completely corresponds to the mapping table; and responding to the fact that the node data structure on the virtual bus does not correspond to the mapping table. Completely correspond, update the mapping table.
  • it further includes: encapsulating the virtual bus and the node data structure into a dynamic link library.
  • a system for accelerating the reading of information of field replaceable units including: a virtual bus module configured to create a virtual bus of the field replaceable unit in a memory; and a node data structure module , Configured to separately construct a node data structure based on the information of each field replaceable unit, and mount the node data structure on the virtual bus; the information reading module is configured to determine whether the read field data structure is received An instruction to replace the information of the unit; and in response to receiving an instruction to read the information of the field replaceable unit, determine the position of the field replaceable unit on the virtual bus, and read the position of the field replaceable unit Information about the replacement unit.
  • the node data structure module is further configured to: obtain the addresses of the electrically erasable programmable read-only memories of all replaceable units, and read each of the electrically erasable programmable read-only memories according to the addresses. Reading the memory; and converting the binary information in the electrically erasable programmable read-only memory into character string data, and constructing a corresponding node data structure based on the character string data.
  • it further includes: a mapping module configured to set unique identification information in the node data structure, and establish a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, And write the mapping relationship into the mapping table.
  • a mapping module configured to set unique identification information in the node data structure, and establish a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, And write the mapping relationship into the mapping table.
  • a computer device including: at least one processor; and a memory.
  • the memory stores computer instructions that can run on the processor, and the instructions are executed by the processor.
  • the processor implements the steps of the above method when executed.
  • a computer-readable storage medium stores a computer program that implements the steps of the above method when executed by a processor.
  • the present invention has the following beneficial technical effects: by persisting a virtual bus in the memory, when the FRU information needs to be displayed through IPMI commands or other software services need to read the FRU information, only the corresponding virtual bus in the memory needs to be searched.
  • the device is enough, the reading speed is faster than the actual service EERPOM hardware, which can significantly speed up the reading and writing speed of FRU information.
  • FIG. 1 is a schematic diagram of an embodiment of a method for accelerating reading information of a field replaceable unit provided by the present invention
  • FIG. 2 is a schematic diagram of the hardware structure of an embodiment of a method for accelerating reading of information of a field replaceable unit provided by the present invention.
  • Fig. 1 shows a schematic diagram of an embodiment of a method for accelerating the reading of information of a field replaceable unit provided by the present invention.
  • the embodiment of the present invention includes the following steps:
  • the FRU virtual bus management module daemon (hereinafter referred to as fru-vbd) is first started to create a virtual bus structure in the memory; then it traverses the EEPROM of all FRU devices, reads the information in the EEPROM, and constructs software data according to the rules Structure, each FRU device forms its own independent structure; finally, all structures are connected to the FRU virtual bus to form a complete bus data structure. Later, when you need to display FRU information through IPMI commands or when other software services need to read FRU information, you only need to find the corresponding device on the FRU virtual bus in the memory. The reading speed is much faster than the actual service EERPOM hardware.
  • the fru-vbd process is responsible for maintenance, adding, modifying or deleting FRU node information on the bus.
  • the node data structure is constructed separately, and the node data structure is mounted on the virtual bus.
  • the separately constructing the node data structure based on the information of each field replaceable unit includes: acquiring the addresses of the electrically erasable programmable read-only memory of all replaceable units, and reading each of them according to the address The electrically erasable programmable read-only memory; and the binary information in the electrically erasable programmable read-only memory is converted into character string data, and a corresponding node data structure is constructed based on the character string data.
  • the fru-vbd process first obtains all FRU EEPROM addresses from the configuration file, then traverses these addresses, reads each FRU EEPROM in turn, translates the binary information in it into human-readable string data, and builds the corresponding FRU based on this Node data structure. Hang the constructed FRU node data structure on the virtual bus to form a complete bus plus node data structure.
  • the method further includes: setting unique identification information in the node data structure, and establishing a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, and mapping the The relationship is written to the mapping table.
  • the information contained in the data structure of the FRU node may include: unique identification information uuid, unique bus address, and so on.
  • the mapping relationship between the name of the field replaceable unit and the corresponding node data structure can be established, so that the unique identification information of the corresponding FRU node data can be known through the FRU device name for subsequent search.
  • the unique identification information of the corresponding FRU node data can be known through the FRU device name, so as to determine the position of the field replaceable unit on the virtual bus, and then read the information of the corresponding field replaceable unit.
  • the method further includes: checking every predetermined time whether the node data structure on the virtual bus completely corresponds to the mapping table; and responding to the fact that the node data structure on the virtual bus does not correspond to the mapping table. Completely correspond, update the mapping table.
  • the FRU device In order to prevent the FRU device from performing the plug-in operation, it is necessary to check the actual node data structure on the virtual bus. If the node data structure on the virtual bus cannot completely correspond to the mapping table, it means that the node data structure has changed. Update the mapping table.
  • it further includes: encapsulating the virtual bus and the node data structure into a dynamic link library.
  • Encapsulating the virtual bus and the node data structure into the libfruvbd.so dynamic link library can facilitate the invocation of other software services, and can implement the operations of querying and reading data from the FRU virtual software bus.
  • the second aspect of the embodiments of the present invention proposes a system for accelerating the reading of information of field replaceable units, including: a virtual bus module configured to create a virtual bus of the field replaceable unit in memory;
  • the node data structure module is configured to separately construct the node data structure based on the information of each field replaceable unit, and mount the node data structure to the virtual bus;
  • the information reading module is configured to determine whether it is received An instruction to read the information of a field replaceable unit; and in response to receiving an instruction to read the information of a field replaceable unit, determine the position of the field replaceable unit on the virtual bus, and read the position Information of the field replaceable unit.
  • the node data structure module is also configured to obtain the addresses of the electrically erasable programmable read-only memories of all replaceable units, read each of the electrically erasable programmable read-only memories according to the addresses; and transfer the electrically erasable programmable read-only memories
  • the binary information in the programmable read-only memory is converted into character string data, and a corresponding node data structure is constructed based on the character string data.
  • it further includes: a mapping module configured to set unique identification information in the node data structure, and establish a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, And write the mapping relationship into the mapping table.
  • a mapping module configured to set unique identification information in the node data structure, and establish a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, And write the mapping relationship into the mapping table.
  • the third aspect of the embodiments of the present invention proposes a computer device, including: at least one processor; and a memory.
  • the memory stores computer instructions that can run on the processor, and the instructions are executed by the processor. Realize the following steps: S1, create a virtual bus of field replaceable units in the memory; S2, construct a node data structure based on the information of each field replaceable unit, and mount the node data structures on the virtual bus; S3, Determine whether an instruction to read the information of the field replaceable unit is received; and S4, in response to receiving the instruction to read the information of the field replaceable unit, determine the position of the field replaceable unit on the virtual bus, and read the position Information on field replaceable units.
  • the separately constructing the node data structure based on the information of each field replaceable unit includes: acquiring the addresses of the electrically erasable programmable read-only memory of all replaceable units, and reading each data structure separately according to the address.
  • the electrically erasable programmable read-only memory; and the binary information in the electrically erasable programmable read-only memory is converted into character string data, and a corresponding node data structure is constructed based on the character string data.
  • the method further includes: setting unique identification information in the node data structure, and establishing a mapping relationship between the name of the field replaceable unit and the corresponding node data structure based on the unique identification information, and mapping the The relationship is written to the mapping table.
  • the method further includes: checking every predetermined time whether the node data structure on the virtual bus completely corresponds to the mapping table; and responding to the fact that the node data structure on the virtual bus does not correspond to the mapping table. Completely correspond, update the mapping table.
  • it further includes: encapsulating the virtual bus and the node data structure into a dynamic link library.
  • FIG. 2 it is a schematic diagram of the hardware structure of an embodiment of the method for accelerating the reading of information of a field replaceable unit provided by the present invention.
  • the device includes a processor 301 and a memory 302, and may also include an input device 303 and an output device 304.
  • the processor 301, the memory 302, the input device 303, and the output device 304 may be connected by a bus or in other ways. In FIG. 2, the connection by a bus is taken as an example.
  • the memory 302 as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the quick-read field replaceable unit in the embodiment of the present application
  • the information method corresponds to the program instruction/module.
  • the processor 301 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions, and modules stored in the memory 302, that is, to realize the acceleration of reading the information of the field replaceable unit in the above method embodiment Methods.
  • the memory 302 may include a storage program area and a storage data area, where the storage program area can store an operating system and an application program required by at least one function; the storage data area can store applications according to the method for accelerating the reading of the information of the field replaceable unit The created data, etc.
  • the memory 302 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state storage devices.
  • the memory 302 may optionally include a memory remotely provided with respect to the processor 301, and these remote memories may be connected to a local module through a network. Examples of the aforementioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
  • the input device 303 can receive the input user name and password and other information.
  • the output device 304 may include a display device such as a display screen.
  • One or more program instructions/modules corresponding to the method for accelerating the reading of field replaceable unit information are stored in the memory 302, and when executed by the processor 301, the accelerating reading of the field replaceable unit in any of the foregoing method embodiments is executed Information method.
  • Any embodiment of the computer device that executes the foregoing method for accelerating the reading of information of a field replaceable unit can achieve the same or similar effect as any of the foregoing corresponding method embodiments.
  • the present invention also provides a computer-readable storage medium, and the computer-readable storage medium stores a computer program that executes the above method when executed by a processor.
  • the program of the method for speeding up the method of reading the information of the field replaceable unit can be Stored in a computer readable storage medium, when the program is executed, it may include the processes of the above-mentioned method embodiments.
  • the storage medium of the program can be a magnetic disk, an optical disc, a read-only memory (ROM) or a random access memory (RAM), etc.
  • the foregoing computer program embodiment can achieve the same or similar effects as any of the foregoing method embodiments corresponding thereto.
  • the method disclosed according to the embodiment of the present invention may also be implemented as a computer program executed by a processor, and the computer program may be stored in a computer-readable storage medium.
  • the computer program executes the above-mentioned functions defined in the method disclosed in the embodiment of the present invention.
  • the above method steps and system units can also be implemented by a controller and a computer-readable storage medium for storing a computer program that enables the controller to implement the above steps or unit functions.
  • non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory Memory.
  • Volatile memory can include random access memory (RAM), which can act as external cache memory.
  • RAM can be obtained in many forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchronous link DRAM (SLDRAM) and direct Rambus RAM (DRRAM).
  • DRAM synchronous RAM
  • DRAM dynamic RAM
  • SDRAM synchronous DRAM
  • DDR SDRAM double data rate SDRAM
  • ESDRAM enhanced SDRAM
  • SLDRAM Synchronous link DRAM
  • DRRAM direct Rambus RAM
  • the storage devices of the disclosed aspects are intended to include, but are not limited to, these and other suitable types of memory.
  • DSP digital signal processors
  • ASIC application-specific integrated circuits
  • FPGA Field Programmable Gate Array
  • a general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine.
  • the processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP, and/or any other such configuration.
  • the steps of the method or algorithm described in combination with the disclosure herein may be directly included in hardware, a software module executed by a processor, or a combination of the two.
  • the software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
  • An exemplary storage medium is coupled to the processor such that the processor can read information from or write information to the storage medium.
  • the storage medium may be integrated with the processor.
  • the processor and the storage medium may reside in the ASIC.
  • the ASIC can reside in the user terminal.
  • the processor and the storage medium may reside as discrete components in the user terminal.
  • functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored as one or more instructions or codes on a computer-readable medium or transmitted through the computer-readable medium.
  • Computer-readable media include computer storage media and communication media, including any media that facilitates the transfer of a computer program from one location to another location.
  • a storage medium may be any available medium that can be accessed by a general-purpose or special-purpose computer.
  • the computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or may be used to carry or store instructions in the form of Or any other medium that can be accessed by a general-purpose or special-purpose computer or general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium.
  • coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave to send software from a website, server, or other remote source
  • coaxial cable Cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are all included in the definition of media.
  • magnetic disks and optical disks include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVD), floppy disks, and Blu-ray disks. Disks usually reproduce data magnetically, while optical disks use lasers to optically reproduce data. . Combinations of the above content should also be included in the scope of computer-readable media.
  • the program can be stored in a computer-readable storage medium.
  • the storage medium can be a read-only memory, a magnetic disk or an optical disk, etc.

Abstract

本发明公开了一种加快读取现场可更换单元的信息的方法、系统、设备和存储介质，方法包括以下步骤：在内存中创建现场可更换单元的虚拟总线；基于每个现场可更换单元的信息分别构建节点数据结构，并将所述节点数据结构均挂载到所述虚拟总线上；判断是否接收到读取现场可更换单元的信息的指令；以及响应于接收到读取现场可更换单元的信息的指令，确定所述现场可更换单元在所述虚拟总线上的位置，并读取所述位置上所述现场可更换单元的信息。本发明提出的加快读取现场可更换单元的信息的方法、系统、设备及介质通过在内存中持久化一个虚拟总线，可以显著加快FRU信息的读写速度，提升软件使用体验。

Description

加快读取现场可更换单元信息的方法、系统、设备及介质
本申请要求于2019年12月26日提交中国国家知识产权局，申请号为201911364252.1，发明名称为“加快读取现场可更换单元信息的方法、系统、设备及介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及端口识别领域，更具体地，特别是指一种加快读取现场可更换单元的信息的方法、系统、计算机设备及可读介质。
背景技术
BMC(Baseboard Management Controller，基板管理控制器)是白盒交换机主板上一种可以对CPU进行远程操作的控制芯片，是一套独立于交换机CPU端的系统，可以远程监控交换机系统上的一些性能指标，以及对交换机执行开关机操作、系统升级、设备查看等一系列操作。在服务器或白盒交换机上，需要通过BMC系统来读取机器上的FRU(Field Replace Unit，现场可更换单元)设备信息，查看硬件的相关信息。目前常用方法为每次读写直接从FRU的EEPROM(Electrically erasable programmable read-only memory，电可擦可编程只读存储器)存储其中读取数据，速度较慢。当遇到需要读取大量FRU信息时，信息显示时间较长。当有多个软件服务需要用到FRU信息时，每次都需要从EEPROM中读取数据，效率较低。
发明内容
有鉴于此，本发明实施例的目的在于提出一种加快读取现场可更换单元的信息的方法、系统、计算机设备及计算机可读存储介质，通过在内存中持久化一个虚拟总线，当需要通过IPMI命令展示FRU信息或者有其他软件服务需要读取FRU信息时，只需要从内存中的虚拟总线上查找对应的设备即可，读取速度比实际服务EERPOM硬件快，可以显著加快FRU信息的读写速度。
基于上述目的，本发明实施例的一方面提供了一种加快读取现场可更换单元的信息的方法，包括如下步骤：在内存中创建现场可更换单元的虚拟总线；基于每个现场可更换单元的信息分别构建节点数据结构，并将所述节点数据结构均挂载到所述虚拟总线上；判断是否接收到读取现场可更换单元的信息的指令；以及响应于接收到读取现场可更换单元的信息的指令，确定所述现场可更换单元在所述虚拟总线上的位置，并读取所述位置上所述现场可更换单元的信息。
在一些实施方式中，所述基于每个现场可更换单元的信息分别构建节点数据结构包括：获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及将所述电可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。
在一些实施方式中，还包括：在所述节点数据结构中设置唯一标识信息，并基于唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。
在一些实施方式中，还包括：每隔预定时间检查所述虚拟总线上的节点数据结构是否与所述映射表完全对应；以及响应于所述虚拟总线上的节点数据结构与所述映射表不能完全对应，更新所述映射表。
在一些实施方式中，还包括：将所述虚拟总线和所述节点数据结构封装成动态链接库。
本发明实施例的另一方面，还提供了一种加快读取现场可更换单元的信息的系统，包括：虚拟总线模块，配置为在内存中创建现场可更换单元的虚拟总线；节点数据结构模块，配置为基于每个现场可更换单元的信息分别构建节点数据结构，并将所述节点数据结构均挂载到所述虚拟总线上；信息读取模块，配置为判断是否接收到读取现场可更换单元的信息的指令；以及响应于接收到读取现场可更换单元的信息的指令，确定所述现场可更换单元在所述虚拟总线上的位置，并读取所述位置上所述现场可更换单元的信息。
在一些实施方式中，所述节点数据结构模块还配置为：获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及将所述电可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。
在一些实施方式中，还包括：映射模块，配置为在所述节点数据结构中设置唯一标识信息，并基于唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。
本发明实施例的又一方面，还提供了一种计算机设备，包括：至少一 个处理器；以及存储器，所述存储器存储有可在所述处理器上运行的计算机指令，所述指令由所述处理器执行时实现如上方法的步骤。
本发明实施例的再一方面，还提供了一种计算机可读存储介质，计算机可读存储介质存储有被处理器执行时实现如上方法步骤的计算机程序。
本发明具有以下有益技术效果：通过在内存中持久化一个虚拟总线，当需要通过IPMI命令展示FRU信息或者有其他软件服务需要读取FRU信息时，只需要从内存中的虚拟总线上查找对应的设备即可，读取速度比实际服务EERPOM硬件快，可以显著加快FRU信息的读写速度。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的实施例。
图1为本发明提供的加快读取现场可更换单元的信息的方法的实施例的示意图；
图2为本发明提供的加快读取现场可更换单元的信息的方法的实施例的硬件结构示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白，以下结合具体实 施例，并参照附图，对本发明实施例进一步详细说明。
需要说明的是，本发明实施例中所有使用“第一”和“第二”的表述均是为了区分两个相同名称非相同的实体或者非相同的参量，可见“第一”“第二”仅为了表述的方便，不应理解为对本发明实施例的限定，后续实施例对此不再一一说明。
基于上述目的，本发明实施例的第一个方面，提出了一种加快读取现场可更换单元的信息的方法的实施例。图1示出的是本发明提供的加快读取现场可更换单元的信息的方法的实施例的示意图。如图1所示，本发明实施例包括如下步骤：
S1、在内存中创建现场可更换单元的虚拟总线；
S2、基于每个现场可更换单元的信息分别构建节点数据结构，并将节点数据结构均挂载到虚拟总线上；
S3、判断是否接收到读取现场可更换单元的信息的指令；以及
S4、响应于接收到读取现场可更换单元的信息的指令，确定现场可更换单元在虚拟总线上的位置，并读取位置上现场可更换单元的信息。
BMC系统开机后，FRU虚拟总线管理模块守护进程(以下简称fru-vbd)首先启动，在内存中创建虚拟总线结构；然后遍历所有FRU设备的EEPROM，读取EEPROM中的信息，按照规则构建软件数据结构，每个FRU设备形成自己的一个独立的结构；最终将每个结构全部挂接到FRU虚拟总线上，形成一个完整的总线数据结构。后续需要通过IPMI命令展示FRU信息或者有其他软件服务需要读取FRU信息时，只需要从内存中的FRU虚 拟总线上查找对应的设备即可，其读取速度比实际服务EERPOM硬件快很多。
在内存中创建现场可更换单元的虚拟总线。设计fru-vbd程序，该服务创建的虚拟总线本质上是一种存储于内存中的可变长度的数据结构，由fru-vbd进程负责维护，向该总线上添加、修改或删除FRU节点信息。
基于每个现场可更换单元的信息分别构建节点数据结构，并将节点数据结构均挂载到虚拟总线上。在一些实施方式中，所述基于每个现场可更换单元的信息分别构建节点数据结构包括：获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及将所述电可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。fru-vbd进程首先从配置文件中获取所有的FRU EEPROM地址，然后遍历这些地址，依次读取每个FRU EEPROM，将其中的二进制信息翻译为人可读的字符串数据，并基于此构建对应的FRU节点数据结构。将构建好的FRU节点数据结构挂到虚拟总线上，形成完整的总线加节点的数据结构。
在一些实施方式中，还包括：在所述节点数据结构中设置唯一标识信息，并基于唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。FRU节点数据结构中包含的信息可以有：唯一标识信息uuid、唯一总线地址等。可以建立现场可更换单元的名称与对应的节点数据结构的映射关系，这样可以通过FRU设备名称来知道其对应FRU节点数据的唯一标识信息，以便后续查找。
判断是否接收到读取现场可更换单元的信息的指令；响应于接收到读 取现场可更换单元的信息的指令，确定现场可更换单元在虚拟总线上的位置，并读取位置上现场可更换单元的信息。可以通过FRU设备名称来知道其对应FRU节点数据的唯一标识信息，从而确定现场可更换单元在虚拟总线上的位置，进而读取相应的现场可更换单元的信息。
在一些实施方式中，还包括：每隔预定时间检查所述虚拟总线上的节点数据结构是否与所述映射表完全对应；以及响应于所述虚拟总线上的节点数据结构与所述映射表不能完全对应，更新所述映射表。为了防止有FRU设备执行了插拔操作，因此需要对虚拟总线上实际的节点数据结构进行检查，如果虚拟总线上的节点数据结构不能与映射表完全对应，则说明节点数据结构发生了变化，需要更新映射表。
在一些实施方式中，还包括：将所述虚拟总线和所述节点数据结构封装成动态链接库。将所述虚拟总线和所述节点数据结构封装成libfruvbd.so动态链接库，可以方便其他软件服务调用，能够实现从FRU虚拟软件总线上执行查询、读取数据的操作。
需要特别指出的是，上述加快读取现场可更换单元的信息的方法的各个实施例中的各个步骤均可以相互交叉、替换、增加、删减，因此，这些合理的排列组合变换之于加快读取现场可更换单元的信息的方法也应当属于本发明的保护范围，并且不应将本发明的保护范围局限在实施例之上。
基于上述目的，本发明实施例的第二个方面，提出了一种加快读取现场可更换单元的信息的系统，包括：虚拟总线模块，配置为在内存中创建现场可更换单元的虚拟总线；节点数据结构模块，配置为基于每个现场可更换单元的信息分别构建节点数据结构，并将所述节点数据结构均挂载到 所述虚拟总线上；信息读取模块，配置为判断是否接收到读取现场可更换单元的信息的指令；以及响应于接收到读取现场可更换单元的信息的指令，确定所述现场可更换单元在所述虚拟总线上的位置，并读取所述位置上所述现场可更换单元的信息。
节点数据结构模块还配置为获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及将所述电可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。
在一些实施方式中，还包括：映射模块，配置为在所述节点数据结构中设置唯一标识信息，并基于唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。
基于上述目的，本发明实施例的第三个方面，提出了一种计算机设备，包括：至少一个处理器；以及存储器，存储器存储有可在处理器上运行的计算机指令，指令由处理器执行以实现如下步骤：S1、在内存中创建现场可更换单元的虚拟总线；S2、基于每个现场可更换单元的信息分别构建节点数据结构，并将节点数据结构均挂载到虚拟总线上；S3、判断是否接收到读取现场可更换单元的信息的指令；以及S4、响应于接收到读取现场可更换单元的信息的指令，确定现场可更换单元在虚拟总线上的位置，并读取位置上现场可更换单元的信息。
在一些实施方式中，所述基于每个现场可更换单元的信息分别构建节点数据结构包括：获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及将所述电 可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。
在一些实施方式中，还包括：在所述节点数据结构中设置唯一标识信息，并基于唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。
在一些实施方式中，还包括：每隔预定时间检查所述虚拟总线上的节点数据结构是否与所述映射表完全对应；以及响应于所述虚拟总线上的节点数据结构与所述映射表不能完全对应，更新所述映射表。
在一些实施方式中，还包括：将所述虚拟总线和所述节点数据结构封装成动态链接库。
如图2所示，为本发明提供的上述加快读取现场可更换单元的信息的方法的一个实施例的硬件结构示意图。
以如图2所示的装置为例，在该装置中包括一个处理器301以及一个存储器302，并还可以包括：输入装置303和输出装置304。
处理器301、存储器302、输入装置303和输出装置304可以通过总线或者其他方式连接，图2中以通过总线连接为例。
存储器302作为一种非易失性计算机可读存储介质，可用于存储非易失性软件程序、非易失性计算机可执行程序以及模块，如本申请实施例中的加快读取现场可更换单元的信息的方法对应的程序指令/模块。处理器301通过运行存储在存储器302中的非易失性软件程序、指令以及模块，从而执行服务器的各种功能应用以及数据处理，即实现上述方法实施例的加快 读取现场可更换单元的信息的方法。
存储器302可以包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需要的应用程序；存储数据区可存储根据加快读取现场可更换单元的信息的方法的使用所创建的数据等。此外，存储器302可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实施例中，存储器302可选包括相对于处理器301远程设置的存储器，这些远程存储器可以通过网络连接至本地模块。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
输入装置303可接收输入的用户名和密码等信息。输出装置304可包括显示屏等显示设备。
一个或者多个加快读取现场可更换单元的信息的方法对应的程序指令/模块存储在存储器302中，当被处理器301执行时，执行上述任意方法实施例中的加快读取现场可更换单元的信息的方法。
执行上述加快读取现场可更换单元的信息的方法的计算机设备的任何一个实施例，可以达到与之对应的前述任意方法实施例相同或者相类似的效果。
本发明还提供了一种计算机可读存储介质，计算机可读存储介质存储有被处理器执行时执行如上方法的计算机程序。
最后需要说明的是，本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，可以通过计算机程序来指令相关硬件来完成，加快读取现场可更换单元的信息的方法的程序可存储于一计算机可读取存储 介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，程序的存储介质可为磁碟、光盘、只读存储记忆体(ROM)或随机存储记忆体(RAM)等。上述计算机程序的实施例，可以达到与之对应的前述任意方法实施例相同或者相类似的效果。
此外，根据本发明实施例公开的方法还可以被实现为由处理器执行的计算机程序，该计算机程序可以存储在计算机可读存储介质中。在该计算机程序被处理器执行时，执行本发明实施例公开的方法中限定的上述功能。
此外，上述方法步骤以及系统单元也可以利用控制器以及用于存储使得控制器实现上述步骤或单元功能的计算机程序的计算机可读存储介质实现。
此外，应该明白的是，本文的计算机可读存储介质(例如，存储器)可以是易失性存储器或非易失性存储器，或者可以包括易失性存储器和非易失性存储器两者。作为例子而非限制性的，非易失性存储器可以包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦写可编程ROM(EEPROM)或快闪存储器。易失性存储器可以包括随机存取存储器(RAM)，该RAM可以充当外部高速缓存存储器。作为例子而非限制性的，RAM可以以多种形式获得，比如同步RAM(DRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据速率SDRAM(DDR SDRAM)、增强SDRAM(ESDRAM)、同步链路DRAM(SLDRAM)、以及直接Rambus RAM(DRRAM)。所公开的方面的存储设备意在包括但不限于这些和其它合适类型的存储器。
本领域技术人员还将明白的是，结合这里的公开所描述的各种示例性 逻辑块、模块、电路和算法步骤可以被实现为电子硬件、计算机软件或两者的组合。为了清楚地说明硬件和软件的这种可互换性，已经就各种示意性组件、方块、模块、电路和步骤的功能对其进行了一般性的描述。这种功能是被实现为软件还是被实现为硬件取决于具体应用以及施加给整个系统的设计约束。本领域技术人员可以针对每种具体应用以各种方式来实现的功能，但是这种实现决定不应被解释为导致脱离本发明实施例公开的范围。
结合这里的公开所描述的各种示例性逻辑块、模块和电路可以利用被设计成用于执行这里功能的下列部件来实现或执行：通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或其它可编程逻辑器件、分立门或晶体管逻辑、分立的硬件组件或者这些部件的任何组合。通用处理器可以是微处理器，但是可替换地，处理器可以是任何传统处理器、控制器、微控制器或状态机。处理器也可以被实现为计算设备的组合，例如，DSP和微处理器的组合、多个微处理器、一个或多个微处理器结合DSP和/或任何其它这种配置。
结合这里的公开所描述的方法或算法的步骤可以直接包含在硬件中、由处理器执行的软件模块中或这两者的组合中。软件模块可以驻留在RAM存储器、快闪存储器、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、可移动盘、CD-ROM、或本领域已知的任何其它形式的存储介质中。示例性的存储介质被耦合到处理器，使得处理器能够从该存储介质中读取信息或向该存储介质写入信息。在一个替换方案中，存储介质可以与处理器集成在一起。处理器和存储介质可以驻留在ASIC中。ASIC 可以驻留在用户终端中。在一个替换方案中，处理器和存储介质可以作为分立组件驻留在用户终端中。
在一个或多个示例性设计中，功能可以在硬件、软件、固件或其任意组合中实现。如果在软件中实现，则可以将功能作为一个或多个指令或代码存储在计算机可读介质上或通过计算机可读介质来传送。计算机可读介质包括计算机存储介质和通信介质，该通信介质包括有助于将计算机程序从一个位置传送到另一个位置的任何介质。存储介质可以是能够被通用或专用计算机访问的任何可用介质。作为例子而非限制性的，该计算机可读介质可以包括RAM、ROM、EEPROM、CD-ROM或其它光盘存储设备、磁盘存储设备或其它磁性存储设备，或者是可以用于携带或存储形式为指令或数据结构的所需程序代码并且能够被通用或专用计算机或者通用或专用处理器访问的任何其它介质。此外，任何连接都可以适当地称为计算机可读介质。例如，如果使用同轴线缆、光纤线缆、双绞线、数字用户线路(DSL)或诸如红外线、无线电和微波的无线技术来从网站、服务器或其它远程源发送软件，则上述同轴线缆、光纤线缆、双绞线、DSL或诸如红外线、无线电和微波的无线技术均包括在介质的定义。如这里所使用的，磁盘和光盘包括压缩盘(CD)、激光盘、光盘、数字多功能盘(DVD)、软盘、蓝光盘，其中磁盘通常磁性地再现数据，而光盘利用激光光学地再现数据。上述内容的组合也应当包括在计算机可读介质的范围内。
以上是本发明公开的示例性实施例，但是应当注意，在不背离权利要求限定的本发明实施例公开的范围的前提下，可以进行多种改变和修改。根据这里描述的公开实施例的方法权利要求的功能、步骤和/或动作不需以 任何特定顺序执行。此外，尽管本发明实施例公开的元素可以以个体形式描述或要求，但除非明确限制为单数，也可以理解为多个。
应当理解的是，在本文中使用的，除非上下文清楚地支持例外情况，单数形式“一个”旨在也包括复数形式。还应当理解的是，在本文中使用的“和/或”是指包括一个或者一个以上相关联地列出的项目的任意和所有可能组合。
上述本发明实施例公开实施例序号仅仅为了描述，不代表实施例的优劣。
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通过硬件来完成，也可以通过程序来指令相关的硬件完成，程序可以存储于一种计算机可读存储介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。
所属领域的普通技术人员应当理解：以上任何实施例的讨论仅为示例性的，并非旨在暗示本发明实施例公开的范围(包括权利要求)被限于这些例子；在本发明实施例的思路下，以上实施例或者不同实施例中的技术特征之间也可以进行组合，并存在如上的本发明实施例的不同方面的许多其它变化，为了简明它们没有在细节中提供。因此，凡在本发明实施例的精神和原则之内，所做的任何省略、修改、等同替换、改进等，均应包含在本发明实施例的保护范围之内。

Claims (10)

  1. 一种加快读取现场可更换单元的信息的方法，其特征在于，包括以下步骤：
    在内存中创建现场可更换单元的虚拟总线；
    基于每个现场可更换单元的信息分别构建节点数据结构，并将所述节点数据结构均挂载到所述虚拟总线上；
    判断是否接收到读取现场可更换单元的信息的指令；以及
    响应于接收到读取现场可更换单元的信息的指令，确定所述现场可更换单元在所述虚拟总线上的位置，并读取所述位置上所述现场可更换单元的信息。
  2. 根据权利要求1所述的方法，其特征在于，所述基于每个现场可更换单元的信息分别构建节点数据结构包括：
    获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及
    将所述电可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。
  3. 根据权利要求1所述的方法，其特征在于，还包括：
    在所述节点数据结构中设置唯一标识信息，并基于所述唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。
  4. 根据权利要求3所述的方法，其特征在于，还包括：
    每隔预定时间检查所述虚拟总线上的节点数据结构是否与所述映射表完全对应；以及
    响应于所述虚拟总线上的节点数据结构与所述映射表不能完全对应，更新所述映射表。
  5. 根据权利要求1所述的方法，其特征在于，还包括：
    将所述虚拟总线和所述节点数据结构封装成动态链接库。
  6. 一种加快读取现场可更换单元的信息的系统，其特征在于，包括：
    虚拟总线模块，配置为在内存中创建现场可更换单元的虚拟总线；
    节点数据结构模块，配置为基于每个现场可更换单元的信息分别构建节点数据结构，并将所述节点数据结构均挂载到所述虚拟总线上；
    信息读取模块，配置为判断是否接收到读取现场可更换单元的信息的指令；以及响应于接收到读取现场可更换单元的信息的指令，确定所述现场可更换单元在所述虚拟总线上的位置，并读取所述位置上所述现场可更换单元的信息。
  7. 根据权利要求6所述的系统，其特征在于，所述节点数据结构模块还配置为获取所有可更换单元的电可擦可编程只读存储器的地址，根据所述地址分别读取每个所述电可擦可编程只读存储器；以及将所述电可擦可编程只读存储器中的二进制信息转换成字符串数据，并基于所述字符串数据构建对应的节点数据结构。
  8. 根据权利要求6所述的系统，其特征在于，还包括：
    映射模块，配置为在所述节点数据结构中设置唯一标识信息，并基于所述唯一标识信息建立所述现场可更换单元的名称与对应的节点数据结构的映射关系，并将所述映射关系写入映射表。
  9. 一种计算机设备，其特征在于，包括：
    至少一个处理器；以及
    存储器，所述存储器存储有可在所述处理器上运行的计算机指令，所述指令由所述处理器执行时实现权利要求1-5任意一项所述方法的步骤。
  10. 一种计算机可读存储介质，所述计算机可读存储介质存储有计算机程序，其特征在于，所述计算机程序被处理器执行时实现权利要求1-5任意一项所述方法的步骤。
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