WO2021121435A1

WO2021121435A1 - Method for improving display image quality and display device

Info

Publication number: WO2021121435A1
Application number: PCT/CN2020/142055
Authority: WO
Inventors: 任佳; 文欢
Original assignee: 咸阳彩虹光电科技有限公司
Priority date: 2019-12-17
Filing date: 2020-12-31
Publication date: 2021-06-24
Also published as: CN112992079A; CN112992079B

Abstract

A method for improving display image quality, comprising: using a mini LED backlight module (401) as a backlight module of a display panel (10) (S10); setting a time difference for input signals of the mini LED backlight module (401) and the display panel (10) (S20); and reducing the response time of the display panel (10) by means of a predetermined adjustment manner so as to implement synchronous display according to a preset high contrast, wherein the adjustment manner is related to the set time difference (S30). A display device, comprising the display panel (10), wherein the display panel (10) uses the method for improving display image quality to improve the display image quality. Specifically, the problem of asynchrony caused by the slow response time of an LCD is improved, and the response time is improved, which then ameliorates screen smearing, etc. so as to achieve better high-contrast synchronous display of the display device.

Description

Method for improving display image quality and display device

Technical field

The present disclosure relates to the field of display technology, and in particular to methods and display devices for improving display image quality.

Background technique

A general liquid crystal display device mainly includes a source drive circuit and a gate drive circuit arranged on a liquid crystal panel (Panel), a horizontal direction circuit board (X-board, XB), and a system arranged on a system board or a main board (MB) Level chip (System On Chip, SOC), Timing Control (TCON), usually through flexible flat cable (Flexible Flat Cable, FFC) to connect the circuit board and the horizontal direction circuit board to carry out the signal between the two Transmission, where the system-level chip receives the image data signal to be transmitted, and outputs the image data signal to be transmitted, and then the input signal is processed by the row expansion module and the column expansion module; the processed data is transmitted to the timing controller for timing control The receiver transmits the received data to the source driving circuit and the gate driving circuit through the horizontal direction circuit board, thereby driving the panel for display.

In the display field, the Mini LED (MiniLight Emitting Diode) display connected to the small pitch display and the Mini LED backlight of the LCD (Liquid Crystal Display) have become the hottest topics at the moment. Mini-LED is a small-pitch LED (Light Emitting Diode) product with a pitch between 2.5 mm and 0.1 mm. The small-pitch LED also refers to an LED backlight or display product with a pitch of adjacent LED beads of less than 2.5 mm. Compared with traditional backlight sources, small-pitch LED backlight sources have more concentrated luminous wavelengths, faster response speed and longer lifespan, and the system light loss can be reduced from 85% of traditional backlight sources to 5%.

As the main display device at the moment, the response time of the liquid crystal display is a natural "defect" of the liquid crystal display, and there is no good solution yet. Response time refers to the response speed of the liquid crystal display to the input signal, that is, the response time of the liquid crystal from dark to bright or from bright to dark. Generally speaking, it is divided into two parts: Rising (rising time) and Falling (falling time) , The response time is the sum of the two. In addition, frame (frame time) or frame time (frame time) data represents the time interval between each frame. The smoother this parameter is, the smoother the overall display screen will be.

The response time of the liquid crystal display panel is generally 5-30ms when the liquid crystal display panel is driven by voltage. This response speed has the problem of smearing when displaying dynamic pictures, which causes the panel's image quality to decline and poor viewing. The commonly used solution is OD (Over Driving). This method can improve the response time of the liquid crystal, but it is easy to cause the over-driving voltage to be too high and bright edges. In addition, the backlight of the current liquid crystal display is often Bright, a signal delay of more than ten milliseconds will be noticed by the human eye when displaying a dynamic picture, which will cause the picture to smear and cause problems after OD.

Summary of the invention

In order to alleviate the asynchrony problem caused by the slow response time of the LCD, and thereby improve the image smear, the embodiments of the present disclosure provide a method for improving the display image quality, including:

Adopt mini LED backlight module as the backlight module of the display panel;

Setting the time difference between the input signal of the mini LED backlight module and the display panel;

Reduce the response time of the display panel through a predetermined adjustment method, so as to realize synchronous display according to a preset high contrast ratio;

Wherein, the adjustment mode is related to the set time difference.

In an embodiment of the present disclosure, the display panel is an LCD;

The predetermined adjustment method is to independently control the input signal time of the mini LED backlight module and the LCD.

In an embodiment of the present disclosure, the predetermined adjustment method is to control the time difference between the STV signal of the mini LED backlight module and the LCD, so as to reduce the response time of the LCD.

In an embodiment of the present disclosure, the time difference is a time difference ΔT designed for the display control IC;

The STV signal of the mini LED backlight module and the LCD is output to the Gate COF circuit or GOA circuit of the LCD according to the setting of ΔT, so that the two STV signals are superimposed to generate a time difference of ΔT.

In an embodiment of the present disclosure, the display control IC changes the rise time and fall time of the LCD by controlling the min LED backlight module and the ΔT of the LCD to reduce the response of the LCD. time.

In an embodiment of the present disclosure, when the ΔT is different, the rise time and the fall time are different;

When the ΔT becomes longer, the rise time decreases, and the fall time increases;

When the ΔT is in the interval of 4-6 ms, the rise time and the fall time are both less than 5 ms.

In an embodiment of the present disclosure, the predetermined adjustment method is to use the overvoltage driving parameter table in the mini LED backlight module and the timing controller IC of the LCD to create the time difference between the rise time and the fall time, To reduce the response time of the LCD;

The time difference is equal to one frame time.

In an embodiment of the present disclosure, the mini LED backlight module and the LCD remain synchronized after the time difference takes effect;

The overvoltage driving gray scale setting of the rising area of the overvoltage driving parameter table of the mini LED backlight module is equal to the initial gray scale;

The overvoltage driving gray scale setting of the falling area of the overvoltage driving parameter table of the mini LED backlight module is equal to the initial gray scale;

The overvoltage driving gray scale setting of the falling area of the overvoltage driving parameter table of the LCD is equal to the initial gray scale.

In an embodiment of the present disclosure, the adjustment method is to reduce the turn-on time ΔT' of the mini LED backlight module by controlling to change the rise time and fall time of the LCD to reduce the response time of the LCD.

In an embodiment of the present disclosure, when the ΔT' is different, the rise time and the fall time are different;

When the refresh frequency of the display panel is 60HZ, one frame time is 16.67ms, and the rise time and the fall time are both 0;

When the refresh frequency of the display panel is 120 Hz, one frame time is 8.3 ms, and the rise time and the fall time are both 0.58 ms.

The second aspect of the present disclosure provides a display device including a display panel, and the display panel uses any of the above-mentioned methods for improving the display image quality to improve the display image quality.

In the method and display device for improving the display image quality provided by the present disclosure, by setting the time difference between the input signal of the mini LED backlight module and the display panel, a predetermined adjustment method is used to reduce the response time of the display panel, so that the display panel is in accordance with the preset The high contrast ratio realizes simultaneous display. Therefore, the present disclosure improves the asynchrony problem caused by the slow response time of the LCD, thereby improving the smear of the screen.

In this disclosure, the time difference between the mini LED backlight module and the LCD is controlled, the STV signal time difference △T between the mini LED backlight module and the LCD is controlled, or the timing controller IC (chip) of the mini LED backlight module and the LCD is used The overvoltage drive parameter table gives the LCD rise time and fall time manufacturing time difference, etc., to improve the asynchronization problem caused by the slow response time of the LCD, thereby improving the problem of screen smearing, and achieving a better high-contrast synchronous display .

Hereinafter, the present invention will be further described in detail with reference to the accompanying drawings.

Description of the drawings

In order to explain the technical solutions of the embodiments of the present disclosure more clearly, the following will briefly introduce the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative work, other drawings can be obtained from these drawings.

FIG. 1 is a schematic diagram of steps of a method for improving display image quality in an embodiment of the disclosure;

FIG. 2 is a schematic diagram of a display device in an embodiment of the disclosure;

3 is a schematic diagram of an active matrix display device in an embodiment of the disclosure;

4a is a schematic diagram of a liquid crystal response of an LCD without OD in an embodiment of the disclosure;

FIG. 4b is a schematic diagram of a liquid crystal response of an LCD in an embodiment of the disclosure after performing OD;

FIG. 5a is a schematic diagram of an LCD over OD waveform in an embodiment of the disclosure;

FIG. 5b is a schematic diagram of an LCD over OD bright edge image in an embodiment of the disclosure;

6 is a schematic diagram of the relationship between backlight and LCD brightness and time in an embodiment of the disclosure;

FIG. 7 is a schematic diagram of the time difference between a mini LED backlight module and LCD in an embodiment of the disclosure;

FIG. 8 is a schematic diagram of a display control logic in an embodiment of the disclosure;

FIG. 9 is a schematic diagram of a display control brightness waveform in an embodiment of the disclosure;

10 is a schematic diagram of a mini LED backlight module and LCD timing design in another embodiment of the disclosure;

FIG. 11 is a schematic diagram of a display control logic in another embodiment of the present disclosure;

12 is a schematic diagram of a display control brightness waveform in another embodiment of the present disclosure;

FIG. 13a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T=0 in an embodiment of the disclosure;

FIG. 13b is a schematic diagram of the waveform finally displayed on the LCD when ΔT=0 in the embodiment of the disclosure;

14a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T=2 in the embodiment of the disclosure;

14b is a schematic diagram of the waveforms finally displayed on the LCD when ΔT=2 in the embodiment of the disclosure;

15a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T=4 in the embodiment of the disclosure;

15b is a schematic diagram of the waveform finally displayed on the LCD when ΔT=4 in the embodiment of the disclosure;

16a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T=6 in an embodiment of the disclosure;

16b is a schematic diagram of the waveforms finally displayed on the LCD when ΔT=6 in the embodiment of the disclosure;

FIG. 17a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T=8 in an embodiment of the disclosure;

FIG. 17b is a schematic diagram of the waveform finally displayed by the LCD when ΔT=8 in the embodiment of the disclosure;

18a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T=10 in an embodiment of the disclosure;

18b is a schematic diagram of the waveforms finally displayed on the LCD when ΔT=10 in the embodiment of the disclosure;

19 is a schematic diagram of liquid crystal response at different ΔT in the embodiments of the disclosure;

20a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T'=0 in another embodiment of the present disclosure;

Fig. 20b is a schematic diagram of the waveform finally displayed on the LCD when △T'=0 in another embodiment of the present disclosure;

FIG. 21a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T'=2 in another embodiment of the present disclosure;

Figure 21b is a schematic diagram of the waveform finally displayed on the LCD when △T'=2 in another embodiment of the present disclosure;

Fig. 22a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T'=4 in another embodiment of the present disclosure;

Fig. 22b is a schematic diagram of the waveform finally displayed on the LCD when △T'=4 in another embodiment of the present disclosure;

FIG. 23a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T'=6 in another embodiment of the present disclosure;

Fig. 23b is a schematic diagram of the waveform finally displayed on the LCD when △T'=6 in another embodiment of the present disclosure;

24a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T'=8 in another embodiment of the present disclosure;

Figure 24b is a schematic diagram of the waveform finally displayed on the LCD when △T'=8 in another embodiment of the present disclosure;

FIG. 25a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and the LCD when △T'=10 in another embodiment of the present disclosure;

Figure 25b is a schematic diagram of the waveform finally displayed on the LCD when △T'=10 in another embodiment of the present disclosure;

FIG. 26 is a schematic diagram of the response curve of the liquid crystal at different ΔT' in another embodiment of the present disclosure.

Detailed ways

The present invention will be further described in detail below in conjunction with specific examples, but the embodiments of the present invention are not limited thereto.

As shown in FIG. 1, FIG. 1 is a schematic diagram of steps of a method for improving display image quality in an embodiment of the present disclosure; the method for improving display image quality provided by an embodiment of the present disclosure includes:

S10: The mini LED backlight module is used as the backlight module of the display panel.

Among them, the mini LED backlight module may also be referred to as a mini LED plate.

S20: Set the time difference between the input signal of the mini LED backlight module and the display panel.

S30: Reduce the response time of the display panel through a predetermined adjustment method, so as to realize synchronous display according to a preset high contrast; wherein, the adjustment method is related to the set time difference.

In an embodiment of the present disclosure, as shown in FIG. 2, FIG. 2 is a schematic diagram of a display in an embodiment of the disclosure, including a mini LED backlight module 401 and a display panel 10; the display panel 10 is, for example, an LCD. The predetermined adjustment method may be to independently control the time of the input signal of the mini LED backlight module and the LCD.

In an embodiment of the present disclosure, as shown in FIG. 3, FIG. 3 is a schematic diagram of an active matrix display device in an embodiment of the disclosure; the active matrix display device includes: a display panel 10 having a gate driver thereon The circuit, the source driving circuit, the XB board 113, the driving circuit board assembly 1130, the system board 13, and the connector CL1. The active matrix display device of this embodiment is, for example, a TCONLESS liquid crystal display device LCD. The system-level chip on the system board integrates at least part of the functions of the traditional TCON IC, and the XB board integrates at least part of the functions of the traditional TCON IC. However, the embodiments of the present application are not limited to this.

The display panel 10 includes a display area 1111 and a gate drive circuit and a source drive circuit electrically connected to the display area 1111. A plurality of data lines DL, a plurality of gate lines GL, and a plurality of pixels P electrically connected to each data line DL and each gate line GL are provided in the display area 1111; each pixel P is located on a corresponding gate line The intersection of GL and data line DL. The gate driving circuit includes, for example, two GOA (Gate-On Array) circuits 1113. The two GOA circuits 1113 are located in the peripheral area of the display area 1111 and are arranged on opposite sides of the display area 1111, that is, the display panel 10 The gate drive circuit is a double-sided GOA circuit. Each GOA circuit 1113 is electrically connected to the gate line GL in the display area 1111, and is used to provide a gate driving signal to each gate line GL in the display area 1111. The source driving circuit, for example, includes a plurality of COF (Chip On Flex, chip on film) type source drivers 1115, such as the twelve COF type source drivers 1115 shown in FIG. 3; each COF type source driver 1115 is electrically connected to the display area 1111 The data line DL is used to provide image data signals to each data line DL. More specifically, a single COF-type source driver 1115 may include a flexible circuit board and a source driver IC (source driver IC) provided on the flexible circuit board.

Among them, the XB board 113 can be a whole independent circuit board, or multiple circuit daughter boards arranged in parallel. If there are multiple circuit daughter boards arranged in parallel, the driving circuit board assembly 1130 can be arranged on Any one of the circuit sub-boards, and every two adjacent circuit sub-boards in the plurality of circuit sub-boards form an electrical connection through a connector and a respective connector.

This embodiment is described with two circuit daughter boards. The XB board 113 includes two

circuit daughter boards

113a and 113b. The two

circuit daughter boards

113a and 113b are arranged on one side of the display panel 10 along the horizontal direction of FIG. 3. That is, as a row direction drive circuit board; each

circuit daughter board

113a, 113b adjacent to the display area 1111 is connected to a COF source driver 1115, the connection interface such as a mini-LVDS interface; among them, the mini-LVDS interface is a high-speed serial Line interface. As described above, the driving circuit board assembly 1130 can be arranged on the circuit daughter board 113a; specifically, the circuit daughter board 113a is provided with the display control circuit 1131, the connector CN1, the non-volatile memory 1133, and the connector CN3. The circuit daughter board 113a is electrically connected to the display area 1111 through a plurality of, for example, seven COF-type source drivers 1115, and is electrically connected to the GOA circuit 1113 on the right side of the display panel 10 through the rightmost COF-type source driver 1115. The circuit daughter board 113b is provided with a connector CN4. The circuit daughter board 113b is electrically connected to the display area 1111 through a plurality of, for example, five COF source drivers 1115, and is electrically connected to the GOA on the left side of the display panel 10 by the leftmost COF source driver 1115. Circuit 1113. The connector CN3 of the circuit daughter board 113a and the connector CN4 of the circuit daughter board 113b form an electrical connection through a connector CL2, where the connector CL2 is, for example, a flexible circuit board or FFC, so that it is generated on the circuit daughter board 113a The signal of is transmitted to the circuit sub-board 113b through the connector CL2.

Furthermore, the display control circuit 1131 is electrically connected to the connector CN1, the connector CN3, and the COF source driver 1115; in this way, the display control circuit 1131 is connected to the PCB (Printed Circuit Board) on the circuit sub-board 113a. In addition to the seven COF source drivers 1115 on the right side, the wires are electrically connected to the five COF source drivers 1115 on the left side through the connector CN3, the connector CL2, the connector CN4, and the PCB traces on the circuit daughter board 113b. . A number of Mini-LVDS interfaces are also provided on the XB board 113. The Mini-LVDS interfaces are provided between the COF source driver 1115 and the display control circuit 1131. The connector CN1 is, for example, a P2P interface; the display control circuit 1131 may include a signal conversion circuit. The signal conversion circuit is electrically connected to the connector CN1 and the Mini-LVDS interface, and is configured to receive a P2P (point-to-point) interface signal containing image data via the connector CN1, and generate a source control signal and a second interface according to the P2P interface signal Type image data signal, and output to the source driving circuit through the Mini-LVDS interface, where the second interface type image data signal is a Mini-LVDS interface signal.

Furthermore, the display control circuit 1131 includes a signal conversion circuit, a DC voltage conversion circuit, a level conversion circuit, a Gamma correction circuit, and the like. Wherein, the signal conversion circuit is electrically connected to the connector CN1, the level conversion circuit, and the source drive circuit, and is configured to receive the reference timing signal via the connector CN1; generate the source control signal and the second interface type image data according to the P2P interface signal The signal is sent to the source driving circuit, and the initial gate control signal is generated to the level conversion circuit according to the reference timing signal. Among them, the reference timing signals such as STV, CKV and P2P interface signals containing image data; STV and CKV are scanning signals in the liquid crystal display panel, image data such as RGB data; second interface type image data signals such as Mini-LVDS interface signal .

It should be noted that in the prior art, in order to match the signal sent by the SOC, the interface of the source driver needs to be adjusted accordingly. For example, if the signal sent by the SOC is transmitted through the P2P interface, the corresponding source driver interface Only P2P interfaces can be used, which may increase overall manufacturing costs and testing costs. In this embodiment, if the connector CL1 transmits the signal from the SOC to the signal conversion circuit in the display control circuit 1131 through the P2P interface, the signal conversion circuit can convert the P2P interface signal into an interface corresponding to the panel source driver For example, if the COF source driver interface 1115 is a Mini-LVDS interface, the P2P interface signal is converted into a Mini-LVDS signal, and the converted Mini-LVDS signal is sent to the panel COF source driver interface 1115, which is equivalent The interface signal conversion is completed through the signal conversion circuit, thereby completing the data transmission without changing the original Mini-LVDS interface on the panel. By adding a signal conversion circuit to the display control circuit 1131 of the XB board 113a, the signal conversion circuit can be presented in the form of a chip. On the one hand, it converts the P2P interface signal into a mini-LVDS interface signal, so that the COF type source driver in the source drive circuit The interface between 1115 and XB board 113 is changed to a mini-LVDS interface, which greatly reduces the cost; on the other hand, the signal conversion circuit can generate the timing control signal required by the display panel 10; thus, the debugging and revision of the display panel, etc. It can all be completed by the display panel manufacturer, and the manufacturer of the whole machine integrating the display panel can reduce the development cost without making any changes; on the other hand, the new improved technology in the display panel can be completed by the signal conversion circuit, and the system board 13 No need to make any changes.

In addition, the non-volatile memory 1133 stores an optical taste adjustment parameter table, and the parameters included in the optical taste adjustment parameter table here are parameters strongly related to the optical taste of the display panel 10. Among them, optical taste can also be referred to as optical characteristics.

The system board 13 is provided with a connector CN2, a system-on-chip 133 and a power management circuit 135. The connector CN2 of the system board 13 is connected to the connector CN1 of the drive circuit board 113a through the connector CL1. Furthermore, the system-on-chip 133 is electrically connected to the connector CN2 and has a built-in optical taste adjustment IP core; in this way, the system-on-chip 133 can read the driver via serial communication via the connector CN2, the connector CL1, and the connector CN1. The optical taste adjustment parameters stored in the non-volatile memory of the circuit board 113 a are loaded into the optical taste adjustment IP core to adjust the optical taste of the display panel 10. In addition, the connector CL1 is, for example, a single flexible flat cable. In addition, it is worth mentioning that the system board 13 of this embodiment is typically provided with multiple audio and video input interfaces, such as CVBS (Composite Video Broadcast Signal, composite synchronous video broadcast signal) interfaces, HDMI (High Definition Multimedia Interface, high definition). Multimedia interface) interface, etc.; the system board 13 is also called the main board, which is used to decode video and audio signals input via the audio and video input interface, and then output the video signal to the drive circuit board assembly in a digital signal format.

The optical taste adjustment IP (Intellectual Property, intellectual property) core includes the OD IP core, and the optical taste adjustment parameter table includes an overvoltage drive parameter table accordingly. More specifically, the ODIP core is used to perform an overvoltage drive operation according to an overvoltage drive parameter table. As for the parameters required for the overvoltage driving operation, they are known and mature technologies, so they will not be repeated here. The power management circuit 135 is electrically connected to the connector CN2 to provide an input DC voltage to the drive circuit board 113a. The DC voltage can be 12V; in addition, the power management circuit 135 can adopt a mature PMIC (Power Management IC, power management integrated circuit) .

In an embodiment of the present disclosure, as shown in FIG. 4, FIG. 5, and FIG. 6, FIG. 4a is a schematic diagram of a liquid crystal response of an LCD in an embodiment of the disclosure without OD, and FIG. 4b is a schematic diagram of an LCD in an embodiment of the disclosure. A schematic diagram of a liquid crystal response of an LCD that has undergone OD. FIG. 5a is a waveform intention of an LCD in an embodiment of the disclosure. FIG. 5b is a schematic diagram of an LCD that has a bright edge over OD in an embodiment of the disclosure. FIG. 6 is A schematic diagram of the relationship between the backlight unit (BLU) and LCD brightness and time in the disclosed embodiments; for example, the aforementioned display panel is a traditional LCD, because the backlight is always on and the liquid crystal is driven by a voltage, the response time is about 5 ~30ms, usually through over-voltage driving to solve the smear phenomenon that will exist when displaying dynamic pictures; the above OD method may have an over-driving voltage that is too high, that is, over OD, and bright edges appear.

In an embodiment of the present disclosure, as shown in Figs. 7-9, Fig. 7 is a schematic diagram of the time difference between a mini LED backlight module and LCD in an embodiment of the disclosure, and Fig. 8 is a schematic diagram of the time difference between a mini LED backlight module and an LCD in an embodiment of the disclosure. A schematic diagram of the display control logic; where STV_mini LED plate is the STV signal of the mini LED plate, and STV_LCD is the STV signal of the LCD; FIG. 9 is a schematic diagram of a display control brightness waveform in an embodiment of the disclosure; wherein, the predetermined The adjustment method is, for example, controlling the time difference between the STV signal of the mini LED backlight module and the LCD to adjust the response time of the LCD, so as to improve the effect of the liquid crystal response time of the LCD panel through the time difference, thereby improving the effect of screen smear.

Specifically, the time difference is a time difference △T designed for the display control IC; the STV signal of the mini LED backlight module and the LCD is output to the Gate COF or GOA circuit of the LCD according to the setting of the △T, so that the LCD display is superimposed to produce The delay of △T can improve the influence of the response time of the liquid crystal of the LCD panel, thereby improving the smear of the picture.

Further, the display control circuit contains, for example, a display control IC. The display control IC is matched with the min LED timing controller IC and LCD timing controller IC to control the △T of the min LED backlight module and LCD, and change the rise time and fall time. In order to reduce the response time of the LCD, improve the image quality problems caused by the response time of the LCD, thereby improving the final output image quality.

Preferably, as shown in Figs. 13-19, Fig. 13a is a waveform diagram of the time difference between the mini LED backlight module and LCD when △T=0 in the embodiment of the disclosure, and Fig. 13b is the time difference between △T=0 in the embodiment of the disclosure. The waveform diagram of the final LCD display. Figure 14a is the waveform diagram of the time difference between the mini LED backlight module and the LCD when △T=2 in the embodiment of the disclosure. Figure 14b is the final waveform displayed by the LCD when △T=2 in the embodiment of the disclosure. Schematic diagram, Figure 15a is a schematic diagram of the waveform of the time difference between the mini LED backlight module and LCD when △T=4 in the embodiment of the disclosure, Figure 15b is a schematic diagram of the final display waveform of the LCD when △T=4 in the embodiment of the disclosure, and Figure 16a is The waveform diagram of the time difference between the mini LED backlight module and the LCD when △T=6 in the embodiment of the present disclosure. Figure 16b is the final waveform diagram displayed by the LCD when △T=6 in the embodiment of the disclosure. Figure 17a is the waveform diagram of the final display of the LCD when △T=6. The waveform diagram of the time difference between the mini LED backlight module and the LCD when △T=8. Figure 17b is the final waveform diagram displayed by the LCD when △T=8 in the embodiment of the disclosure, and Figure 18a is the waveform diagram of the final display when △T=10 in the embodiment of the disclosure. The waveform diagram of the time difference between the mini LED backlight module and the LCD. Figure 18b is the final waveform diagram displayed by the LCD when △T=10 in the embodiment of the disclosure. Figure 19 is the schematic diagram of the response of the liquid crystal when △T is different in the embodiment of the disclosure. At different times, the rise time and fall time are different; when the △T time becomes longer, the rise time decreases and the fall time increases; when △T=4-6ms, the rise time and fall time are both below 5ms, which is ideal The design value of the time difference.

In an embodiment of the present disclosure, as shown in FIGS. 10-12, FIG. 10 is a schematic diagram of a mini LED backlight module and LCD timing design in another embodiment of the disclosure, and FIG. 11 is another embodiment of the disclosure. A schematic diagram of a display control logic in the example, where OD table is an overvoltage drive parameter table; FIG. 12 is a schematic diagram of a display control brightness waveform in another embodiment of the present disclosure, such as using mini LED backlight module and LCD timing control The overvoltage drive parameter table (OD Table) in the device IC creates a time difference between the rise time and the fall time to reduce the response time of the LCD; preferably, the time difference may be equal to one frame time at this time.

Specifically, the mini LED backlight module and LCD remain synchronized after the time difference takes effect; the overvoltage driving gray scale setting of the rising area of the overvoltage driving parameter table of the mini LED backlight module is equal to the initial gray scale; the mini LED backlight module The overvoltage drive gray level setting of the falling area of the overvoltage drive parameter table of the LCD is equal to the initial gray level; the overvoltage drive gray level setting of the falling area of the LCD overvoltage drive parameter table is equal to the initial gray level.

In another implementation, the above adjustment method can be to reduce the turn-on time △T' of the mini LED backlight module by controlling to change the rise time and fall time of the LCD to adjust the output image quality of the LCD to improve the response of the LCD. The image quality problems caused by time will ultimately improve the output image quality.

Preferably, as shown in Figs. 20-26, Fig. 20a is a waveform diagram of the time difference between the mini LED backlight module and LCD when △T=0 in another embodiment of the present disclosure, and Fig. 20b is a schematic diagram of the time difference between the mini LED backlight module and the LCD in another embodiment of the present disclosure. The waveform diagram of the final LCD display when T'=0. FIG. 21a is a waveform diagram of the time difference between the mini LED backlight module and the LCD when △T'=2 in another embodiment of the disclosure. FIG. 21b is another embodiment of the disclosure. The waveform diagram of the final LCD display when △T'=2. Figure 22a is the waveform diagram of the time difference between the mini LED backlight module and the LCD when △T'=4 in another embodiment of the disclosure. Figure 22b is another embodiment of the disclosure. The waveform diagram of the final LCD display when △T'=4. Figure 23a is the waveform diagram of the time difference between the mini LED backlight module and the LCD when △T'=6 in another embodiment of the present disclosure. Figure 23b is another embodiment of the present disclosure. In the example, the waveform diagram of the final LCD display when △T'=6. Figure 24a is the waveform diagram of the time difference between the mini LED backlight module and the LCD when △T'=8 in another embodiment of the disclosure. Figure 24b is another embodiment of the disclosure. The waveform diagram of the final LCD display when △T'=8 in the embodiment. FIG. 25a is a waveform diagram of the time difference between the mini LED backlight module and the LCD when △T'=10 in another embodiment of the disclosure. FIG. 25b is another embodiment of the disclosure. In one embodiment, the final display waveform diagram of the LCD when △T'=10. FIG. 26 is a schematic diagram of the liquid crystal response curve when △T' is different in another embodiment of the present disclosure; when △T' is different, the rise time and fall time are different ; When the display panel refresh frequency is 60HZ, one frame is 16.67ms, and the rise time and fall time are both 0; when the display panel refresh frequency is 120HZ, one frame is 8.3ms, and the rise time and fall time are both 0.58ms; It can be seen that the response time of LCD is significantly reduced.

In another embodiment of the present disclosure, as shown in FIG. 2, FIG. 2 is a schematic diagram of a display in an embodiment of the present disclosure, including a backlight module 401 and a display panel 10; the display panel 10 can adopt the aforementioned various implementations Any one of the methods in the examples to improve the display quality improves the display quality. The specific implementation of the display panel 10 to improve the image quality has been described in detail in the foregoing method embodiment, and will not be repeated here.

In the above method and display device for improving display quality, the time difference between the input signal of the mini LED backlight module and the display panel is set, and the response time of the display panel is adjusted by a predetermined adjustment method, so that the display panel is in accordance with the preset high contrast Realize synchronous display. Therefore, the present disclosure improves the asynchrony problem caused by the slow response time of the LCD, thereby improving the smear of the screen.

In this display device, the timing or time stagger control of the mini LED backlight module and LCD is used to control the STV signal time difference △T between the mini LED backlight module and LCD, or the time difference between the mini LED backlight module and LCD timing controller IC is used. The pressure driving parameter table gives the LCD rise time and fall time manufacturing time difference, etc., to improve the asynchronous problem caused by the slow response time of the LCD, thereby improving the problem of screen smearing, and achieving better high-contrast synchronous display.

In addition, it can be understood that the foregoing embodiments are only exemplary descriptions of the present application, and the technical solutions of the various embodiments can be combined arbitrarily, provided that the technical features are not conflicting, the structure is not contradictory, and the purpose of the invention of the present application is not violated. For use with.

Furthermore, it is understandable that the above-mentioned display device may be: LTPO display device, Micro LED display device, liquid crystal panel, electronic paper, OLED panel, AMOLED panel, mobile phone, tablet computer, TV, monitor, notebook computer, digital photo frame Etc. Any product or component with display function.

In the several embodiments provided in this application, it should be understood that the disclosed device and method may be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or It can be integrated into another system, or some features can be ignored or not implemented. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.

In addition, the functional units in the various embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware, or may be implemented in the form of hardware plus software functional units.

The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be considered that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, a number of simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Terms such as "in one embodiment of the present disclosure" are used repeatedly. The term generally does not refer to the same embodiment; but it can also refer to the same embodiment. The terms "including", "having", and "including" are synonymous, unless the context indicates other meanings.

The above are only preferred embodiments of the present disclosure, and do not limit the present disclosure in any form. Although the present disclosure has been disclosed in specific embodiments as above, it is not intended to limit the present disclosure. Anyone familiar with the profession Those skilled in the art, without departing from the scope of the technical solution of the present disclosure, can make use of the technical content disclosed above to make slight changes or modification into equivalent embodiments with equivalent changes, but any content that does not depart from the technical solution of the present disclosure is based on this Any simple modifications, equivalent changes and modifications made to the above embodiments by the disclosed technical essence still fall within the scope of the technical solutions of the present disclosure.

Claims

A method for improving display quality, characterized in that it includes:

Adopt mini LED backlight module as the backlight module of the display panel;

Setting the time difference between the input signal of the mini LED backlight module and the display panel;

Reduce the response time of the display panel through a predetermined adjustment method, so as to realize synchronous display according to a preset high contrast ratio;

Wherein, the adjustment mode is related to the set time difference.
The method for improving display quality of claim 1, wherein:

The display panel is an LCD;

The predetermined adjustment method is to independently control the input signal time of the mini LED backlight module and the LCD.
The method for improving the display quality of claim 2, wherein:

The predetermined adjustment method is to control the time difference between the mini LED backlight module and the STV signal of the LCD, so as to reduce the response time of the LCD.
The method for improving the display quality of claim 3, wherein:

The time difference is a time difference ΔT designed for the display control IC;

The STV signal of the mini LED backlight module and the LCD is output to the Gate COF circuit or GOA circuit of the LCD according to the setting of ΔT, so that the two STV signals are superimposed to generate a time difference of ΔT.
The method for improving the display quality of claim 4, wherein:

The display control IC changes the rise time and fall time of the LCD by controlling the min LED backlight module and the ΔT of the LCD to reduce the response time of the LCD.
The method for improving the display quality of claim 5, wherein:

When the ΔT is different, the rise time and the fall time are different;

When the ΔT becomes longer, the rise time decreases, and the fall time increases;

When the ΔT is in the interval of 4-6 ms, the rise time and the fall time are both less than 5 ms.
The method for improving the display quality of claim 2, wherein:

The predetermined adjustment method is to use the overvoltage driving parameter table in the mini LED backlight module and the timing controller IC of the LCD to create the time difference between the rise time and the fall time, so as to reduce the response time of the LCD;

The time difference is equal to one frame time.
The method for improving the display quality of claim 7, wherein:

The mini LED backlight module and the LCD remain synchronized after the time difference takes effect;

The overvoltage driving gray scale setting of the rising area of the overvoltage driving parameter table of the mini LED backlight module is equal to the initial gray scale;

The overvoltage driving gray scale setting of the falling area of the overvoltage driving parameter table of the mini LED backlight module is equal to the initial gray scale;

The overvoltage driving gray scale setting of the falling area of the overvoltage driving parameter table of the LCD is equal to the initial gray scale.
The method for improving the display quality of claim 8, wherein:

The adjustment method is to reduce the turn-on time ΔT' of the mini LED backlight module by controlling to change the rise time and fall time of the LCD, so as to reduce the response time of the LCD.
9. The method for improving display quality of claim 9, wherein:

When the ΔT' is different, the rise time and the fall time are different;

When the refresh frequency of the display panel is 60HZ, one frame time is 16.67ms, and the rise time and the fall time are both 0;

When the refresh frequency of the display panel is 120 Hz, one frame time is 8.3 ms, and the rise time and the fall time are both 0.58 ms.
A display device comprising a display panel, wherein the display panel uses the method for improving display image quality according to any one of claims 1-10 to improve the display image quality.