WO2021109093A1 - 一种微器件及显示装置 - Google Patents

一种微器件及显示装置 Download PDF

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Publication number
WO2021109093A1
WO2021109093A1 PCT/CN2019/123421 CN2019123421W WO2021109093A1 WO 2021109093 A1 WO2021109093 A1 WO 2021109093A1 CN 2019123421 W CN2019123421 W CN 2019123421W WO 2021109093 A1 WO2021109093 A1 WO 2021109093A1
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electrode
semiconductor layer
type semiconductor
layer
disposed
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PCT/CN2019/123421
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English (en)
French (fr)
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黄国栋
杨顺贵
洪茂嘉
林雅雯
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重庆康佳光电技术研究院有限公司
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Priority to CN201980003014.XA priority Critical patent/CN111373551A/zh
Priority to PCT/CN2019/123421 priority patent/WO2021109093A1/zh
Publication of WO2021109093A1 publication Critical patent/WO2021109093A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

Definitions

  • the present invention relates to the technical field of light emitting diodes, in particular to a micro device and a display device.
  • a light-emitting diode is a semiconductor electronic component that can emit light.
  • the general light-emitting diode chip structure is divided into a horizontal chip (Lateral chip) and a vertical chip (Vertical chip) according to the position of the electrode.
  • a flip chip was developed after the horizontal chip.
  • the mainstream of Micro-LED adopts flip chip. After the sapphire substrate 7 is removed from the flip chip, light is emitted from the original substrate side.
  • the electrode occupies a large light emitting area, that is to say, for the flip chip, N
  • the electrode 4 and the P electrode 5 are on the same side.
  • the P electrode 5 is arranged on the P-type semiconductor layer 2. Since the electrode is mostly made of metal material, the electrode has the characteristic of opaque light. If the sapphire substrate 7 is not removed , So that most of the light emitted from the chip will be blocked by the electrode, which will affect the light-emitting effect.
  • the purpose of the present invention is to provide a micro device and a display device to prevent the light emitted from the chip downward from being blocked by the electrode, thereby improving the light-emitting effect of the chip.
  • a micro device includes a first semiconductor layer, a second semiconductor layer, a quantum hydrazine layer, a first electrode and a second electrode, the quantum hydrazine layer is disposed on the first semiconductor layer and the second semiconductor layer In between, the first electrode is disposed on the first semiconductor layer and is coupled to the first electrode, and the second electrode is disposed on the second semiconductor layer and is coupled to the second electrode. .
  • the first semiconductor layer is an N-type semiconductor layer
  • the first electrode is an N-electrode
  • the N-electrode is disposed on the N-type semiconductor
  • the second semiconductor layer is a P-type semiconductor Layer
  • the second electrode is a P electrode
  • the P electrode is circumferentially arranged on the P-type semiconductor layer.
  • the first semiconductor layer is a P-type semiconductor layer
  • the first electrode is a P electrode
  • the P electrode is disposed on the P-type semiconductor layer
  • the second semiconductor layer is an N-type semiconductor layer.
  • the semiconductor layer, the second electrode is an N electrode, and the N electrode is circumferentially arranged on the N-type semiconductor layer.
  • a transparent conductive layer is provided on the second semiconductor layer.
  • a sapphire substrate is provided on the side of the first semiconductor layer away from the quantum hydrazine layer.
  • a display device includes a transparent display substrate and a plurality of micro devices.
  • a plurality of circuits are provided on the transparent display substrate, and the circuits are electrically connected to the micro devices;
  • the micro devices include a first semiconductor layer, a second semiconductor layer, and a second semiconductor layer.
  • a semiconductor layer, a quantum hydrazine layer, a first electrode and a second electrode, the quantum hydrazine layer is disposed between the first semiconductor layer and the second semiconductor layer, the first electrode is disposed on the first semiconductor and The second electrode is coupled to the first electrode, and the second electrode is arranged on the second semiconductor layer and coupled to the second electrode.
  • the first semiconductor layer is an N-type semiconductor layer
  • the first electrode is an N-electrode
  • the N-electrode is disposed on the N-type semiconductor
  • the second semiconductor layer is a P-type semiconductor Layer
  • the second electrode is a P electrode
  • the P electrode is circumferentially arranged on the P-type semiconductor layer.
  • the first semiconductor layer is a P-type semiconductor layer
  • the first electrode is a P electrode
  • the P electrode is disposed on the P-type semiconductor layer
  • the second semiconductor layer is an N-type semiconductor layer.
  • the semiconductor layer, the second electrode is an N electrode, and the N electrode is circumferentially arranged on the N-type semiconductor layer.
  • a transparent conductive layer is provided on the second semiconductor layer.
  • a sapphire substrate is provided on the side of the micro device away from the transparent display substrate.
  • the present invention provides a micro device and a display device.
  • the micro device includes a first semiconductor layer, a second semiconductor layer, a quantum hydrazine layer, a first electrode, and a second electrode.
  • the quantum hydrazine layer is arranged on the first between the semiconductor layer and the second semiconductor layer, the first electrode is arranged on the first semiconductor and coupled to the first electrode, and the second electrode is arranged around the second semiconductor layer and is connected to the The second electrode is coupled.
  • the second electrode is arranged around the second semiconductor layer to prevent the light emitted from the chip downward from being blocked by the electrode, thereby improving the light-emitting effect of the chip.
  • FIG. 1 is a schematic diagram of the structure of a horizontal chip in the traditional technology.
  • FIG. 2 is a schematic diagram of the structure of a vertical chip in the conventional technology.
  • FIG. 3 is a schematic diagram of the structure of the flip chip in the conventional technology.
  • FIG. 4 is a schematic diagram of the light emitting direction of the flip chip in the conventional technology.
  • Fig. 5 is a side view of the micro device of the present invention.
  • Fig. 6 is a schematic diagram of the three-dimensional structure of the micro device of the present invention.
  • Fig. 7 is a top view of the micro device of the present invention.
  • N-type semiconductor layer 2. P-type semiconductor layer; 3. Quantum hydrazine layer; 4. N electrode; 5. P electrode; 6. Transparent conductive layer; 7. Sapphire substrate; 8. Transparent display substrate.
  • the present invention provides a micro-device and a display device.
  • the micro-device can be a light-emitting diode.
  • the invention particularly provides a light-emitting diode flip chip, which improves the light-emitting effect of the chip and realizes the diversity of light-emitting.
  • the present invention provides a preferred embodiment of a micro device.
  • a micro device includes a first semiconductor layer, a second semiconductor layer, a quantum hydrazine layer 3, a first electrode, and a second electrode.
  • the quantum hydrazine layer 3 Is disposed between the first semiconductor layer and the second semiconductor layer, the first electrode is disposed on the first semiconductor and is coupled to the first electrode, and the second electrode is disposed around the first semiconductor layer. On the second semiconductor layer and coupled with the second electrode.
  • the first semiconductor layer is an N-type semiconductor layer 1
  • the first electrode is an N electrode 4
  • the N electrode 4 is disposed on the N-type semiconductor layer 1
  • the second semiconductor layer is a P Type semiconductor layer 2
  • the second electrode is a P electrode 5
  • the P electrode 5 is arranged around the P type semiconductor layer 2
  • the quantum hydrazine layer 3 is arranged on the P type semiconductor layer 2 away from the One side of the P electrode 5, more specifically, the N electrode 4 may be directly laid on the N-type semiconductor layer 1 and coupled to the N-type semiconductor, and the P electrode 5 is arranged around the P-type semiconductor layer.
  • the quantum hydrazine layer 3 when the quantum hydrazine layer 3 is energized and emits light, the light emitted from the quantum hydrazine layer 3 is emitted below. Since the P electrode 5 is arranged around the sidewall of the P-type semiconductor layer 2, it is not directly arranged on the P-type semiconductor layer 2. On the semiconductor layer 2, therefore, the light emitted downward will not be blocked, so as to achieve a good luminous effect.
  • the present invention can also be provided as follows: the first semiconductor layer is a P-type semiconductor layer 2, the first electrode is a P electrode 5, the P electrode 5 is provided on the P-type semiconductor layer 2, and the second The semiconductor layer is an N-type semiconductor layer 1, the second electrode is an N-electrode 4, and the N-electrode 4 is circumferentially arranged on the N-type semiconductor layer 1. That is to say, the arrangement sequence of the N-type semiconductor layer 1 and the P-type semiconductor layer 2 is not fixed, and can be arranged as an N-type semiconductor layer 1, a quantum hydrazine layer 3, and a P-type semiconductor from top to bottom.
  • the layer 2 can also be from top to bottom and can also be configured as a P-type semiconductor layer 2, a quantum hydrazine layer 3, and an N-type semiconductor layer 1, that is, the electrode and the semiconductor layer are matched.
  • a transparent conductive layer 6 is provided on the second semiconductor layer.
  • the second electrode is arranged around the sidewall of the transparent conductive layer 6, for example, when the first semiconductor layer is an N-type When the semiconductor layer 1, the first electrode is the N electrode 4, the second semiconductor layer is the P-type semiconductor layer 2, and the second electrode is the P electrode 5, the P electrode 5 is arranged around the transparent conductive layer 6 on.
  • a sapphire substrate 7 is provided on the side of the first semiconductor layer away from the quantum hydrazine layer 3. Specifically, when the sapphire substrate 7 is provided on the side of the first semiconductor layer away from the quantum hydrazine layer 3, since the sapphire substrate 7 is opaque and cannot pass light, the chip can only emit light downward. The chip cannot emit light upward. When the sapphire substrate 7 is not provided on the side of the first semiconductor layer away from the quantum hydrazine layer 3, the chip can emit light upward and downward at the same time.
  • the display substrate provided on the second semiconductor layer is an opaque display substrate, and the sapphire substrate 7 is not provided on the first semiconductor layer at this time, the chip can only emit light upward at this time. Therefore, compared with the existing flip chip, since the electrodes are arranged directly on the second semiconductor, after the sapphire substrate 7 is removed, the light can only be emitted from the side of the original sapphire substrate 7, that is, it can only be realized The light is emitted upward, and the present invention realizes the diversity of light emission, that is, it can realize light up or down alone, or it can light up and down at the same time.
  • the present invention also provides a display device, the display device includes a transparent display substrate 8 and a plurality of micro-devices, the transparent display substrate 8 is provided with a plurality of circuits, the The circuit is electrically connected to the micro device; the micro device includes a first semiconductor layer, a second semiconductor layer, a quantum hydrazine layer 3, a first electrode and a second electrode, and the quantum hydrazine layer 3 is disposed on the first semiconductor layer. Between the second semiconductor layer and the second semiconductor layer, the first electrode is disposed on the first semiconductor and is coupled to the first electrode, and the second electrode is disposed on the second semiconductor layer and is connected to the second semiconductor layer. The second electrode is coupled. The details are as described above and will not be repeated here.
  • the first semiconductor layer is an N-type semiconductor layer 1
  • the first electrode is an N electrode 4
  • the N electrode 4 is disposed on the N-type semiconductor layer 1
  • the second semiconductor layer is a P Type semiconductor layer 2
  • the second electrode is a P electrode 5
  • the P electrode 5 is arranged around the P type semiconductor layer 2.
  • the first semiconductor layer is a P-type semiconductor layer 2
  • the first electrode is a P electrode 5
  • the P electrode 5 is disposed on the P-type semiconductor layer 2
  • the second semiconductor layer is N
  • the second electrode is an N-electrode 4
  • the N-electrode 4 is arranged around the N-type semiconductor layer 1. The details are as described above and will not be repeated here.
  • a transparent conductive layer 6 is provided on the second semiconductor layer. The details are as described above and will not be repeated here.
  • a sapphire substrate 7 is provided on the side of the micro device away from the transparent display substrate 8. The details are as described above and will not be repeated here.
  • the present invention provides a micro device and a display device.
  • the micro device includes a first semiconductor layer, a second semiconductor layer, a quantum hydrazine layer, a first electrode, and a second electrode.
  • the quantum hydrazine layer is provided with Between the first semiconductor layer and the second semiconductor layer, the first electrode is disposed on the first semiconductor and coupled to the first electrode, and the second electrode is disposed around the second semiconductor layer. On the semiconductor layer and coupled with the second electrode.
  • the second electrode is arranged around the second semiconductor layer to prevent the light emitted from the chip downward from being blocked by the electrode, thereby improving the light-emitting effect of the chip and realizing the diversity of the light-emitting direction of the chip.

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Abstract

一种微器件及显示装置，该微器件包括第一半导体层（1）、第二半导体层（2）、量子阱层（3）、第一电极（4）和第二电极（5），所述量子阱层（3）设置在所述第一半导体层（1）和第二半导体层（2）之间，所述第一电极（4）设置在所述第一半导体（1）上并与所述第一电极（4）耦接，所述第二电极（5）环绕设置在所述第二半导体层（2）上并与所述第二电极（5）耦接。通过将第二电极（5）环绕设置在第二半导体层（2）上，以达到避免芯片向下发出的光线被电极阻挡，从而提高了芯片的发光效果，并实现了芯片发光方向的多样性。

Description

一种微器件及显示装置 技术领域
本发明涉及发光二极管技术领域，尤其涉及的是一种微器件及显示装置。
背景技术
发光二极管(Light-emitting diode，LED)是一种能发光的半导体电子组件。如图1与图2所示，一般发光二极管芯片结构依电极的位置分为水平式芯片(Lateral chip)与垂直式芯片(Vertical Chip)。如图3与图4所示，为了解决散热的问题，水平式芯片之后又发展出了倒装式芯片(Flip chip)。目前Micro-LED主流是采用倒装式芯片,倒装式芯片移除蓝宝石衬底7后，由原基底侧发光。
如图3与图4所示，现有的Micro-LED采用的倒装式芯片中,其考虑点为电极(不透光)占发光区域极大，即是说对于倒装芯片而言，N电极4和P电极5均是位于同一侧，P电极5设置于P型半导体层2上，由于电极多是金属材料制成，因而电极具有不透光的特性，如果不移除蓝宝石衬底7，则使得芯片向下发出的光线将会大部分被电极阻挡，进而影响发光效果。
因此，现有技术还有待于改进和发展。
发明内容
鉴于上述现有技术的不足，本发明的目的在于提供一种微器件及显示装置，以达到避免芯片向下发出的光线被电极阻挡，从而提高了芯片的发光效果。
本发明的技术方案如下：
提供一种微器件，该微器件包括第一半导体层、第二半导体层、量子肼层、第一电极和第二电极，所述量子肼层设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。
本发明的进一步设置，所述第一半导体层为N型半导体层，所述第一电极为N电极，所述N电极设置在所述N型半导体上，所述第二半导体层为P型半导体层，所述第二电极为P电极，所述P电极环绕设置在所述P型半导体层上。
本发明的进一步设置，所述第一半导体层为P型半导体层，所述第一电极为P电极，所述P电极设置在所述P型半导体层上，所述第二半导体层为N型半导体层，所述第二电极为N电极，所述N电极环绕设置在所述N型半导体层上。
本发明的进一步设置，所述第二半导体层上设置有透明导电层。
本发明的进一步设置，所述第一半导体层远离所述量子肼层的一侧设置有蓝宝石衬底。
一种显示装置，包括透明显示基板和多个微器件，所述透明显示基板上设置有多个电路，所述电路与所述微器件电连接；所述微器件包括第一半导体层、第二半导体层、量子肼层、第一电极和第二电极，所述量子肼层设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。
本发明的进一步设置，所述第一半导体层为N型半导体层，所述第一电极为N电极，所述N电极设置在所述N型半导体上，所述第二半导体层为P型半导体层，所述第二电极为P电极，所述P电极环绕设置在所述P型半导体层上。
本发明的进一步设置，所述第一半导体层为P型半导体层，所述第一电极为P电极，所述P电极设置在所述P型半导体层上，所述第二半导体层为N型半导体层，所述第二电极为N电极，所述N电极环绕设置在所述N型半导体层上。
本发明的进一步设置，所述第二半导体层上设置有透明导电层。
本发明的进一步设置，所述微器件远离所述透明显示基板的一侧设置有蓝宝石衬底。
本发明所提供的一种微器件及显示装置，该微器件包括第一半导体层、第二半导体层、量子肼层、第一电极和第二电极，所述量子肼层设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。本发明通过将第二电极环 绕设置在第二半导体层上，以达到避免芯片向下发出的光线被电极阻挡，从而提高了芯片的发光效果。
附图说明
图1是传统技术中水平式芯片的结构示意图。
图2是传统技术中垂直式芯片的结构示意图。
图3是传统技术中倒装式芯片的结构示意图。
图4是传统技术中倒装式芯片的发光方向示意图。
图5是本发明中微器件的侧视图。
图6是本发明中微器件的立体结构示意图。
图7是本发明中微器件的俯视图。
附图中各标记：1、N型半导体层；2、P型半导体层；3、量子肼层；4、N电极；5、P电极；6、透明导电层；7、蓝宝石衬底；8、透明显示基板。
具体实施方式
本发明提供一种微器件及显示装置，该微器件可以为发光二极管，本发明特别提供了一种发光二极管倒装式芯片，其提高了芯片的发光效果，并实现了发光的多样性。为使本发明的目的、技术方案及效果更加清楚、明确，以下参照附图并举实例对本发明进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
在实施方式和申请专利范围中，除非文中对于冠词有特别限定，否则“一”与“所述”可泛指单一个或复数个。
另外，若本发明实施例中有涉及“第一”、“第二”等的描述，则该“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种 技术方案的结合不存在，也不在本发明要求的保护范围之内。
请同时参阅图5至图7，本发明提供了一种微器件的较佳实施例。
如图5、图6与图7所示，一种微器件，该微器件包括第一半导体层、第二半导体层、量子肼层3、第一电极和第二电极，所述量子肼层3设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。具体地，所述第一半导体层为N型半导体层1，所述第一电极为N电极4，所述N电极4设置在所述N型半导体层1上，所述第二半导体层为P型半导体层2，所述第二电极为P电极5，所述P电极5环绕设置在所述P型半导体层2上，所述量子肼层3设置在所述P型半导体层2远离所述P电极5的一侧，更具体地，所述N电极4可以是直接敷设在所述N型半导体层1上，且与N型半导体耦接，所述P电极5环绕设置在所述P型半导体层2的侧壁上。
通过上述技术方案，当所述量子肼层3通电发光后，量子肼层3发射的光线下方发出，由于P电极5是环绕P型半导体层2的侧壁设置的，并没有直接设置于P型半导体层2上，因而不会阻挡向下射出的光线，以实现良好的发光效果。
本发明还可以设置为：所述第一半导体层为P型半导体层2，所述第一电极为P电极5，所述P电极5设置在所述P型半导体层2上，所述第二半导体层为N型半导体层1，所述第二电极为N电极4，所述N电极4环绕设置在所述N型半导体层1上。也就是说，所述N型半导体层1和所述P型半导体层2的设置顺序不是固定不变的，从上至下既可以设置为N型半导体层1、量子肼层3以及P型半导体层2，还可以为上至下还可以设置为P型半导体层2、量子肼层3以及N型半导体层1，也即，电极与半导体层是匹配的。
请参阅图6，进一步地，所述第二半导体层上设置有透明导电层6。具体地，若所述第二半导体层上设置有透明导电层6，则所述第二电极环绕设置在所述透明导电层6的侧壁上，例如，当所述第一半导体层为N型半导体层1，所述第一电极为N电极4，所述第二半导体层为P型半导体层2，且所述第二电极为P电极5时，所述P电极5环 绕设置在透明导电层6上。
请继续参阅图5，进一步地，所述第一半导体层远离所述量子肼层3的一侧设置有蓝宝石衬底7。具体的，当所述第一半导体层远离所述量子肼层3的一侧设置有蓝宝石衬底7时，因蓝宝石衬底7是非透明的，不能通过光线，因而芯片只能够向下发出光线，芯片不能向上发出光线，当所述第一半导体层远离所述量子肼层3的一侧未设置有蓝宝石衬底7时，芯片可以同时向上、向下发出光线。
需要说明的是，当第二半导体层上设置的显示基板为不透明的显示基板时，且此时第一半导体层上未设置有蓝宝石衬底7，那么此时芯片只可以向上发出光线。因此，相对于现有的倒装芯片由于电极设置为直接敷设于第二半导体上的方式，在移除蓝宝石衬底7后，则只能由原蓝宝石衬底7侧发光，也即仅仅能够实现向上发出光线，而本发明则实现了发光的多样性，即既可以单独实现向上发光或向下发光，也能够实现同时向上和向下发光。
请参阅图5、图6与图7，本发明还提供了一种显示装置，该显示装置包括透明显示基板8和多个微器件，所述透明显示基板8上设置有多个电路，所述电路与所述微器件电连接；所述微器件包括第一半导体层、第二半导体层、量子肼层3、第一电极和第二电极，所述量子肼层3设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。具体如上所述，在此不再赘述。
进一步地，所述第一半导体层为N型半导体层1，所述第一电极为N电极4，所述N电极4设置在所述N型半导体层1上，所述第二半导体层为P型半导体层2，所述第二电极为P电极5，所述P电极5环绕设置在所述P型半导体层2上。具体如上所述，在此不再赘述。
进一步地，所述第一半导体层为P型半导体层2，所述第一电极为P电极5，所述P电极5设置在所述P型半导体层2上，所述第二半导体层为N型半导体层1，所述第二电极为N电极4，所述N电极4环绕设置在所述N型半导体层1上。具体如上所述，在此不再赘述。
进一步地，所述第二半导体层上设置有透明导电层6。具体如上所述，在此不再赘述。
进一步地，所述微器件远离所述透明显示基板8的一侧设置有蓝宝石衬底7。具体如上所述，在此不再赘述。
综上所述，本发明所提供的一种微器件及显示装置，该微器件包括第一半导体层、第二半导体层、量子肼层、第一电极和第二电极，所述量子肼层设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。本发明通过将第二电极环绕设置在第二半导体层上，以达到避免芯片向下发出的光线被电极阻挡，从而提高了芯片的发光效果，并实现了芯片发光方向的多样性。
应当理解的是，本发明的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (10)

  1. 一种微器件，其特征在于，包括第一半导体层、第二半导体层、量子肼层、第一电极和第二电极，所述量子肼层设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。
  2. 根据权利要求1所述的微器件，其特征在于，所述第一半导体层为N型半导体层，所述第一电极为N电极，所述N电极设置在所述N型半导体上；所述第二半导体层为P型半导体层，所述第二电极为P电极，所述P电极环绕设置在所述P型半导体层上。
  3. 根据权利要求1所述的微器件，其特征在于，所述第一半导体层为P型半导体层，所述第一电极为P电极，所述P电极设置在所述P型半导体层上；所述第二半导体层为N型半导体层，所述第二电极为N电极，所述N电极环绕设置在所述N型半导体层上。
  4. 根据权利要求1所述的微器件，其特征在于，所述第二半导体层上设置有透明导电层。
  5. 根据权利要求1所述的微器件，其特征在于，所述第一半导体层远离所述量子肼层的一侧设置有蓝宝石衬底。
  6. 一种显示装置，其特征在于，包括透明显示基板和多个微器件，所述透明显示基板上设置有多个电路，所述电路与所述微器件电连接；所述微器件包括第一半导体层、第二半导体层、量子肼层、第一电极和第二电极，所述量子肼层设置在所述第一半导体层和第二半导体层之间，所述第一电极设置在所述第一半导体上并与所述第一电极耦接，所述第二电极环绕设置在所述第二半导体层上并与所述第二电极耦接。
  7. 根据权利要求6所述的显示装置，其特征在于，所述第一半导体层为N型半导体层，所述第一电极为N电极，所述N电极设置在所述N型半导体层上，所述第二半导体层为P型半导体层，所述第二电极为P电极，所述P电极环绕设置在所述P型半导体层上。
  8. 根据权利要求6所述的显示装置，其特征在于，所述第一半导体层为P型半导 体层，所述第一电极为P电极，所述P电极设置在所述P型半导体上，所述第二半导体层为N型半导体层，所述第二电极为N电极，所述N电极环绕设置在所述N型半导体层上。
  9. 根据权利要求6所述的显示装置，其特征在于，所述第二半导体层上设置有透明导电层。
  10. 根据权利要求6所述的显示装置，其特征在于，所述微器件远离所述透明显示基板的一侧设置有蓝宝石衬底。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103094446A (zh) * 2011-11-04 2013-05-08 隆达电子股份有限公司 固态发光半导体元件
CN109216516A (zh) * 2017-06-30 2019-01-15 英属开曼群岛商錼创科技股份有限公司 微型发光二极管及显示面板
US20190139932A1 (en) * 2016-08-18 2019-05-09 Genesis Photonics Inc. Method of mass transferring electronic device
CN110034218A (zh) * 2019-04-19 2019-07-19 云谷（固安）科技有限公司 一种微型led芯片和显示面板

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7462868B2 (en) * 2006-02-26 2008-12-09 Formosa Epitaxy Incorporation Light emitting diode chip with double close-loop electrode design
TWI511332B (zh) * 2011-06-13 2015-12-01 Genesis Photonics Inc 發光二極體結構
CN108232034A (zh) * 2018-01-16 2018-06-29 福建兆元光电有限公司 一种半导体发光元件以及制备方法
CN208014728U (zh) * 2018-03-29 2018-10-26 昆山工研院新型平板显示技术中心有限公司 显示装置及其发光二极管芯片

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103094446A (zh) * 2011-11-04 2013-05-08 隆达电子股份有限公司 固态发光半导体元件
US20190139932A1 (en) * 2016-08-18 2019-05-09 Genesis Photonics Inc. Method of mass transferring electronic device
CN109216516A (zh) * 2017-06-30 2019-01-15 英属开曼群岛商錼创科技股份有限公司 微型发光二极管及显示面板
CN110034218A (zh) * 2019-04-19 2019-07-19 云谷（固安）科技有限公司 一种微型led芯片和显示面板

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