WO2021104312A1

WO2021104312A1 - Method for transmitting synchronization pulse, device, and system

Info

Publication number: WO2021104312A1
Application number: PCT/CN2020/131517
Authority: WO
Inventors: 邓扬; 周易; 蒋群; 叶建威
Original assignee: 三维通信股份有限公司
Priority date: 2019-11-29
Filing date: 2020-11-25
Publication date: 2021-06-03
Also published as: CN110995402B; CN110995402A

Abstract

The present invention relates to a method for transmitting a synchronization pulse, a device, and a system. The method comprises: acquiring a communication radio frequency signal, and extracting a first synchronization pulse signal from the communication radio frequency signal; performing amplitude shift keying modulation on the first synchronization pulse signal to obtain a modulated signal; and performing envelope detection on the modulated signal to obtain an envelope pulse, and performing pulse shaping on the envelope pulse. The present invention employs an ASK modulation scheme to perform transmission, such that delay of synchronization pulse transmission is reduced and no additional delay circuit is required, thereby reducing the complexity of a system. Moreover, shaping of an envelope pulse enables more accurate recovery of a synchronization pulse.

Description

Synchronous pulse transmission method, device and system

Related application

This application claims the priority of the Chinese patent application filed on November 29, 2019, the application number is 201911205410.9, and the invention title is "Synchronous Pulse Transmission Method, Device and System", the entire content of which is incorporated into this application by reference.

Technical field

This application relates to the field of communication technology, and in particular to a method, device and system for synchronous pulse transmission.

Background technique

In a wireless communication system using time division multiplexing (TDD), the uplink and downlink signals are transmitted in the same frequency band in time division. When the signal is transmitted at the same frequency in time-sharing, the baseband processor or synchronization controller in the communication system needs to determine the direction of the data to be transmitted according to the content of the special subframe, and output the uplink and downlink synchronization pulse signal to switch the uplink and downlink of the transceiver road. In the base stations that use fourth-generation (4G) and fifth-generation (5G) wireless communication systems, such as small cell or picocell, the access unit (AU) and each remote unit (RU) each contain radio frequency Transceiver link. These transceiver links need to work in the uplink or downlink state in time-sharing to ensure the normal operation of the entire communication system.

Generally, in 4G and 5G communication devices using TDD working mode, TDD synchronization signals can be included in protocols such as Common Public Radio Interface (CPRI) through media such as optical fibers, so that the transceiver systems of AU and RU can work synchronously . This transmission method requires complex coding, and requires expensive devices such as Field Programmable Logic Gate Array (FPGA) and Serial Transceiver (Serdes) to resolve the TDD synchronization pulse signal.

In addition, the TDD synchronization signal can be transmitted through the radio frequency feeder, and the high-speed data transmission chip can be used for the radio frequency feeder transmission. Both the gateway and the active antenna side need to adopt high-speed data transmission chips and programmable logic circuits to realize the analysis of data packets and the maintenance and synchronization of pulse signals. At the same time, in the process of data transmission, there will be packet loss, which affects the stability of the system. The disadvantages of this implementation method are complex structure, high cost, and low reliability.

Summary of the invention

According to various embodiments of the present application, a synchronization pulse transmission method is provided, and the method includes the following steps:

Receiving the modulated signal transmitted by the transmitting end, the modulating signal is obtained by the transmitting end performing amplitude shift keying modulation on the first synchronization pulse signal, and the first synchronization pulse signal is extracted by the transmitting end from the communication radio frequency signal;

Envelope detection is performed on the modulated signal to obtain an envelope pulse, and pulse shaping is performed on the envelope pulse.

According to various embodiments of the present application, another synchronization pulse transmission method is also provided, and the method includes the following steps:

Acquire a communication radio frequency signal, and extract the first synchronization pulse signal from the communication radio frequency signal;

Performing amplitude shift keying modulation on the first synchronization pulse signal to obtain a modulated signal;

In one of the embodiments, the step of pulse shaping the envelope pulse includes:

Judge the envelope pulse according to the first comparison level, obtain the first decision pulse, judge the envelope pulse according to the second comparison level, obtain the second decision pulse, combine the first decision pulse and the second decision pulse to obtain the second synchronization pulse signal , Wherein the first comparison level is less than the second comparison level.

For envelope pulse shaping, the envelope pulse is judged according to the first comparison level to obtain the first decision pulse, the envelope pulse is decided according to the second comparison level to obtain the second decision pulse, and the first decision pulse and the second decision pulse are combined to obtain the first decision pulse. Two synchronization pulse signals can recover the synchronization pulse more accurately.

In one of the embodiments, the envelope pulse is decided according to the first comparison level to obtain the first decision pulse, and the envelope pulse is decided according to the second comparison level, and the step of obtaining the second decision pulse includes:

The envelope pulse is judged according to the first comparison level. If the envelope pulse is less than the first comparison level, it is judged as a low level; if the envelope pulse is greater than the first comparison level, it is judged as a high level; A decision pulse;

The envelope pulse is judged according to the second comparison level. If the envelope pulse is less than the second comparison level, it is judged to be a high level; if the envelope pulse is greater than the second comparison level, it is judged to be a low level; Two decision pulses.

In the above step of shaping the envelope pulse, a two-level comparison method is adopted, and the first comparison level is used forward and the second comparison level reverse to determine the rising and falling edges of the pulse; the two-level decision comparison method Overcoming the influence of the integral effect on the waveform, the delay of the rising edge and the falling edge can be controlled to a small extent, and the accuracy and reliability of the demodulation are improved.

In one of the embodiments, the step of combining the first decision pulse and the second decision pulse to obtain the second synchronization pulse signal includes:

Extract the high-level starting point of the first decision pulse as the high-level starting point of the second synchronization pulse signal, and extract the high-level starting point of the period corresponding to the second decision pulse as the low-level starting point of the second synchronization pulse signal to obtain the second Sync pulse signal.

Extract the low-level starting point of the first decision pulse as the low-level starting point of the second synchronization pulse signal, and extract the low-level starting point of the period corresponding to the second decision pulse as the high-level starting point of the second synchronization pulse signal to obtain the second Sync pulse signal.

Pull the AND on the first decision pulse and the second decision pulse to obtain two short pulses, and select the rising edge positions of the two short pulses to be the positions of the upper and lower edges of the second synchronization pulse respectively.

Specifically, two short pulses are obtained, and after the pulse delay, the two rising edges are delayed to the next cycle. After the pulse delay, the two rising edges are accurately delayed to the next cycle, and zero delay can be achieved.

Further, two short pulses are obtained, and the two short pulses are divided into one pulse.

The above process of line AND, pulse delay, and frequency division can simplify the output process of combining the first decision pulse and the second decision pulse to obtain the second synchronization pulse signal, so that the upper and lower edges of the second synchronization pulse are extremely low compared to the first synchronization pulse. Delay.

In one of the embodiments, the first comparison level and the second comparison level are obtained according to the preset high and low level ratio; the preset high and low level ratio is the ratio of the envelope pulse amplitude corresponding to the first comparison level and the second comparison level proportion.

In one of the embodiments, the synchronization pulse transmission method further includes the following steps:

Read the envelope pulse amplitude and store it in the sampling queue;

Determine the continuous interval of the envelope pulse amplitude greater than the preset amplitude threshold in the sampling queue, take the average of the envelope pulse amplitude in the continuous interval, as the peak envelope and store it in the peak envelope queue;

Perform multiple moving average filtering on the peak envelope queue to obtain the maximum value queue;

Obtain a set of first comparison levels and second comparison levels according to each amplitude value in the maximum value queue; obtain a comparison level queue according to multiple sets of first comparison levels and second comparison levels;

The updated comparison level queue is output every first preset time, and the comparison level corresponding to the envelope pulse is selected in the comparison level queue as the first comparison level and the second comparison level in the pulse shaping step of the envelope pulse Comparison level.

As the amplitude of the envelope pulse changes, the corresponding decision level will also follow the maximum value of the envelope pulse according to a preset ratio to track changes, realizing the decision in the case of a changing input signal.

Specifically, when the duration of the envelope pulse amplitude being less than the preset amplitude threshold exceeds a certain preset time, the alarm information is reported. The fault alarm function is added to facilitate users to locate faults.

According to various embodiments of the present application, there is also provided a synchronization pulse transmission device, which includes:

The envelope detection module is used to detect the modulation signal to obtain an envelope pulse; the modulation signal is obtained by amplitude shift keying modulation of the first synchronization pulse signal;

The envelope pulse shaping module is used for shaping the envelope pulse to obtain the second synchronization pulse signal.

According to various embodiments of the present application, another synchronization pulse transmission device is also provided, and the device includes:

The synchronization pulse extraction module is used to extract the first synchronization pulse signal from the communication radio frequency signal;

The modulation module is used to perform amplitude shift keying modulation on the first synchronization pulse signal to obtain a modulation signal;

The modulated signal is used for envelope detection to obtain envelope pulses and pulse-shape the envelope pulses.

According to various embodiments of the present application, there is also provided a synchronization pulse transmission system, the system including:

Envelope detection module, used for envelope detection of modulated signal to obtain envelope pulse;

In one of the embodiments, the envelope pulse shaping module includes a first comparator, a second comparator and a synchronization pulse generation module;

The first comparator is used for judging the envelope pulse according to the first comparison level to obtain the first judgment pulse;

The second comparator is used for judging the envelope pulse according to the second comparison level to obtain the second judgment pulse;

The synchronization pulse generation module is used to combine the first decision pulse and the second decision pulse to obtain a second synchronization pulse signal.

In one of the embodiments, the two input terminals of the first comparator input the first comparison level and the envelope pulse respectively, and the two input terminals of the second comparator input the second comparison level and the envelope pulse respectively; The output terminals of the second comparator and the second comparator are connected to the synchronization pulse generation module.

In one of the embodiments, two comparators output the first decision pulse and the second decision pulse, and the output terminal of the comparator with an open-drain output is pulled up and connected.

Specifically, the line and the output terminal are connected to a pulse delay circuit.

Further, the line and the output terminal are connected to a D flip-flop.

In one of the embodiments, the envelope pulse shaping module further includes a control module; the control module collects data of the envelope pulse to generate a first comparison level and a second comparison level.

In one of the embodiments, the control module is used to read the envelope pulse amplitude and store it in the sampling queue; determine the continuous interval of the envelope pulse amplitude greater than the preset amplitude threshold in the sampling queue, and determine the envelope pulse amplitude in the continuous interval. Take the average value as the peak envelope and store it in the peak envelope queue; perform multiple moving average filtering on the peak envelope queue to obtain the maximum value queue; obtain a set of first comparisons according to each amplitude value in the maximum value queue The level and the second comparison level; the comparison level queue is obtained according to multiple sets of the first comparison level and the second comparison level; and the updated comparison level queue is output every first preset time.

In one of the embodiments, the control module includes a single-chip microcomputer, and the envelope pulse amplitude is read through the ADC in the single-chip microcomputer and stored in the sampling queue; and the updated comparison level queue is output through the DAC in the single-chip microcomputer at regular intervals.

Using the single-chip microcomputer to assist in tracking and adjusting the two comparison levels, on the one hand, it realizes the judgment in the case of changing input signals, and on the other hand, it also adds a fault alarm function to the system, which is convenient for users to locate faults.

The above-mentioned devices and systems involve passive devices, linear devices, simple logic circuits and low-speed MCUs, and have extremely low costs compared to traditional methods.

The above synchronization pulse transmission method, device and system have the following advantages:

Perform amplitude shift keying modulation on the first sync pulse signal at the sync pulse transmitter to obtain the modulated signal; demodulate the modulated signal at the sync pulse receiver. The steps of demodulation include envelope detection and envelope pulse shaping; obtained after demodulation The second sync pulse signal. The use of amplitude shift keying modulation mode transmission makes the synchronization pulse low in delay during transmission, no additional delay circuit is needed, and the complexity of the system is reduced.

Description of the drawings

In order to better describe and illustrate the embodiments and/or examples of the inventions disclosed herein, one or more drawings may be referred to. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and/or examples, and the best mode of these inventions currently understood.

Fig. 1 is a flowchart of a synchronization pulse transmission method according to an embodiment of the present application.

Fig. 2 is a schematic diagram of the steps of envelope pulse shaping according to an embodiment of the present application.

Fig. 3 is a schematic diagram of a judgment to obtain a second synchronization pulse signal according to an embodiment of the present application.

Fig. 4 is a working flowchart of the MCU of an embodiment of the present application.

Fig. 5 is a schematic diagram of a synchronization pulse transmission system according to an embodiment of the present application.

Fig. 6 is a schematic diagram of an envelope detection module according to an embodiment of the present application.

Fig. 7 is a schematic diagram of an envelope pulse shaping module according to an embodiment of the present application.

Fig. 8 is a schematic diagram of an active antenna indoor signal coverage system according to an embodiment of the present application.

FIG. 9 is a schematic structural diagram of a transmission system according to an embodiment of the present application.

FIG. 10 is a schematic diagram of signal waveform changes in the transmission system according to an embodiment of the present application.

FIG. 11 is a working flow chart of the active antenna side MCU of the embodiment of the present application.

FIG. 12 is a schematic diagram of waveforms of a two-level comparison process in an embodiment of the present application.

Detailed ways

In order to facilitate the understanding of this application, and to make the above-mentioned objectives, features and advantages of this application more obvious and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. In the following description, many specific details are explained in order to fully understand the application, and the preferred embodiments of the application are shown in the accompanying drawings. However, this application can be implemented in many different forms and is not limited to the implementation described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of this application more thorough and comprehensive. This application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of this application. Therefore, this application is not limited by the specific embodiments disclosed below.

Obviously, the drawings in the following description are only some examples or embodiments of the application. For those of ordinary skill in the art, without creative work, the application can also be applied to the application according to these drawings. Other similar scenarios. In addition, it can also be understood that although the efforts made in this development process may be complicated and lengthy, for those of ordinary skill in the art related to the content disclosed in this application, the technology disclosed in this application Some design, manufacturing or production changes made on the basis of the content are just conventional technical means, and should not be construed as insufficient content disclosed in this application.

The reference to "embodiments" in this application means that a specific feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those of ordinary skill in the art clearly and implicitly understand that the embodiments described in this application can be combined with other embodiments without conflict.

Unless otherwise defined, the technical terms or scientific terms involved in this application shall have the usual meanings understood by those with general skills in the technical field to which this application belongs. The terms "a", "an", "one", "the" and other similar words involved in this application do not mean a quantity limit, and may mean a singular or plural number. The terms "include", "include", "have" and any of their variations involved in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or product that includes a series of steps or modules (units) The equipment is not limited to the listed steps or units, but may further include unlisted steps or units, or may further include other steps or units inherent to these processes, methods, products, or equipment. Similar words such as "connected", "connected", "coupled" and the like referred to in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "plurality", "individual", and "different" mentioned in this application refer to two or more. "And/or" describes the association relationship of the associated objects, indicating that there can be three types of relationships. For example, "A and/or B" can indicate that: A alone exists, both A and B exist, and B alone exists. The character "/" generally indicates that the associated objects before and after are in an "or" relationship. The terms "first", "second", etc. involved in this application only distinguish similar objects, and do not represent a specific order for the objects.

In a wireless communication system using time division multiplexing (TDD), the uplink and downlink signals are transmitted in the same frequency band in time division. When the signal is transmitted at the same frequency in time-sharing, the baseband processor or synchronization controller in the communication system needs to determine the direction of the data to be transmitted according to the content of the special subframe, and output the uplink and downlink synchronization pulse signal to switch the uplink and downlink of the transceiver road. The synchronization pulse controls the switches of the devices in the entire transceiver signal chain, and determines the current signal transmission direction of the system. These transceiver links need to work in the uplink or downlink state in time-sharing to ensure the normal operation of the entire communication system.

The embodiment of the present application provides a synchronization pulse transmission method. FIG. 1 is a flowchart of the synchronization pulse transmission method according to an embodiment of the present application. As shown in FIG. 1, the process includes the following steps:

Obtain the communication radio frequency signal at the synchronization pulse transmitter, and extract the first synchronization pulse signal from the communication radio frequency signal; performing amplitude shift keying (ASK) modulation on the first synchronization pulse signal to obtain the modulated signal includes: inputting the radio frequency signal as the carrier signal , So that the strength of the carrier signal changes with the change of the high and low levels of the first synchronization pulse signal to obtain a modulated signal. Specifically, the carrier frequency is selected in combination with the operating frequency of the transmission device between the transmitting end and the receiving end and the signal frequency of the communication system. The ASK modulation method is adopted for transmission, so that the synchronization pulse has a lower delay during transmission, and no additional delay circuit is required, which reduces the complexity of the system.

In a specific application scenario, an indoor coverage system composed of a gateway and an active antenna transmits 4G and 5G signals. The gateway and the active antenna are interconnected by radio frequency feeders; the radio frequency feeder transmits TDD synchronization pulses, and the gateway is the transmitter. The source antenna is the receiving end, and the transmission device is a radio frequency feeder. The carrier frequency is selected according to the working frequency of the radio frequency feeder and the frequency of 4G and 5G signals. The carrier frequency needs to avoid the frequency band where the public network transmits 4G/5G signals to avoid interference.

The modulation signal is demodulated at the synchronization pulse receiving end, and the steps of demodulation include: performing envelope detection on the modulation signal, obtaining an envelope pulse, and performing pulse shaping on the envelope pulse. The envelope pulse is obtained by envelope detection, and the way to obtain the envelope pulse includes the amplitude envelope pulse obtained by the detection or the synchronization envelope pulse.

The amplitude envelope pulse is obtained by envelope detection, and the amplitude envelope pulse can be obtained by diode envelope detection. Diode envelope detection is an asynchronous demodulation method with a simple structure and a shorter time delay can be obtained.

The synchronous envelope pulse can also be obtained through envelope detection, and the synchronous envelope pulse can be obtained by using a logarithmic detector. When extracting the envelope of a modulation signal with a large amplitude change, a logarithmic detector can be used; the amplification characteristic of the logarithmic detector is a piecewise linear logarithmic amplification, and a diode detection is used to extract the packet at each linear gain stage output. And superimpose all the envelopes to form a synchronous envelope pulse with the required logarithmic response.

Specifically, after the envelope pulse signal is obtained, the pulse signal is low-pass filtered to filter out high-frequency clutter.

Specifically, after obtaining the envelope pulse signal, the envelope pulse is amplified. Due to the uncertainty of factors such as the line loss of the transmission device and the number of networking between the transmitting end and the receiving end, the amplitude of the signal entering the detection will have a certain dynamic range. Considering that the amplitude of the input signal has exponential characteristics, in order to obtain a certain receiving dynamic range, an amplifier with logarithmic characteristics is used to amplify the envelope pulse to obtain a more linear output.

Specifically, after the envelope pulse signal is obtained, the pulse signal is low-pass filtered, and the envelope pulse is further amplified. The use of logarithmic detection and amplification can make the receiver have a larger dynamic range and increase the flexibility of networking.

The modulation signal is demodulated at the synchronization pulse receiving end, and the steps of demodulation include: performing envelope detection on the modulation signal, obtaining an envelope pulse, and performing pulse shaping on the envelope pulse. Because the envelope pulse obtained by the detection is affected by the capacitance in the detection circuit, its rising and falling edges are slowed down to a certain extent; the rising edge rises faster near the low level; the falling edge falls more quickly near the high level. fast. In order to recover the synchronization pulse more accurately, reduce the time delay of the pulse, and shape the envelope pulse.

The step of pulse shaping the envelope pulse includes: judging the envelope pulse according to the first comparison level VL, obtaining the first decision pulse, judging the envelope pulse according to the second comparison level VH, obtaining the second decision pulse, and combining the first decision pulse. The decision pulse and the second decision pulse obtain a second synchronization pulse signal.

In an embodiment, as shown in Fig. 2, the step of shaping the envelope pulse specifically includes:

The envelope pulse is judged according to the first comparison level VL. If the envelope pulse is less than the first comparison level VL, it is judged to be a low level; if the envelope pulse is greater than the first comparison level VL, it is judged to be a high level; A decision pulse;

The envelope pulse is judged according to the second comparison level VH. If the envelope pulse is less than the second comparison level VH, it is judged to be a high level; if the envelope pulse is greater than the second comparison level VH, it is judged to be a low level; Second decision pulse;

Combine the first decision pulse and the second decision pulse to obtain a second synchronization pulse signal.

Specifically, the high/low level starting point of the first decision pulse is extracted as one of the level starting points of the second synchronization pulse signal, and the high/low level starting point of the period corresponding to the second decision pulse is extracted as the second synchronization pulse signal Another level starting point, the second synchronization pulse signal is obtained.

In one embodiment, the step of shaping the envelope pulse includes:

Assuming VL<VH, use the first comparison level VL to judge the envelope pulse in the positive direction. When the envelope pulse is less than the first comparison level VL, it is judged to be a low level; when the envelope pulse is greater than the first comparison level VL , The judgment is high; the first judgment pulse is obtained after the judgment is completed;

Use the second comparison level VH to reversely judge the envelope pulse. When the envelope pulse is less than the second comparison level VH, the decision is high; when the envelope pulse is greater than the second comparison level VH, the decision is low. Level; the second decision pulse is obtained after the decision is completed.

As shown in Fig. 3, the serial number 1-the high-level start of the first judgment pulse; 4-the low-level start of the first judgment pulse; 2- the low-level start of the second judgment pulse; 3- the high-level start of the second judgment pulse.

The combination of "13" can be used: extract the high-level starting point of the first decision pulse as the high-level starting point of the second synchronization pulse signal, and extract the high-level starting point of the period corresponding to the second decision pulse as the second synchronization pulse signal Starting at the low level, the second synchronization pulse signal is obtained.

Or use the combination of "24" to extract the low-level starting point of the first decision pulse as the low-level starting point of the second synchronization pulse signal, and extract the low-level starting point of the period corresponding to the second decision pulse as the second synchronization pulse signal The high-level starting point, the second synchronization pulse signal is obtained.

The foregoing embodiment adopts a two-level comparison method, using the first comparison level VL in the forward direction and the second comparison level VH in the reverse direction to determine the rising edge and the falling edge of the pulse. The two-level decision comparison method overcomes the influence of the integral effect on the waveform, so that the delay of the rising edge and the falling edge can be controlled to a small extent, and the accuracy and reliability of the system are improved. The integral effect is formed by input resistance, load resistance, and load capacitance. This effect will slow the rising and falling edges of the ASK signal during the detection process, thereby increasing the detection delay.

Specifically, after the envelope pulse signal is obtained, the first and the second two pulses are output through a two-level decision; the two pulses are ANDed through the pull-up line to obtain two short rising edge pulses. The signal after the line and is transformed into two short pulses. The two short pulses respectively represent the position of the upper and lower edges of the second synchronization pulse that is restored later.

Specifically, the two rising edge short pulses are divided into one pulse, that is, the second synchronization pulse signal. The upper and lower edges of this sync pulse have a very low delay to the sync pulse at the transmitter.

Furthermore, after obtaining two short pulses with rising edges, after pulse delay, the two rising edges are accurately delayed to the next cycle, so as to achieve zero delay.

Specifically, the first comparison level VL and the second comparison level VH are obtained according to the preset high and low level ratio; the preset high and low level ratio is the ratio of the pulse amplitudes corresponding to the first comparison level VL and the second comparison level VH proportion.

In one embodiment, the difference from the previous embodiment is that the control module is used to assist in tracking and adjusting the two comparison levels, so that the two comparison levels dynamically change, so as to realize the decision in the case of a changing input signal. The specific steps include:

After the system is turned on, the control module reads the pulse envelope amplitude and stores it in the sampling queue;

When the duration of the envelope pulse amplitude being less than the preset amplitude threshold exceeds the second preset time, report an alarm message;

Obtain a set of first comparison level VL and second comparison level VH according to each amplitude value in the maximum value queue; finally obtain the comparison level VL and VH queue;

The updated comparison level VL and VH queues are output every first preset time, and the comparison level corresponding to the envelope pulse is selected in the comparison level queue as the first comparison circuit in the pulse shaping step of the envelope pulse Harmonize the second comparison level.

Determine the envelope pulse according to the first comparison level VL to obtain the first decision pulse, decide the envelope pulse according to the second comparison level VH to obtain the second decision pulse, combine the first decision pulse and the second decision pulse to obtain the second synchronization pulse signal . In this way, as the amplitude of the envelope pulse changes, the corresponding decision level will also track and change in accordance with the preset ratio with the maximum value of the envelope pulse.

In a specific application scenario, a single-chip microcomputer (MCU) is used as a control module. After the entire system is turned on, the pulse envelope amplitude is read through the on-chip ADC and stored in the sampling queue. When the amplitude of the input signal is less than the preset threshold continuously for a certain preset time, the MCU will report an alarm message indicating that the link is attenuated too much or has been disconnected. Otherwise, by judging the sampling queue, the value greater than the preset threshold will be averaged in its continuous interval, as the peak envelope and stored in the peak envelope queue. Perform N-time moving average filtering on the peak envelope queue to obtain the maximum value queue (the maximum value of the pulse envelope); obtain the comparison level VL and VH queue according to the preset high and low level ratio, and update to the on-chip DAC every M seconds Output. The MCU workflow is shown in Figure 4. Using the MCU to assist in tracking and adjusting the two comparison levels, on the one hand, it realizes the judgment in the case of changing input signals. On the other hand, it also adds a fault alarm function to the system to facilitate users to locate faults.

In one embodiment, a synchronization pulse transmission system is provided. As shown in FIG. 5, the system includes:

Envelope detection module, used to detect the modulated signal to obtain envelope pulse;

The modulation module is used to perform ASK modulation on the first synchronization pulse signal to obtain a modulation signal: input a radio frequency signal as a carrier signal, so that the strength of the carrier signal changes with the change of the high and low levels of the first synchronization pulse signal to obtain the modulation signal. Specifically, the carrier frequency is selected in combination with the operating frequency of the transmission device between the transmitting end and the receiving end and the signal frequency of the communication system.

The modulation module includes a radio frequency oscillator and a radio frequency switch. The radio frequency signal generated by the radio frequency oscillator is passed into the radio frequency switch for modulation, and the first synchronous pulse signal is input to the control terminal of the radio frequency switch, so that the strength of the input carrier signal increases with the level of the pulse signal. ASK signal can be obtained by level change. In order for the receiving circuit to obtain more accurate rising and falling edge signals during demodulation, the opening and closing time of the radio frequency switch needs to be as short as possible. The radio frequency oscillator can use a frequency synthesizer integrated circuit or an LC resonant circuit.

The envelope detection module is used to detect the modulated signal to obtain an envelope pulse.

The envelope detection module adopts amplitude envelope pulse detection mode. Obtaining the amplitude envelope pulse can be achieved by using diode envelope detection, which is an asynchronous demodulation method with a simple structure and a shorter time delay can be obtained. In a specific embodiment, as shown in FIG. 6, after rectifying the input modulated signal through a unidirectional diode device, and then inputting an integral characteristic circuit, the low-frequency envelope information can be obtained. Part of the current of the input signal charges the capacitor during the positive rising period and discharges through the load resistor RL during the negative half period to form an envelope. Among them, the impedance of the parallel capacitor C is smaller than the impedance of the diode, and the parallel capacitor C is much larger than the junction capacitance of the diode. The value of C and RL will affect the discharge speed, resulting in slower rise and fall times. Different carrier frequency and envelope frequency pulse width will affect the rise and fall time of the detected pulse, so the relevant parameters need to be tested in the circuit debugging process.

The envelope detection module adopts the synchronous envelope pulse detection mode. Obtaining the synchronous envelope pulse can be achieved by using a logarithmic detector. In a specific embodiment, when extracting the envelope of a modulation signal with a large amplitude change, a logarithmic detector is used to achieve; the amplification characteristic of the logarithmic detector is a piecewise linear logarithmic amplification, and in each linear gain stage The output uses diode detection to extract the envelope, and superimpose all envelopes to form a synchronous envelope pulse with the required logarithmic response.

Specifically, a filter is connected after the envelope detection module to low-pass filter the pulse signal to filter out high-frequency clutter.

Specifically, an amplifier is connected after the envelope detection module to amplify the envelope pulse. Due to the uncertainty of factors such as the line loss of the transmission device and the number of networking between the transmitting end and the receiving end, the amplitude of the signal entering the detection will have a certain dynamic range. Considering that the amplitude of the input signal has exponential characteristics, in order to obtain a certain receiving dynamic range, an amplifier with logarithmic characteristics is used to amplify the envelope pulse to obtain a more linear output.

Specifically, the filter and amplifier are connected after the envelope detection module, the pulse signal is low-pass filtered, and the envelope pulse is further amplified.

Because the envelope pulse obtained by the detection is affected by the capacitance in the detection circuit, its rising and falling edges are slowed down to a certain extent; the rising edge rises faster near the low level; the falling edge falls more quickly near the high level. fast. In order to recover the synchronization pulse more accurately, reduce the time delay of the pulse, and shape the envelope pulse.

In one embodiment, the envelope pulse shaping module includes a first comparator, a second comparator and a synchronization pulse generation module;

Specifically, as shown in Fig. 7, the two input terminals of the first comparator respectively input the first comparison level VL and the envelope pulse, and the two input terminals of the second comparator respectively input the second comparison level VH and the envelope pulse. ; The output terminals of the first comparator and the second comparator are connected to the synchronization pulse generation module, and the synchronization pulse generation module generates the second synchronization pulse signal according to the output of the first comparator and the second comparator.

In one embodiment, the first comparison level VL is connected to the "-" input terminal of the first comparator, and the envelope pulse is connected to the "+" input terminal of the first comparator; the second comparison level VH is connected to the first comparator's "+" input terminal; The "+" input terminal of the second comparator, and the envelope pulse is connected to the "-" input terminal of the second comparator; when the voltage at the "+" input terminal is higher than the "-" input terminal, the voltage comparator output is high ; When the "+" input terminal voltage is lower than the "-" input terminal, the voltage comparator output is low.

Specifically, the comparator adopts a high-speed comparator. After two high-speed comparators, two pulses are output, and the output terminal of the open-drain output comparator is pulled up and connected. The signal after the line is transformed into two short pulses. The two short pulses respectively represent the position of the upper and lower edges of the synchronized pulse to be restored later.

Further, by passing two short pulses into the pulse delay circuit, the two rising edges can be accurately delayed to the next cycle, thereby achieving zero delay.

Specifically, through the D flip-flop, the two rising edge short pulses are divided into one pulse. This pulse is the last required second synchronization pulse. The upper and lower edges of this sync pulse have a very low delay to the first sync pulse.

In one embodiment, the difference from the previous embodiment is that the control module is used to assist in tracking and adjusting the two comparison levels, so that the two comparison levels dynamically change, so as to realize the decision in the case of a changing input signal.

The envelope pulse shaping module includes a first comparator, a second comparator, a synchronization pulse generation module and a control module;

The control module collects data of the envelope pulse, and generates a first comparison level VL and a second comparison level VH;

The first comparator decides the envelope pulse according to the first comparison level VL, and obtains the first decision pulse;

The second comparator decides the envelope pulse according to the second comparison level VH, and obtains the second decision pulse;

The synchronization pulse generation module combines the first decision pulse and the second decision pulse to obtain a second synchronization pulse signal.

The concrete steps of shaping the envelope pulse include:

The amplitude of the input signal is less than the preset amplitude threshold continuously for a certain preset time, and an alarm information is reported on the control module, indicating that the link is attenuated too much or has been disconnected;

The sampling queue is judged, and the values greater than the preset amplitude threshold are averaged in its continuous interval, as the peak envelope and stored in the peak envelope queue;

The updated comparison level VL and VH queue output at regular intervals;

In a specific application scenario, a single-chip microcomputer (MCU) is used as a control module. After the entire system is turned on, the pulse envelope amplitude is read through the on-chip ADC and stored in the sampling queue. When the amplitude of the input signal is less than the preset threshold continuously for a certain preset time, the MCU will report an alarm message indicating that the link is attenuated too much or has been disconnected. Otherwise, by judging the sampling queue, the value greater than the preset threshold will be averaged in its continuous interval, as the peak envelope and stored in the peak envelope queue. Perform N-time moving average filtering on the peak envelope queue to obtain the maximum value queue (the maximum value of the pulse envelope); obtain the comparison level VL and VH queue according to the preset high and low level ratio, and update to the on-chip DAC every M seconds Output.

The foregoing embodiment adopts a two-level comparison method, using the first comparison level VL in the forward direction and the second comparison level VH in the reverse direction to determine the rising edge and the falling edge of the pulse. The two-level decision comparison method overcomes the influence of the integral effect on the waveform, so that the delay of the rising edge and the falling edge can be controlled to a small extent, and the accuracy and reliability of the system are improved. This system includes passive devices, linear devices, simple logic circuits and low-speed MCUs, and has a very low cost compared to traditional methods.

In order to explain the implementation of this application in more detail, a specific application example is provided as follows:

In an active antenna indoor signal coverage system, its structure is shown in Figure 8, including a gateway and several antennas. Micro base stations (such as Picocell, Smallcell) and other wireless coverage devices are connected to the gateway through the radio frequency feeder, and after the power is divided by the gateway, the radio frequency feeder is used to connect to the active antenna. Several active antennas are distributed in a star shape with the gateway as the center. The gateway supplies power to the active antenna through a DC-coupled radio frequency cable.

The gateway includes a power supply module, a DC coupling module, a synchronous ASK signal coupling module, a synchronous pulse extraction module, and a synchronous pulse transmitter module. Among them, the synchronization pulse extraction module will analyze the input radio frequency signal by using devices such as transceivers and FPGAs, and output the synchronization pulse signal to the synchronization pulse transmission module. The synchronization pulse transmitter module modulates the synchronization pulse and transmits it, and sends the ASK signal with the synchronization pulse information to the synchronization signal coupling module.

The active antenna includes a power supply module, a DC coupling module, a low noise amplifier LNA module, a power amplifier PA module, a synchronous pulse receiving module and a synchronous ASK signal coupling module. After the synchronization signal ASK coupling module sends the ASK signal with the synchronization pulse information to the synchronization pulse receiving module, the receiving module will demodulate the synchronization pulse. The pulse is output to the LNA and PA modules for controlling the uplink and downlink.

Generally, in 4G and 5G communication devices using TDD working mode, TDD synchronization signals can be included in protocols such as Common Public Radio Interface (CPRI) through media such as optical fibers, so that the transceiver systems of AU and RU can work synchronously . This transmission method requires complex coding, and requires expensive devices such as Field Programmable Logic Gate Array (FPGA) and Serial Transceiver (Serdes) to resolve the TDD synchronization pulse signal. At the same time, in the process of signal transmission, an additional photoelectric composite cable needs to be used to power the RU. Especially for the 5G signal, due to its high frequency and large bandwidth, the power amplifier reduces the transmission power under strict power consumption and linearity requirements. At the same time, its high frequency makes the signal fading in the propagation larger, and it is necessary to add more devices. Source antenna; this increases the amount of photoelectric composite cables, resulting in a significant increase in cost.

The method of transmitting TDD synchronization pulses on the radio frequency feeder proposed in this embodiment can enable the indoor coverage system composed of a gateway and an active antenna to only use the radio frequency feeder interconnection. The feeder can transmit radio frequency signal, power supply and synchronous pulse ASK signal, which greatly reduces the cost.

The synchronization pulse controls the switches of the devices in the entire transceiver signal chain, and determines the current signal transmission direction of the system. Therefore, it needs to have lower delay and jitter. According to the requirements of 3GPP documents, for the 5G TDD system, it takes less than 10 μs to switch between uplink and downlink. This means that for the entire system, the jitter and delay of the synchronization pulse must be less than 10μs.

This embodiment adopts a transmission method based on amplitude modulation and demodulation, and uses 2-ASK modulation at the transmitting end to move the synchronization pulse signal to a higher frequency to pass through radio frequency devices such as radio frequency feeder power dividers. At the receiving end, amplitude detection is used to extract the envelope pulse, and then through a low-pass filter circuit, a logarithmic amplifier circuit, a decision circuit and a pulse delay circuit, the switching signal is accurately restored. The structure of the transmission system is shown in Figure 9, and the change of the signal waveform in the transmission system is shown in Figure 10. Based on radio frequency cable feeder transmission, low cost, low power consumption, simple structure, and stable performance TDD synchronous pulse ASK modulation transmission method solves the shortcomings of high cost and complex structure of the TDD synchronous pulse transmission system.

The transmitting part uses 2-ASK modulation. The synchronization pulse extraction module inside the gateway analyzes the RF output signal of the Smallcell or Picocell to obtain the TDD uplink and downlink synchronization pulse signal. The synchronous pulse extraction module is composed of FPGA and high-speed ADC. ADC samples 4G or 5G signals, and the output digital signal is analyzed and synchronized by FPGA. The synchronization pulse transmitter module modulates the synchronization pulse and transmits it, and sends the radio frequency signal generated by the radio frequency oscillator to a radio frequency switch for modulation. During modulation, the TDD uplink and downlink synchronization pulse signal is input to the radio frequency switch control terminal, so that the strength of the input carrier signal changes with the high and low levels of the pulse signal to obtain a simple ASK signal. In order for the receiving circuit to obtain more accurate rising and falling edge signals during demodulation, the opening and closing time of the modulated switch needs to be as short as possible. In this application, the carrier frequency can be selected according to the working frequency of the RF feeder and power divider, 4G and 5G signal frequency. The carrier frequency needs to avoid the frequency band where the public network transmits 4G/5G signals to avoid interference. Considering that the receiving end uses the amplitude detection method to extract the pulse, the phase noise, jitter, frequency stability and other indicators of the carrier frequency do not need to be very high. The radio frequency oscillator can use a frequency synthesizer integrated circuit or an LC resonant circuit.

Filter the ASK signal before detecting the ASK signal to filter out the 4G/5G frequency band of the public network to prevent the public network signal from interfering with the detection process. In addition, when targeting smaller signals, increase the gain device to obtain a larger envelope detection range.

The synchronization pulse receiving module demodulates the synchronization pulse. The amplitude envelope pulse is obtained by detecting the ASK signal, which is realized by the diode envelope detection. Diode envelope detection is an asynchronous demodulation method, and because of its simple structure, a shorter time delay can be obtained.

After rectifying the input ASK signal through a unidirectional diode device, and then inputting an integral characteristic circuit, the low-frequency envelope information can be obtained. Part of the current of the input signal charges the capacitor during the positive rising period and discharges through the load resistor RL during the negative half period to form an envelope. Among them, the impedance of the parallel capacitor C should be less than the impedance of the diode, so the parallel capacitor C is much larger than the junction capacitance of the diode. The value of C and RL will affect the discharge speed, resulting in slower rise and fall times. Different carrier frequency and envelope frequency pulse width will affect the rise and fall time of the detected pulse, so it needs to be tested in the circuit debugging process.

After the envelope pulse signal is obtained, the pulse signal is low-pass filtered to filter out high-frequency clutter. Due to the uncertainty of factors such as the line loss and the number of networking between the gateway and the active antenna, the amplitude of the signal entering the detection will have a certain dynamic range. Considering that the amplitude of the input signal has exponential characteristics, in order to obtain a certain receiving dynamic range, an amplifier with logarithmic characteristics is used to amplify the envelope pulse. In this way, a more linear output can be obtained.

A logarithmic detector can also be used to extract the envelope of the synchronous pulse ASK signal with a large amplitude change. The amplifying characteristic of the logarithmic detector is piecewise linear logarithmic amplification. In each linear gain stage output, diode detection is used to extract the envelope, and all the envelopes are superimposed to form a synchronous envelope pulse with the required logarithmic response.

After detection, a high-speed comparator is used to shape the envelope pulse. Since the envelope pulse obtained by the detection is affected by the capacitance in the detection circuit, its rising and falling edges are slowed to a certain extent. The rising edge rises faster near the low level; the falling edge falls faster near the high level. In order to recover the pulse more accurately and reduce the time delay of the pulse, a two-level comparison method is adopted, using the low-level VL forward and high-level VH reverse to judge the rising and falling edges of the pulse.

As the amplitude of the envelope pulse after logarithmic amplification changes, its corresponding decision level will also follow the change in a preset proportion with the maximum value of the envelope pulse. In this embodiment, a single-chip microcomputer (MCU) is used to read the synchronization pulse envelope through the on-chip ADC after the entire system is turned on and store it in the sampling queue. When the amplitude of the input signal is less than the preset threshold continuously for a certain preset time, the MCU will report an alarm message indicating that the link is attenuated too much or has been disconnected. By judging the sampling queue, the values greater than the preset threshold will be averaged in its continuous interval, as the peak envelope and stored in the peak envelope queue. Perform 10 moving average filtering on the peak envelope queue to obtain the maximum value queue (for the input waveform, it is the maximum value, which is called the maximum value queue here for convenience, which is the maximum value of the sync pulse envelope).

Obtain the comparison level VL and VH queue according to the preset high and low level ratio, and update to the on-chip DAC output every 10s; for example, the preset comparison level VL and VH are respectively 1/5 and 4/5 of the pulse high and low level difference , According to different pulse high and low levels, different preset comparison levels VL and VH can be obtained. For the data of the maximum value queue, the high comparison level VH and the low comparison level VL are calculated according to the preset ratio of high level and low level. In this embodiment, 10 times of moving average filtering can already filter out a lot of noise and interference, occupying too much system resources, and too little affects the stability of the decision. Update to the on-chip DAC output every 10s. Too fast an update will waste system resources and increase power consumption. If an update is too slow, it will cause the change to fail to keep up. The MCU workflow is shown in Figure 11.

After the judgment, the two pulses, one positive and one negative, are pulled up and connected through the open-drain output of the comparator. The signal after the line and is transformed into two short pulses, and the two short pulses respectively represent the position of the upper and lower edges of the synchronized pulse that is restored later. At this time, through the pulse delay circuit, these two rising edges can be accurately delayed to the next cycle, so as to achieve zero delay.

Through the D flip-flop, the two rising edge short pulses are divided into one pulse. This pulse is the last required synchronization pulse. The upper and lower edges of this sync pulse have extremely low delays to the sync pulse on the gateway side. The analog signal transmission does not have the process of digital chip synchronization, which ensures that the pulse edge has low jitter. Figure 12 shows the specific changes in the signal during a two-level comparison.

This system includes passive devices, linear devices, simple logic circuits and low-speed MCUs, and has a very low cost compared to traditional methods. The ASK modulation method is adopted for transmission, so that the synchronization pulse has a lower delay during transmission, and no additional delay circuit is required, which reduces the complexity of the system. The use of logarithmic detection and amplification can make the receiver have a larger dynamic range and increase the flexibility of networking. The two-level decision comparison method overcomes the influence of the integral effect on the waveform, so that the delay of the rising edge and the falling edge can be controlled to a small extent, and the accuracy and reliability of the system are improved. Using the MCU to assist in tracking and adjusting the two comparison levels, on the one hand, it realizes the judgment in the case of changing input signals. On the other hand, it also adds a fault alarm function to the system to facilitate users to locate faults. The above characteristics make this system very suitable for transmitting TDD sync pulse signals in radio frequency feeders.

The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be It is considered as the range described in this specification.

The above-mentioned embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the invention patent. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can be made, and these all fall within the protection scope of this application. Therefore, the scope of protection of the patent of this application shall be subject to the appended claims.

Claims

A synchronization pulse transmission method, characterized in that the method includes the following steps:

Receive the modulated signal transmitted by the transmitting end, the modulated signal is obtained by the transmitting end performing amplitude shift keying modulation on the first synchronization pulse signal, and the first synchronization pulse signal is extracted by the transmitting end from the communication radio frequency signal of;

Envelope detection is performed on the modulation signal to obtain an envelope pulse, and pulse shaping is performed on the envelope pulse.
The method according to claim 1, wherein the step of pulse shaping the envelope pulse comprises:

The envelope pulse is judged according to the first comparison level to obtain the first decision pulse, the envelope pulse is judged according to the second comparison level, and the second decision pulse is obtained, combining the first decision pulse and the second decision pulse The decision pulse obtains a second synchronization pulse signal, wherein the first comparison level is less than the second comparison level.
The method according to claim 2, characterized in that the said envelope pulse is judged according to a first comparison level to obtain a first decision pulse, and the envelope pulse is judged according to a second comparison level to obtain a second The steps to determine the pulse include:

The envelope pulse is judged according to the first comparison level, if the envelope pulse is less than the first comparison level, it is judged as a low level, and if the envelope pulse is greater than the first comparison level , The judgment is high; the first judgment pulse is obtained according to the judgment result;

The envelope pulse is judged according to the second comparison level, if the envelope pulse is less than the second comparison level, it is judged to be a high level, and if the envelope pulse is greater than the second comparison level , The judgment is low level; the second judgment pulse is obtained according to the judgment result.
The method according to claim 2, wherein the step of combining the first decision pulse and the second decision pulse to obtain a second synchronization pulse signal comprises:

The high-level starting point of the first decision pulse is extracted as the high-level starting point of the second synchronization pulse signal, and the high-level starting point of the period corresponding to the second decision pulse is extracted as the second synchronization pulse signal Starting at a low level, the second synchronization pulse signal is obtained.
The method according to claim 2, wherein the step of combining the first decision pulse and the second decision pulse to obtain a second synchronization pulse signal comprises:

Extract the low-level starting point of the first decision pulse as the low-level starting point of the second synchronization pulse signal, and extract the low-level starting point of the period corresponding to the second decision pulse as the low-level starting point of the second synchronization pulse signal The high-level start point obtains the second synchronization pulse signal.
The method according to claim 2, wherein the step of combining the first decision pulse and the second decision pulse to obtain a second synchronization pulse signal comprises:

Pull up the AND on the first decision pulse and the second decision pulse to obtain two short pulses, and select the rising edge positions of the two short pulses to be the positions of the upper and lower edges of the second synchronization pulse, respectively.
The method according to claim 6, characterized in that, after the step of obtaining two short pulses, it further comprises: delaying the rising edge of the two short pulses to the next cycle after a pulse delay.
7. The method according to claim 6, characterized in that, after the step of obtaining two short pulses, the method further comprises: dividing the two short pulses into the second synchronization pulse signal.
The method according to claim 2, wherein the method further comprises:

Read the envelope pulse amplitude and store it in the sampling queue;

Determine the continuous interval of the envelope pulse amplitude greater than the preset amplitude threshold in the sampling queue, take an average value of the envelope pulse amplitude in the continuous interval, as the peak envelope and store it in the peak envelope queue;

Performing multiple moving average filtering on the peak envelope queue to obtain a maximum value queue;

Obtaining a set of first comparison levels and second comparison levels according to each amplitude value in the maximum value queue; obtaining a comparison level queue according to multiple sets of first comparison levels and second comparison levels;

The updated comparison level queue is output every first preset time, and the comparison level corresponding to the envelope pulse is selected in the updated comparison level queue as the pulse shaping step of the envelope pulse The first comparison level and the second comparison level.
The method according to claim 2 or 9, wherein the method further comprises: obtaining the first comparison level and the second comparison level according to a preset ratio of high and low levels; and the preset high and low levels The flat ratio is the ratio of the envelope pulse amplitudes corresponding to the first comparison level and the second comparison level.
The method according to claim 9, characterized in that it further comprises the following steps:

When the duration of the envelope pulse amplitude being less than the preset amplitude threshold exceeds a second preset time, an alarm message is reported.
A synchronization pulse transmission method, characterized in that the method includes the following steps:

Acquiring a communication radio frequency signal, and extracting a first synchronization pulse signal from the communication radio frequency signal;

Performing amplitude shift keying modulation on the first synchronization pulse signal to obtain a modulated signal;

Envelope detection is performed on the modulation signal to obtain an envelope pulse, and pulse shaping is performed on the envelope pulse.
A synchronous pulse transmission device, characterized in that the device includes:

The envelope detection module is used to detect the modulation signal to obtain an envelope pulse; the modulation signal is obtained by amplitude shift keying modulation of the first synchronization pulse signal;

The envelope pulse shaping module is used for shaping the envelope pulse to obtain the second synchronization pulse signal.
The device according to claim 13, wherein the envelope pulse shaping module comprises a first comparator, a second comparator and a synchronization pulse generating module;

The first comparator is used to determine the envelope pulse according to a first comparison level to obtain a first decision pulse;

The second comparator is used to determine the envelope pulse according to a second comparison level to obtain a second decision pulse;

The synchronization pulse generation module is configured to combine the first decision pulse and the second decision pulse to obtain the second synchronization pulse signal.
The device according to claim 14, wherein the two input terminals of the first comparator input the first comparison level and the envelope pulse respectively, and the two input terminals of the second comparator input the first comparison level and the envelope pulse respectively. The second comparison level and the envelope pulse are respectively input; the output terminals of the first comparator and the second comparator are connected to the synchronization pulse generation module.
The device according to claim 14, wherein two comparators output the first decision pulse and the second decision pulse, and the output terminal of the comparator with an open-drain output is pulled up with an AND.
The device according to claim 16, wherein the line and the output terminal are connected to a pulse delay circuit.
The device of claim 16, wherein the line and the output terminal are connected to a D flip-flop.
The device according to claim 14, wherein the envelope pulse shaping module further comprises a control module; the control module is used to collect envelope pulse data to generate the first comparison level and the second comparison level Comparison level.
The device according to claim 19, wherein the control module is configured to: read the envelope pulse amplitude and store it in a sampling queue; determine the continuous envelope pulse amplitude greater than a preset amplitude threshold in the sampling queue Interval, take the average of the envelope pulse amplitudes in the continuous interval, as the peak envelope and store it in the peak envelope queue; perform multiple moving average filtering on the peak envelope queue to obtain the maximum value queue; For each amplitude value in the maximum value queue, a set of first comparison levels and second comparison levels are obtained; a comparison level queue is obtained according to multiple sets of first comparison levels and second comparison levels; every first preset Time output updated comparison level queue.
The device according to claim 19, wherein the control module comprises a single-chip microcomputer, and the envelope pulse amplitude is read through the analog-to-digital conversion module in the single-chip microcomputer and stored in the sampling queue; The digital-to-analog conversion module outputs the updated comparison level queue.
A synchronous pulse transmission device, characterized in that the device includes:

The synchronization pulse extraction module is used to extract the first synchronization pulse signal from the communication radio frequency signal;

A modulation module, configured to perform amplitude shift keying modulation on the first synchronization pulse signal to obtain a modulation signal;

The modulated signal is used for envelope detection to obtain an envelope pulse, and pulse shaping is performed on the envelope pulse.
A synchronous pulse transmission system, characterized in that, the system includes:

The synchronization pulse extraction module is used to extract the first synchronization pulse signal from the communication radio frequency signal;

A modulation module, configured to perform amplitude shift keying modulation on the first synchronization pulse signal to obtain a modulation signal;

Envelope detection module, used for envelope detection of the modulation signal to obtain envelope pulses;

The envelope pulse shaping module is used for shaping the envelope pulse to obtain a second synchronization pulse signal.
An antenna device, characterized by comprising the synchronization pulse transmission device of claim 13.
A gateway device, characterized by comprising the synchronization pulse transmission device of claim 22.
A signal coverage system, characterized in that the system comprises the antenna device according to claim 24 and the gateway device according to claim 25, and a radio frequency feeder connection is adopted between the gateway device and the antenna device.