WO2021091020A1 - Non-volatile multi-level optical memory using polydimethylsiloxane, and manufacturing method therefor - Google Patents

Non-volatile multi-level optical memory using polydimethylsiloxane, and manufacturing method therefor Download PDF

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WO2021091020A1
WO2021091020A1 PCT/KR2020/001066 KR2020001066W WO2021091020A1 WO 2021091020 A1 WO2021091020 A1 WO 2021091020A1 KR 2020001066 W KR2020001066 W KR 2020001066W WO 2021091020 A1 WO2021091020 A1 WO 2021091020A1
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channel
optical memory
manufacturing
multilevel optical
gate insulator
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French (fr)
Korean (ko)
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김현재
박경호
이진혁
김희준
김동우
민원경
노성민
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연세대학교 산학협력단
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Definitions

  • the present invention relates to an optical-based nonvolatile multilevel memory and a method of manufacturing the same. This research was conducted with the support of the National Research Foundation of Korea with the funding of the Ministry of Science, ICT and Communication in 2019. ).
  • Nonvolatile memory devices require the formation of several floating gates in order to drive the device using a high voltage in two stages of programming and erasing, and to implement a multilevel of more than a single level cell (SLC). do.
  • SLC single level cell
  • Patent Document 1 Korean Laid-Open Patent Publication No. 10-2015-0072288 (2015.06.29)
  • Embodiments of the present invention form an interface trap between a channel and a gate insulator through viscous organic residue, and change the wavelength of light, thereby operating a memory at multiple levels using one gate. There is a purpose.
  • the steps of forming a gate insulator on a gate depositing a viscous organic material solution on the gate insulator, a first heat treatment step of heat-treating the viscous organic material solution to form an organic material layer, Removing the organic material layer from the gate insulator and forming the remaining organic ligand on the surface of the gate insulator, a second heat treatment step of depositing and heat-treating a channel on the gate insulator on which the organic ligand is formed, and a source electrode in the channel And depositing a drain electrode.
  • a polydimethylsiloxane (PDMS) solution may be annealed in a temperature range of 60°C to 200°C.
  • an IGZO (Indium Gallium Zinc Oxide) material may be annealed in a temperature range of 200°C to 500°C.
  • the organic ligand may form an interface trap between the gate insulator and the channel.
  • the organic ligand may increase a photoexcited carrier by forming a sub gap state by hydrogen in the energy band gap for the channel.
  • the organic ligand may reduce a binding force between metal and oxygen in the channel and inject carbon to form a defect site.
  • the channel irradiating the channel with light through a light source, wherein the channel may program or erase electrons by the irradiated light.
  • the light source controls a wavelength band of light, and the channel can store and store electrons programmed in multilevels according to each wavelength.
  • the light source controls the intensity of light
  • the channel can store and store electrons programmed in multilevels according to the adjusted amount of photons.
  • a gate electrode for controlling a state of the nonvolatile optical memory, a gate insulator connected to the gate electrode, a channel connected to the gate insulator and transferring carriers, It provides a nonvolatile multilevel optical memory including an organic ligand formed between the channel and the gate insulating layer, and a source electrode and a drain electrode connected to the channel.
  • an interface trap is formed between the channel and the gate insulator through the viscous organic residue, and the wavelength of light is changed, so that the memory is multiplied by using one gate. There is an effect that can be operated by level.
  • FIGS. 1 and 2 are diagrams illustrating a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
  • FIG. 3 is a diagram illustrating organic residues doped on a gate insulator in a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
  • FIG. 4 is a diagram illustrating a surface of a gate insulator doped with organic matter residues according to a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
  • 5 and 6 are diagrams illustrating a nonvolatile multilevel optical memory according to another embodiment of the present invention.
  • FIG. 7 is a diagram illustrating programming and erasing characteristics of a nonvolatile multilevel optical memory according to another embodiment of the present invention.
  • FIG. 8 is a diagram illustrating storage characteristics of a nonvolatile multilevel optical memory according to another embodiment of the present invention.
  • the method of manufacturing a nonvolatile multilevel optical memory is to form a physical interface trap between the channel and the gate insulator through coating and heat treatment of a viscous organic material solution, desorption of the organic material layer, and the remaining organic residue, and hydrogenation of the organic residue. And a defect state due to carbon is formed.
  • the memory can be operated at multilevels using one gate in a manner that adjusts the wavelength or intensity of light irradiated to the channel.
  • FIGS. 1 and 2 are diagrams illustrating a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
  • the method of manufacturing a nonvolatile multilevel optical memory includes forming a gate insulator on a gate (S101), depositing a viscous organic material solution on the gate insulator (S102), and heat-treating the viscous organic material solution to form an organic material layer.
  • the process of applying the organic material solution is spin-coating, dip-coating, drop-casting, screen printing, bar printing, and roll-to-roll. To-roll), roll-to-plate, ink-jet printing, micro-contact printing, etc. can be deposited by various methods.
  • a polydimethylsiloxane (PDMS) solution may be annealed in a temperature range of 60°C to 200°C. At temperatures below 60° C., the PDMS material may not be cured. Preferably, the PDMS material can be cured in the range of 80°C.
  • PDMS polydimethylsiloxane
  • the conductive material may be annealed at a temperature in the range of 200°C to 500°C.
  • the conductive material may be Indium Gallium Zinc Oxide (IGZO), and the conductive material may be deposited by a sputtering process.
  • IGZO Indium Gallium Zinc Oxide
  • a method of manufacturing a nonvolatile multilevel optical memory may include irradiating a channel with light through a light source.
  • the channel can program or erase electrons by irradiated light.
  • the light source controls the wavelength band of light, and the channel can hold and store electrons programmed in multilevels according to each wavelength.
  • the light source controls the intensity of light, and the channel can hold and store electrons programmed in multilevels according to the adjusted photon amount.
  • FIG. 3 is a diagram illustrating organic residues doped on a gate insulator in a method of manufacturing a nonvolatile multilevel optical memory
  • FIG. 4 is a diagram illustrating a gate insulator doped with organic matter residues according to the manufacturing method of a nonvolatile multilevel optical memory. It is a diagram illustrating the surface.
  • the organic material residue forms a physical interface trap at the interface between the channel and the gate insulator.
  • the organic residue is a PDMS ligand, and the gate insulator may be SiO 2 , but is not limited thereto, and other materials having similar physical and chemical properties may be applied.
  • the roughness of the root mean square (RMS) of the SiO 2 interface is 0.344 nm
  • the roughness of the root of square mean (RMS) of the SiO 2 interface after PDMS desorption is 1.839 nm. It can be seen that the change in surface roughness increases by almost 5 times or more after PDMS desorption. This roughness change increases the amount of interface trapping between the gate insulator and the channel to be deposited over the gate insulator.
  • the organic ligand not only forms an interface trap between the gate insulator and the channel, but also forms a defect state by hydrogen and carbon of the organic residue.
  • the organic ligand increases the photoexcited carrier by forming a sub gap state by hydrogen in the energy band gap for the channel.
  • Organic ligands reduce the binding force between metal and oxygen in the channel and inject carbon to form a defect site.
  • the increased amount of interface trapped by the organic ligand and the state of defects improves the photoreactivity.
  • 5 and 6 are diagrams illustrating a nonvolatile multilevel optical memory according to another embodiment of the present invention.
  • the nonvolatile multilevel optical memory 1 includes a gate electrode 10, a gate insulator 20, an organic ligand 30, a channel 40, a source electrode, and a drain electrode 50. .
  • the gate electrode 10, the source electrode, and the drain electrode 50 may be formed of a metal or other conductive material.
  • the gate electrode 10 controls the state of the nonvolatile optical memory, and carriers are transferred between the source electrode and the drain electrode 50 through a channel activated or deactivated by the gate electrode 10.
  • the gate insulator 20 is connected to the gate electrode 10 and may be implemented with an insulating material.
  • the organic ligand 30 is formed on the surface of the gate insulating layer 20.
  • the viscous organic material is heat-treated to form an organic material layer and the organic material layer is removed, the remaining ligand is doped on the surface of the gate insulating layer 20.
  • a channel 40 is deposited on the gate insulating layer 20 doped with the organic ligand 30 to form the organic ligand 30 between the gate insulating layer 20 and the channel 40.
  • the channel 40 is connected to the doped gate insulator 20 and carries carriers.
  • the channel may be implemented with an oxide such as IGZO, or a semiconductor material.
  • a channel may be formed by depositing a conductive material on the gate insulator on which the organic ligand is formed and heat treatment.
  • the source electrode and the drain electrode 50 may be connected to the channel while being spaced apart.
  • the nonvolatile multilevel optical memory 1 may include a light source that irradiates light.
  • the channel can program or erase electrons by irradiated light.
  • the light source adjusts the wavelength band of light, and the channel can store and store electrons programmed in multilevels according to each wavelength.
  • the light source controls the intensity of the light and the channel can store and store electrons programmed in multilevels according to the adjusted photon amount.
  • the nonvolatile multilevel optical memory according to the present embodiment can easily implement a multilevel according to each wavelength by adjusting a function of a wavelength, which is a variable of light energy, and by adjusting the intensity of light, the number of incident photons is Multi-level can be achieved by adjusting the amount.
  • FIG. 7 is a diagram illustrating programming and erasing characteristics of a nonvolatile multilevel optical memory
  • FIG. 8 is a diagram illustrating storage characteristics of a nonvolatile multilevel optical memory.
  • each process is described as sequentially executing, but this is merely an example, and those skilled in the art may partially change the order described in FIG. 1 without departing from the essential characteristics of the embodiment of the present invention.

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Abstract

The present embodiments provide: a non-volatile multi-level optical memory which can be operated at multiple levels by means of one gate, as a result of forming an interface trap between a channel and a gate insulator by means of a viscous organic residue, and varying light wavelengths; and a manufacturing method therefor.

Description

폴리디메틸실록산을 이용한 비휘발성 멀티레벨 광 메모리 및 그 제조방법Non-volatile multilevel optical memory using polydimethylsiloxane and its manufacturing method
본 발명이 기술 분야는 광 기반의 비휘발성 멀티레벨 메모리 및 그 제조방법에 관한 것이다. 본 연구는 2019년도 과학기술정보통신부(정부)의 재원으로 한국연구재단의 지원을 받아 수행된 중견연구자지원사업인 지능형 디스플레이를 위한 산화물 기반 CMOS image-sensor on panel (CIP) 기술 개발(No. 2017R1A2B3008719)과 관련된다.TECHNICAL FIELD The present invention relates to an optical-based nonvolatile multilevel memory and a method of manufacturing the same. This research was conducted with the support of the National Research Foundation of Korea with the funding of the Ministry of Science, ICT and Communication in 2019. ).
이 부분에 기술된 내용은 단순히 본 실시예에 대한 배경 정보를 제공할 뿐 종래기술을 구성하는 것은 아니다.The content described in this section merely provides background information on the present embodiment and does not constitute the prior art.
최근 들어 전기적으로 프로그래밍(Programming)과 소거(Erasing)가 가능하고, 일정 주기로 데이터를 재작성해야 하는 리프레시(Refresh) 기능이 필요없는 비휘발성 메모리 소자에 대한 수요가 증가하고 있다.Recently, there is an increasing demand for nonvolatile memory devices that can be electrically programmed and erased, and do not require a refresh function that requires data to be rewritten at regular intervals.
기존의 비휘발성 메모리 소자는 프로그래밍 및 소거 두 단계에서 고전압을 이용하여 소자를 구동하고, 단일 레벨 셀(SLC) 이상의 멀티 레벨(Multilevel)을 구현하기 위하여 여러 단의 플로팅 게이트(Floating Gate)를 형성해야 한다.Existing nonvolatile memory devices require the formation of several floating gates in order to drive the device using a high voltage in two stages of programming and erasing, and to implement a multilevel of more than a single level cell (SLC). do.
(특허문헌1) 한국공개특허공보 제10-2015-0072288호 (2015.06.29)(Patent Document 1) Korean Laid-Open Patent Publication No. 10-2015-0072288 (2015.06.29)
본 발명의 실시예들은 점성을 갖는 유기물 잔여물을 통해 채널과 게이트 절연체 사이에 인터페이스 트랩을 형성하고, 빛의 파장을 변화시킴으로써, 하나의 게이트를 이용하여 메모리를 멀티 레벨로 동작시키는 데 발명의 주된 목적이 있다.Embodiments of the present invention form an interface trap between a channel and a gate insulator through viscous organic residue, and change the wavelength of light, thereby operating a memory at multiple levels using one gate. There is a purpose.
본 발명의 명시되지 않은 또 다른 목적들은 하기의 상세한 설명 및 그 효과로부터 용이하게 추론할 수 있는 범위 내에서 추가적으로 고려될 수 있다.Other objects not specified of the present invention may be additionally considered within a range that can be easily deduced from the following detailed description and effects thereof.
본 실시예의 일 측면에 의하면, 게이트에 게이트 절연체를 형성하는 단계, 상기 게이트 절연체에 점성을 갖는 유기물 용액을 증착하는 단계, 상기 점성을 갖는 유기물 용액을 열처리하여 유기물 층을 형성하는 1차 열처리 단계, 상기 게이트 절연체로부터 상기 유기물 층을 제거하고 남은 유기물 리간드를 상기 게이트 절연체의 표면에 형성하는 단계, 상기 유기물 리간드가 형성된 상기 게이트 절연체에 채널을 증착하고 열처리하는 2차 열처리 단계, 및 상기 채널에 소스 전극 및 드레인 전극을 증착하는 단계를 포함하는 비휘발성 멀티레벨 광 메모리의 제조 방법을 제공한다.According to an aspect of the present embodiment, the steps of forming a gate insulator on a gate, depositing a viscous organic material solution on the gate insulator, a first heat treatment step of heat-treating the viscous organic material solution to form an organic material layer, Removing the organic material layer from the gate insulator and forming the remaining organic ligand on the surface of the gate insulator, a second heat treatment step of depositing and heat-treating a channel on the gate insulator on which the organic ligand is formed, and a source electrode in the channel And depositing a drain electrode.
상기 1차 열처리 단계는 폴리디메틸실록산 (Polydimethylsiloxane, PDMS) 용액을 60℃ 내지 200℃의 온도 범위에서 어닐링할 수 있다.In the first heat treatment step, a polydimethylsiloxane (PDMS) solution may be annealed in a temperature range of 60°C to 200°C.
상기 2차 열처리 단계는 IGZO(Indium Gallium Zinc Oxide) 물질을 200℃ 내지 500℃의 온도 범위에서 어닐링할 수 있다.In the second heat treatment step, an IGZO (Indium Gallium Zinc Oxide) material may be annealed in a temperature range of 200°C to 500°C.
상기 유기물 리간드는 상기 게이트 절연체 및 상기 채널 사이에 인터페이스 트랩(Interface Trap)을 형성할 수 있다.The organic ligand may form an interface trap between the gate insulator and the channel.
상기 유기물 리간드는 상기 채널에 대한 에너지 밴드 갭에서 수소에 의한 서브 갭 상태(Sub Gap State)를 형성하여 광여기 캐리어(Photoexcited Carrier)를 증가시킬 수 있다.The organic ligand may increase a photoexcited carrier by forming a sub gap state by hydrogen in the energy band gap for the channel.
상기 유기물 리간드는 상기 채널에서 금속과 산소의 결합력을 감소시키고 탄소를 주입시켜 결손 영역(Defect Site)을 형성할 수 있다.The organic ligand may reduce a binding force between metal and oxygen in the channel and inject carbon to form a defect site.
상기 채널에 광원을 통해 광을 조사하는 단계를 포함하며, 상기 채널은 상기 조사된 광에 의해 전자를 프로그래밍 또는 소거할 수 있다.And irradiating the channel with light through a light source, wherein the channel may program or erase electrons by the irradiated light.
상기 광원은 광의 파장 대역을 조절하며, 상기 채널은 각 파장에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억할 수 있다.The light source controls a wavelength band of light, and the channel can store and store electrons programmed in multilevels according to each wavelength.
상기 광원은 광의 세기를 조절하며, 상기 채널은 조절된 광자량에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억할 수 있다.The light source controls the intensity of light, and the channel can store and store electrons programmed in multilevels according to the adjusted amount of photons.
본 실시예의 다른 측면에 의하면, 비휘발성 멀티레벨 광 메모리에 있어서, 상기 비휘발성 광 메모리의 상태를 제어하는 게이트 전극, 상기 게이트 전극에 연결된 게이트 절연체, 상기 게이트 절연체에 연결되며 캐리어를 전달하는 채널, 상기 채널 및 상기 게이트 절연막 간에 형성된 유기물 리간드, 및 상기 채널에 연결된 소스 전극 및 드레인 전극을 포함하는 비휘발성 멀티레벨 광 메모리를 제공한다.According to another aspect of the present embodiment, in a nonvolatile multilevel optical memory, a gate electrode for controlling a state of the nonvolatile optical memory, a gate insulator connected to the gate electrode, a channel connected to the gate insulator and transferring carriers, It provides a nonvolatile multilevel optical memory including an organic ligand formed between the channel and the gate insulating layer, and a source electrode and a drain electrode connected to the channel.
이상에서 설명한 바와 같이 본 발명의 실시예들에 의하면, 점성을 갖는 유기물 잔여물을 통해 채널과 게이트 절연체 사이에 인터페이스 트랩을 형성하고, 빛의 파장을 변화시킴으로써, 하나의 게이트를 이용하여 메모리를 멀티 레벨로 동작시킬 수 있는 효과가 있다.As described above, according to the embodiments of the present invention, an interface trap is formed between the channel and the gate insulator through the viscous organic residue, and the wavelength of light is changed, so that the memory is multiplied by using one gate. There is an effect that can be operated by level.
여기에서 명시적으로 언급되지 않은 효과라 하더라도, 본 발명의 기술적 특징에 의해 기대되는 이하의 명세서에서 기재된 효과 및 그 잠정적인 효과는 본 발명의 명세서에 기재된 것과 같이 취급된다.Even if it is an effect not explicitly mentioned herein, the effect described in the following specification expected by the technical features of the present invention and the provisional effect thereof are treated as described in the specification of the present invention.
도 1 및 도 2는 본 발명의 일 실시예에 따른 비휘발성 멀티레벨 광 메모리의 제조방법을 예시한 도면이다. 1 and 2 are diagrams illustrating a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
도 3은 본 발명의 일 실시예에 따른 비휘발성 멀티레벨 광 메모리의 제조방법이 게이트 절연체에 도핑한 유기물 잔여물을 예시한 도면이다.3 is a diagram illustrating organic residues doped on a gate insulator in a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
도 4는 본 발명의 일 실시예에 따른 비휘발성 멀티레벨 광 메모리의 제조방법에 따라 유기물 잔여물이 도핑된 게이트 절연체의 표면을 예시한 도면이다.4 is a diagram illustrating a surface of a gate insulator doped with organic matter residues according to a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
도 5 및 도 6은 본 발명의 다른 실시예에 따른 비휘발성 멀티레벨 광 메모리를 예시한 도면이다.5 and 6 are diagrams illustrating a nonvolatile multilevel optical memory according to another embodiment of the present invention.
도 7은 본 발명의 다른 실시예에 따른 비휘발성 멀티레벨 광 메모리의 프로그래밍 및 소거 특성을 예시한 도면이다.7 is a diagram illustrating programming and erasing characteristics of a nonvolatile multilevel optical memory according to another embodiment of the present invention.
도 8은 본 발명의 다른 실시예에 따른 비휘발성 멀티레벨 광 메모리의 기억 특성을 예시한 도면이다.8 is a diagram illustrating storage characteristics of a nonvolatile multilevel optical memory according to another embodiment of the present invention.
이하, 본 발명을 설명함에 있어서 관련된 공지기능에 대하여 이 분야의 기술자에게 자명한 사항으로서 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우에는 그 상세한 설명을 생략하고, 본 발명의 일부 실시예들을 예시적인 도면을 통해 상세하게 설명한다.Hereinafter, in the description of the present invention, when it is determined that the subject matter of the present invention may be unnecessarily obscured as matters that are obvious to a person skilled in the art with respect to known functions related to the present invention, a detailed description thereof is omitted, and some embodiments of the present invention It will be described in detail through exemplary drawings.
비휘발성 멀티레벨 광 메모리의 제조방법은 점성을 갖는 유기물 용액을 코팅 및 열처리한 후 유기물 층을 탈착하고 남은 유기 잔여물을 통해 채널과 게이트 절연체 사이에 물리적인 인터페이스 트랩을 형성하고, 유기 잔여물의 수소 및 탄소에 의한 결손 상태를 형성한다. The method of manufacturing a nonvolatile multilevel optical memory is to form a physical interface trap between the channel and the gate insulator through coating and heat treatment of a viscous organic material solution, desorption of the organic material layer, and the remaining organic residue, and hydrogenation of the organic residue. And a defect state due to carbon is formed.
채널과 게이트 절연체 사이에 유기 잔여물이 도핑된 비휘발성 멀티레벨 광 메모리는 채널에 조사되는 빛의 파장 또는 세기를 조절하는 방식으로 하나의 게이트를 이용하여 메모리를 멀티 레벨로 동작시킬 수 있다.In the nonvolatile multilevel optical memory doped with organic residues between the channel and the gate insulator, the memory can be operated at multilevels using one gate in a manner that adjusts the wavelength or intensity of light irradiated to the channel.
도 1 및 도 2는 본 발명의 일 실시예에 따른 비휘발성 멀티레벨 광 메모리의 제조방법을 예시한 도면이다. 1 and 2 are diagrams illustrating a method of manufacturing a nonvolatile multilevel optical memory according to an embodiment of the present invention.
비휘발성 멀티레벨 광 메모리의 제조방법은 게이트에 게이트 절연체를 형성하는 단계(S101), 게이트 절연체에 점성을 갖는 유기물 용액을 증착하는 단계(S102), 점성을 갖는 유기물 용액을 열처리하여 유기물 층을 형성하는 1차 열처리 단계(S103), 게이트 절연체로부터 유기물 층을 제거하고 남은 유기물 리간드를 게이트 절연체의 표면에 형성하는 단계(S104), 유기물 리간드가 형성된 게이트 절연체에 전도 물질을 증착하고 열처리하여 채널을 형성하는 2차 열처리 단계(S105), 및 채널에 소스 전극 및 드레인 전극을 증착하는 단계(S106)를 포함한다.The method of manufacturing a nonvolatile multilevel optical memory includes forming a gate insulator on a gate (S101), depositing a viscous organic material solution on the gate insulator (S102), and heat-treating the viscous organic material solution to form an organic material layer. The first heat treatment step (S103), the step of removing the organic material layer from the gate insulator and forming the remaining organic ligand on the surface of the gate insulator (S104), depositing a conductive material on the gate insulator on which the organic material ligand is formed and heat treatment to form a channel A second heat treatment step (S105), and a step (S106) of depositing a source electrode and a drain electrode on the channel.
유기물 용액을 도포하는 과정은 스핀 코팅(spin-coating), 딥 코팅(dip-coating), 드롭 캐스팅(drop-casting), 스크린 프린팅(screen printing), 바 프린팅(bar printing), 롤투롤(roll-to-roll), 롤투플레이트(roll-to-plate), 잉크젯 프린팅(ink-jet printing), 마이크로접촉 프린팅 (micro-contact printing) 등 다양한 방법으로 증착이 가능하다.The process of applying the organic material solution is spin-coating, dip-coating, drop-casting, screen printing, bar printing, and roll-to-roll. To-roll), roll-to-plate, ink-jet printing, micro-contact printing, etc. can be deposited by various methods.
유기물 용액을 1차 열처리 단계(S103)는 폴리디메틸실록산 (Polydimethylsiloxane, PDMS) 용액을 60℃ 내지 200℃의 온도 범위에서 어닐링할 수 있다. 60℃ 미만의 온도에서는 PDMS 물질이 경화되지 않을 수 있다. 바람직하게는 80℃ 범위에서 PDMS 물질을 경화시킬 수 있다.In the first heat treatment step (S103) of the organic material solution, a polydimethylsiloxane (PDMS) solution may be annealed in a temperature range of 60°C to 200°C. At temperatures below 60° C., the PDMS material may not be cured. Preferably, the PDMS material can be cured in the range of 80°C.
채널을 2차 열처리 단계(S105)는 전도 물질을 200℃ 내지 500℃의 온도 범위에서 어닐링할 수 있다. 전도 물질은 IGZO(Indium Gallium Zinc Oxide)일 수 있으며, 전도 물질은 스퍼터링 공정으로 증착될 수 있다.In the second heat treatment step (S105) of the channel, the conductive material may be annealed at a temperature in the range of 200°C to 500°C. The conductive material may be Indium Gallium Zinc Oxide (IGZO), and the conductive material may be deposited by a sputtering process.
비휘발성 멀티레벨 광 메모리의 제조 방법은 채널에 광원을 통해 광을 조사하는 단계를 포함할 수 있다. 채널은 조사된 광에 의해 전자를 프로그래밍 또는 소거할 수 있다. 광원은 광의 파장 대역을 조절하며 채널은 각 파장에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억할 수 있다. 광원은 광의 세기를 조절하며 채널은 조절된 광자량에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억할 수 있다.A method of manufacturing a nonvolatile multilevel optical memory may include irradiating a channel with light through a light source. The channel can program or erase electrons by irradiated light. The light source controls the wavelength band of light, and the channel can hold and store electrons programmed in multilevels according to each wavelength. The light source controls the intensity of light, and the channel can hold and store electrons programmed in multilevels according to the adjusted photon amount.
도 3은 비휘발성 멀티레벨 광 메모리의 제조방법이 게이트 절연체에 도핑한 유기물 잔여물을 예시한 도면이고, 도 4는 비휘발성 멀티레벨 광 메모리의 제조방법에 따라 유기물 잔여물이 도핑된 게이트 절연체의 표면을 예시한 도면이다.3 is a diagram illustrating organic residues doped on a gate insulator in a method of manufacturing a nonvolatile multilevel optical memory, and FIG. 4 is a diagram illustrating a gate insulator doped with organic matter residues according to the manufacturing method of a nonvolatile multilevel optical memory. It is a diagram illustrating the surface.
유기물 층이 열처리된 후 탈착되면, 유기물 잔여물은 채널 및 게이트 절연체의 계면에 물리적인 인터페이스 트랩을 형성한다. 유기물 잔여물은 PDMS 리간드이고, 게이트 절연체는 SiO2일 수 있으나, 이에 한정되는 것은 아니고 물리적 화학적 성질이 유사한 다른 물질이 적용될 수 있다.When the organic material layer is desorbed after heat treatment, the organic material residue forms a physical interface trap at the interface between the channel and the gate insulator. The organic residue is a PDMS ligand, and the gate insulator may be SiO 2 , but is not limited thereto, and other materials having similar physical and chemical properties may be applied.
도 4의 (a)에서 SiO2 계면의 제곱평균제곱근(RMS) 거칠기는 0.344 nm이고, 도 4의 (b)에서 PDMS 탈착 후 SiO2 계면의 제곱평균제곱근(RMS) 거칠기는 1.839 nm이다. PDMS 탈착 후 표면 거칠기 변화가 거의 5배 이상 증가하는 것을 확인할 수 있다. 이러한 거칠기 변화는 게이트 절연체 위에 증착될 채널과 게이트 절연체 간의 인터페이스 트랩량을 증가시킨다.In (a) of FIG. 4, the roughness of the root mean square (RMS) of the SiO 2 interface is 0.344 nm, and in (b) of FIG. 4, the roughness of the root of square mean (RMS) of the SiO 2 interface after PDMS desorption is 1.839 nm. It can be seen that the change in surface roughness increases by almost 5 times or more after PDMS desorption. This roughness change increases the amount of interface trapping between the gate insulator and the channel to be deposited over the gate insulator.
유기물 리간드는 게이트 절연체 및 채널 사이에 인터페이스 트랩(Interface Trap)을 형성할 뿐만 아니라 유기 잔여물의 수소 및 탄소에 의한 결손 상태를 형성한다. 유기물 리간드는 채널에 대한 에너지 밴드 갭에서 수소에 의한 서브 갭 상태(Sub Gap State)를 형성하여 광여기 캐리어(Photoexcited Carrier)를 증가시킨다. 유기물 리간드는 채널에서 금속과 산소의 결합력을 감소시키고 탄소를 주입시켜 결손 영역(Defect Site)을 형성한다. The organic ligand not only forms an interface trap between the gate insulator and the channel, but also forms a defect state by hydrogen and carbon of the organic residue. The organic ligand increases the photoexcited carrier by forming a sub gap state by hydrogen in the energy band gap for the channel. Organic ligands reduce the binding force between metal and oxygen in the channel and inject carbon to form a defect site.
유기물 리간드에 의해 증가한 인터페이스 트랩량 및 결손 상태는 광 반응성을 향상시킨다.The increased amount of interface trapped by the organic ligand and the state of defects improves the photoreactivity.
도 5 및 도 6은 본 발명의 다른 실시예에 따른 비휘발성 멀티레벨 광 메모리를 예시한 도면이다.5 and 6 are diagrams illustrating a nonvolatile multilevel optical memory according to another embodiment of the present invention.
도 5를 참조하면, 비휘발성 멀티레벨 광 메모리(1)는 게이트 전극(10), 게이트 절연체(20), 유기물 리간드(30), 채널(40), 소스 전극 및 드레인 전극(50)을 포함한다.Referring to FIG. 5, the nonvolatile multilevel optical memory 1 includes a gate electrode 10, a gate insulator 20, an organic ligand 30, a channel 40, a source electrode, and a drain electrode 50. .
게이트 전극(10), 소스 전극 및 드레인 전극(50)은 금속 또는 기타 전도성 물질로 구현될 수 있다. 게이트 전극(10)은 비휘발성 광 메모리의 상태를 제어하고, 게이트 전극(10)에 의해 활성화 또는 비활성화된 채널을 통해 소스 전극 및 드레인 전극(50) 간에 캐리어가 전달된다.The gate electrode 10, the source electrode, and the drain electrode 50 may be formed of a metal or other conductive material. The gate electrode 10 controls the state of the nonvolatile optical memory, and carriers are transferred between the source electrode and the drain electrode 50 through a channel activated or deactivated by the gate electrode 10.
게이트 절연체(20)는 게이트 전극(10)에 연결되며 절연 물질로 구현될 수 있다.The gate insulator 20 is connected to the gate electrode 10 and may be implemented with an insulating material.
유기물 리간드(30)은 게이트 절연막(20)의 표면에 형성된다. 점성을 갖는 유기물을 열처리하여 유기물 층을 형성하고, 유기물 층을 제거하면 남은 리간드가 게이트 절연막(20)의 표면에 도핑된다. The organic ligand 30 is formed on the surface of the gate insulating layer 20. When the viscous organic material is heat-treated to form an organic material layer and the organic material layer is removed, the remaining ligand is doped on the surface of the gate insulating layer 20.
유기물 리간드(30)로 도핑된 게이트 절연막(20)에 채널(40)을 증착하여, 유기물 리간드(30)을 게이트 절연막(20) 및 채널(40) 간에 형성한다.A channel 40 is deposited on the gate insulating layer 20 doped with the organic ligand 30 to form the organic ligand 30 between the gate insulating layer 20 and the channel 40.
채널(40)은 도핑된 게이트 절연체(20)에 연결되며 캐리어를 전달한다. 채널은 IGZO 등의 산화물로 구현될 수 있으며, 반도체 물질로 구현될 수 있다. 유기물 리간드가 형성된 게이트 절연체에 전도 물질을 증착하고 열처리하여 채널을 형성할 수 있다.The channel 40 is connected to the doped gate insulator 20 and carries carriers. The channel may be implemented with an oxide such as IGZO, or a semiconductor material. A channel may be formed by depositing a conductive material on the gate insulator on which the organic ligand is formed and heat treatment.
소스 전극 및 드레인 전극(50)은 이격된 상태로 채널에 연결될 수 있다.The source electrode and the drain electrode 50 may be connected to the channel while being spaced apart.
비휘발성 멀티레벨 광 메모리(1)는 광을 조사하는 광원을 포함할 수 있다. 채널은 조사된 광에 의해 전자를 프로그래밍 또는 소거할 수 있다. 광원은 광의 파장 대역을 조절하고 채널은 각 파장에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억할 수 있다. 광원은 광의 세기를 조절하고 채널은 조절된 광자량에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억할 수 있다.The nonvolatile multilevel optical memory 1 may include a light source that irradiates light. The channel can program or erase electrons by irradiated light. The light source adjusts the wavelength band of light, and the channel can store and store electrons programmed in multilevels according to each wavelength. The light source controls the intensity of the light and the channel can store and store electrons programmed in multilevels according to the adjusted photon amount.
본 실시예에 따른 비휘발성 멀티레벨 광 메모리는 빛의 에너지의 변수인 파장의 함수를 조절하여 각 파장에 따른 멀티 레벨을 용이하게 구현할 수 있고, 빛의 세기를 조절하여 입사되는 광자(Photon)의 양을 조절하여 멀티 레벨을 구현할 수 있다.The nonvolatile multilevel optical memory according to the present embodiment can easily implement a multilevel according to each wavelength by adjusting a function of a wavelength, which is a variable of light energy, and by adjusting the intensity of light, the number of incident photons is Multi-level can be achieved by adjusting the amount.
도 7은 비휘발성 멀티레벨 광 메모리의 프로그래밍 및 소거 특성을 예시한 도면이고, 도 8은 비휘발성 멀티레벨 광 메모리의 기억 특성을 예시한 도면이다.7 is a diagram illustrating programming and erasing characteristics of a nonvolatile multilevel optical memory, and FIG. 8 is a diagram illustrating storage characteristics of a nonvolatile multilevel optical memory.
도 7에 도시된 바와 같이 PDMS 탈착 후 IGZO 산화물 박막 트랜지스터에 적색광을 5mW 조사하면, 프로그래밍 및 전기적 펄스에 의한 소거 특성을 확보할 수 있음을 확인할 수 있다.As shown in FIG. 7, it can be seen that if the IGZO oxide thin film transistor is irradiated with red light of 5 mW after the PDMS is detached, programming and erasing characteristics due to electrical pulses can be secured.
도 8에 도시된 바와 같이 PDMS 탈착 후 IGZO 산화물 박막 트랜지스터에 적색광, 녹색광, 청색광을 5mW 조사하면, 프로그래밍된 전자가 1000 sec 유지되는 특성을 나타냄을 확인할 수 있다.As shown in FIG. 8, when the IGZO oxide thin film transistor is irradiated with red light, green light, and blue light of 5 mW after PDMS desorption, it can be seen that the programmed electrons are maintained for 1000 sec.
도 1에서는 각각의 과정을 순차적으로 실행하는 것으로 기재하고 있으나 이는 예시적으로 설명한 것에 불과하고, 이 분야의 기술자라면 본 발명의 실시예의 본질적인 특성에서 벗어나지 않는 범위에서 도 1에 기재된 순서를 일부 변경하여 실행하거나 또는 하나 이상의 과정을 병렬적으로 실행하거나 다른 과정을 추가하는 것으로 다양하게 수정 및 변형하여 적용 가능할 것이다.In FIG. 1, each process is described as sequentially executing, but this is merely an example, and those skilled in the art may partially change the order described in FIG. 1 without departing from the essential characteristics of the embodiment of the present invention. By executing or executing one or more processes in parallel, or adding other processes, various modifications and variations may be applied.
본 실시예들은 본 실시예의 기술 사상을 설명하기 위한 것이고, 이러한 실시예에 의하여 본 실시예의 기술 사상의 범위가 한정되는 것은 아니다. 본 실시예의 보호 범위는 아래의 청구범위에 의하여 해석되어야 하며, 그와 동등한 범위 내에 있는 모든 기술 사상은 본 실시예의 권리범위에 포함되는 것으로 해석되어야 할 것이다.The present embodiments are for explaining the technical idea of the present embodiment, and the scope of the technical idea of the present embodiment is not limited by these embodiments. The scope of protection of this embodiment should be interpreted by the following claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present embodiment.
1: 비휘발성 멀티레벨 광 메모리1: Non-volatile multilevel optical memory
10: 게이트 전극10: gate electrode
20: 게이트 절연체20: gate insulator
30: 유기물 리간드30: organic ligand
40: 채널40: channel
50: 소스 전극 및 드레인 전극50: source electrode and drain electrode

Claims (14)

  1. 게이트에 게이트 절연체를 형성하는 단계;Forming a gate insulator on the gate;
    상기 게이트 절연체에 점성을 갖는 유기물 용액을 증착하는 단계;Depositing a viscous organic material solution on the gate insulator;
    상기 점성을 갖는 유기물 용액을 열처리하여 유기물 층을 형성하는 1차 열처리 단계;A first heat treatment step of heat-treating the viscous organic material solution to form an organic material layer;
    상기 게이트 절연체로부터 상기 유기물 층을 제거하고 남은 유기물 리간드를 상기 게이트 절연체의 표면에 형성하는 단계;Removing the organic material layer from the gate insulator and forming the remaining organic ligand on the surface of the gate insulator;
    상기 유기물 리간드가 형성된 상기 게이트 절연체에 채널을 증착하고 열처리하는 2차 열처리 단계; 및A second heat treatment step of depositing and heat treating a channel on the gate insulator on which the organic ligand is formed; And
    상기 채널에 소스 전극 및 드레인 전극을 증착하는 단계Depositing a source electrode and a drain electrode on the channel
    를 포함하는 비휘발성 멀티레벨 광 메모리의 제조 방법.Method of manufacturing a non-volatile multilevel optical memory comprising a.
  2. 제1항에 있어서,The method of claim 1,
    상기 1차 열처리 단계는, The first heat treatment step,
    폴리디메틸실록산 (Polydimethylsiloxane, PDMS) 용액을 60℃ 내지 200℃의 온도 범위에서 어닐링하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.A method of manufacturing a nonvolatile multilevel optical memory, characterized in that annealing a polydimethylsiloxane (PDMS) solution at a temperature range of 60°C to 200°C.
  3. 제1항에 있어서,The method of claim 1,
    상기 2차 열처리 단계는, The secondary heat treatment step,
    IGZO(Indium Gallium Zinc Oxide) 물질을 200℃ 내지 500℃의 온도 범위에서 어닐링하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.A method of manufacturing a nonvolatile multilevel optical memory, comprising annealing an IGZO (Indium Gallium Zinc Oxide) material in a temperature range of 200°C to 500°C.
  4. 제1항에 있어서,The method of claim 1,
    상기 유기물 리간드는 상기 게이트 절연체 및 상기 채널 사이에 인터페이스 트랩(Interface Trap)을 형성하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.The method of manufacturing a nonvolatile multilevel optical memory, wherein the organic ligand forms an interface trap between the gate insulator and the channel.
  5. 제1항에 있어서,The method of claim 1,
    상기 유기물 리간드는 상기 채널에 대한 에너지 밴드 갭에서 수소에 의한 서브 갭 상태(Sub Gap State)를 형성하여 광여기 캐리어(Photoexcited Carrier)를 증가시키는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.The organic ligand is a method of manufacturing a nonvolatile multilevel optical memory, characterized in that to increase the photoexcited carrier (Photoexcited Carrier) by forming a sub-gap state (Sub Gap State) by hydrogen in the energy band gap for the channel.
  6. 제1항에 있어서,The method of claim 1,
    상기 유기물 리간드는 상기 채널에서 금속과 산소의 결합력을 감소시키고 탄소를 주입시켜 결손 영역(Defect Site)을 형성하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.The organic ligand is a method of manufacturing a nonvolatile multilevel optical memory, characterized in that a defect site is formed by reducing a binding force between metal and oxygen in the channel and injecting carbon.
  7. 제1항에 있어서,The method of claim 1,
    상기 채널에 광원을 통해 광을 조사하는 단계를 포함하며,Including the step of irradiating light through a light source to the channel,
    상기 채널은 상기 조사된 광에 의해 전자를 프로그래밍 또는 소거하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.The method of manufacturing a nonvolatile multilevel optical memory, wherein the channel programs or erases electrons by the irradiated light.
  8. 제7항에 있어서,The method of claim 7,
    상기 광원은 광의 파장 대역을 조절하며,The light source controls the wavelength band of light,
    상기 채널은 각 파장에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.The method of manufacturing a nonvolatile multilevel optical memory, characterized in that the channel retains and stores electrons programmed into multilevels according to respective wavelengths.
  9. 제7항에 있어서,The method of claim 7,
    상기 광원은 광의 세기를 조절하며,The light source controls the intensity of light,
    상기 채널은 조절된 광자량에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리의 제조 방법.The method of manufacturing a nonvolatile multilevel optical memory, characterized in that the channel retains and stores electrons programmed into multilevels according to the adjusted amount of photons.
  10. 비휘발성 멀티레벨 광 메모리에 있어서,In the non-volatile multilevel optical memory,
    상기 비휘발성 광 메모리의 상태를 제어하는 게이트 전극;A gate electrode controlling a state of the nonvolatile optical memory;
    상기 게이트 전극에 연결된 게이트 절연체;A gate insulator connected to the gate electrode;
    상기 게이트 절연체에 연결되며 캐리어를 전달하는 채널; A channel connected to the gate insulator and transferring carriers;
    상기 채널 및 상기 게이트 절연막 간에 형성된 유기물 리간드; 및An organic ligand formed between the channel and the gate insulating layer; And
    상기 채널에 연결된 소스 전극 및 드레인 전극Source electrode and drain electrode connected to the channel
    을 포함하는 비휘발성 멀티레벨 광 메모리.Non-volatile multilevel optical memory comprising a.
  11. 제9항에 있어서,The method of claim 9,
    상기 유기물 리간드는 상기 게이트 절연체 및 상기 채널 사이에 인터페이스 트랩(Interface Tropo)을 형성하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리.Wherein the organic ligand forms an interface trap between the gate insulator and the channel.
  12. 제9항에 있어서,The method of claim 9,
    상기 유기물 리간드는 상기 채널에 대한 에너지 밴드 갭에서 수소에 의한 서브 갭 상태(Sub Gap State)를 형성하여 광여기 캐리어(Photoexcited Carrier)를 증가시키는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리.The organic ligand is a nonvolatile multilevel optical memory, characterized in that to increase the photoexcited carrier (Photoexcited Carrier) by forming a sub-gap state (Sub Gap State) by hydrogen in the energy band gap for the channel.
  13. 제9항에 있어서,The method of claim 9,
    상기 유기물 리간드는 상기 채널에서 금속과 산소의 결합력을 감소시키고 탄소를 주입시켜 결손 영역(Defect Site)을 형성하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리.The organic ligand is a non-volatile multilevel optical memory, characterized in that to form a defect site by reducing the binding force between metal and oxygen in the channel and injecting carbon.
  14. 제9항에 있어서,The method of claim 9,
    광을 조사하는 광원을 포함하며,It includes a light source that irradiates light,
    상기 채널은 상기 조사된 광에 의해 전자를 프로그래밍 또는 소거하며,The channel programs or erases electrons by the irradiated light,
    상기 광원은 광의 파장 대역을 조절하고 상기 채널은 각 파장에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억하거나,The light source adjusts the wavelength band of light, and the channel stores and stores electrons programmed in multilevels according to each wavelength, or
    상기 광원은 광의 세기를 조절하고 상기 채널은 조절된 광자량에 따라 멀티레벨로 프로그래밍된 전자를 유지하여 기억하는 것을 특징으로 하는 비휘발성 멀티레벨 광 메모리.Wherein the light source adjusts the intensity of light, and the channel stores and stores electrons programmed in multilevels according to the adjusted amount of photons.
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