WO2021079581A1 - Image-capturing element and image-capturing device - Google Patents

Abstract

This image-capturing element, which generates an image signal based on holes generated and accumulated by photoelectric conversion, detects the saturation of the image signal and prevents the image quality from being deteriorated.　The image-capturing element includes a pixel and a clip circuit. The pixel includes a photoelectric conversion unit for performing photoelectric conversion on incident light, and a charge holding unit for holding holes among the charges generated by the photoelectric conversion, and generates an image signal on the basis of the held holes. The clip circuit performs clipping for limiting the rise of the generated image signal to a predetermined clip voltage.

Description

Image sensor and image sensor

The present disclosure relates to an image pickup device and an image pickup device. More specifically, the present invention relates to an image pickup device that generates an image signal based on holes generated and accumulated by photoelectric conversion, and an image pickup device that uses the image pickup device.

Conventionally, an image sensor in which a plurality of pixels are arranged has been used. In this pixel, a charge generation unit that stores the electric charge generated by photoelectric conversion of incident light, a transfer unit that transfers the accumulated electric charge, and a floating diffusion region (floating diffusion) that holds the transferred electric charge. ) Is placed. Further, an amplification transistor for amplifying the potential change of the floating diffusion is arranged in the pixel, and an image signal is generated based on the electric charge held in the floating diffusion. Further, the pixel is further arranged with an initialization unit that discharges and resets the charge held in the charge holding unit. Charges due to photoelectric conversion are accumulated in the charge generation unit during the exposure period, the floating diffusion is reset by the initialization unit after the exposure period elapses, and the charges are transferred to and held by the charge transfer unit to the floating diffusion. An image signal is generated and output by the amplification transistor based on the retained electric charge.

By resetting, the charge of floating diffusion is discharged and the black level of the image signal is set. That is, the image signal generated by the amplification transistor immediately after reset becomes an image signal corresponding to the black level. However, it is difficult to discharge all the charges held in the floating diffusion, and there are charges remaining in the floating diffusion after reset. Since the residual charge is different for each pixel, the black level fluctuates for each pixel, and noise is generated in the image signal.

In order to prevent the generation of this noise, a method is used in which the image signal is generated twice, immediately after the reset and after the charge is transferred to the floating diffusion. By generating an image signal based on the difference between these two image signals, the influence of the electric charge remaining on the floating diffusion can be eliminated. Such a method of generating an image signal is called Correlated Double Sampling (CDS).

In the above-mentioned CDS, the process of generating an image signal at the reset level immediately after reset is called the P phase, and the process of generating the image signal at the signal level after the charge generated by the photoelectric conversion is transferred is called the D phase. To. By subtracting the reset level image signal generated in the P phase from the signal level image signal generated in the D phase, the influence of the reset level (black level) fluctuation can be reduced. In an image sensor that employs this correlated double sampling, there is a problem when imaging strong incident light. When imaging a high-intensity subject such as the sun, the amount of incident light of the pixels increases and charges exceeding the saturation level of the charge generation unit are generated. When the charge exceeding the saturation level flows into the floating diffusion, the charge of the floating diffusion is saturated and an image signal having a high reset level is generated in the P phase. An image signal having a high signal level is also generated in the D phase, and an image signal based on the difference between these image signals is generated. As a result, a low-luminance image signal is output despite the high-luminance subject. For this reason, a blackening phenomenon occurs in which a high-brightness subject such as the sun is displayed in black, and the image quality is deteriorated.

In order to prevent the occurrence of this blackening phenomenon, an image sensor has been proposed that detects that an incident light having an amount of light exceeding the saturation level is incident on a pixel by comparing the image signal of the reset level in the P phase with the determination level. (See, for example, Patent Document 1.). In this conventional image sensor, a comparator composed of differential pairs is used, an image signal output from a pixel is connected to a non-inverting input terminal of the comparator, and a signal corresponding to a determination level is a comparator. It is connected to the inverting input terminal of. When an image signal having a voltage higher than the determination level is input to the comparator, the incident light having an amount of light exceeding the saturation level is detected. The image signal that caused this blackening phenomenon is corrected by the circuit in the subsequent stage.

Japanese Unexamined Patent Publication No. 2008-283557

In the above-mentioned conventional technique, when the polarity of the image signal is inverted, there is a problem that the incident light of the incident light exceeding the saturation level is not detected in the pixel and the occurrence of the blackening phenomenon cannot be prevented. In the above-mentioned conventional image pickup device, a photoelectric conversion unit made of silicon (Si) is arranged. This Si-based charge generator accumulates electrons in the charges generated by photoelectric conversion. Since the accumulated electrons are held in the floating diffusion, an image signal whose signal level decreases as the amount of incident light increases is generated. On the other hand, in an image sensor that captures long-wavelength light such as infrared light, a photoelectric conversion unit using a III-V compound semiconductor is used instead of Si. This is to improve the sensitivity in red light and the like. Holes in the charges generated by the photoelectric conversion are taken out from the photoelectric conversion part of the III-V compound semiconductor and accumulated. An image signal is generated based on the accumulated holes. Therefore, an image signal whose level rises as the amount of incident light increases is generated, and the comparator cannot detect the incident of the incident light having an amount of light exceeding the saturation level on the pixel, and a blackening phenomenon occurs. ..

The present disclosure has been made in view of the above-mentioned problems, and the saturation of the image signal is detected in the image sensor that generates the image signal based on the holes generated and accumulated by the photoelectric conversion, and the deterioration of the image quality is deteriorated. The purpose is to prevent it.

The present disclosure has been made to solve the above-mentioned problems, and the first aspect thereof is a photoelectric conversion unit that performs photoelectric conversion of incident light and holes among the charges generated by the photoelectric conversion. It is provided with a charge holding unit for holding, and includes a pixel that generates an image signal based on the held holes and a clip circuit that performs clipping that limits the rise of the generated image signal to a predetermined clip voltage. It is an image sensor.

Further, in the first aspect, the clip circuit may be configured by a follower circuit that performs the clip by limiting the rise of the image signal based on the predetermined clip voltage supplied to the control terminal. ..

Further, in the first aspect, in the clip circuit, the predetermined clip voltage is supplied to the gate, the generated image signal is supplied to the drain, and the load is connected to the source by the follower circuit. It may be configured.

Further, in the first aspect, the reference signal as a reference when converting the generated image signal into a digital image signal is compared with the generated image signal, and the result of the comparison is output. An analog digital that includes a comparison unit and a time measuring unit that measures the time from the start of the comparison to the output of the result of the comparison in the comparison unit, and converts the image signal into a digital image signal based on the result of the time measurement. A conversion unit may be further provided.

Further, in the first aspect, the pixel further includes a reset unit that discharges holes held in the charge holding unit to perform reset, and generates a reset image signal that is an image signal after the reset. The analog-to-digital converter may generate the digital image signal based on the difference between the generated image signal and the reset image signal.

Further, in the first aspect, the clip circuit may perform the clip at the time of generating the reset image signal.

Further, in the first aspect, the comparison unit includes a differential pair in which the generated image signal and the reference signal are input via a coupling capacitor, and an initialization circuit for initializing the differential pair. The clip circuit may perform the clip at the time of initialization by the initialization circuit.

Further, in the first aspect, the initialization circuit may be initialized by holding the initial value of the generated image signal and the initial value of the reference signal in the respective coupling capacitors.

Further, in this first aspect, a saturation detection unit for detecting the saturation of the image signal may be further provided.

Further, in this first aspect, the saturation detection unit may detect the saturation based on the result of comparison in the comparison unit.

Further, in this first aspect, a correction unit that corrects the digital image signal based on the detection result of the saturation detection unit may be further provided.

A second aspect of the present disclosure includes a photoelectric conversion unit that performs photoelectric conversion of incident light and a charge holding unit that retains holes among the charges generated by the photoelectric conversion, and the retained holes. Imaging with a pixel that generates an image signal based on the above, a clip circuit that performs clipping that limits the rise of the generated image signal to a predetermined clip voltage, and a processing circuit that processes the generated image signal. It is a device.

By adopting such an aspect, the effect of limiting the rise of the image signal in the image sensor that generates the image signal based on the holes generated and accumulated by the photoelectric conversion to a predetermined voltage is brought about. It is assumed that saturation of the image signal is suppressed when capturing a high-brightness subject.

It is a figure which shows the structural example of the image pickup device which concerns on embodiment of this disclosure. It is a figure which shows the structural example of the pixel which concerns on 1st Embodiment of this disclosure. It is a figure which shows the structural example of the column signal processing part which concerns on embodiment of this disclosure. It is a figure which shows the structural example of the clip circuit which concerns on 1st Embodiment of this disclosure. It is a figure which shows the structural example of the analog-digital conversion part which concerns on 1st Embodiment of this disclosure. It is a figure which shows the structural example of the comparison part which concerns on embodiment of this disclosure. It is a figure which shows an example of the conversion of the image signal which concerns on embodiment of this disclosure. It is a figure which shows the structural example of the analog-digital conversion part which concerns on the 2nd Embodiment of this disclosure. It is a figure which shows the structural example of the pixel which concerns on the 3rd Embodiment of this disclosure. It is a figure which shows the structural example of the pixel which concerns on 4th Embodiment of this disclosure. It is a figure which shows the structural example of the pixel which concerns on 5th Embodiment of this disclosure. It is a block diagram which shows the schematic configuration example of the camera which is an example of the image pickup apparatus to which this technology can be applied.

Next, a mode for carrying out the present disclosure (hereinafter, referred to as an embodiment) will be described with reference to the drawings. In the drawings below, the same or similar parts are designated by the same or similar reference numerals. In addition, the embodiments will be described in the following order.
1. 1. First Embodiment 2. Second embodiment 3. Third embodiment 4. Fourth Embodiment 5. Application example to camera

<1. First Embodiment>
[Structure of image sensor]
FIG. 1 is a diagram showing a configuration example of an image sensor according to an embodiment of the present disclosure. The image sensor 1 in the figure includes a pixel array unit 10, a vertical drive unit 20, a column signal processing unit 30, and a control unit 40.

The pixel array unit 10 is configured by arranging the pixels 100 in a two-dimensional grid pattern. Here, the pixel 100 generates an image signal according to the irradiated light. The pixel 100 has a photoelectric conversion unit that generates an electric charge according to the irradiated light. Further, the pixel 100 further has a pixel circuit. This pixel circuit generates an image signal based on the electric charge generated by the photoelectric conversion unit. The generation of the image signal is controlled by the control signal generated by the vertical drive unit 20 described later. The signal lines 11 and 12 are arranged in the pixel array unit 10 in an XY matrix. The signal line 11 is a signal line that transmits a control signal of the pixel circuit in the pixel 100, is arranged for each line of the pixel array unit 10, and is commonly wired to the pixel 100 arranged in each line. The signal line 12 is a signal line for transmitting an image signal generated by the pixel circuit of the pixel 100, is arranged in each row of the pixel array unit 10, and is commonly wired to the pixel 100 arranged in each row. To. These photoelectric conversion units and pixel circuits are formed on a semiconductor substrate.

The vertical drive unit 20 generates a control signal for the pixel circuit of the pixel 100. The vertical drive unit 20 transmits the generated control signal to the pixel 100 via the signal line 11 in the figure.

The column signal processing unit 30 processes the image signal generated by the pixel 100. The column signal processing unit 30 processes the image signal transmitted from the pixel 100 via the signal line 12 in the figure. The processing in the column signal processing unit 30 corresponds to, for example, analog-to-digital conversion that converts an analog image signal generated in the pixel 100 into a digital image signal. Further, the column signal processing unit 30 can perform the above-mentioned correlation double sampling processing. The image signal processed by the column signal processing unit 30 is output as an image signal of the image sensor 1. The details of the configuration of the column signal processing unit 30 will be described later.

The control unit 40 controls the entire image sensor 1. The control unit 40 controls the image sensor 1 by generating and outputting a control signal for controlling the vertical drive unit 20 and the column signal processing unit 30. The control signal generated by the control unit 40 is transmitted to the vertical drive unit 20 and the column signal processing unit 30 by the signal lines 41 and 42, respectively.

[Pixel composition]
FIG. 2 is a diagram showing a configuration example of pixels according to the first embodiment of the present disclosure. The figure is a circuit diagram showing a configuration example of the pixel 100. The pixel 100 in the figure includes a photoelectric conversion unit 101, charge holding units 102 and 103, and MOS transistors 104 to 108. Further, a power supply line Vdd, a power supply line Vdr, and a power supply line Vtop are arranged in the pixel 100 in the figure. The power line Vdd supplies power to the pixel 100. The power line Vdr transmits the reset potential. The power line Vtop supplies the bias voltage of the photoelectric conversion unit 101. A p-channel MOS transistor can be used for the MOS transistors 104 to 106. Further, n-channel MOS can be used for the MOS transistors 107 and 108.

The cathode of the photoelectric conversion unit 101 is connected to the power supply line Vtop, and the anode is connected to the source of the MOS transistor 104, the source of the MOS transistor 105, and one end of the charge holding unit 102. The other end of the charge holding portion 102 is grounded. The gate of the MOS transistor 104 is connected to the overflow gate signal line OFG, and the drain is connected to the power supply line Vdr. The gate of the MOS transistor 105 is connected to the transfer signal line TR, and the drain is connected to the source of the MOS transistor 106, the gate of the MOS transistor 107, and one end of the charge holding unit 103. The other end of the charge holding portion 103 is grounded. The drain of the MOS transistor 106 is connected to the power supply line Vdr. The drain of the MOS transistor 107 is connected to the power supply line Vdd, and the source is connected to the drain of the MOS transistor 108. The gate of the MOS transistor 108 is connected to the selection signal line SEL, and the source is connected to the output signal line Vo. The overflow gate signal line OFG, the transfer signal line TR, the reset signal line RST, and the selection signal line SEL constitute the signal line 11. The output signal line Vo constitutes the signal line 12.

The photoelectric conversion unit 101 generates an electric charge according to the irradiated light as described above. A photodiode can be used for the photoelectric conversion unit 101. As shown in the figure, the cathode of the photoelectric conversion unit 101 is connected to the power supply line Vtop. This power supply line Vtop can supply a voltage of, for example, 2.2V. The anode of the photoelectric conversion unit 101 is connected to the charge holding unit 102, which will be described later. Therefore, of the charges generated by the photoelectric conversion of the photoelectric conversion unit 101, electrons are discharged to the power supply line Vtop, and holes are moved to the charge holding unit 102 and held.

The charge holding unit 102 is a capacitor that holds the electric charge generated by the photoelectric conversion unit 101. As described above, the charge holding unit 102 holds the holes generated by the photoelectric conversion unit 101. A capacitor composed of a semiconductor region arranged on a semiconductor substrate can be applied to the charge holding unit 102.

The MOS transistor 104 is a transistor that resets the photoelectric conversion unit 101 and the charge holding unit 102. The reset of the photoelectric conversion unit 101 and the charge holding unit 102 by the MOS transistor 104 is controlled by the signal transmitted by the overflow gate signal line OFG. As shown in the figure, the drain of the MOS transistor 104 is connected to the power supply line Vdr. This power supply line Vdr can supply a voltage of, for example, 1.2V. Therefore, at the time of reset, a voltage of 1.2 V is applied to the photoelectric conversion unit 101 and the charge holding unit 102, and the holes held in the photoelectric conversion unit 101 and the charge holding unit 102 are discharged to the power supply line Vdr. To.

The MOS transistor 105 is a transistor that transfers the charges (holes) generated by the photoelectric conversion unit 101 and held in the charge holding unit 102 to the charge holding unit 103. The charge transfer in the MOS transistor 105 is controlled by the signal transmitted by the transfer signal line TR.

The charge holding unit 103 is a capacitor that holds the charge (hole) transferred by the MOS transistor 105. Floating diffusion composed of a semiconductor region arranged on a semiconductor substrate can be applied to the charge holding unit 103.

The MOS transistor 107 is a transistor that generates a signal based on the electric charge (hole) held in the electric charge holding unit 103. The MOS transistor 107 constitutes a floating diffusion amplifier together with the charge holding unit 103. The image signal generated by the MOS transistor 107 has a black level of approximately 1.2 V, which is the voltage at the time of reset, and is a signal whose voltage increases as the amount of incident light increases. This is because the MOS transistor 107 generates an image signal based on the holes accumulated in the charge holding unit 103.

The MOS transistor 108 is a transistor that outputs the signal generated by the MOS transistor 107 as an image signal to the output signal line Vo. The MOS transistor 108 is controlled by a signal transmitted by the selection signal line SEL.

The MOS transistor 106 is a transistor that resets the charge holding unit 103 by discharging the charge held by the charge holding unit 103 to the power supply line Vdr. The reset by the MOS transistor 106 is controlled by the signal transmitted by the reset signal line RST, and is executed before the charge transfer by the MOS transistor 105.

The image signal in the pixel 100 in the figure can be generated as follows. First, a control signal is output to the overflow gate signal line OFG to conduct the MOS transistor 104, and the charge holding unit 102 is reset. As a result, the exposure period is started, and the electric charge generated by the photoelectric conversion unit 101 is accumulated in the charge holding unit 102. After the lapse of this exposure period, a control signal is output to the reset signal line RST to conduct the MOS transistor 106, and the charge holding unit 103 is reset. At this time, the MOS transistor 107 generates an image signal based on the charge of the reset charge holding unit 103. After the reset is completed, a control signal is output to the selection signal line SEL to conduct the MOS transistor 108. As a result, the reset image signal, which is the image signal after the reset, is output to the output signal line Vo, and the image signal in the P phase described above can be generated.

Next, a control signal is output to the transfer signal line TR to conduct the MOS transistor 105, and the charge held in the charge holding unit 102 is distributed to the charge holding unit 103. The distributed charge is held by the charge holding unit 103, and an image signal is generated by the MOS transistor 107 based on the held charge. Next, a control signal is output to the selection signal line SEL to conduct the MOS transistor 108. As a result, the image signal generated by the MOS transistor 107 is output to the output signal line Vo, and the image signal in the D phase described above can be generated.

When the pixel 100 is irradiated with incident light from a high-intensity subject such as the sun, the incident light leaks to the charge holding unit 103 to cause photoelectric conversion, and a charge is generated to saturate the charge holding unit 103. Since the charge of the charge holding unit 103 increases to the saturation level even immediately after the reset, the saturation level image signal is generated from the MOS transistor 107. This saturation level image signal is generated and output in the P phase and the D phase.

[Structure of column signal processing unit]
FIG. 3 is a diagram showing a configuration example of a column signal processing unit according to the embodiment of the present disclosure. The figure is a diagram showing a configuration example of the column signal processing unit 30. The column signal processing unit 30 in the figure includes a clip circuit 31, a constant current circuit 33, an analog-to-digital conversion (AD conversion) unit 32, a horizontal transfer unit 34, a reference signal generation unit 35, and a timing control unit 36. To be equipped. The clip circuit 31, the constant current circuit 33, and the analog-to-digital conversion unit 32 are arranged for each of a plurality of output signal lines Vo of the signal lines 12 of the pixel array unit 10.

The reference signal generation unit 35 generates a reference signal. Here, the reference signal is a signal that serves as a reference for analog-to-digital conversion in the analog-to-digital conversion unit 32, which will be described later. As the reference signal, for example, a signal in which the voltage rises like a ramp function can be used. The reference signal generation unit 35 generates a reference signal according to the control of the control unit 40 described with reference to FIG. 1, and supplies the reference signal to the analog-digital conversion unit 32 via the signal line 303.

The timing control unit 36 controls the operation timing of each unit in the column signal processing unit 30. The timing control unit 36 generates control signals for each unit of the column signal processing unit 30 according to the control of the control unit 40. Further, the timing control unit 36 generates a clip voltage of the clip circuit 31 described later. These control signals are output via the signal lines 301, 304 and 306.

The clip circuit 31 is a circuit that clips the image signal generated by the pixel 100. The clip circuit 31 clips the image signal output via the output signal line Vo constituting the signal line 12. Here, the clip of the image signal is to limit the rise of the image signal to a predetermined clip voltage. As described above, the image signal generated by the pixel 100 is a signal whose voltage increases as the amount of incident light increases. The signal level (voltage) of an image signal corresponding to a high-luminance subject such as the sun rises excessively. The clip circuit 31 limits the excessive rise of this image signal. The clip voltage is supplied by a signal line 301 that is commonly wired to the plurality of clip circuits 31. The clipped image signal is output to the signal line 302. The details of the configuration of the clip circuit 31 will be described later.

The constant current circuit 33 is a circuit that supplies a constant current. The constant current circuit 33 is connected between the signal line 302 and the ground to supply a constant current sink current to the signal line 302. As will be described later, the constant current circuit 33 is a circuit that constitutes a load of the MOS transistor 107 of the pixel 100 and the MOS transistor 311 of the clip circuit 31.

The analog-to-digital conversion unit 32 converts an analog image signal into a digital image signal. The analog-digital conversion unit 32 in the figure converts the image signal output from the clip circuit 31. The reference signal that serves as a reference for analog-to-digital conversion is supplied by a signal line 303 that is commonly wired to the plurality of analog-to-digital conversion units 32. The converted digital image signal is output to the horizontal transfer unit 34 via the signal line 305. The details of the configuration of the analog-to-digital conversion unit 32 will be described later.

The horizontal transfer unit 34 transfers a digital image signal. The horizontal transfer unit 34 sequentially transfers the digital image signals generated by the plurality of analog-to-digital conversion units 32 and outputs them via the signal line 307.

[Clip circuit configuration]
FIG. 4 is a diagram showing a configuration example of a clip circuit according to the first embodiment of the present disclosure. In the figure, A represents a configuration example of the clip circuit 31, and B in the figure represents the operation of the clip circuit 31. In A in the figure, in addition to the clip circuit 31, the charge holding unit 103 of the pixel 100, the MOS transistor 108, and the constant current circuit 33 are shown. The clip circuit 31 includes a MOS transistor 311.

The MOS transistor 311 is a transistor that constitutes a follower circuit together with the constant current circuit 33. An n-channel MOS transistor can be used for the MOS transistor 311. The gate of the MOS transistor 311 is connected to the signal line 301, and a clip voltage is applied. The drain of the MOS transistor 311 is connected to the signal line 12, and the source is connected to the signal line 302. As described above, the constant current circuit 33 is further connected to the signal line 302. The MOS transistor 311 and the constant current circuit 33 form a source follower circuit. For convenience, only the MOS transistor 311 is described in the clip circuit 31, but the clip circuit 31 also includes the constant current circuit 33. The constant current circuit 33 also corresponds to the load of the MOS transistor 108 of the pixel 100. The MOS transistor 311 of the clip circuit 31 is inserted between the source of the MOS transistor 108 and the constant current circuit 33.

B in the figure is a diagram showing a change in the signal level (voltage) of the clip circuit 31. In B in the figure, the vertical axis represents voltage and the horizontal axis represents time. In B in the figure, the dotted line graph 501 represents the voltage of the charge holding unit 103. The broken line graph 502 represents the voltage of the image signal generated by the MOS transistor 108. Graph 503 of the alternate long and short dash line represents the clip voltage. The solid line graph 504 represents the source voltage of the MOS transistor 311 and represents the output voltage of the clip circuit 31. Reference numeral B in the figure shows an example in which the charge held in the charge holding unit 103 increases with time and the voltage rises, and the voltage of the charge holding unit 103 increases in a ramp function shape.

In the region where the voltage of the charge holding unit 103 is low, the voltage of the image signal increases as the voltage of the charge holding unit 103 increases. In this region, since the drain voltage of the MOS transistor 311 is lower than the clip voltage applied to the gate, the drain and source of the MOS transistor are in a conductive state. The source of the MOS transistor 311 has substantially the same voltage as the image signal, and a signal having substantially the same voltage as the image signal output from the pixel 100 is output from the clip circuit 31.

However, when the image signal rises to a voltage close to the clip voltage, the source voltage of the MOS transistor 311 does not follow the image signal and is limited to a constant voltage. In this region, the MOS transistor 311 operates as a source follower. A voltage that is lower than the gate voltage by the threshold voltage Vgs between the gate sources is output to the source of the MOS transistor 311. In this way, the image signal is clipped by the clip circuit 31.

The operation of the clip circuit 31 can be controlled by the supplied clip voltage. Specifically, by supplying a clip voltage corresponding to a desired limit voltage, the clip circuit 31 can be made to perform a clip operation, and an increase in the image signal can be limited. Further, by supplying a high voltage such as the power supply voltage of the power supply line Vdd as the clip voltage, the clip operation of the clip circuit 31 can be stopped, and the image signal generated by the pixel 100 can be output (passed). it can.

The configuration of the clip circuit 31 is not limited to this example. For example, a follower circuit using an element other than the MOS transistor can also be used.

[Configuration of analog-to-digital converter]
FIG. 5 is a diagram showing a configuration example of an analog-to-digital conversion unit according to the first embodiment of the present disclosure. The figure is a diagram showing a configuration example of the analog-to-digital conversion unit 32. The analog-to-digital conversion unit 32 includes a comparison unit 320, a counter 330, and a holding unit 340. Further, in the figure, as the signal line 304, the initialization signal line SET, the clock signal line CLK, the initialization signal line CLR, the up / down count signal line U / D, and the holding signal line HLD are shown.

The comparison unit 320 compares the analog image signal generated by the pixel 100 with the reference signal, and outputs the comparison result to the counter 330. For example, as a result of comparison, a value "0" is output when the reference signal has a voltage lower than that of the analog image signal, and a value "1" is output when the reference signal shifts to a voltage higher than that of the analog image signal. be able to. Thereby, it is possible to detect the timing when the reference signal becomes substantially the same value as the analog image signal. The comparison result of the comparison unit 320 is output to the counter 330 via the signal line 307. Further, an initialization signal line SET is connected to the comparison unit 320. The comparison unit 320 is initialized by the control signal from the initialization signal line SET before the start of the above-mentioned comparison. The details of the configuration of the comparison unit 320 will be described later.

The counter 330 measures the time from the start of comparison in the comparison unit 320 until the reference signal and the analog image signal have substantially the same value. Specifically, the time from the start of the output of the reference signal in the reference signal generation unit 35 to the transition of the output of the comparison unit 320 to the value "1" is measured. As described above, the reference signal is a signal whose value changes like a ramp function. There is a one-to-one correspondence between the time until the reference signal becomes substantially the same value as the analog image signal and the voltage of the analog image signal. Therefore, analog-to-digital conversion can be performed by generating and outputting a digital signal corresponding to the elapsed time when the reference signal becomes substantially the same value as the analog image signal. Specifically, the counter 330 counts the clock signal during the period from the start of output of the reference signal to the transition of the output of the comparison unit 320 to the value "1", and outputs the count value as a result of analog-to-digital conversion. be able to. The output of this count value is performed via the signal line 308.

The clock signal is input from the clock signal line CLK. Further, the counter 330 is initialized to the value "0" by the control signal from the initialization signal line CLR. Further, the counter 330 can perform up-counting and down-counting. The switching between the up count and the down count can be performed by the control signal from the up / down count signal line U / D.

The holding unit 340 holds the count value of the counter 330. The holding unit 340 holds the count value of the counter 330, which is the result of analog-to-digital conversion. The count value held in the holding unit 340 corresponds to a digital image signal. The holding unit 340 holds the count value based on the control signal from the holding signal line HLD.

[Structure of comparison part]
FIG. 6 is a diagram showing a configuration example of a comparison unit according to the embodiment of the present disclosure. The comparison unit 320 in the figure includes capacitors 321 and 322 and MOS transistors 323 to 329. A p-channel MOS transistor can be used as the MOS transistor 323 to 326. Further, an n-channel MOS transistor can be used for the MOS transistors 327 to 329. Further, a power supply line Vdd for supplying power and a power supply line Vbias for supplying a bias voltage are wired in the comparison unit 320 in the figure.

The capacitor 321 is connected between the signal line 303 and the gate of the MOS transistor 327. The drain of the MOS transistor 325 is further connected to the gate of the MOS transistor 327. The drain of the MOS transistor 327 is connected to the source of the MOS transistor 325, the drain and gate of the MOS transistor 323, and the gate of the MOS transistor 324. The source of the MOS transistor 323 and the source of the MOS transistor 324 are commonly connected to the power supply line Vdd. The source of the MOS transistor 327 is connected to the source of the MOS transistor 328 and the drain of the MOS transistor 329. The gate of the MOS transistor 329 is connected to the power supply line Vbias, and the source is grounded.

The capacitor 322 is connected between the signal line 302 and the gate of the MOS transistor 328. The drain of the MOS transistor 326 is further connected to the gate of the MOS transistor 328. The drain of the MOS transistor 328 is connected to the source of the MOS transistor 326, the drain of the MOS transistor 324, and the signal line 307. The gate of the MOS transistor 325 and the gate of the MOS transistor 326 are commonly connected to the initialization signal line SET.

Capacitors 321 and 322 constitute a coupling capacitor. In addition, capacitors 321 and 322 hold a reference signal and an analog image signal, respectively. The MOS transistors 327 and 328 form a differential pair and amplify the difference between the reference signal and the analog image signal input via the capacitors 321 and 322. The MOS transistor 329 constitutes a constant current circuit commonly connected to the sources of the MOS transistors 327 and 328. A source current corresponding to the bias voltage of the power supply line Vbias flows through the MOS transistor 329. The MOS transistors 323 and 324 form a current mirror circuit and constitute a load connected to the drains of the MOS transistors 327 and 328, respectively. This current mirror circuit can improve the gain of the differential pair by the MOS transistors 327 and 328.

The reference signal and the analog image signal can be compared by amplifying the difference between the reference signal and the analog image signal using an amplifier having a high gain differential pair. The MOS transistors 325 and 326 are switches that initialize the comparison unit 320. The MOS transistors 325 and 326 are initialized based on the signal of the initialization signal line SET. Specifically, the control signal from the initialization signal line SET causes the MOS transistors 325 and 326 to conduct, and the gates of the MOS transistors 327 and 328 are initialized.

The initialization voltage of this gate is also applied to one end of the capacitors 321 and 322. A reference signal is input to the other end of the capacitor 321 via the signal line 303, and an image signal is input to the other end of the capacitor 322 via the signal line 302. Therefore, at the time of this initialization, by inputting the initial value of the reference signal via the signal line 303, the voltage of the difference between the initialization voltage of the gate of the MOS transistor 327 and the initial value of the reference signal is held in the capacitor 321. Can be made to. Similarly, by inputting the initial value of the image signal via the signal line 302, the capacitor 322 can hold the voltage of the difference between the initialization voltage of the gate of the MOS transistor 328 and the initial value of the image signal. In this way, the input unit of the comparison unit 320 can be initialized. By this initialization, the noise of the image signal based on the fluctuation of the initial value of the reference signal and the image signal can be reduced. The above-mentioned reset image signal can be used as the initial value of the image signal. The circuit by the MOS transistors 325 and 326 constitutes the initialization circuit of the differential pair by the MOS transistors 327 and 328.

[Conversion of image signal]
FIG. 7 is a diagram showing an example of image signal conversion according to the embodiment of the present disclosure. The figure is a time chart showing an example of an operation from the generation of an analog image signal in the pixel 100 to the conversion into a digital image signal in the analog-to-digital conversion unit 32. In the figure, OFG, SEL, RST, TR and SET are binarized control signals of overflow gate signal line OFG, selection signal line SEL, reset signal line RST, transfer signal line TR and initialization signal line SET, respectively. Represents. Further, HLD represents a binarized control signal of the holding signal line HLD. Further, the counter 330 output is represented by converting the digital count value, which is the output of the counter 330, into an analog quantity. Further, in the clip circuit 31 output in the figure, the alternate long and short dash line represents the waveform when the charge holding portion 103 of the pixel 100 is saturated. The dotted line represents the waveform of the image signal when the charge holding portion 103 of the pixel 100 is saturated when the clip circuit 31 is not arranged.

In the following, a signal corresponding to the threshold voltage Vgs between the gate and source for transitioning the MOS transistor of the pixel 100 and the comparison unit 320 to the conduction state is referred to as an on signal. In the overflow gate signal line OFG, reset signal line RST, transfer signal line TR, and initialization signal line SET connected to the gate of the p-channel MOS transistor, the value "0" represents the control signal of the on signal. In the selection signal line SEL connected to the gate of the n-channel MOS transistor, the value "1" represents the control signal of the on signal.

First, a waveform in a normal state (a state in which the charge holding portion 103 of the pixel 100 is not saturated) will be described.

In the initial state T0, a voltage corresponding to the value "1" is applied to the overflow gate signal line OFG, the reset signal line RST, the transfer signal line TR, and the initialization signal line SET. Further, a voltage corresponding to the value "0" is applied to the selection signal line SEL and the holding signal line HLD. As the clip voltage, a high voltage for stopping the clip operation of the clip circuit 31 is supplied. An initial value (initial voltage) is supplied as a reference signal. Further, as the output of the counter 330, the initial value "0" is output.

At T1, the overflow gate signal line OFG becomes a value "0" and an on signal is input. As a result, the MOS transistor 104 becomes conductive and the charge holding unit 102 is reset.

At T2, the input of the ON signal of the overflow gate signal line OFG is stopped, and the reset of the charge holding unit 102 is completed. As a result, the exposure period in the pixel 100 is started.

At T3, the selection signal line SEL becomes a value "1" and an on signal is input. As a result, the MOS transistor 108 conducts and an image signal corresponding to the charge of the charge holding unit 103 is output from the pixel 100.

At T4, a clip voltage (511 in the figure) corresponding to the limit voltage of the image signal is supplied. However, since the level of the image signal is low in the normal state, the clip circuit 31 does not perform the clipping operation. The image signal output from the pixel 100 passes through the clip circuit 31 and is input to the comparison unit 320.

At T5, the reset signal line RST becomes a value "0" and an on signal is input. As a result, the MOS transistor 106 becomes conductive and the charge holding unit 103 is reset. Along with this reset, the reset image signal is output from the pixel 100, and the output of the clip circuit 31 also drops to the reset level voltage.

At T6, the reset signal line RST becomes the value "1", and the reset of the charge holding unit 103 is completed. Further, the initialization signal line SET becomes a value "0". The MOS transistors 325 and 326 of the comparison unit 320 are electrically connected to initialize the comparison unit 320.

At T7, the initialization signal line SET becomes a value "1", and the clip voltage supplied to the clip circuit 31 returns to a high voltage. As a result, the initialization of the comparison unit 320 is completed.

At T8, the P phase is started. The supply of the reference signal in the form of a ramp function is started, and the counter 330 starts down counting. Since the voltage of the reference signal is lower than the output voltage of the clip circuit 31, the output of the comparison unit 320 has a value of “0”.

At T9, the output voltage of the clip circuit 31 and the voltage of the reference signal become equal, and the output of the comparison unit 320 transitions to the value "1". Based on the comparison result of the comparison unit 320, the counter 330 stops the down count.

At T10, the supply of the reference signal in the form of a ramp function is stopped. As a result, the P phase ends.

At T11, the reference signal returns to the initial value. Therefore, the output of the comparison unit 320 transitions to the value "0".

At T12, the exposure period ends, the transfer signal line TR becomes a value "0", and an on signal is input. As a result, the MOS transistor 105 becomes conductive, and the charge of the charge holding unit 102 is distributed (transferred) to the charge holding unit 103 and held. The level of the image signal from the pixel 100 rises according to the transfer of the electric charge, and the output of the clip circuit 31 also rises.

At T13, the transfer of electric charge to the electric charge holding unit 103 is completed, and the transfer signal line TR returns to the value "1". Further, the D phase is started, the supply of the reference signal in the form of a ramp function is started, and the counter 330 starts up-counting. Since the voltage of the reference signal is lower than the output voltage of the clip circuit 31, the output of the comparison unit 320 has a value of “0”.

At T14, the output voltage of the clip circuit 31 and the voltage of the reference signal become equal, and the output of the comparison unit 320 transitions to the value "1". Based on the comparison result of the comparison unit 320, the counter 330 stops up-counting.

At T15, the selection signal line SEL becomes a value "0", and the output of the image signal from the pixel 100 is stopped. In addition, the supply of the reference signal in the form of a ramp function is stopped. As a result, the D phase ends. Further, the holding signal line HLD becomes a value "1", and the output (count value) of the counter 330 is held by the holding unit 340. The count value of the held counter 330 corresponds to a digital image signal.

As described above, the counter 330 counts down in response to the reset image signal in the P phase. Next, in the D phase, the count value after the down count is up-counted according to the image signal based on the photoelectric conversion of the pixel 100. As a result, the reset image signal is subtracted from the image signal based on the photoelectric conversion of the pixel 100, and the CDS is executed.

Next, the operation when the charge holding portion 103 of the pixel 100 is saturated by imaging a high-brightness subject will be described. The description of the same parts as those in the normal case described above will be omitted.

At T3, the image signal at the time of saturation is output from the pixel 100. Therefore, the image signal at the time of saturation (512 in the figure) is also output from the clip circuit 31, resulting in a high voltage.

When the clip voltage is supplied in T4, the clip circuit 31 starts the clip operation, and the clipped image signal (513 in the figure) is output from the clip circuit 31.

At T5, the output of the clip circuit 31 becomes the reset level voltage due to the reset of the charge holding unit 103.

At T6, the reset is completed, and the clipped image signal (513 in the figure) is output from the clip circuit 31 again. At the same time, the initialization of the comparison unit 320 is started, and the image signal clipped to the capacitor 322 is held.

At T7, the clip voltage supplied to the clip circuit 31 returns to a high voltage. The image signal at the time of saturation is output again from the clip circuit 31.

After that, in the P phase (T8 to T10), the saturated image signal and the reference signal are compared by the comparison unit 320. In the example of the figure, since the P phase ends before the voltage of the reference signal reaches the image signal at the time of saturation, the output of the value "1" from the comparison unit 320 in the P phase is not detected.

Also, in the D phase (T13 to T15), the saturated image signal and the reference signal are compared by the comparison unit 320. In the example of the figure, similarly to the P phase, the D phase ends before the voltage of the reference signal reaches the image signal at the time of saturation, and the output of the value “1” from the comparison unit 320 is not detected.

In this way, the comparison unit 320 is initialized by the clipped image signal, and the saturation level image signal and the reference signal can be compared in the P phase and the D phase. Saturation of the charge holding unit 103 of the pixel 100 can be detected, for example, when the P phase or the D phase ends before the reference signal has the same voltage as the image signal.

Next, the operation when the clip circuit 31 is not arranged will be described. At T6, the image signal of the saturation level represented by the dotted line waveform in the figure is input to the comparison unit 320 and initialized. The image signal at this saturation level is held in the capacitor 322. Therefore, the base of the MOS transistor 328 forming the differential pair of the comparison unit 320 does not change at a low voltage, and the image signal having the same voltage in the P phase and the D phase is compared with the reference signal. As a result of CDS, a low-value digital image signal is output, causing a blackening phenomenon. In this way, if the clip circuit 31 is not arranged, the comparison unit 320 cannot be initialized.

As described above, the image sensor 1 of the first embodiment of the present disclosure arranges the clip circuit 31 to limit the rise of the image signal output from the pixel 100. As a result, in the image sensor 1 that generates an image signal based on the holes generated by the photoelectric effect, the comparison unit 320 of the analog-digital conversion unit 32 can be initialized, and the charge holding unit 103 of the pixel 100 is saturated. Can be detected. It is possible to prevent the occurrence of a blackening phenomenon and prevent deterioration of image quality.

<2. Second Embodiment>
In the image sensor 1 of the first embodiment described above, the comparison unit 320 is initialized by arranging the clip circuit 31 even when the charge holding unit 103 is saturated. On the other hand, the image sensor 1 of the second embodiment of the present disclosure is different from the above-described first embodiment in that the saturation of the charge holding unit 103 is detected based on the comparison result of the comparison unit 320. ..

[Configuration of analog-to-digital converter]
FIG. 8 is a diagram showing a configuration example of the analog-to-digital conversion unit according to the second embodiment of the present disclosure. Similar to FIG. 5, FIG. 5 is a diagram showing a configuration example of the analog-to-digital conversion unit 32. It differs from the analog-to-digital conversion unit 32 of FIG. 5 in that it further includes a saturation detection unit and includes a holding unit 360 instead of the holding unit 340.

The saturation detection unit 350 detects the saturation of the charge holding unit 103 of the pixel 100. The output signal of the comparison unit 320 is input to the saturation detection unit 350, and the saturation of the charge holding unit 103 is detected based on the comparison result of the comparison unit 320. Specifically, the saturation detection unit 350 is the charge holding unit 103 when the output signal of the value "1" from the comparison unit 320, which is output when the reference signal becomes equal to the image signal, is not detected in the P phase. Saturation can be detected. Further, the saturation detection unit 350 can also detect the saturation of the charge holding unit 103 when the output signal of the value "1" from the comparison unit 320 is not detected in the D phase. The saturation detection result of the charge holding unit 103 of the saturation detecting unit 350 is output to the holding unit 360 via the signal line 309. For example, the saturation detection unit 350 can output a signal having a value of "1" when the saturation of the charge holding unit 103 is detected.

Like the holding unit 340, the holding unit 360 holds the digital image signal by holding the count value of the counter 330. Further, the holding unit 360 further corrects the digital image signal based on the saturation detection result of the charge holding unit 103 of the saturation detecting unit 350. Specifically, when a signal having a value of "1" when the saturation of the charge holding unit 103 is detected is output from the saturation detecting unit 350, the holding unit 360 outputs a digital image signal corresponding to the maximum brightness. It can be retained and output as a result of analog-to-digital conversion. As a result, even when the blackening phenomenon occurs, the image signal can be corrected and the deterioration of the image quality can be prevented. The holding unit 360 is an example of the correction unit described in the claims.

Since the other configurations of the image sensor 1 are the same as the configurations of the image sensor 1 described in the first embodiment of the present disclosure, the description thereof will be omitted.

As described above, in the image sensor 1 of the second embodiment of the present disclosure, the saturation detection unit 350 detects the saturation of the charge holding unit 103, and the holding unit 360 is based on the detection result of the saturation detection unit 350. Corrects the image signal. This makes it possible to prevent deterioration of image quality due to the occurrence of the blackening phenomenon.

<3. Third Embodiment>
In the image sensor 1 of the first embodiment described above, the clip circuit 31 is arranged in the column signal processing unit 30. On the other hand, the image sensor 1 of the third embodiment of the present disclosure is different from the above-described first embodiment in that the clip circuit is arranged in the pixel 100.

[Pixel composition]
FIG. 9 is a diagram showing a configuration example of pixels according to the third embodiment of the present disclosure. Similar to FIG. 2, the figure is a circuit diagram showing a configuration example of the pixel 100. It differs from the pixel 100 in FIG. 2 in that it further includes a MOS transistor 109. Further, the signal line 11 in the figure further includes a clip signal line CLIP. This clip signal line CLIP is a signal line that transmits a clip voltage.

An n-channel MOS transistor can be used as the MOS transistor 109. The drain of the MOS transistor 109 is connected to the MOS transistor 108, and the source is connected to the output signal line Vo. The gate of the MOS transistor 109 is connected to the clip signal line CLIP. The vertical drive unit 20 of the third embodiment of the present disclosure generates the clip voltage of the waveform described in FIG. 4 and transmits it to the pixel 100 via the clip signal line CLIP. The MOS transistor 109 in the figure is configured in a source follower circuit together with the constant current circuit 33 described in FIG. 3, and limits the rise of the image signal output from the MOS transistor 108 based on the transmitted clip voltage. As a result, even when the charge holding unit 103 is saturated, the rise of the reset image signal can be limited, and the comparison unit 320 can be initialized. The clip circuit 31 of the column signal processing unit 30 can be omitted. The circuit by the MOS transistor 109 and the constant current circuit 33 is an example of the clip circuit described in the claims.

Since the other configurations of the image sensor 1 are the same as the configurations of the image sensor 1 described in the first embodiment of the present disclosure, the description thereof will be omitted.

As described above, the image sensor 1 of the third embodiment of the present disclosure limits the rise of the image signal by the MOS transistor 109 arranged in the pixel 100. As a result, the comparison unit 320 of the analog-digital conversion unit 32 can be initialized, and the saturation of the charge holding unit 103 of the pixel 100 can be detected.

<4. Fourth Embodiment>
In the image sensor 1 of the third embodiment described above, a MOS transistor 109 is added to the pixel 100 to limit the rise of the image signal. On the other hand, the image sensor 1 of the fourth embodiment of the present disclosure has the third embodiment described above in that the selection signal line from which the clip voltage is output is arranged to limit the rise of the image signal. Different from.

[Pixel composition]
FIG. 10 is a diagram showing a configuration example of a pixel according to a fourth embodiment of the present disclosure. Similar to FIG. 2, the figure is a circuit diagram showing a configuration example of the pixel 100. It differs from pixel 100 in FIG. 2 in that the selection signal line SEL / CLIP is arranged instead of the selection signal line SEL.

The selection signal line SEL / CLIP is connected to the gate of the MOS transistor 108. The selection signal line SEL / CLIP is a signal line that supplies the selection signal and the clip voltage. The selection signal line SEL / CLIP transmits an on signal when the pixel 100 is selected, and supplies a clip voltage during the period during which the image signal is clipped during the selected period. Specifically, the on signal is transmitted during the period of T3 to T4 and the period of T7 to T15 described in FIG. 7, and the clip voltage is supplied during the period of T4 to T7. As a result, it is possible to limit the rise of the image signal when the comparison unit 320 is initialized. The vertical drive unit 20 of the fourth embodiment of the present disclosure switches the on signal and the clip voltage and outputs the output to the selection signal line SEL / CLIP. The circuit by the MOS transistor 108 and the constant current circuit 33 is an example of the clip circuit described in the claims.

Since the other configurations of the image sensor 1 are the same as the configurations of the image sensor 1 described in the third embodiment of the present disclosure, the description thereof will be omitted.

As described above, in the image sensor 1 of the fourth embodiment of the present disclosure, the selection signal line SEL / CLIP is arranged to supply the on signal and the clip voltage to the pixel 100, and the MOS transistor 108 is used as the image signal. It is used for selecting the pixel 100 to be output and limiting the rise of the image signal. Thereby, the configuration of the pixel 100 can be simplified.

<5. Fifth Embodiment>
The image pickup device 1 of the third embodiment described above uses an image pickup device that generates an image signal based on holes generated by the photoelectric effect. In the fifth embodiment of the present disclosure, the configuration of this image pickup device will be described.

[Pixel composition]
FIG. 11 is a diagram showing a configuration example of a pixel according to a fifth embodiment of the present disclosure. The figure is a cross-sectional view showing a configuration example of the pixel 100. The pixel 100 in the figure includes an on-chip lens 170, a protective film 160, a transparent electrode 150, a compound semiconductor chip 192, and a silicon chip 191.

The compound semiconductor chip 192 is a semiconductor chip including a substrate of a compound semiconductor. This compound semiconductor chip 192 performs photoelectric conversion of incident light, and transmits holes in the charges generated by the photoelectric conversion to the silicon chip 191 described later. The compound semiconductor chip 192 includes a compound semiconductor substrate 130, a first compound semiconductor layer 131, a second compound semiconductor layer 132, a separation region 133, a protective layer 134, an electrode 135, an insulating layer 141, and a bump. It is provided with an electrode 142.

The compound semiconductor substrate 130 is a substrate made of a compound semiconductor. The compound semiconductor substrate 130 can be made of, for example, indium phosphide (InP). Further, the compound semiconductor substrate 130 can be configured as an n-type having a relatively high impurity concentration.

The first compound semiconductor layer 131 is a compound semiconductor layer formed on the compound semiconductor substrate 130. The first compound semiconductor layer 131 can be made of, for example, indium gallium arsenide (InGaAs). Further, the first compound semiconductor layer 131 can be formed in an n-type. Photoelectric conversion of incident light is performed in the first compound semiconductor layer 131. Of the charges generated by photoelectric conversion, electrons are diffused to the n-type compound semiconductor substrate 130, and holes are diffused to the p-type second compound semiconductor layer 132, which will be described later. The first compound semiconductor layer 131 is commonly arranged for the plurality of pixels 100.

The second compound semiconductor layer 132 is a semiconductor layer arranged for each pixel 100 and bonded to the first compound semiconductor layer 131. The second compound semiconductor layer 132 can be configured by, for example, InP. Further, the second compound semiconductor layer 132 can be formed in a p-type having a relatively high impurity concentration. The photodiode formed by the pn junction of the first compound semiconductor layer 131 and the second compound semiconductor layer 132 corresponds to the photoelectric conversion unit 101 described in FIG.

The separation region 133 separates the pixel 100. The separation region 133 is arranged at the boundary of the pixel 100 and separates the adjacent second compound semiconductor layers 132 from each other. The separation region 133 can be configured by an n-type InP.

The protective layer 134 protects the surface of the compound semiconductor layer. The protective layer 134 can be made of an inorganic material such as silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), silicon oxide (SiO ₂ ) and hafnium oxide (HfO ₂ ).

The electrode 135 is an electrode arranged adjacent to the second compound semiconductor layer 132. The electrode 135 can be made of, for example, titanium (Ti) or tungsten (W).

The insulating layer 141 insulates and protects the surface of the compound semiconductor chip 192. The insulating layer 141 can be made of, for example, SiO ₂ .

The bump electrode 142 is a bump arranged on the surface of the insulating layer 141. The bump electrode 142 is arranged so as to penetrate the insulating layer 141 and is connected to the electrode 135. Further, the bump electrode 142 is bonded to the bump electrode 126 of the silicon chip 191 described later and transmits holes generated by photoelectric conversion. The bump electrode 142 can be made of, for example, copper (Cu).

Silicon chip 191 is a semiconductor chip including a substrate made of silicon (Si). The silicon chip 191 generates an image signal based on the holes generated by the compound semiconductor chip 192. The MOS transistor and the charge holding unit described in FIG. 2 are arranged on the silicon chip 191. Further, the vertical drive unit 20 and the like described in FIG. 1 can be arranged on the silicon chip 191. The silicon chip 191 includes a semiconductor substrate 110 and a wiring region 120.

The semiconductor substrate 110 is a semiconductor substrate composed of Si. A diffusion region such as an element of the pixel 100 is arranged in the well region formed on the semiconductor substrate 110. In the figure, a well region 111 configured in an n-shape is shown. The p-channel MOS transistor described in FIG. 2 can be arranged in the n-type well region 111. Specifically, the p-channel MOS transistor can be arranged by arranging the p-type semiconductor region in the n-type well region 111.

In the figure, MOS transistors 104 and 105 are shown. The p- type semiconductor regions 112 and 113 in the figure constitute a source region and a drain region of the MOS transistor 104, and the gate electrode 119 is located close to the n-type well region 111 between the p- type semiconductor regions 112 and 113. Be placed. A channel is formed in the n-type well region 111 between the p- type semiconductor regions 112 and 113. Further, the p- type semiconductor regions 112 and 114 constitute a source region and a drain region of the MOS transistor 105, and the gate electrode 118 is arranged in the vicinity of the n-type well region 111 between the p- type semiconductor regions 112 and 113. Will be done. Further, in the p-type semiconductor region 112, holes transmitted by the compound semiconductor chip 192 are accumulated, and form the charge holding portion 102 described with reference to FIG. The n- channel MOS transistors 107 and 108 and the charge holding portion 103 of FIG. 2 can be formed in a p-type well region (not shown).

The wiring region 120 is a wiring region formed on the surface side of the semiconductor substrate 110, and is a region in which wiring such as the above-mentioned MOS transistor is formed. The wiring region 120 includes an insulating layer 121, a wiring layer 122, a contact plug 123, a via plug 124, a pad 125, and a bump electrode 126.

The wiring layer 122 transmits a signal to a MOS transistor or the like. The wiring layer 122 can be made of a metal such as Cu. The insulating layer 121 insulates the wiring layer 122. The insulating layer 121 can be made of, for example, an insulating material such as _{SiO 2.} The wiring layer 122 and the insulating layer 121 can be configured in multiple layers. The insulating layer 121 between the gate electrodes 118 and 119 and the semiconductor substrate 110 corresponds to a gate insulating film. The pad 125 is an electrode arranged near the surface of the wiring region 120. The pad 125 can be configured by, for example, W or the like. The contact plug 123 connects the semiconductor region of the semiconductor substrate 110 and the wiring layer 122. The contact plug 123 can be configured by, for example, W or the like. The via plug 124 connects the wiring layers 122 to each other or the wiring layer 122 to the pad 125. The via plug 124 can be made of, for example, Cu or the like.

The bump electrode 126 is a bump arranged on the surface of the insulating layer 121. The bump electrode 126 is arranged so as to penetrate the insulating layer 121 and is connected to the pad 125. As described above, the bump electrode 126 is bonded to the bump electrode 142 of the compound semiconductor chip 192. The image pickup device 1 provided with the pixel 100 in the figure is configured by laminating individually manufactured compound semiconductor chips 192 and silicon chips 191 respectively. At the time of this bonding, the bump electrodes 126 and 142 are joined to transmit signals between the respective chips. The bump electrode 126 can be made of Cu in the same manner as the bump electrode 142.

The transparent electrode 150 is a transparent electrode arranged on the back surface of the compound semiconductor chip 192. The power supply line Vtop described with reference to FIG. 2 is connected to the transparent electrode 150 to supply a bias voltage to the compound semiconductor substrate 130. For the transparent electrode 150, for example, ITO (Indium Tin Oxide) can be used.

The protective film 160 is a film that protects the back surface of the compound semiconductor chip 192 and the transparent electrode 150.

The on-chip lens 170 is a lens that collects incident light on the photoelectric conversion unit. The on-chip lens 170 collects incident light on the first compound semiconductor layer 131. The on-chip lens 170 can be made of an inorganic material such as silicon nitride (SiN) or an organic material such as an acrylic resin.

The holes generated by the photoelectric conversion of the first compound semiconductor layer 131 of the compound semiconductor chip 192 are transmitted to the silicon chip 191 via the second compound semiconductor layer 132, the electrode 135, and the bump electrode 142. The transmitted holes are transmitted to the semiconductor region 112 via the bump electrode 126, the pad 125, the via plug 124, the wiring layer 122, and the contact plug 123. An image signal is generated based on the holes transmitted to the semiconductor region 112.

The pixel 100 provided with the photoelectric conversion unit using the compound semiconductor described above can be applied to the image pickup device of the present disclosure. The configuration of the image sensor of the present disclosure is not limited to this example. For example, the image pickup device of the present disclosure comprises a pixel 100 provided with a photodiode of a type that stores holes generated by photoelectric conversion in a p-type semiconductor region formed in an n-type well region of a semiconductor substrate composed of Si. It can also be applied to.

The saturation detection unit 350 and the holding unit 360 of the second embodiment may be combined with the third and fourth embodiments.

<5. Application example to camera>
The technology according to the present disclosure (the present technology) can be applied to various products. For example, the present technology may be realized as an image pickup device mounted on an image pickup device such as a camera.

FIG. 12 is a block diagram showing a schematic configuration example of a camera which is an example of an imaging device to which the present technology can be applied. The camera 1000 in the figure includes a lens 1001, an image pickup element 1002, an image pickup control unit 1003, a lens drive unit 1004, an image processing unit 1005, an operation input unit 1006, a frame memory 1007, a display unit 1008, and the like. A recording unit 1009 is provided.

The lens 1001 is a photographing lens of the camera 1000. The lens 1001 collects light from the subject and causes the light to be incident on the image pickup device 1002 described later to form an image of the subject.

The image sensor 1002 is a semiconductor element that captures light from a subject focused by the lens 1001. The image sensor 1002 generates an analog image signal according to the irradiated light, converts it into a digital image signal, and outputs the signal.

The image pickup control unit 1003 controls the image pickup in the image pickup device 1002. The image pickup control unit 1003 controls the image pickup device 1002 by generating a control signal and outputting the control signal to the image pickup device 1002. Further, the image pickup control unit 1003 can perform autofocus on the camera 1000 based on the image signal output from the image pickup device 1002. Here, the autofocus is a system that detects the focal position of the lens 1001 and automatically adjusts it. As this autofocus, a method (image plane phase difference autofocus) in which the image plane phase difference is detected by the phase difference pixels arranged in the image sensor 1002 to detect the focal position can be used. It is also possible to apply a method (contrast autofocus) of detecting the position where the contrast of the image is highest as the focal position. The image pickup control unit 1003 adjusts the position of the lens 1001 via the lens drive unit 1004 based on the detected focal position, and performs autofocus. The image pickup control unit 1003 can be configured by, for example, a DSP (Digital Signal Processor) equipped with firmware.

The lens driving unit 1004 drives the lens 1001 based on the control of the imaging control unit 1003. The lens driving unit 1004 can drive the lens 1001 by changing the position of the lens 1001 using a built-in motor.

The image processing unit 1005 processes the image signal generated by the image sensor 1002. This processing includes, for example, demosaic to generate an image signal of a color that is insufficient among the image signals corresponding to red, green, and blue for each pixel, noise reduction to remove noise of the image signal, and coding of the image signal. Applicable. The image processing unit 1005 can be configured by, for example, a microcomputer equipped with firmware.

The operation input unit 1006 receives the operation input from the user of the camera 1000. For example, a push button or a touch panel can be used for the operation input unit 1006. The operation input received by the operation input unit 1006 is transmitted to the image pickup control unit 1003 and the image processing unit 1005. After that, processing according to the operation input, for example, processing such as imaging of the subject is activated.

The frame memory 1007 is a memory that stores a frame that is an image signal for one screen. The frame memory 1007 is controlled by the image processing unit 1005 and holds frames in the process of image processing.

The display unit 1008 displays the image processed by the image processing unit 1005. For this display unit 1008, for example, a liquid crystal panel can be used.

The recording unit 1009 records the image processed by the image processing unit 1005. For example, a memory card or a hard disk can be used for the recording unit 1009.

The cameras to which this disclosure can be applied have been described above. The present technology can be applied to the image pickup device 1002 among the configurations described above. Specifically, the image pickup device 1 described with reference to FIG. 1 can be applied to the image pickup device 1002. By applying the image sensor 1 to the image sensor 1002, infrared light can be imaged and saturation of the image signal can be detected. It is possible to prevent deterioration of image quality. The image processing unit 1005 is an example of the processing circuit described in the claims. The camera 1000 is an example of the image pickup apparatus described in the claims.

Finally, the description of each embodiment described above is an example of the present disclosure, and the present disclosure is not limited to the above-described embodiment. Therefore, it goes without saying that various changes can be made according to the design and the like as long as the technical concept of the present disclosure is not deviated from the above-described embodiments.

In addition, the effects described in this specification are merely examples and are not limited. It may also have other effects.

Further, the drawings in the above-described embodiment are schematic, and the dimensional ratios of each part do not always match the actual ones. In addition, it goes without saying that parts of the drawings having different dimensional relationships and ratios are included.

The present technology can have the following configurations.
(1) A pixel having a photoelectric conversion unit that performs photoelectric conversion of incident light and a charge holding unit that retains holes among the charges generated by the photoelectric conversion, and generates an image signal based on the retained holes. When,
An image pickup device including a clip circuit that performs clipping that limits the rise of the generated image signal to a predetermined clip voltage.
(2) The image pickup according to (1) above, wherein the clip circuit is composed of a follower circuit that performs the clip by limiting the rise of the image signal based on the predetermined clip voltage supplied to the control terminal. element.
(3) The clip circuit is composed of the follower circuit by a transistor in which the predetermined clip voltage is supplied to the gate, the generated image signal is supplied to the drain, and the load is connected to the source. ).
(4) A comparison unit that compares the generated image signal with a reference signal that serves as a reference when converting the generated image signal into a digital image signal and outputs the result of the comparison, and the comparison. The unit includes a time measuring unit for measuring the time from the start of the comparison to the output of the comparison result, and further includes an analog-digital conversion unit that converts the image signal into a digital image signal based on the measurement result. The image pickup device according to any one of (1) to (3).
(5) The pixel further includes a reset unit that discharges holes held in the charge holding unit to perform reset, and generates a reset image signal that is an image signal after the reset.
The image pickup device according to (4), wherein the analog-to-digital conversion unit generates the digital image signal based on the difference between the generated image signal and the reset image signal.
(6) The image pickup device according to (5), wherein the clip circuit performs the clip when the reset image signal is generated.
(7) The comparison unit includes a differential pair in which the generated image signal and the reference signal are input via a coupling capacitor, and an initialization circuit for initializing the differential pair.
The image pickup device according to (5) or (6), wherein the clip circuit performs the clip at the time of initialization by the initialization circuit.
(8) The image pickup device according to (7), wherein the initialization circuit initializes by holding the initial value of the generated image signal and the initial value of the reference signal in the respective coupling capacitors.
(9) The image pickup device according to any one of (4) to (8), further comprising a saturation detection unit for detecting saturation of the image signal.
(10) The image pickup device according to (9), wherein the saturation detection unit detects the saturation based on the result of comparison in the comparison unit.
(11) The image pickup device according to (9) or (10), further comprising a correction unit that corrects the digital image signal based on the detection result of the saturation detection unit.
(12) A pixel that includes a photoelectric conversion unit that performs photoelectric conversion of incident light and a charge holding unit that retains holes among the charges generated by the photoelectric conversion, and generates an image signal based on the retained holes. When,
A clip circuit that performs clipping that limits the rise of the generated image signal to a predetermined clip voltage, and
An imaging device including a processing circuit that processes the generated image signal.

1 Image sensor 10 Pixel array unit 30 Column signal processing unit 31 Clip circuit 32 Analog digital conversion unit 33 Constant current circuit 35 Reference signal generation unit 100 pixels 101 Photoelectric conversion unit 102, 103 Charge holding unit 104 to 109, 311, 323 to 329 MOS transistor 320 Comparison unit 321, 322 Capacitor 330 Counter 340, 360 Holding unit 350 Saturation detection unit 1002 Image sensor 1005 Image processing unit

Claims (12)

1. A pixel that includes a photoelectric conversion unit that performs photoelectric conversion of incident light and a charge holding unit that retains holes among the charges generated by the photoelectric conversion, and generates an image signal based on the retained holes.
   An image pickup device including a clip circuit that performs clipping that limits the rise of the generated image signal to a predetermined clip voltage.
2. The image pickup device according to claim 1, wherein the clip circuit is composed of a follower circuit that performs the clip by limiting an increase in the image signal based on the predetermined clip voltage supplied to the control terminal.
3. The image pickup according to claim 2, wherein the clip circuit is composed of the follower circuit by a transistor in which the predetermined clip voltage is supplied to the gate, the generated image signal is supplied to the drain, and the load is connected to the source. element.
4. A comparison unit that compares the generated image signal with a reference signal that serves as a reference when converting the generated image signal into a digital image signal and outputs the result of the comparison, and the comparison unit in the comparison unit. Claim 1 further includes an analog-digital conversion unit that includes a time measurement unit that performs time measurement from the start of comparison to the output of the comparison result, and converts the image signal into a digital image signal based on the measurement result. The image pickup device described.
5. The pixel further includes a reset unit that discharges holes held in the charge holding unit to perform reset, and generates a reset image signal that is an image signal after the reset.
   The image pickup device according to claim 4, wherein the analog-to-digital conversion unit generates the digital image signal based on the difference between the generated image signal and the reset image signal.
6. The image pickup device according to claim 5, wherein the clip circuit performs the clip when the reset image signal is generated.
7. The comparison unit includes a differential pair in which the generated image signal and the reference signal are input via a coupling capacitor, and an initialization circuit for initializing the differential pair.
   The image pickup device according to claim 5, wherein the clip circuit performs the clip at the time of initialization by the initialization circuit.
8. The image pickup device according to claim 7, wherein the initialization circuit initializes by holding the initial value of the generated image signal and the initial value of the reference signal in the respective coupling capacitors.
9. The image pickup device according to claim 4, further comprising a saturation detection unit that detects saturation of the image signal.
10. The image pickup device according to claim 9, wherein the saturation detection unit detects the saturation based on the result of comparison in the comparison unit.
11. The image pickup device according to claim 9, further comprising a correction unit that corrects the digital image signal based on the detection result of the saturation detection unit.
12. A pixel that includes a photoelectric conversion unit that performs photoelectric conversion of incident light and a charge holding unit that retains holes among the charges generated by the photoelectric conversion, and generates an image signal based on the retained holes.
    A clip circuit that performs clipping that limits the rise of the generated image signal to a predetermined clip voltage, and
    An imaging device including a processing circuit that processes the generated image signal.

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