WO2021077569A1 - 光学指纹识别电路及显示装置 - Google Patents

光学指纹识别电路及显示装置 Download PDF

Info

Publication number
WO2021077569A1
WO2021077569A1 PCT/CN2019/124635 CN2019124635W WO2021077569A1 WO 2021077569 A1 WO2021077569 A1 WO 2021077569A1 CN 2019124635 W CN2019124635 W CN 2019124635W WO 2021077569 A1 WO2021077569 A1 WO 2021077569A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
voltage
gate
reset
Prior art date
Application number
PCT/CN2019/124635
Other languages
English (en)
French (fr)
Inventor
郑园
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/762,954 priority Critical patent/US11361579B2/en
Publication of WO2021077569A1 publication Critical patent/WO2021077569A1/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/98—Detection or correction of errors, e.g. by rescanning the pattern or by human intervention; Evaluation of the quality of the acquired patterns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H01L27/14616—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor characterised by the channel of the transistor, e.g. channel having a doping gradient
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor

Definitions

  • the present invention relates to the field of display technology, in particular to an optical fingerprint identification circuit and a display device.
  • optical fingerprint recognition technology As a mature fingerprint recognition technology, optical fingerprint recognition technology has long been integrated into people's daily life, and fingerprint locks and fingerprint time attendance are not lacking.
  • FIG. 1 is a circuit diagram of an existing optical fingerprint identification circuit based on LTPS thin film transistors.
  • the optical fingerprint identification circuit includes a first thin film transistor T10, a second thin film transistor T20, a capacitor C10, and a photodiode D10.
  • the gate of the first thin film transistor T10 is electrically connected to the anode of the photodiode D1, the drain is connected to the power supply voltage Vdd, and the source is electrically connected to the source of the second thin film transistor T20.
  • the gate of the second thin film transistor T20 is connected to the switch signal SW1, and the drain is electrically connected to the signal transmission terminal READOUT.
  • One end of the capacitor C10 is connected to the power supply voltage Vdd, and the other end is electrically connected to the gate of the first thin film transistor T10.
  • the cathode of the photodiode D10 is connected to the diode bias voltage DBIAS.
  • the scan signal SW controls the second thin film transistor T20 to turn on, and the reflection of the finger exposes the photodiode D10.
  • the photodiode D10 receives the light signal and generates a leakage current, so that the voltage of the gate of the first thin film transistor T10 is correspondingly
  • the first thin film transistor T10 generates a current corresponding to the light signal according to its gate voltage and transmits it as an identification signal to the signal transmission terminal READOUT for output to realize fingerprint identification.
  • the LTPS thin film transistor has the characteristic of uneven threshold voltage, which causes the final output identification signal to be affected by the threshold voltage of the first thin film transistor T10, which reduces the accuracy of the identification signal.
  • the object of the present invention is to provide an optical fingerprint identification circuit, which can compensate the threshold voltage of the first thin film transistor and ensure the accuracy of the identification signal.
  • the object of the present invention is to provide a display device whose optical fingerprint recognition circuit can compensate the threshold voltage of the first thin film transistor to ensure the accuracy of the recognition signal.
  • the present invention first provides an optical fingerprint recognition circuit, which includes a first thin film transistor, a first switch unit, a second switch unit, a reset compensation unit, a storage capacitor, and a photodiode;
  • the first switch unit receives a scan signal and a power supply voltage, and is used to transmit the power supply voltage to one of the source and the drain of the first thin film transistor under the control of the scan signal;
  • the second switch unit receives a scan signal, and is used to electrically connect the other of the source and the drain of the first thin film transistor to a signal transmission terminal under the control of the scan signal;
  • One end of the storage capacitor is connected to the power supply voltage, and the other end is electrically connected to the gate of the first thin film transistor;
  • the reset compensation unit receives a reference voltage and a reset signal, and is used to reset the voltage of the gate of the first thin film transistor under the control of the reset signal, and then use the reference voltage to make the gate of the first thin film transistor under the control of the reset signal.
  • the voltage of the pole becomes the sum of a preset voltage value and the threshold voltage of the first thin film transistor;
  • One of the anode and cathode of the photodiode is connected to the diode bias voltage, and the other is electrically connected to the gate of the first thin film transistor for receiving light signals and correspondingly changing the voltage of the gate of the first thin film transistor according to the light signals .
  • the first switch unit includes a fourth thin film transistor; the gate of the fourth thin film transistor is connected to the scan signal, the source is connected to the power supply voltage, and the drain is electrically connected to the source and drain of the first thin film transistor.
  • the second switch unit includes a fifth thin film transistor; the gate of the fifth thin film transistor is connected to a scan signal, the source is electrically connected to the other of the source and the drain of the first thin film transistor, and the drain is electrically connected Connect the signal transmission terminal.
  • the reset compensation unit includes a second thin film transistor and a third thin film transistor; the gate of the second thin film transistor is connected to a reset signal, the source is electrically connected to the drain of the first thin film transistor, and the drain is electrically connected to the first thin film transistor.
  • the gate of the thin film transistor; the gate of the third thin film transistor is connected to the reset signal, the source is connected to the reference voltage, and the drain is electrically connected to the source of the first thin film transistor;
  • the drain of the fourth thin film transistor is electrically connected Electrically connected to the drain of the first thin film transistor, and the source of the fifth thin film transistor is electrically connected to the source of the first thin film transistor;
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all N-type thin film transistors;
  • the cathode of the photodiode is connected to the diode bias voltage, and the anode is electrically connected to the gate of the first thin film transistor.
  • the working process of the optical fingerprint recognition circuit includes a reset stage, a threshold compensation stage, an exposure stage, and a data reading stage in sequence;
  • the scan signal is at a high potential to control the conduction of the fourth thin film transistor and the fifth thin film transistor
  • the reset signal is at a high potential to control the conduction of the second thin film transistor and the third thin film transistor, and the gate of the first thin film transistor is turned on.
  • the voltage of the pole becomes the power supply voltage
  • the scan signal is at a low potential to control the fourth thin film transistor and the fifth thin film transistor to turn off
  • the reset signal is at a high potential to control the second thin film transistor and the third thin film transistor to turn on
  • the voltage value of the reference voltage is The preset voltage value is lower than the power supply voltage, and the voltage of the gate of the first thin film transistor is continuously reduced until it is equal to VRef+Vth, where VRef is the preset voltage value, and Vth is the voltage of the first thin film transistor.
  • Threshold voltage the diode bias voltage is greater than VRef+Vth;
  • the scan signal is at a low potential to control the fourth and fifth thin film transistors to turn off
  • the reset signal is at a low potential to control the second and third thin film transistors to turn off
  • the photodiode receives the light signal and generates leakage.
  • the current causes the voltage of the gate of the first thin film transistor to rise to VRef+Vth+ ⁇ V, where ⁇ V is the increase in the voltage of the gate of the first thin film transistor caused by the leakage current generated by the photodiode receiving the light signal;
  • the scan signal is at a high potential to control the fourth and fifth thin film transistors to be turned on, and the reset signal is at a low potential to control the second and third thin film transistors to be turned off, and the first thin film transistor is based on
  • the voltage of the gate generates a corresponding current and transmits it to the signal transmission terminal through the turned-on fifth thin film transistor.
  • the voltage value of the reference voltage is equal to the power supply voltage.
  • the reset compensation unit includes a second thin film transistor and a third thin film transistor; the gate of the second thin film transistor is connected to a reset signal, the source is electrically connected to the gate of the first thin film transistor, and the drain is electrically connected to the first thin film transistor.
  • the drain of the thin film transistor; the gate of the third thin film transistor is connected to the reset signal, the source is connected to the reference voltage, and the drain is electrically connected to the source of the first thin film transistor;
  • the drain of the fourth thin film transistor is electrically connected Electrically connected to the source of the first thin film transistor, and the source of the fifth thin film transistor is electrically connected to the drain of the first thin film transistor;
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all P-type thin film transistors
  • the anode of the photodiode is connected to the diode bias voltage, and the cathode is electrically connected to the gate of the first thin film transistor.
  • the working process of the optical fingerprint recognition circuit includes a reset stage, a threshold compensation stage, an exposure stage, and a data reading stage in sequence;
  • the scan signal is at a low potential to control the conduction of the fourth and fifth thin film transistors
  • the reset signal is at a low potential to control the conduction of the second and third thin film transistors
  • the signal transmission end is connected to ground Terminal voltage, the voltage of the gate of the first thin film transistor becomes the ground terminal voltage
  • the scan signal is at a high potential to control the fourth and fifth thin film transistors to turn off, and the reset signal is at a low potential to control the second and third thin film transistors to turn on, and the voltage value of the reference voltage is A preset voltage value, the preset voltage value is higher than the ground terminal voltage, and the voltage of the gate of the first thin film transistor continuously increases until it is equal to VRef'+Vth', where VRef' is the preset voltage value, Vth' Is the threshold voltage of the first thin film transistor, and the diode bias voltage is less than VRef'+Vth';
  • the scan signal is at a high potential to control the fourth thin film transistor and the fifth thin film transistor to turn off
  • the reset signal is at a high potential to control the second thin film transistor and the third thin film transistor to turn off
  • the photodiode receives the light signal and generates leakage.
  • the current causes the voltage of the gate of the first thin film transistor to drop to VRef'+Vth'- ⁇ V', where ⁇ V' is the decrease in the voltage of the gate of the first thin film transistor caused by the leakage current generated by the photodiode receiving the light signal the amount;
  • the scan signal is at a low potential to control the fourth and fifth thin film transistors to be turned on, and the reset signal is at a high potential to control the second and third thin film transistors to be turned off, and the first thin film transistor is based on
  • the voltage of the gate generates a corresponding current and transmits it to the signal transmission terminal through the turned-on fifth thin film transistor.
  • the voltage value of the reference voltage is equal to the ground terminal voltage.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all LTPS thin film transistors.
  • the present invention also provides a display device including the above-mentioned optical fingerprint identification circuit.
  • the optical fingerprint identification circuit of the present invention includes a first thin film transistor, a first switch unit, a second switch unit, a reset compensation unit, a storage capacitor, and a photodiode.
  • the voltage of the gate of a thin film transistor is reset, and then under the control of the reset signal, the reference voltage is used to make the voltage of the gate of the first thin film transistor become the sum of a preset voltage value and the threshold voltage of the first thin film transistor, thereby correcting
  • the threshold voltage of the first thin film transistor is compensated so that after the photodiode receives the light signal and changes the voltage of the gate of the first thin film transistor according to the light signal, the first thin film transistor generates a corresponding current and the first thin film transistor according to the voltage of its gate.
  • the threshold voltage of a thin film transistor is irrelevant to ensure the accuracy of the identification signal.
  • the fingerprint identification circuit of the display device of the present invention can compensate the threshold voltage of the first thin film transistor to ensure the accuracy of the identification signal.
  • Fig. 1 is a circuit diagram of a conventional optical fingerprint recognition circuit
  • FIG. 2 is a circuit diagram of the optical fingerprint identification circuit of the first embodiment of the present invention.
  • FIG. 3 is a timing diagram of the optical fingerprint identification circuit of the first embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the optical fingerprint recognition circuit in the reset stage of the first embodiment of the present invention.
  • FIG. 5 is a schematic diagram of the optical fingerprint recognition circuit in the threshold compensation stage of the first embodiment of the present invention.
  • FIG. 6 is a schematic diagram of the optical fingerprint recognition circuit in the exposure stage of the first embodiment of the present invention.
  • FIG. 7 is a schematic diagram of the optical fingerprint recognition circuit in the data reading stage of the first embodiment of the present invention.
  • Fig. 8 is a circuit diagram of an optical fingerprint recognition circuit according to a second embodiment of the present invention.
  • FIG. 9 is a timing diagram of the optical fingerprint identification circuit of the second embodiment of the present invention.
  • FIG. 10 is a schematic diagram of the optical fingerprint recognition circuit in the reset stage of the second embodiment of the present invention.
  • FIG. 11 is a schematic diagram of the optical fingerprint recognition circuit in the threshold compensation stage of the second embodiment of the present invention.
  • FIG. 12 is a schematic diagram of the optical fingerprint recognition circuit in the exposure stage of the second embodiment of the present invention.
  • FIG. 13 is a schematic diagram of the optical fingerprint recognition circuit of the second embodiment of the present invention in the data reading stage.
  • the optical fingerprint recognition circuit of the first embodiment of the present invention includes a first thin film transistor T1, a first switch unit 10, a second switch unit 20, a reset compensation unit 30, a storage capacitor C1, and a photodiode D1.
  • the first switch unit 10 receives the scan signal SW and the power supply voltage VDD, and is used to transmit the power supply voltage VDD to one of the source and the drain of the first thin film transistor T1 under the control of the scan signal SW.
  • the second switch unit 20 receives the scan signal SW for electrically connecting the other of the source and drain of the first thin film transistor T1 to a signal transmission terminal Readout under the control of the scan signal SW.
  • One end of the storage capacitor C1 is connected to the power supply voltage VDD, and the other end is electrically connected to the gate G of the first thin film transistor T1.
  • the reset compensation unit 30 receives the reference voltage Ref and the reset signal Rst for resetting the voltage of the gate G of the first thin film transistor T1 under the control of the reset signal Rst, and then uses the reference voltage under the control of the reset signal Rst Ref makes the voltage of the gate G of the first thin film transistor T1 become the sum of a preset voltage value and the threshold voltage of the first thin film transistor T1.
  • One of the anode and cathode of the photodiode D1 is connected to the diode bias voltage Dbias, and the other is electrically connected to the gate G of the first thin film transistor T1, and is used to receive the light signal and change the first thin film transistor T1 accordingly according to the light signal The voltage of the gate G.
  • the first switch unit 10 includes a fourth thin film transistor T4.
  • the gate of the fourth thin film transistor T4 is connected to the scan signal SW, the source is connected to the power supply voltage VDD, and the drain is electrically connected to the drain of the first thin film transistor T1.
  • the second switch unit 20 includes a fifth thin film transistor T5.
  • the gate of the fifth thin film transistor T5 is connected to the scan signal SW, the source is electrically connected to the source of the first thin film transistor T1, and the drain is electrically connected to the signal transmission terminal Readout.
  • the reset compensation unit 30 includes a second thin film transistor T2 and a third thin film transistor T3.
  • the gate of the second thin film transistor T2 is connected to the reset signal Rst
  • the source is electrically connected to the drain of the first thin film transistor T1
  • the drain is electrically connected to the gate G of the first thin film transistor T1.
  • the gate of the third thin film transistor T3 is connected to the reset signal Rst
  • the source is connected to the reference voltage Ref
  • the drain is electrically connected to the source of the first thin film transistor T1.
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, and the fifth thin film transistor T5 are all N-type thin film transistors. .
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, and the fifth thin film transistor T5 are all LTPS thin film transistors.
  • the cathode of the photodiode D1 is connected to the diode bias voltage Dbias, and the anode is electrically connected to the gate G of the first thin film transistor T1.
  • the signal transmission terminal Readout is electrically connected to the processing chip (not shown).
  • the working process of the optical fingerprint recognition circuit includes a reset stage S1, a threshold compensation stage S2, an exposure stage S3, and a data reading stage S4 in sequence.
  • the scan signal SW is a high potential to control the fourth thin film transistor T4 and the fifth thin film transistor T5 to turn on
  • the reset signal Rst is a high potential to control the second thin film
  • the gate G of the first thin film transistor T1 is connected to the power supply voltage VDD through the turned-on second thin film transistor T2 and the fourth thin film transistor T4, so that the first thin film transistor T1
  • the voltage of the gate G of T1 becomes the power supply voltage VDD, thereby completing the reset of the gate G of the first thin film transistor T1, and the voltage at the signal transmission terminal Readout at this time is also the power supply voltage VDD.
  • the voltage value of the reference voltage Ref is equal to the power supply voltage VDD so as to avoid the problem of large current.
  • the scan signal SW is a low potential to control the fourth thin film transistor T4 and the fifth thin film transistor T5 to turn off
  • the reset signal Rst is a high potential to control the second thin film
  • the transistor T2 and the third thin film transistor T3 are turned on, the voltage value of the reference voltage Ref is a preset voltage value VRef, the preset voltage value VRef is lower than the power supply voltage VDD, the gate G of the first thin film transistor T1 is turned on
  • the first thin film transistor T1 and the third thin film transistor T3 continuously discharge and the voltage drops until it is equal to VRef+Vth, where VRef is the preset voltage value, Vth is the threshold voltage of the first thin film transistor T1, and the first thin film transistor T1 is turned off
  • the diode bias voltage Dbias is greater than VRef+Vth. Due to the storage effect of the storage capacitor C1, the voltage of the gate G of the first thin film transistor T1 is maintained at VRef+V
  • the scan signal SW is a low potential to control the fourth thin film transistor T4 and the fifth thin film transistor T5 to turn off
  • the reset signal Rst is a low potential to control the second thin film transistor T2 and the third thin film transistor T3 are turned off.
  • the light reflected by the finger to be identified exposes the photodiode D1.
  • the photodiode D1 receives the light signal and generates a leakage current, so that the gate of the first thin film transistor T1
  • the voltage of G rises to VRef+Vth+ ⁇ V, where ⁇ V is the increase in the voltage of the gate G of the first thin film transistor T1 caused by the leakage current of the photodiode D1 due to the light signal received.
  • the leakage of the photodiode D1 is different, that is, the stronger the reflected light from the finger, the greater the leakage current generated by the photodiode D1, so that the photodiode D1 generates a leakage current due to the light signal received.
  • the first thin film transistor The increase ⁇ V of the voltage of the gate G of T1 is an amount related to the intensity of the reflected light from the finger. Due to the storage function of the storage capacitor C1, the voltage of the gate G of the first thin film transistor T1 is maintained at VRef+Vth+ ⁇ V.
  • the scan signal SW is a high potential to control the fourth thin film transistor T4 and the fifth thin film transistor T5 to turn on
  • the reset signal Rst is a low potential to control the second
  • the second thin film transistor T2 and the third thin film transistor T3 are turned off.
  • the voltage of the gate G of the first thin film transistor T1 is maintained at VRef+Vth+ ⁇ V, so that the first thin film transistor T1 is turned on.
  • the voltage of the pole G generates a corresponding current as the identification signal and transmits it to the signal transmission terminal Readout via the turned-on fifth thin film transistor T5.
  • the formula of the current flowing through the first thin film transistor T1 is:
  • I is the current flowing through the first thin film transistor T1
  • ⁇ is the carrier mobility of the first thin film transistor T1
  • W and L are the channel width and length of the first thin film transistor T1, respectively
  • Vgs is the first thin film transistor T1.
  • the current flowing through the first thin film transistor T1 has nothing to do with its own threshold voltage Vth, that is, the current finally transmitted to the signal transmission terminal Readout as the identification signal has nothing to do with the threshold voltage of the first thin film transistor T1, so that the identification signal It is no longer affected by the threshold voltage of the first thin film transistor T1, and the accuracy is higher.
  • the difference between the optical fingerprint recognition circuit of the second embodiment of the present invention and the above-mentioned first embodiment is that the first thin film transistor T1', the second thin film transistor T2' of the reset compensation unit 30', and the third thin film transistor T3', the fourth thin film transistor T4' of the first switch unit 10' and the fifth thin film transistor T5 of the second switch unit 20' are both P-type thin film transistors.
  • the gate of the second thin film transistor T2' is connected to the reset signal Rst'
  • the source is electrically connected to the gate G'of the first thin film transistor T1'
  • the drain is electrically connected to the gate of the first thin film transistor T1'. Drain.
  • the gate of the third thin film transistor T2' is connected to the reset signal Rst', the source is connected to the reference voltage Ref', and the drain is electrically connected to the source of the first thin film transistor T1'.
  • the drain of the fourth thin film transistor T4' is electrically connected to the source of the first thin film transistor T1', and the source of the fifth thin film transistor T5' is electrically connected to the drain of the first thin film transistor T1'.
  • the anode of the photodiode D1' is connected to the diode bias voltage Dbias', and the cathode is electrically connected to the gate G'of the first thin film transistor T1'.
  • the working process of the optical fingerprint recognition circuit also includes a reset stage S1', a threshold compensation stage S2', an exposure stage S3', and a data reading stage. S4'.
  • the scan signal SW' is at a low level to control the fourth thin film transistor T4' and the fifth thin film transistor T5' to turn on, and the reset signal Rst' is low
  • the potential controls the second thin film transistor T2' and the third thin film transistor T3' to turn on, and the signal transmission terminal Readout is connected to the ground terminal voltage GND.
  • the ground terminal voltage GND can be provided by the processing chip.
  • the first thin film transistor T1' The gate G′ is connected to the ground terminal voltage GND through the turned-on fifth thin film transistor T5′, so that the voltage of the gate G′ of the first thin film transistor T1′ becomes the ground terminal voltage GND, thereby completing the connection to the first thin film transistor T1 Reset of the'Gate G'.
  • the voltage value of the reference voltage Ref' is equal to the ground terminal voltage GND so as to avoid the problem of large current.
  • the scan signal SW' is high to control the fourth thin film transistor T4' and the fifth thin film transistor T5' to turn off, and the reset signal Rst' is low
  • the potential controls the second thin film transistor T2' and the third thin film transistor T3' to turn on
  • the voltage value of the reference voltage Ref' is a preset voltage value VRef'
  • the preset voltage value VRef' is higher than the ground terminal voltage GND.
  • the gate G'of the thin film transistor T1' is charged by the reference voltage Ref' through the turned-on second thin film transistor T2', the first thin film transistor T1', and the third thin film transistor T3', and the voltage continues to rise until it is equal to VRef'+Vth ', where VRef' is the preset voltage value, Vth' is the threshold voltage of the first thin film transistor, the first thin film transistor T1' is turned off, and the diode bias voltage Dbias' is less than VRef'+Vth', due to the storage capacitor C1 For the storage function of the first thin film transistor T1', the voltage of the gate G'of the first thin film transistor T1' is maintained at VRef'+Vth'.
  • the scan signal SW' is high to control the fourth thin film transistor T4' and the fifth thin film transistor T5' to turn off, and the reset signal Rst' is high.
  • the second thin film transistor T2' and the third thin film transistor T3' are controlled to be turned off.
  • the light reflected by the finger to be identified exposes the photodiode D1', and the photodiode D1' receives the light signal and generates leakage current.
  • the voltage of the gate G'of the first thin film transistor T1' drops to VRef'+Vth'- ⁇ V', where ⁇ V' is the gate of the first thin film transistor T1' caused by the leakage current generated by the photodiode D1' receiving the light signal
  • ⁇ V' is the gate of the first thin film transistor T1' caused by the leakage current generated by the photodiode D1' receiving the light signal
  • the amount of decrease in the voltage of the pole G' Under different light intensity conditions, the leakage of the photodiode D1' is different, that is, the stronger the light reflected by the finger, the greater the leakage current generated by the photodiode D1', and the leakage current caused by the photodiode D1' due to the light signal is received.
  • the decrease ⁇ V' of the voltage of the gate G'of a thin film transistor T1' is an amount related to the intensity of reflected light from a finger. Due to the storage function of the storage capacitor C1, the voltage of the gate G'of the first thin film transistor T1' is maintained at VRef'+Vth'- ⁇ V'.
  • the scan signal SW' is a low level to control the fourth thin film transistor T4' and the fifth thin film transistor T5' to turn on, and the reset signal Rst' To control the second thin film transistor T2' and the third thin film transistor T3' to turn off at a high potential, the voltage of the gate G'of the first thin film transistor T1' is maintained at VRef'+Vth'- ⁇ V', so that the first thin film transistor T1' is turned on, and the first thin film transistor T1' generates a corresponding current as the identification signal according to the voltage of its gate G'and transmits it to the signal transmission terminal Readout through the turned-on fifth thin film transistor T5'.
  • the formula of the current flowing through the first thin film transistor T1' is:
  • I' is the current flowing through the first thin film transistor T1'
  • ⁇ ' is the carrier mobility of the first thin film transistor T1'
  • W'and L' are the channel width of the first thin film transistor T1' and Length
  • Vgs' is the voltage difference between the gate G'and the source of the first thin film transistor T1'
  • Vgs' VRef'+Vth'- ⁇ V'-VDD
  • the current flowing through the first thin film transistor T1' has nothing to do with its own threshold voltage Vth', that is, the current finally transmitted to the signal transmission terminal Readout as an identification signal has nothing to do with the threshold voltage of the first thin film transistor T1'. Therefore, the identification signal is no longer affected by the threshold voltage of the first thin film transistor T1', and the accuracy is higher.
  • the present invention also provides a display device including the above-mentioned optical fingerprint identification circuit, and the structure of the optical fingerprint identification circuit will not be repetitively described here.
  • the display device of the present invention can compensate the threshold voltage of the first thin film transistor by providing the above-mentioned optical fingerprint identification circuit, the identification signal is not affected by the threshold voltage of the first thin film transistor, and the accuracy of the identification signal is ensured.
  • the optical fingerprint recognition circuit of the present invention includes a first thin film transistor, a first switch unit, a second switch unit, a reset compensation unit, a storage capacitor, and a photodiode.
  • the reset compensation unit controls the first film transistor under the control of the reset signal.
  • the gate voltage of the thin film transistor is reset, and then under the control of the reset signal, the reference voltage is used to make the gate voltage of the first thin film transistor the sum of a preset voltage value and the threshold voltage of the first thin film transistor, thereby
  • the threshold voltage of the transistor is compensated so that after the photodiode receives the light signal and changes the gate voltage of the first thin film transistor according to the light signal, the first thin film transistor generates a current corresponding to the voltage of the first thin film transistor according to the voltage of its gate.
  • the threshold voltage is irrelevant to ensure the accuracy of the identification signal.
  • the fingerprint identification circuit of the display device of the present invention can compensate the threshold voltage of the first thin film transistor to ensure the accuracy of the identification signal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Human Computer Interaction (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Quality & Reliability (AREA)
  • Image Input (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种光学指纹识别电路及显示装置，光学指纹识别电路包括第一薄膜晶体管（T1）、第一开关单元（10）、第二开关单元（20）、复位补偿单元（30）、存储电容（C1）及光电二极管（D1），复位补偿单元（30）在复位信号（Rst）的控制下对第一薄膜晶体管（T1）的栅极（G）的电压进行复位，而后在复位信号（Rst）的控制下利用参考电压（Ref）使得第一薄膜晶体管（T1）的栅极（G）的电压变为一预设电压值与第一薄膜晶体管（T1）阈值电压之和，从而对第一薄膜晶体管（T1）的阈值电压进行补偿，使得在光电二极管（D1）接收光信号并依据光信号相应改变第一薄膜晶体管（T1）的栅极（G）的电压后，第一薄膜晶体管（T1）依据其栅极（G）的电压产生相应的电流与第一薄膜晶体管（T1）的阈值电压无关，保证识别信号的准确性。

Description

光学指纹识别电路及显示装置 技术领域
本发明涉及显示技术领域，尤其涉及一种光学指纹识别电路及显示装置。
 背景技术
光学指纹识别技术作为一种成熟的指纹识别技术早已融入人们的日常生活中，指纹锁、指纹考勤等都不乏其身影。
随着技术的不断发展，手机等移动终端的屏占比越来越高，全面屏移动终端已经成为一种发展趋势，针对全面屏移动终端的指纹识别，屏内指纹识别的热度越来越高，使得光学指纹识别又重新焕发了活力。当前，应用于屏下指纹识别的光学识别传感器大多数是基于硅基的传感器，但硅基传感器的成本较高，使得具有此种光学识别传感器的指纹识别模块的价格高昂。
采用低温多晶硅（Low Temperature Poly-silicon，LTPS）技术的薄膜晶体管（TFT）的成本较低，利用LTPS薄膜晶体管同样可以实现光学指纹识别传感器的电路搭建，从而能够有效降低采用光学指纹识技术的指纹识别模块的价格。请参阅图1，为现有的一种基于LTPS薄膜晶体管的光学指纹识别电路的电路图，该光学指纹识别电路包括第一薄膜晶体管T10、第二薄膜晶体管T20、电容C10、光电二极管D10。第一薄膜晶体管T10的栅极电性连接光电二极管D1的阳极，漏极接入电源电压Vdd，源极电性连接第二薄膜晶体管T20的源极。第二薄膜晶体管T20的栅极接入开关信号SW1，漏极电性连接信号传输端READOUT。电容C10的一端接入电源电压Vdd，另一端电性连接第一薄膜晶体管T10的栅极。光电二极管D10的阴极接入二极管偏压DBIAS。工作时，扫描信号SW控制第二薄膜晶体管T20导通，手指的反光对光电二极管D10进行曝光，光电二极管D10接收到光信号而产生漏电流，使得第一薄膜晶体管T10的栅极的电压相应地发生变化，第一薄膜晶体管T10依据其栅极电压产生与光信号相应的电流作为识别信号传输至信号传输端READOUT以进行输出，实现指纹的识别。然而，LTPS薄膜晶体管存在阈值电压不均匀的特点，导致最终输出的识别信号会受到第一薄膜晶体管T10的阈值电压的影响，降低了识别信号的准确性。
 技术问题
本发明的目的在于提供一种光学指纹识别电路，能够对第一薄膜晶体管的阈值电压进行补偿，保证识别信号的准确性。
本发明的目的在于提供一种显示装置，其光学指纹识别电路能够对第一薄膜晶体管的阈值电压进行补偿，保证识别信号的准确性。
 技术解决方案
为实现上述目的，本发明首先提供一种光学指纹识别电路，包括第一薄膜晶体管、第一开关单元、第二开关单元、复位补偿单元、存储电容及光电二极管；
所述第一开关单元接收扫描信号及电源电压，用于在扫描信号的控制下将电源电压传输至第一薄膜晶体管的源极及漏极中的一个；
所述第二开关单元接收扫描信号，用于在扫描信号的控制下将第一薄膜晶体管的源极及漏极中的另一个与一信号传输端电性连接；
所述存储电容的一端接入电源电压，另一端电性连接第一薄膜晶体管的栅极；
所述复位补偿单元接收参考电压及复位信号，用于在复位信号的控制下对第一薄膜晶体管的栅极的电压进行复位，而后在复位信号的控制下利用参考电压使得第一薄膜晶体管的栅极的电压变为一预设电压值与第一薄膜晶体管阈值电压之和；
所述光电二极管的阳极及阴极中的一个接入二极管偏压，另一个电性连接第一薄膜晶体管的栅极，用于接收光信号并依据光信号相应改变第一薄膜晶体管的栅极的电压。
所述第一开关单元包括第四薄膜晶体管；所述第四薄膜晶体管的栅极接入扫描信号，源极接入电源电压，漏极电性连接第一薄膜晶体管的源极及漏极中的一个；
所述第二开关单元包括第五薄膜晶体管；所述第五薄膜晶体管的栅极接入扫描信号，源极电性连接第一薄膜晶体管的源极及漏极中的另一个，漏极电性连接信号传输端。
所述复位补偿单元包括第二薄膜晶体管及第三薄膜晶体管；所述第二薄膜晶体管的栅极接入复位信号，源极电性连接第一薄膜晶体管的漏极，漏极电性连接第一薄膜晶体管的栅极；所述第三薄膜晶体管的栅极接入复位信号，源极接入参考电压，漏极电性连接第一薄膜晶体管的源极；所述第四薄膜晶体管的漏极电性连接第一薄膜晶体管的漏极，所述第五薄膜晶体管的源极电性连接第一薄膜晶体管的源极；
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管及第五薄膜晶体管均为N型薄膜晶体管；
所述光电二极管的阴极接入二极管偏压，阳极电性连接第一薄膜晶体管的栅极。
所述光学指纹识别电路的工作过程依次包括复位阶段、阈值补偿阶段、曝光阶段及数据读取阶段；
在复位阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管导通，第一薄膜晶体管的栅极的电压变为电源电压；
在阈值补偿阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管导通，参考电压的电压值为预设电压值，所述预设电压值低于电源电压，第一薄膜晶体管的栅极的电压不断降低直至等于VRef+Vth，其中VRef为所述预设电压值，Vth为第一薄膜晶体管的阈值电压，所述二极管偏压大于VRef+Vth；
在曝光阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管截止，光电二极管接收光信号而产生漏电流，使得第一薄膜晶体管的栅极的电压上升至VRef+Vth+ΔV，其中ΔV为光电二极管因接收光信号而产生漏电流导致的第一薄膜晶体管的栅极的电压的增加量；
在数据读取阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管截止，第一薄膜晶体管依据其栅极的电压产生相应的电流经导通的第五薄膜晶体管传输至信号传输端。
在复位阶段中，所述参考电压的电压值等于电源电压。
所述复位补偿单元包括第二薄膜晶体管及第三薄膜晶体管；所述第二薄膜晶体管的栅极接入复位信号，源极电性连第一薄膜晶体管的栅极，漏极电性连接第一薄膜晶体管的漏极；所述第三薄膜晶体管的栅极接入复位信号，源极接入参考电压，漏极电性连接第一薄膜晶体管的源极；所述第四薄膜晶体管的漏极电性连接第一薄膜晶体管的源极，所述第五薄膜晶体管的源极电性连接第一薄膜晶体管的漏极；
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管及第五薄膜晶体管均为P型薄膜晶体管；
所述光电二极管的阳极接入二极管偏压，阴极电性连接第一薄膜晶体管的栅极。
所述光学指纹识别电路的工作过程依次包括复位阶段、阈值补偿阶段、曝光阶段及数据读取阶段；
在复位阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管导通，信号传输端接入接地端电压，第一薄膜晶体管的栅极的电压变为接地端电压；
在阈值补偿阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管导通，参考电压的电压值为预设电压值，所述预设电压值高于接地端电压，第一薄膜晶体管的栅极的电压不断升高直至等于VRef’+Vth’，其中VRef’为所述预设电压值，Vth’为第一薄膜晶体管的阈值电压，所述二极管偏压小于VRef’+Vth’；
在曝光阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管截止，光电二极管接收光信号而产生漏电流，使得第一薄膜晶体管的栅极的电压下降至VRef’+Vth’-ΔV’，其中ΔV’为光电二极管接收光信号而产生漏电流导致的第一薄膜晶体管的栅极的电压的减小量；
在数据读取阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管截止，第一薄膜晶体管依据其栅极的电压产生相应的电流经导通的第五薄膜晶体管传输至信号传输端。
在复位阶段中，所述参考电压的电压值等于接地端电压。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管及第五薄膜晶体管均为LTPS薄膜晶体管。
本发明还提供一种显示装置，包括上述光学指纹识别电路。
 有益效果
本发明的有益效果：本发明的光学指纹识别电路包括第一薄膜晶体管、第一开关单元、第二开关单元、复位补偿单元、存储电容及光电二极管，复位补偿单元在复位信号的控制下对第一薄膜晶体管的栅极的电压进行复位，而后在复位信号的控制下利用参考电压使得第一薄膜晶体管的栅极的电压变为一预设电压值与第一薄膜晶体管阈值电压之和，从而对第一薄膜晶体管的阈值电压进行补偿，使得在光电二极管接收光信号并依据光信号相应改变第一薄膜晶体管的栅极的电压后，第一薄膜晶体管依据其栅极的电压产生相应的电流与第一薄膜晶体管的阈值电压无关，保证识别信号的准确性。本发明的显示装置的指纹识别电路能够对第一薄膜晶体管的阈值电压进行补偿，保证识别信号的准确性。
 附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的一种光学指纹识别电路的电路图；
图2为本发明第一实施例的光学指纹识别电路的电路图；
图3为本发明第一实施例的光学指纹识别电路的时序图；
图4为本发明第一实施例的光学指纹识别电路在复位阶段的示意图；
图5为本发明第一实施例的光学指纹识别电路在阈值补偿阶段的示意图；
图6为本发明第一实施例的光学指纹识别电路在曝光阶段的示意图；
图7为本发明第一实施例的光学指纹识别电路在数据读取阶段的示意图；
图8为本发明第二实施例的光学指纹识别电路的电路图；
图9为本发明第二实施例的光学指纹识别电路的时序图；
图10为本发明第二实施例的光学指纹识别电路在复位阶段的示意图；
图11为本发明第二实施例的光学指纹识别电路在阈值补偿阶段的示意图；
图12为本发明第二实施例的光学指纹识别电路在曝光阶段的示意图；
图13为本发明第二实施例的光学指纹识别电路在数据读取阶段的示意图。
 本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明第一实施例的光学指纹识别电路包括第一薄膜晶体管T1、第一开关单元10、第二开关单元20、复位补偿单元30、存储电容C1及光电二极管D1。
所述第一开关单元10接收扫描信号SW及电源电压VDD，用于在扫描信号SW的控制下将电源电压VDD传输至第一薄膜晶体管T1的源极及漏极中的一个。
所述第二开关单元20接收扫描信号SW，用于在扫描信号SW的控制下将第一薄膜晶体管T1的源极及漏极中的另一个与一信号传输端Readout电性连接。
所述存储电容C1的一端接入电源电压VDD，另一端电性连接第一薄膜晶体管T1的栅极G。
所述复位补偿单元30接收参考电压Ref及复位信号Rst，用于在复位信号Rst的控制下对第一薄膜晶体管T1的栅极G的电压进行复位，而后在复位信号Rst的控制下利用参考电压Ref使得第一薄膜晶体管T1的栅极G的电压变为一预设电压值与第一薄膜晶体管T1阈值电压之和。
所述光电二极管D1的阳极及阴极中的一个接入二极管偏压Dbias，另一个电性连接第一薄膜晶体管T1的栅极G，用于接收光信号并依据光信号相应改变第一薄膜晶体管T1的栅极G的电压。
具体地，在请参阅图2，在本发明的第一实施例中，所述第一开关单元10包括第四薄膜晶体管T4。所述第四薄膜晶体管T4的栅极接入扫描信号SW，源极接入电源电压VDD，漏极电性连接第一薄膜晶体管T1的漏极。所述第二开关单元20包括第五薄膜晶体管T5。所述第五薄膜晶体管T5的栅极接入扫描信号SW，源极电性连接第一薄膜晶体管T1的源极，漏极电性连接信号传输端Readout。
具体地，在请参阅图2，在本发明的第一实施例中，所述复位补偿单元30包括第二薄膜晶体管T2及第三薄膜晶体管T3。所述第二薄膜晶体管T2的栅极接入复位信号Rst，源极电性连接第一薄膜晶体管T1的漏极，漏极电性连接第一薄膜晶体管T1的栅极G。所述第三薄膜晶体管T3的栅极接入复位信号Rst，源极接入参考电压Ref，漏极电性连接第一薄膜晶体管T1的源极。
具体地，在本发明的第一实施例中，所述第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4及第五薄膜晶体管T5均为N型薄膜晶体管。
优选地，所述第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4及第五薄膜晶体管T5均为LTPS薄膜晶体管。
具体地，请参阅图2，在本发明的第一实施例中，所述光电二极管D1的阴极接入二极管偏压Dbias，阳极电性连接第一薄膜晶体管T1的栅极G。
具体地，信号传输端Readout与处理芯片（未图示）电性连接。
具体地，请参阅图3，在本发明的第一实施例中，所述光学指纹识别电路的工作过程依次包括复位阶段S1、阈值补偿阶段S2、曝光阶段S3及数据读取阶段S4。
请结合图3，并结合图4，在复位阶段S1，所述扫描信号SW为高电位控制第四薄膜晶体管T4及第五薄膜晶体管T5导通，所述复位信号Rst为高电位控制第二薄膜晶体管T2及第三薄膜晶体管T3导通，此时，第一薄膜晶体管T1的栅极G经过导通的第二薄膜晶体管T2及第四薄膜晶体管T4接入电源电压VDD，从而第一薄膜晶体管T1的栅极G的电压变为电源电压VDD，从而完成对第一薄膜晶体管T1的栅极G的复位，而信号传输端Readout此时的电压也为电源电压VDD。
优选地，在复位阶段S1中，所述参考电压Ref的电压值等于电源电压VDD从而避免出现大电流问题。
请参阅图3，并结合图5，在阈值补偿阶段S2，所述扫描信号SW为低电位控制第四薄膜晶体管T4及第五薄膜晶体管T5截止，所述复位信号Rst为高电位控制第二薄膜晶体管T2及第三薄膜晶体管T3导通，参考电压Ref的电压值为预设电压值VRef，所述预设电压值VRef低于电源电压VDD，第一薄膜晶体管T1的栅极G经导通的第一薄膜晶体管T1及第三薄膜晶体管T3不断放电而电压下降，直至等于VRef+Vth，其中VRef为所述预设电压值，Vth为第一薄膜晶体管T1的阈值电压，第一薄膜晶体管T1截止，所述二极管偏压Dbias大于VRef+Vth，由于存储电容C1的存储作用，第一薄膜晶体管T1的栅极G的电压维持在VRef+Vth。
请参阅图3，并结合图6，在曝光阶段S3，所述扫描信号SW为低电位控制第四薄膜晶体管T4及第五薄膜晶体管T5截止，所述复位信号Rst为低电位控制第二薄膜晶体管T2及第三薄膜晶体管T3截止，此阶段中，待识别指纹的手指反射的光线对光电二极管D1进行曝光，光电二极管D1此时接收光信号而产生漏电流，使得第一薄膜晶体管T1的栅极G的电压上升至VRef+Vth+ΔV，其中ΔV为光电二极管D1因接收光信号而产生漏电流导致的第一薄膜晶体管T1的栅极G的电压的增加量。不同光强条件下，光电二极管D1产生的漏电情况不同，即手指反射光越强，光电二极管D1产生的漏电流越大，从而光电二极管D1因接收光信号而产生漏电流导致的第一薄膜晶体管T1的栅极G的电压的增加量ΔV为与手指反射光强相关联的量。由于存储电容C1的存储作用，第一薄膜晶体管T1的栅极G的电压维持在VRef+Vth+ΔV。
请参阅图3，并结合图7，在数据读取阶段S4，所述扫描信号SW为高电位控制第四薄膜晶体管T4及第五薄膜晶体管T5导通，所述复位信号Rst为低电位控制第二薄膜晶体管T2及第三薄膜晶体管T3截止，此时第一薄膜晶体管T1的栅极G的电压维持在VRef+Vth+ΔV，从而第一薄膜晶体管T1导通，第一薄膜晶体管T1依据其栅极G的电压产生相应的电流作为识别信号经导通的第五薄膜晶体管T5传输至信号传输端Readout。
进一步地，在本发明的第一实施例中，流经第一薄膜晶体管T1的电流公式为：
I=1/2μCoxW/L(Vgs-Vth) 2
其中，I为流经第一薄膜晶体管T1的电流，μ为第一薄膜晶体管T1的载流子迁移率，W和L分别为第一薄膜晶体管T1的沟道宽度和长度，Vgs为第一薄膜晶体管T1的栅极G与源极之间的电压差，而Vgs=VRef+Vth+ΔV-Vs，将此代入上式可得：
I=1/2μCoxW/L（VRef+Vth+ΔV-Vs-Vth） 2
 =1/2μCoxW/L（VRef+ΔV-Vs） 2；
可见，流经第一薄膜晶体管T1的电流与其自身的阈值电压Vth无关，也即最终传输至信号传输端Readout用以作为识别信号的电流与第一薄膜晶体管T1的阈值电压无关，从而使得识别信号不再受第一薄膜晶体管T1的阈值电压影响，准确性更高。
请参阅图8，本发明第二实施例的光学指纹识别电路与上述第一实施例的区别在于，第一薄膜晶体管T1’、复位补偿单元30’的第二薄膜晶体管T2’、第三薄膜晶体管T3’，第一开关单元10’的第四薄膜晶体管T4’及第二开关单元20’的第五薄膜晶体管T5均为P型薄膜晶体管。具体地，所述第二薄膜晶体管T2’的栅极接入复位信号Rst’，源极电性连第一薄膜晶体管T1’的栅极G’，漏极电性连接第一薄膜晶体管T1’的漏极。所述第三薄膜晶体管T2’的栅极接入复位信号Rst’，源极接入参考电压Ref’，漏极电性连接第一薄膜晶体管T1’的源极。第四薄膜晶体管T4’的漏极电性连接第一薄膜晶体管T1’的源极，第五薄膜晶体管T5’的源极电性连接第一薄膜晶体管T1’的漏极。与此同时，所述光电二极管D1’的阳极接入二极管偏压Dbias’，阴极电性连接第一薄膜晶体管T1’的栅极G’。
相应地，请参阅图9，在本发明的第二实施例中，所述光学指纹识别电路的工作过程也依次包括复位阶段S1’、阈值补偿阶段S2’、曝光阶段S3’及数据读取阶段S4’。
请参阅图9，并结合图10，在复位阶段S1’，所述扫描信号SW’为低电位控制第四薄膜晶体管T4’及第五薄膜晶体管T5’导通，所述复位信号Rst’为低电位控制第二薄膜晶体管T2’及第三薄膜晶体管T3’导通，信号传输端Readout接入接地端电压GND，该接地端电压GND可以由处理芯片提供，此时，第一薄膜晶体管T1’的栅极G’经过导通的第五薄膜晶体管T5’接入接地端电压GND，从而第一薄膜晶体管T1’的栅极G’的电压变为接地端电压GND，从而完成对第一薄膜晶体管T1’的栅极G’的复位。
优选地，在复位阶段S1’中，所述参考电压Ref’的电压值等于接地端电压GND从而避免出现大电流问题。
请参阅图9，并结合图11，在阈值补偿阶段S2’，所述扫描信号SW’为高电位控制第四薄膜晶体管T4’及第五薄膜晶体管T5’截止，所述复位信号Rst’为低电位控制第二薄膜晶体管T2’及第三薄膜晶体管T3’导通，参考电压Ref’的电压值为预设电压值VRef’，所述预设电压值VRef’高于接地端电压GND，第一薄膜晶体管T1’的栅极G’经导通的第二薄膜晶体管T2’、第一薄膜晶体管T1’、第三薄膜晶体管T3’被参考电压Ref’充电而电压不断升高直至等于VRef’+Vth’，其中VRef’为所述预设电压值，Vth’为第一薄膜晶体管的阈值电压，第一薄膜晶体管T1’截止，所述二极管偏压Dbias’小于VRef’+Vth’， 由于存储电容C1的存储作用，第一薄膜晶体管T1’的栅极G’的电压维持在VRef’+Vth’。
请参阅图9，并结合图12，在曝光阶段S3’，所述扫描信号SW’为高电位控制第四薄膜晶体管T4’及第五薄膜晶体管T5’截止，所述复位信号Rst’为高电位控制第二薄膜晶体管T2’及第三薄膜晶体管T3’截止，此阶段中，待识别指纹的手指反射的光线对光电二极管D1’进行曝光，光电二极管D1’此时接收光信号而产生漏电流，使得第一薄膜晶体管T1’的栅极G’的电压下降至VRef’+Vth’-ΔV’，其中ΔV’为光电二极管D1’接收光信号而产生漏电流导致的第一薄膜晶体管T1’的栅极G’的电压的减小量。不同光强条件下，光电二极管D1’产生的漏电情况不同，即手指反射光越强，光电二极管D1’产生的漏电流越大，从而光电二极管D1’因接收光信号而产生漏电流导致的第一薄膜晶体管T1’的栅极G’的电压的减小量ΔV’为与手指反射光强相关联的量。由于存储电容C1的存储作用，第一薄膜晶体管T1’的栅极G’的电压维持在VRef’+Vth’-ΔV’。
请参阅图9，并结合图13，在数据读取阶段S4’，所述扫描信号SW’为低电位控制第四薄膜晶体管T4’及第五薄膜晶体管T5’导通，所述复位信号Rst’为高电位控制第二薄膜晶体管T2’及第三薄膜晶体管T3’截止，此时第一薄膜晶体管T1’的栅极G’的电压维持在VRef’+Vth’-ΔV’，从而第一薄膜晶体管T1’导通，第一薄膜晶体管T1’依据其栅极G’的电压产生相应的电流作为识别信号经导通的第五薄膜晶体管T5’传输至信号传输端Readout。
进一步地，在本发明的第二实施例中，流经第一薄膜晶体管T1’的电流公式为：
I’=1/2μ’CoxW’/L’(Vgs’-Vth’) 2
其中，I’为流经第一薄膜晶体管T1’的电流，μ’为第一薄膜晶体管T1’的载流子迁移率，W’和L’分别为第一薄膜晶体管T1’的沟道宽度和长度，Vgs’为第一薄膜晶体管T1’的栅极G’与源极之间的电压差，而Vgs’=VRef’+Vth’-ΔV’-VDD，将此代入上式可得：
I=1/2μ’CoxW’/L’（VRef’+Vth’-ΔV’-VDD-Vth’） 2
 =1/2μ’CoxW’/L’（VDD-VRef’+ΔV’） 2；
可见，流经第一薄膜晶体管T1’的电流与其自身的阈值电压Vth’无关，也即最终传输至信号传输端Readout用以作为识别信号的电流与第一薄膜晶体管T1’的阈值电压无关，从而使得识别信号不再受第一薄膜晶体管T1’的阈值电压影响，准确性更高。
基于同一发明构思，本发明还提供一种显示装置，包括上述光学指纹识别电路，在此不再对光学指纹识别电路的结构进行重复性描述。本发明显示装置通过设置上述的光学指纹识别电路，能够对第一薄膜晶体管的阈值电压进行补偿，识别信号不受第一薄膜晶体管阈值电压的影响，保证识别信号的准确性。
综上所述，本发明的光学指纹识别电路包括第一薄膜晶体管、第一开关单元、第二开关单元、复位补偿单元、存储电容及光电二极管，复位补偿单元在复位信号的控制下对第一薄膜晶体管的栅极电压进行复位，而后在复位信号的控制下利用参考电压使得第一薄膜晶体管的栅极电压变为一预设电压值与第一薄膜晶体管阈值电压之和，从而对第一薄膜晶体管的阈值电压进行补偿，使得在光电二极管接收光信号并依据光信号相应改变第一薄膜晶体管的栅极电压后，第一薄膜晶体管依据其栅极的电压产生相应的电流与第一薄膜晶体管的阈值电压无关，保证识别信号的准确性。本发明的显示装置的指纹识别电路能够对第一薄膜晶体管的阈值电压进行补偿，保证识别信号的准确性。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种光学指纹识别电路，包括第一薄膜晶体管、第一开关单元、第二开关单元、复位补偿单元、存储电容及光电二极管；
    所述第一开关单元接收扫描信号及电源电压，用于在扫描信号的控制下将电源电压传输至第一薄膜晶体管的源极及漏极中的一个；
    所述第二开关单元接收扫描信号，用于在扫描信号的控制下将第一薄膜晶体管的源极及漏极中的另一个与一信号传输端电性连接；
    所述存储电容的一端接入电源电压，另一端电性连接第一薄膜晶体管的栅极；
    所述复位补偿单元接收参考电压及复位信号，用于在复位信号的控制下对第一薄膜晶体管的栅极的电压进行复位，而后在复位信号的控制下利用参考电压使得第一薄膜晶体管的栅极的电压变为一预设电压值与第一薄膜晶体管阈值电压之和；
    所述光电二极管的阳极及阴极中的一个接入二极管偏压，另一个电性连接第一薄膜晶体管的栅极，用于接收光信号并依据光信号相应改变第一薄膜晶体管的栅极的电压。
  2. 如权利要求1所述的光学指纹识别电路，其中，所述第一开关单元包括第四薄膜晶体管；所述第四薄膜晶体管的栅极接入扫描信号，源极接入电源电压，漏极电性连接第一薄膜晶体管的源极及漏极中的一个；
    所述第二开关单元包括第五薄膜晶体管；所述第五薄膜晶体管的栅极接入扫描信号，源极电性连接第一薄膜晶体管的源极及漏极中的另一个，漏极电性连接信号传输端。
  3. 如权利要求2所述的光学指纹识别电路，其中，所述复位补偿单元包括第二薄膜晶体管及第三薄膜晶体管；所述第二薄膜晶体管的栅极接入复位信号，源极电性连接第一薄膜晶体管的漏极，漏极电性连接第一薄膜晶体管的栅极；所述第三薄膜晶体管的栅极接入复位信号，源极接入参考电压，漏极电性连接第一薄膜晶体管的源极；所述第四薄膜晶体管的漏极电性连接第一薄膜晶体管的漏极，所述第五薄膜晶体管的源极电性连接第一薄膜晶体管的源极；
    所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管及第五薄膜晶体管均为N型薄膜晶体管；
    所述光电二极管的阴极接入二极管偏压，阳极电性连接第一薄膜晶体管的栅极。
  4. 如权利要求3所述的光学指纹识别电路，其中，所述光学指纹识别电路的工作过程依次包括复位阶段、阈值补偿阶段、曝光阶段及数据读取阶段；
    在复位阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管导通，第一薄膜晶体管的栅极的电压变为电源电压；
    在阈值补偿阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管导通，参考电压的电压值为预设电压值，所述预设电压值低于电源电压，第一薄膜晶体管的栅极的电压不断降低直至等于VRef+Vth，其中VRef为所述预设电压值，Vth为第一薄膜晶体管的阈值电压，所述二极管偏压大于VRef+Vth；
    在曝光阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管截止，光电二极管接收光信号而产生漏电流，使得第一薄膜晶体管的栅极的电压上升至VRef+Vth+ΔV，其中ΔV为光电二极管因接收光信号而产生漏电流导致的第一薄膜晶体管的栅极的电压的增加量；
    在数据读取阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管截止，第一薄膜晶体管依据其栅极的电压产生相应的电流经导通的第五薄膜晶体管传输至信号传输端。
  5. 如权利要求4所述的光学指纹识别电路，其中，在复位阶段中，所述参考电压的电压值等于电源电压。
  6. 如权利要求2所述的光学指纹识别电路，其中，所述复位补偿单元包括第二薄膜晶体管及第三薄膜晶体管；所述第二薄膜晶体管的栅极接入复位信号，源极电性连第一薄膜晶体管的栅极，漏极电性连接第一薄膜晶体管的漏极；所述第三薄膜晶体管的栅极接入复位信号，源极接入参考电压，漏极电性连接第一薄膜晶体管的源极；所述第四薄膜晶体管的漏极电性连接第一薄膜晶体管的源极，所述第五薄膜晶体管的源极电性连接第一薄膜晶体管的漏极；
    所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管及第五薄膜晶体管均为P型薄膜晶体管；
    所述光电二极管的阳极接入二极管偏压，阴极电性连接第一薄膜晶体管的栅极。
  7. 如权利要求6所述的光学指纹识别电路，其中，所述光学指纹识别电路的工作过程依次包括复位阶段、阈值补偿阶段、曝光阶段及数据读取阶段；
    在复位阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管导通，信号传输端接入接地端电压，第一薄膜晶体管的栅极的电压变为接地端电压；
    在阈值补偿阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为低电位控制第二薄膜晶体管及第三薄膜晶体管导通，参考电压的电压值为预设电压值，所述预设电压值高于接地端电压，第一薄膜晶体管的栅极的电压不断升高直至等于VRef’+Vth’，其中VRef’为所述预设电压值，Vth’为第一薄膜晶体管的阈值电压，所述二极管偏压小于VRef’+Vth’；
    在曝光阶段，所述扫描信号为高电位控制第四薄膜晶体管及第五薄膜晶体管截止，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管截止，光电二极管接收光信号而产生漏电流，使得第一薄膜晶体管的栅极的电压下降至VRef’+Vth’-ΔV’，其中ΔV’为光电二极管接收光信号而产生漏电流导致的第一薄膜晶体管的栅极的电压的减小量；
    在数据读取阶段，所述扫描信号为低电位控制第四薄膜晶体管及第五薄膜晶体管导通，所述复位信号为高电位控制第二薄膜晶体管及第三薄膜晶体管截止，第一薄膜晶体管依据其栅极的电压产生
    相应的电流经导通的第五薄膜晶体管传输至信号传输端。
  8. 如权利要求7所述的光学指纹识别电路，其中，在复位阶段中，所述参考电压的电压值等于接地端电压。
  9. 如权利要求3所述的光学指纹识别电路，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管及第五薄膜晶体管均为LTPS薄膜晶体管。
  10. 一种显示装置，包括如权利要求1所述的光学指纹识别电路。
PCT/CN2019/124635 2019-10-22 2019-12-11 光学指纹识别电路及显示装置 WO2021077569A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/762,954 US11361579B2 (en) 2019-10-22 2019-12-11 Optical fingerprint recognition circuit and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201911007021.5 2019-10-22
CN201911007021.5A CN110728254B (zh) 2019-10-22 2019-10-22 光学指纹识别电路及显示装置

Publications (1)

Publication Number Publication Date
WO2021077569A1 true WO2021077569A1 (zh) 2021-04-29

Family

ID=69221692

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/124635 WO2021077569A1 (zh) 2019-10-22 2019-12-11 光学指纹识别电路及显示装置

Country Status (3)

Country Link
US (1) US11361579B2 (zh)
CN (1) CN110728254B (zh)
WO (1) WO2021077569A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111262531B (zh) * 2020-01-31 2024-03-01 京东方科技集团股份有限公司 一种探测电路、其制作方法及探测面板
CN111639622B (zh) * 2020-06-09 2021-07-06 武汉华星光电技术有限公司 光学指纹识别电路及显示面板
EP4163818A1 (en) 2020-06-09 2023-04-12 Wuhan China Star Optoelectronics Technology Co., Ltd. Optical fingerprint recognition circuit and display panel
KR20220009562A (ko) * 2020-07-16 2022-01-25 엘지디스플레이 주식회사 표시장치와 이를 포함한 모바일 단말기
CN112163565B (zh) * 2020-10-28 2023-06-30 武汉华星光电半导体显示技术有限公司 指纹识别电路及oled显示面板
CN112906496B (zh) * 2021-01-28 2022-09-09 湖北长江新型显示产业创新中心有限公司 指纹识别电路及指纹识别方法、显示装置
TWI782722B (zh) * 2021-09-28 2022-11-01 友達光電股份有限公司 感測裝置及其操作方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103295525A (zh) * 2013-05-31 2013-09-11 京东方科技集团股份有限公司 像素电路及其驱动方法、有机发光显示面板及显示装置
CN105590955A (zh) * 2015-12-25 2016-05-18 昆山国显光电有限公司 像素电路及其驱动方法和有源矩阵有机发光显示器
CN106682640A (zh) * 2017-01-04 2017-05-17 京东方科技集团股份有限公司 指纹识别电路及其驱动方法、显示装置
CN108154844A (zh) * 2018-03-09 2018-06-12 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板
KR20190081730A (ko) * 2017-12-29 2019-07-09 엘지디스플레이 주식회사 지문 센싱 서브픽셀, 구동 회로 및 디스플레이 장치
CN110097038A (zh) * 2019-05-28 2019-08-06 武汉华星光电技术有限公司 光学指纹识别电路及阵列

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100873497B1 (ko) * 2002-10-17 2008-12-15 삼성전자주식회사 지문 인식 소자를 내장한 일체형 액정표시장치 및 이의제조 방법
KR100552451B1 (ko) * 2005-07-27 2006-02-21 실리콘 디스플레이 (주) 문턱전압이 보상되는 요철 검출장치 및 그 방법
KR102108943B1 (ko) * 2009-10-08 2020-05-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
CN104282265B (zh) * 2014-09-26 2017-02-01 京东方科技集团股份有限公司 像素电路及其驱动方法、有机发光显示面板及显示装置
CN106156741B (zh) * 2016-07-04 2019-07-19 信利（惠州）智能显示有限公司 指纹识别单元电路及其控制方法以及指纹识别装置
CN107578026B (zh) * 2017-09-15 2020-11-27 京东方科技集团股份有限公司 指纹检测电路、指纹检测电路的检测方法和指纹传感器
CN107908310B (zh) * 2017-11-13 2019-12-06 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
CN108304803B (zh) * 2018-01-31 2021-04-23 京东方科技集团股份有限公司 光检测电路、光检测方法和显示装置
CN109348150B (zh) * 2018-10-18 2021-01-29 天津大学 基于有机薄膜光电晶体管实现cmos有源像素柔性图像传感器的像素电路
CN109872683B (zh) * 2019-03-28 2020-08-25 京东方科技集团股份有限公司 一种像素电路、显示面板及驱动方法
CN109979367B (zh) * 2019-05-13 2023-08-04 京东方科技集团股份有限公司 光电检测电路及其驱动方法、感光装置及显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103295525A (zh) * 2013-05-31 2013-09-11 京东方科技集团股份有限公司 像素电路及其驱动方法、有机发光显示面板及显示装置
CN105590955A (zh) * 2015-12-25 2016-05-18 昆山国显光电有限公司 像素电路及其驱动方法和有源矩阵有机发光显示器
CN106682640A (zh) * 2017-01-04 2017-05-17 京东方科技集团股份有限公司 指纹识别电路及其驱动方法、显示装置
KR20190081730A (ko) * 2017-12-29 2019-07-09 엘지디스플레이 주식회사 지문 센싱 서브픽셀, 구동 회로 및 디스플레이 장치
CN108154844A (zh) * 2018-03-09 2018-06-12 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板
CN110097038A (zh) * 2019-05-28 2019-08-06 武汉华星光电技术有限公司 光学指纹识别电路及阵列

Also Published As

Publication number Publication date
US20210406504A1 (en) 2021-12-30
CN110728254A (zh) 2020-01-24
CN110728254B (zh) 2022-03-01
US11361579B2 (en) 2022-06-14

Similar Documents

Publication Publication Date Title
WO2021077569A1 (zh) 光学指纹识别电路及显示装置
CN109545145B (zh) 像素电路及其驱动方法、显示装置
US10762321B2 (en) Fingerprint recognition unit circuit, control method therefor, and fingerprint recognition apparatus
US10818226B2 (en) Pixel circuit, method for driving the same, and display apparatus
US20210118361A1 (en) Amoled pixel driving circuit, driving method, and display panel
US11081053B2 (en) Electronic devices having displays with compensation for oxide transistor threshold voltage
US11315491B2 (en) Pixel circuit, display panel and driving method
US9773453B2 (en) Organic light emitting diode display apparatus with power circuit to accelerate a voltage level
US9799268B2 (en) Active matrix organic light-emitting diode (AMOLED) pixel driving circuit, array substrate and display apparatus
US20230410729A1 (en) Pixel circuit, driving method of pixel circuit, and display panel
US10235932B2 (en) OLED inverting circuit and display panel
CN108806599B (zh) 用于补偿oled像素电路的方法
US11257406B2 (en) Aging detection circuit, aging compensation circuit, display panel and aging compensation method
US20200342813A1 (en) Pixel driving circuit, pixel driving method and display device
WO2020181515A1 (zh) 像素电路及其驱动方法、显示装置
CN110444158B (zh) 像素驱动电路及其驱动方法、显示面板及显示装置
US11250779B2 (en) Pixel circuit, method driving the same and display device
US10339358B2 (en) Palmprint recognition circuit based on LTPS technology, a palmprint recognition method and a display screen
WO2019109673A1 (zh) 像素电路及其驱动方法、显示面板和显示设备
US20180233087A1 (en) Pixel circuit and driving method, array substrate, and display apparatus
US11341909B2 (en) Pixel drive circuit and drive method thereof, and display device
US20240038174A1 (en) Pixel drive circuit and display panel
US10970514B2 (en) Compensation structure and driving method thereof, display panel, and display device
CN111312173A (zh) 一种像素电路及像素驱动的方法
US20200302855A1 (en) Pixel circuit and display device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19950164

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19950164

Country of ref document: EP

Kind code of ref document: A1