WO2021073632A1 - 物理随机接入信道的数据合并方法、装置及存储介质 - Google Patents

物理随机接入信道的数据合并方法、装置及存储介质 Download PDF

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WO2021073632A1
WO2021073632A1 PCT/CN2020/121775 CN2020121775W WO2021073632A1 WO 2021073632 A1 WO2021073632 A1 WO 2021073632A1 CN 2020121775 W CN2020121775 W CN 2020121775W WO 2021073632 A1 WO2021073632 A1 WO 2021073632A1
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data
prach
merging
combined
antenna
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PCT/CN2020/121775
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English (en)
French (fr)
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李东
刘文月
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深圳市中兴微电子技术有限公司
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Priority to JP2022523156A priority Critical patent/JP7410283B2/ja
Priority to EP20876504.0A priority patent/EP4048016A4/en
Priority to US17/770,008 priority patent/US20220394774A1/en
Publication of WO2021073632A1 publication Critical patent/WO2021073632A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W74/00—Wireless channel access
    • H04W74/08—Non-scheduled access, e.g. ALOHA
    • H04W74/0833—Random access procedures, e.g. with 4-step access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/06—Arrangements for sorting, selecting, merging, or comparing data on individual record carriers
    • G06F7/14—Merging, i.e. combining at least two sets of record carriers each arranged in the same ordered sequence to produce a single set having the same ordered sequence
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2649—Demodulators
    • H04L27/26524—Fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators in combination with other circuits for demodulation
    • H04L27/26526—Fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators in combination with other circuits for demodulation with inverse FFT [IFFT] or inverse DFT [IDFT] demodulators, e.g. standard single-carrier frequency-division multiple access [SC-FDMA] receiver or DFT spread orthogonal frequency division multiplexing [DFT-SOFDM]

Definitions

  • the present disclosure relates to the field of communications, for example, to a physical random access channel (Physical Random Access Channel, PRACH) data merging method, device, and storage medium.
  • PRACH Physical Random Access Channel
  • the physical random access channel has multiple access formats in the 5th Generation mobile communication technology (5G) New Radio (NR) protocol, long format and short format, and corresponding multiple formats. Kind of combination.
  • 5G 5th Generation mobile communication technology
  • NR New Radio
  • the PRACH processing of the 5G NR protocol requires the combination of multiple RACH data in the same PRACH and the combination of PRACH data between different antennas.
  • the data merging after PRACH down-conversion is divided into different ways according to different PRACH formats: the long-format merging is combined into the PRACH data of multiple antennas, as shown in Figure 1.
  • the second is to not combine the PRACH data of multiple antennas, and directly add two adjacent RACHs or all RACHs in the PRACH data of the respective antennas, as shown in Figure 2.
  • Frequency Division Duplex (FDD) mode there is only one access frequency point, so only one single frequency point device is required.
  • TDD Time Division Duplex
  • when there are multiple frequency points either multiple sets of single frequency point devices are used, and multiple frequency points are processed in parallel at the same time, that is, multiple devices are added, which is a waste of resources. , Or time-sharing multiplexing the device, so that the processing delay is large, and the processing calculation amount is large.
  • the amount of PRACH data for each antenna is large. Buffering the PRACH data of all antennas and then merging the data will result in a large storage space and a large processing delay of the central processing unit (CPU).
  • CPU central processing unit
  • the present disclosure provides a physical random access channel data merging method, device, and storage medium to solve the problem of low processing efficiency in the related technology that uses software to implement single-frequency point random access data merging.
  • a physical random access channel data merging method including: parsing the task parameters of this PRACH data merging; reading the PRACH data of the antennas to be merged from the PRACH data buffer; and performing multiple antennas based on the task parameters The combined PRACH data and/or the RACH data in the PRACH of this antenna; output the combined PRACH data to the shared buffer.
  • a physical random access channel data merging device including: a parsing module configured to parse the task parameters of this PRACH data merging; a reading module configured to read the antenna to be merged from the PRACH data buffer PRACH data; merging module, configured to merge PRACH data among multiple antennas and/or merging RACH data in the PRACH of this antenna according to the task parameters; output module, configured to output the combined PRACH data to the shared buffer .
  • the task parameters include at least one of the following: PRACH format, data merging mode, data storage address, and effective PRACH data amount in the current OFDM symbol.
  • the reading module is configured to sequentially read the PRACH data to be combined from the PRACH data buffer using the OFDM symbol as a processing unit, and start data merging every time an OFDM symbol data is received.
  • the combining module further includes: a judging unit configured to judge whether PRACH data of multiple antennas to be combined needs to be combined and to judge whether RACH data combining is required; the first combining unit is set to combine the multiple In the case of combining the PRACH data of the two antennas, the PRACH data of the multiple antennas to be combined are combined according to the OFDM symbol time division; the second combining unit is configured to combine the RACH data in the combined PRACH data of the first combining unit.
  • the combining module further includes: a buffering and restoring unit, configured to combine PRACH data between antennas or RACH data within the PRACH of the antenna, and buffer the field data after the PRACH data at the current OFDM symbol time is processed After waiting for the arrival of the PRACH data of the next OFDM symbol, restore the field data of the corresponding antenna to continue processing.
  • a buffering and restoring unit configured to combine PRACH data between antennas or RACH data within the PRACH of the antenna, and buffer the field data after the PRACH data at the current OFDM symbol time is processed After waiting for the arrival of the PRACH data of the next OFDM symbol, restore the field data of the corresponding antenna to continue processing.
  • the device further includes: a configuration module configured to configure task parameters of this PRACH data merging.
  • the device further includes: a software processing module configured to perform FFT, frequency domain mother code correlation, IFFT, and peak detection processing on the combined preamble sequence.
  • a software processing module configured to perform FFT, frequency domain mother code correlation, IFFT, and peak detection processing on the combined preamble sequence.
  • a storage medium is also provided, and a computer program is stored in the storage medium, wherein the computer program is configured to implement the method described in the present disclosure when the computer program is run.
  • An electronic device including a memory and a processor, the memory storing a computer program, and the processor is configured to run the computer program to implement the method described in the present disclosure.
  • Figure 1 is a schematic diagram of PRACH data merging between antennas according to related technologies
  • Figure 2 is a schematic diagram of RACH data merging in PRACH according to related technologies
  • Fig. 3 is a flowchart of a PRACH data merging method according to an embodiment of the present invention.
  • Figure 4 is a schematic diagram of a PRACH data merging process according to an optional embodiment of the present invention.
  • Fig. 5 is a schematic diagram of a processing device according to an embodiment of the present invention.
  • Fig. 6 is a schematic diagram of data processing in a single antenna case according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of data processing in the case of multiple antennas according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a processing flow of a software processing module according to an embodiment of the present invention.
  • Fig. 9 is a schematic structural diagram of a PRACH data merging device according to an embodiment of the present invention.
  • FIG. 3 is a flowchart of the method according to an embodiment of the present invention. As shown in FIG. 3, the process includes the following steps:
  • Step S301 Analyze task parameters of this PRACH data merging.
  • Step S302 Read the PRACH data of the antenna to be combined from the PRACH data buffer.
  • Step S303 combining PRACH data among multiple antennas and/or combining RACH data before and after the PRACH of the antennas according to the task parameters.
  • Step S304 output the combined PRACH data to the shared buffer.
  • the task parameters include at least one of the following: PRACH format, data merging mode, data storage address, and PRACH data in the current Orthogonal Frequency Division Multiplexing (OFDM) symbol the amount.
  • OFDM Orthogonal Frequency Division Multiplexing
  • step S302 of this embodiment the PRACH data to be merged are sequentially read from the antenna PRACH data buffer in units of OFDM symbols, and PRACH data merging is started every time an OFDM symbol data is received.
  • step S303 of this embodiment it may be determined whether PRACH data merging between the multiple antennas is required first, and if PRACH data merging between the multiple antennas is required, then the OFDM symbol time division is used to perform the PRACH data merging.
  • the PRACH data among multiple antennas are combined, and then the RACH data before and after the PRACH in the antenna is combined.
  • step S303 of this embodiment for the combination of the PRACH data between or within the antennas, after the PRACH data of the current OFDM symbol time is processed, the field data is buffered and waits for the arrival of the PRACH data of the next OFDM symbol time, and the field of the corresponding antenna is restored The data continues to be processed.
  • step S301 in this embodiment may further include: configuring task parameters for this PRACH data merging.
  • step S304 in this embodiment it may further include: performing Fast Fourier Transform (FFT), frequency domain mother code correlation, and inverse Fast Fourier Transform on the combined preamble sequence. , IFFT) and data merge peak detection processing.
  • FFT Fast Fourier Transform
  • IFFT inverse Fast Fourier Transform
  • multiple frequency points and multiple PRACH formats can be flexibly adapted through task parameters, and data processing of multiple different PRACHs can be completed, thereby improving processing efficiency.
  • This embodiment provides a 5G NR PRACH data merging method.
  • different antennas and frequency point configurations can be selected, and PRACH data combination of multiple frequency points can be completed at the same time.
  • the combination configuration of different bandwidths and different PRACH formats can be supported, which is fast, saves the amount of calculation, saves processing resources and power consumption, and has excellent flexibility and scalability.
  • the OFDM symbol is used as the processing unit, and PRACH data of n OFDM symbols are processed each time (n can be configured according to software), and the PRACH data of multiple antennas are combined in a time-sharing manner. Multiple antennas multiplex the PRACH data merging module to complete their respective processing in sequence.
  • PRACH Format format For starting PRACH data merging, analyze the configured parameter configuration to obtain the current data merge processing information: PRACH Format format, merge type, merged data volume, PRACH frequency point, current PRACH completed merged data volume, etc. for merge processing .
  • Figure 4 shows the processing steps of this embodiment, which are: configuration parameter analysis, PRACH data reading, PRACH data combination between antennas, RACH data combination within PRACH of antennas, FFT, mother code correlation, IFFT, and peak check .
  • FIG. 5 is a schematic diagram of the processing device of this embodiment. As shown in Figure 5, according to the characteristics of each step in Figure 4, the device is divided into two basic modules: a hardware acceleration module and a software processing module.
  • the hardware acceleration module sequentially completes configuration parameter analysis, PRACH data reading, PRACH data merging between antennas, and RACH data merging within the PRACH of the antennas.
  • the software processing module sequentially completes FFT, frequency domain mother code correlation, IFFT processing and peak check functions. The two modules exchange data through a shared cache.
  • PRACH data is sequentially written into the data memory according to the OFDM symbol. Therefore, PRACH data merging is also processed in the unit of OFDM symbol time, without buffering redundant data, and responding to different PRACH formats in real time. Processing: The PRACH data merging process is started every time an OFDM data is received. The data of the next OFDM symbol can be antenna data in different cells and different PRACH formats.
  • FIG. 6 is a schematic diagram of single-antenna data processing.
  • the single-antenna hardware acceleration module reads the data received by PRACH according to the OFDM symbol time.
  • the software processing module controls to start the PRACH data merging process, and then buffers the field data and waits for the next OFDM.
  • the symbol data arrives.
  • Figure 7 is a schematic diagram of multi-antenna data processing. As shown in Figure 7, when there are multiple antennas in one OFDM symbol, there are multiple antennas for PRACH data merging. It is necessary to merge the data between different antennas and then do the PRACH of the antennas. The RACH data is merged, and then the field data is buffered, waiting for the PRACH data of the next OFDM symbol to arrive, and the field data of the corresponding antenna is restored to continue processing. Finally, the accelerator will output the results of the combined data between the antennas and the RACH combined data, and output to the data buffer to complete the subsequent PRACH data processing by the software.
  • the software processing module needs to complete FFT/IFFT processing and there is data interleaving, it cannot use OFDM symbol data as a processing unit.
  • the hardware acceleration module needs to complete the antenna's complete PRACH data processing before starting the software subsequent processing.
  • the data merging process after PRACH down-conversion is more efficient than the PRACH merging process completely completed by software, and it can be flexibly adapted to multiple PRACHs than completely processed by hardware. Format, thereby saving power consumption, reducing resource consumption, reducing processing time, and improving user perception.
  • the parameter selection is processed through software control, so the evolution of the 5G NR protocol can be flexibly adapted to protect investment.
  • the device of this embodiment supports multiple long code formats and short code formats of the 5G NR PRACH protocol.
  • each OFDM symbol generates a time interrupt.
  • the parameter analysis module obtains the task parameters of this data processing from the buffer, and obtains the required PRACH format, data merging method, and data storage from the task parameters. Address, the amount of PRACH data in the current OFDM symbol.
  • the inter-antenna data merging module merges the PRACH data between different antennas, and adds the respective PRACH data of multiple antennas correspondingly. If it is a single antenna or the software setting does not do data merging between antennas, there is no need for data merging. Supporting multiple antennas and different PRACH formats requires protecting the combined data and restoring on-site operations.
  • the RACH merging unit in the antenna PRACH is to add the corresponding RACH data before and after the PRACH of the antenna. If there are multiple antennas, you can choose to merge the data between multiple antennas, and then merge the RACH data in the PRACH of the antenna. , Because of the need to protect the site and restore site operations. Therefore, protecting the site and restoring the site are the core of this device to adapt to the protocol evolution of 5G, and has a high degree of flexibility.
  • Figure 8 shows the functional schematic diagram of the software processing module.
  • the software processing module will perform FFT, frequency domain mother code correlation, IFFT and other follow-up processing on a complete preamble sequence.
  • the software processing module first reads in the output data of the hardware acceleration module to complete the FFT operation.
  • the frequency domain signal generated by FFT can directly extract a sequence of multiple frequency points according to the spectrum distribution, and the sequence length is n points (different protocols have different definitions).
  • FFT and IFFT multiplex one FFT core, which can complete 256 points, 320 points, 384 points, 512 points, 640 points, 768 points, 1024 points, 1280 points, 1536 points, 1920 points, 2048 points, 2304 points, 3072 points, 3584 points, 4096 points, 5120 points, 6144 points, 7168 points, 8192 points FFT/IFFT processing.
  • Sequences of different lengths such as 839 or 139 obtained by the mother code correlation process are filled with 0 to obtain a sequence of 1536 or 256-point length, which is then subjected to IFFT to obtain the final output result. Finally, the peak check function is completed.
  • the configuration parameters can be used arbitrarily, and the processing device can be added to meet the specifications, which has a high expansion capability.
  • the present disclosure can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk), and includes multiple instructions to enable a terminal device (which can be a mobile phone, a computer, etc.) , A server, or a network device, etc.) execute the methods described in the multiple embodiments of the present disclosure.
  • a physical random access channel data merging device is also provided, which is used to implement the above-mentioned embodiments and optional implementation manners, and the descriptions that have been described will not be repeated.
  • the term “module” or “unit” used below can be a combination of software and/or hardware that can realize predetermined functions.
  • Fig. 9 is a structural block diagram of a physical random access channel data merging device according to an embodiment of the present invention.
  • the device is different from the previous device in the division of module functions.
  • the device includes a parsing module 10.
  • the parsing module 10 is set to analyze the task parameters of this PRACH data merging.
  • the reading module 20 is configured to read the PRACH data to be combined from the antenna PRACH data buffer.
  • the merging module 30 is configured to perform PRACH data merging between multiple antennas and/or PRACH data merging within antennas according to the task parameters.
  • the output module 40 is configured to output the combined PRACH data to the shared buffer.
  • the merging module 30 may further include a judging unit 31, a first merging unit 32, a second merging unit 33, and a caching and restoring unit 34.
  • the determining unit 31 is configured to determine whether PRACH data merging between the multiple antennas is required.
  • the first combining unit 32 is configured to combine the PRACH data between the multiple antennas according to the OFDM symbol time division when the PRACH data between the multiple antennas needs to be combined.
  • the second combining unit 33 is configured to combine RACH data in the PRACH of the antenna.
  • the buffering and restoring unit 34 is configured to buffer the field data after the PRACH data of the current OFDM symbol time is processed, wait for the arrival of the PRACH data of the next OFDM symbol time, and restore the field data of the corresponding antenna to continue processing.
  • the device may further include a configuration module 50 and a software processing module 60.
  • the configuration module 50 is configured to configure the task parameters of this PRACH data merging.
  • the software processing module 60 is configured to perform FFT, frequency domain mother code correlation, IFFT, and peak detection processing on the combined preamble sequence.
  • the above-mentioned multiple modules can be implemented by software or hardware. For the latter, it can be implemented in the following manner, but not limited to this: the above-mentioned modules are all located in the same processor; or, the above-mentioned multiple modules are respectively in the form of any combination Located in different processors.
  • the embodiment of the present disclosure also provides a storage medium in which a computer program is stored, and the computer program is configured to execute the steps in any one of the foregoing method embodiments when running.
  • the foregoing storage medium may include, but is not limited to: U disk, Read-Only Memory (Read-Only Memory, ROM for short), Random Access Memory (Random Access Memory, RAM for short), A variety of media that can store computer programs, such as mobile hard disks, magnetic disks, or optical disks.
  • An embodiment of the present disclosure also provides an electronic device, including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute the steps in any of the foregoing method embodiments.
  • multiple modules or multiple steps of the present disclosure can be implemented by a general computing device, and they can be concentrated on a single computing device or distributed in a network composed of multiple computing devices.
  • they can be implemented with program codes executable by a computing device, they can be stored in a storage device to be executed by the computing device, and in some cases, they can be executed in a different order than here.
  • the steps shown or described can be implemented by making them into multiple integrated circuit modules, or making multiple modules or steps of them into a single integrated circuit module.
  • the present disclosure is not limited to any specified combination of hardware and software.

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Abstract

本发明提供了一种物理随机接入信道的数据合并方法、装置及存储介质，该方法包括：解析本次PRACH数据合并的任务参数；从PRACH数据缓存中读取待合并天线的PRACH数据；根据所述任务参数进行多个天线间的PRACH数据合并和/或本天线的PRACH内的前后RACH数据合并；将合并后的数据输出至共享缓存。

Description

物理随机接入信道的数据合并方法、装置及存储介质
本申请要求在2019年10月18日提交中国专利局、申请号为201910996258.4的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本公开涉及通信领域，例如涉及一种物理随机接入信道(Physical Random Access Channel，PRACH)的数据合并方法、装置及存储介质。
背景技术
物理随机接入信道在第五代移动通信技术(the 5th Generation mobile communication technology，5G)新空口(New Radio，NR)协议中有多种接入format格式，长格式和短格式，以及对应的多种组合方式。
5G NR协议对PRACH处理需要将同一个PRACH中的多个RACH数据合并以及不同天线间的PRACH数据合并。
PRACH下变频后数据合并根据不同的PRACH格式分为不同的方式：长格式的合并为多个天线的PRACH数据相加合并，如图1。对短格式的合并方式有2种，一种是将多个天线的PRACH数据相加合并，然后将合并后的PRACH数据内相邻的2个RACH再相加合并或全部RACH相加合并，第二种是不做多个天线的PRACH数据合并，直接将各自天线的PRACH数据中相邻的2个RACH相加或者是全部RACH相加，如图2。
相关技术中通常大多采用软件实现单频点随机接入数据合并，即软件一次处理一个天线一个频点的随机接入数据合并，这样存在如下问题：
首先，对于频分双工(Frequency Division Duplex，FDD)模式，只有一个接入频点，因此只需要一个单频点装置即可。但是对于时分双工(Time Division Duplex，TDD)模式，当有多个频点存在时，要么采用多套单频点装置，同时并行处理多个频点，即增加多个装置，这样存在资源浪费，要么分时复用该装置，这样处理延时大，处理计算量大。
其次，每根天线PRACH数据量很大，将全部天线的PRACH数据都缓存再进行数据合并，将导致存储空间大且中央处理单元(Central Processing Unit，CPU)处理延迟大。
发明内容
本公开提供了一种物理随机接入信道的数据合并方法、装置及存储介质，以解决相关技术中采用软件实现单频点随机接入数据合并所存在的处理效率低的问题。
提供了一种物理随机接入信道的数据合并方法，包括：解析本次PRACH数据合并的任务参数；从PRACH数据缓存中读取待合并天线的PRACH数据；根据所述任务参数进行多个天线间的PRACH数据合并和/或本天线的PRACH内的RACH数据合并；将合并后的PRACH数据输出至共享缓存。
还提供了一种物理随机接入信道的数据合并装置，包括：解析模块，设置为解析本次PRACH数据合并的任务参数；读取模块，设置为从PRACH数据缓存中读取待合并的天线的PRACH数据；合并模块，设置为根据所述任务参数进行多个天线间的PRACH数据合并和/或本天线的PRACH内的RACH数据合并；输出模块，设置为将合并后的PRACH数据输出至共享缓存。
可选地，所述任务参数至少包括以下之一：PRACH格式、数据合并方式、数据的存储地址、当前OFDM符号中有效PRACH数据量。
可选地，所述读取模块是设置为：以OFDM符号为处理单元依次从所述PRACH数据缓存中读取待合并的PRACH数据，每接收一个OFDM符号数据就开始数据合并。
可选地，所述合并模块还包括：判断单元，设置为判断是否需对待合并的多个天线的PRACH数据合并和判断是否需要RACH数据合并；第一合并单元，设置为在需对所述多个天线的PRACH数据合并的情况下，根据OFDM符号时间分时对待合并多个天线的PRACH数据合并；第二合并单元，设置为对第一合并单元合并后的PRACH数据内的RACH数据合并。
可选地，所述合并模块还包括：缓存和恢复单元，设置为对于天线间的PRACH数据合并或本天线的PRACH内的RACH数据合并，在当前OFDM符号时间的PRACH数据处理后，缓存现场数据，等待下个OFDM符号的PRACH数据到来后，恢复对应天线的现场数据继续处理。
可选地，所述装置还包括：配置模块，设置为配置本次PRACH数据合并的任务参数。
可选地，所述装置还包括：软件处理模块，设置为对合并后的preamble序列进行FFT、频域母码相关、IFFT和峰值检测处理。
还提供了一种存储介质，所述存储介质中存储有计算机程序，其中，所述计算机程序被设置为运行时实现本公开所述的方法。
还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算 机程序，所述处理器被设置为运行所述计算机程序以实现本公开所述的方法。
附图说明
此处所说明的附图用来提供对本公开的理解，构成本申请的一部分，本公开的示意性实施例及其说明用于解释本公开，并不构成对本公开的不当限定。在附图中：
图1是根据相关技术的天线间PRACH数据合并示意图；
图2是根据相关技术的PRACH内RACH数据合并示意图；
图3是根据本发明实施例的PRACH数据合并方法流程图；
图4是根据本发明可选实施例PRACH数据合并流程示意图；
图5是根据本发明实施例的处理装置示意图；
图6是根据本发明实施例的单天线情况下数据处理示意图；
图7是根据本发明实施例的多天线情况下数据处理示意图；
图8是根据本发明实施例的软件处理模块处理流程示意图；
图9是根据本发明实施例的PRACH数据合并装置结构示意图。
具体实施方式
下文中将参考附图并结合实施例来说明本公开。需要说明的是，在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。
需要说明的是，本公开的说明书和权利要求书及上述附图中的术语“说明书和权利要求等是用于区别类似的对象，而不必用于描述指定的顺序或先后次序。
在本实施例中提供了一种物理随机接入信道的数据合并方法，图3是根据本发明实施例的方法流程图，如图3所示，该流程包括如下步骤：
步骤S301，解析本次PRACH数据合并的任务参数。
步骤S302，从PRACH数据缓存中读取待合并天线的PRACH数据。
步骤S303，根据所述任务参数进行多个天线间的PRACH数据合并和/或天线的PRACH内的前后RACH数据合并。
步骤S304，将合并后的PRACH数据输出至共享缓存。
在本实施例的步骤S301中，所述任务参数至少包括以下之一：PRACH格式、数据合并方式、数据的存储地址、当前正交频分复用(Orthogonal Frequency Division Multiplexing，OFDM)符号中PRACH数据量。
在本实施例的步骤S302中，以OFDM符号为单位依次从天线PRACH数据缓存中读取待合并的PRACH数据，每接收一个OFDM符号数据就启动PRACH数据合并。
在本实施例的步骤S303中，可先判断是否需进行所述多个天线间的PRACH数据合并，如果需要进行所述多个天线间的PRACH数据合并，则根据OFDM符号时间分时对所述多个天线间的PRACH数据合并，再进行天线内的PRACH内的前后RACH数据合并。
在本实施例的步骤S303中，对于天线间或天线内的PRACH数据合并，在当前OFDM符号时间的PRACH数据处理后，缓存现场数据等待下个OFDM符号时间的PRACH数据到来后，恢复对应天线的现场数据继续处理。
在本实施例的步骤S301之前，还可以包括：配置本次PRACH数据合并的任务参数。
在本实施例的步骤S304之后，还可以包括：对合并后的preamble序列进行快速傅里叶变换(Fast Fourier Transform，FFT)、频域母码相关、逆快速傅里叶变换(Inverse Fast Fourier Transform，IFFT)和数据合并峰值检测处理。
在本公开的上述实施例中，可通过任务参数灵活适配多个频点以及多种PRACH格式，可以完成多个不同PRACH的数据处理，从而提高了处理效率。
为了便于对本发明实施例的理解，下面将通过应用场景中的实施例进行描述。
本实施例提供了一种5G NR的PRACH数据合并方法。在本实施例中，能够选择不同天线以及频点数配置情况，同时完成多个频点的PRACH的数据合并。另外，在本实施例中，可以支持不同带宽与不同PRACH格式的组合配置，速度快，节省运算量，节省处理资源和功耗，且具有优良的灵活度和扩展度。
在本实施例中，以OFDM symbol为处理单位，每次处理n个OFDM symbol的PRACH数据(n可根据软件配置)，分时对多个天线的PRACH数据合并。多个天线复用PRACH数据合并模块，顺序完成各自处理。每启动PRACH数据合并前对配置的参数配置解析，获得当前数据合并处理的信息：PRACH Format格式、合并类型、合并的数据量、PRACH频点、当前PRACH已完成的合并数据量等用于合并处理。
如图4所示为本实施例的处理步骤，依次为：配置参数解析、PRACH数据 读取、天线间PRACH数据合并、天线的PRACH内的RACH数据合并、FFT、母码相关、IFFT和峰值检查。
图5为本实施例的处理装置示意图。如图5所示，根据图4每个步骤的特点，本装置分为2个基本模块：硬件加速模块和软件处理模块。
硬件加速模块依次完成配置参数解析、PRACH数据读取、天线间的PRACH数据合并、天线的PRACH内的RACH数据合并。软件处理模块依次完成FFT、频域母码相关、IFFT处理和峰值检查功能。两个模块通过共享缓存进行数据交互。
在本实施例中，PRACH的数据按照OFDM symbol为单位，顺序写入数据存储器中，因此PRACH的数据合并也是以OFDM符号时间为单位处理数据，不会缓存多余数据，以实时响应不同的PRACH格式处理：每接收一个OFDM的数据就开始PRACH数据合并处理，下个OFDM符号的数据可以是不同小区，不同PRACH格式的天线数据。
图6为单天线数据处理示意图，如图6所示，单天线硬件加速模块按OFDM符号时间读PRACH接收的数据，通过软件处理模块控制启动PRACH数据合并处理，然后缓存现场数据，等待下个OFDM符号的数据到来。
图7为多天线数据处理示意图，如图7，当多天线时在一个OFDM符号中有多个天线的PRACH数据合并处理，需要对不同天线PRACH先做天线间数据合并再做天线的PRACH内的RACH数据合并，然后缓存现场数据等待下个OFDM符号的PRACH数据到来，恢复对应天线的现场数据继续处理。最后加速器会输出天线间合并数据结果和RACH合并数据结果，输出到数据缓存由软件完成后续PRACH数据处理。
软件处理模块因为需要完成FFT/IFFT处理，存在数据交织所以不能按照OFDM符号的数据作为处理单元，需要硬件加速模块完成天线的完整的PRACH数据处理后才能启动软件后续处理。
在本公开的上述实施例中，与相关技术相比，对PRACH下变频后的数据合并处理，比完全由软件完成PRACH合并处理效率更高，且比完全由硬件处理可以灵活适配多种PRACH格式，从而节省功耗降低资源消耗，减少处理的时间，改善用户感知。同时在参数选择方面通过软件控制进行处理，因此对5G NR协议的演进可以灵活适应，进而保护投资。
下面分模块对上述实施例中的装置进行描述。
本实施例的装置支持5G NR PRACH协议的多种长码格式以及短码格式。
如图5所示，每个OFDM符号产生一个时间中断，此时参数解析模块从缓 存中得到本次数据处理的任务参数，从任务参数中获得需要的PRACH格式，数据合并的方式，数据的存储地址，当前OFDM符号中的PRACH数据量。
天线间数据合并模块将不同天线间PRACH数据合并，将多个天线各自的PRACH数据对应相加，如果是单天线情况或者是软件设置不做天线间数据合并，就无需数据合并。支持多个天线和不同的PRACH format需要保护合并后的数据以及恢复现场操作。
天线PRACH内的RACH合并单元是将本天线的PRACH内的前后RACH数据对应相加，如果是多个天线可以选择对多个天线做天线间的数据合并，再做天线的PRACH内的RACH数据合并，因为需要保护现场和恢复现场操作。因此保护现场和恢复现场是本装置的核心，以适应5G的协议演进，具有很高的灵活度。
图8所示为软件处理模块的功能示意图。软件处理模块会对一个完整的preamble序列做FFT、频域母码相关、IFFT等后续处理。软件处理模块首先读入硬件加速模块的输出数据，完成FFT运算。FFT生成的频域信号可以根据频谱分布直接提取出多个频点的序列，序列长度为n个点(不同协议有不同的定义)。FFT和IFFT复用一个FFT核，可以完成256点、320点、384点、512点、640点、768点、1024点、1280点、1536点、1920点、2048点、2304点、3072点、3584点、4096点、5120点、6144点、7168点、8192点FFT/IFFT处理。
再完成本地母码生成：根据小区的参数根序列索引，生成每一个根序列对应的Zadoff-Chu序列的DFT变换。
母码相关处理得到的839或者139等不同长度的序列经过补0得到1536或者256点长度的序列，该序列再进行IFFT得到最终的输出结果。最后完成峰值检查功能。
在本公开的上述实施例具有如下技术效果：
1)根据OFDM符号时间分时进行PRACH的数据合并处理，达到实时对5G NR PRACH的数据处理，提高处理性能，减少处理延时，减少软件处理的耗时，提高上行接入性能。
2)通过参数灵活设置可以保持最大程度的灵活性，支持5G的协议演进。具有很强的扩展性，支持多种不同的PRACH格式，支持对不同PRACH要求不同的合并处理。
3)根据不同的产品的规格要求，可以任意采用配置参数，增加处理装置达到规格要求，具有很高的扩展能力。
通过以上的实施方式的描述，本领域的技术人员可以了解到，上述实施例 的方法可借助软件加必需的通用硬件平台的方式来实现，也可以通过硬件来实现。本公开可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括多条指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本公开多个实施例所述的方法。
在本实施例中还提供了一种物理随机接入信道的数据合并装置，该装置用于实现上述实施例及可选实施方式，已经进行过说明的不再赘述。以下所使用的术语“模块”或“单元”可以实现预定功能的软件和/或硬件的组合。
图9是根据本发明实施例的物理随机接入信道的数据合并装置的结构框图，该装置在模块功能的划分上与前文中的装置有所不同，如图9所示，该装置包括解析模块10、读取模块20、合并模块30和输出模块40。
解析模块10设置为解析本次PRACH数据合并的任务参数。
读取模块20设置为从天线PRACH数据缓存中读取待合并的PRACH数据。
合并模块30设置为根据所述任务参数进行多个天线间的PRACH数据合并和/或天线内的PRACH数据合并。
输出模块40设置为将合并后的PRACH数据输出至共享缓存。
在一可选实施例中，所述合并模块30还可以包括判断单元31、第一合并单元32、第二合并单元33和缓存和恢复单元34。
判断单元31设置为判断是否需进行所述多个天线间的PRACH数据合并。第一合并单元32设置为在需进行所述多个天线间的PRACH数据合并的情况下，根据OFDM符号时间分时对所述多个天线间的PRACH数据合并。第二合并单元33，设置为天线的PRACH内的RACH数据合并。缓存和恢复单元34，设置为在当前OFDM符号时间的PRACH数据处理后，缓存现场数据，等待下个OFDM符号时间的PRACH数据到来后，恢复对应天线的现场数据继续处理。
在一可选实施例中，该所述装置还可以包括配置模块50和软件处理模块60。
配置模块50设置为配置本次PRACH数据合并的任务参数。软件处理模块60，设置为对合并后的preamble序列完成FFT、频域母码相关、IFFT和峰值检测处理。
上述多个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述多个模块以任意组合的形式分别位于不同的处理器中。
本公开的实施例还提供了一种存储介质，该存储介质中存储有计算机程序， 该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
可选地，在本实施例中，上述存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，简称为ROM)、随机存取存储器(Random Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等多种可以存储计算机程序的介质。
本公开的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
本领域的技术人员应该明白，上述的本公开的多个模块或多个步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，可选地，它们可以用计算装置可执行的程序代码来实现，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成多个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。本公开不限制于任何指定的硬件和软件结合。

Claims (9)

  1. 一种物理随机接入信道的数据合并方法，包括：
    解析本次物理随机接入信道PRACH数据合并的任务参数；
    从PRACH数据缓存中读取待合并天线的PRACH数据；
    根据所述任务参数进行多个天线间的PRACH数据合并和本天线的PRACH内的RACH数据合并中的至少之一；
    将合并后的数据输出至共享缓存。
  2. 根据权利要求1所述的方法，其中，所述任务参数至少包括以下之一：PRACH格式、数据合并方式、数据的存储地址、当前正交频分复用OFDM符号中的PRACH的数据量。
  3. 根据权利要求1所述的方法，其中，所述从PRACH数据缓存中读取待合并天线的PRACH数据，包括：
    以OFDM符号为单位依次从所述PRACH数据缓存中读取待合并的PRACH数据，每接收一个OFDM符号数据就启动PRACH数据合并处理。
  4. 根据权利要求3所述的方法，其中，所述根据所述任务参数进行多个天线间的PRACH数据合并和本天线的PRACH内的RACH数据合并中的至少之一，包括：
    判断是否需进行所述多个天线间的PRACH数据合并，响应于需要进行所述多个天线间的PRACH数据合并，根据OFDM符号时间分时对待合并的多个天线间的PRACH数据进行合并，再将合并后的PRACH内的RACH数据合并。
  5. 根据权利要求4所述的方法，其中，对于天线间或天线的PRACH内的RACH数据合并，在当前OFDM符号时间的PRACH数据处理后，缓存现场数据，等待下个OFDM符号时间的PRACH数据到来后，恢复对应天线的现场数据继续处理。
  6. 根据权利要求1所述的方法，在解析本次PRACH数据合并的任务参数之前，还包括：
    配置所述本次PRACH数据合并的任务参数。
  7. 根据权利要求1所述的方法，将合并后的PRACH数据输出至共享缓存之后，还包括：
    对合并后的preamble序列进行快速傅里叶变换FFT、频域母码相关、逆快速傅里叶变换IFFT和数据合并峰值检测处理。
  8. 一种计算机可读存储介质，存储有计算机程序，其中，所述计算机程序 被设置为运行时实现权利要求1至7任一项所述的方法。
  9. 一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以实现权利要求1至7任一项所述的方法。
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See also references of EP4048016A4
ZTE CORPORATION, ZTE MICROELECTRONICS: "Random access in NR", 3GPP DRAFT; R2-167831 RANDOM ACCESS IN NR, 3RD GENERATION PARTNERSHIP PROJECT (3GPP), MOBILE COMPETENCE CENTRE ; 650, ROUTE DES LUCIOLES ; F-06921 SOPHIA-ANTIPOLIS CEDEX ; FRANCE, vol. RAN WG2, no. Reno, USA; 20161114 - 20161118, 5 November 2016 (2016-11-05), Mobile Competence Centre ; 650, route des Lucioles ; F-06921 Sophia-Antipolis Cedex ; France, XP051192846 *

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EP4048016A4 (en) 2024-03-20
CN112689335A (zh) 2021-04-20
JP2022553683A (ja) 2022-12-26
JP7410283B2 (ja) 2024-01-09
US20220394774A1 (en) 2022-12-08

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