WO2021057637A1 - 芯片系统、电路及无线通信设备 - Google Patents

芯片系统、电路及无线通信设备 Download PDF

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Publication number
WO2021057637A1
WO2021057637A1 PCT/CN2020/116387 CN2020116387W WO2021057637A1 WO 2021057637 A1 WO2021057637 A1 WO 2021057637A1 CN 2020116387 W CN2020116387 W CN 2020116387W WO 2021057637 A1 WO2021057637 A1 WO 2021057637A1
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WIPO (PCT)
Prior art keywords
circuit
channel
port
fem
chip system
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PCT/CN2020/116387
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English (en)
French (fr)
Inventor
黄腾飞
俞泉
朱松
范保民
夏芳
刘进
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华为技术有限公司
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Publication of WO2021057637A1 publication Critical patent/WO2021057637A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits

Definitions

  • This application relates to the field of circuit technology, and in particular to a chip system, a circuit and a wireless communication device.
  • the wireless communication device in order to realize the data receiving and sending functions of the wireless communication device, is usually provided with a transceiver, a chip system and an antenna, and the chip system is usually arranged between the transceiver and the antenna.
  • the chip system is usually provided with a transmitting path, a receiving path, and a single-pole double-throw switch.
  • the single-pole double-throw switch connects the transmission path with the antenna, and the transceiver transmits the data to be sent to the chip system, and sends the data out through the transmission path and the antenna in the chip system.
  • the single-pole double-throw switch connects the receiving path to the antenna, the antenna receives the data, and sends the received data to the transceiver through the receiving path in the chip system, so that the wireless communication device can pass through the transceiver Data is received.
  • the circuit structure of the above-mentioned chip system is fixed, resulting in poor versatility of the chip system.
  • This application provides a chip system, a circuit and a wireless communication device, which improve the versatility of the chip system.
  • an embodiment of the present application provides a chip system, which includes an antenna port, at least one communication port, and at least two channel circuits corresponding to each communication port.
  • the first end of each channel circuit is connected to the corresponding communication port, the second end of each channel circuit is connected to the antenna port; the third end of each channel circuit is connected to the controller, and each channel circuit is used to receive the controller
  • the sent control signal is used to control the data received or sent by the channel circuit through the antenna port; the control signal is generated by the controller according to the first information and/or the second information of the chip system, and the first information includes at least the following One type: hardware version or country code, and the second information includes at least one of the following: location information, power, rate, or packet error rate.
  • each communication port corresponds to at least two channel circuits, that is, one channel (receiving channel or sending channel) includes at least two channel circuits, so that the chip system can pass through at least two channel circuits
  • different channel circuits process data differently, which in turn makes the data transmission achieve different effects.
  • it can be based on actual needs. (The effect achieved by data transmission is required), controlling the conduction of different channel circuits, so that the chip system can be applied to multiple communication scenarios with different transmission effect requirements, and the versatility of the chip system is improved.
  • the path includes the corresponding communication port and the circuit between the communication port and the antenna port.
  • the transmission path includes a transmission port and a circuit between the transmission port and the antenna port.
  • the receiving path includes the receiving port and the circuit between the receiving port and the antenna port.
  • the data transmission mode adopted by the chip system is time division multiplexing; one of all channel circuits in the chip system receives or sends data through the antenna port.
  • the chip system receives data through only one channel circuit at the same time, or sends data through only one channel circuit, so as to avoid interference between data on different channel circuits during data transmission.
  • the data transmission mode adopted by the chip system is frequency division multiplexing; M channel circuits in all channel circuits in the chip system receive or send data through the antenna port; where 1 ⁇ M ⁇ N, N is the number of communication ports, M is an integer, and N is an integer. When M is greater than or equal to 2, any two channel circuits in the M channel circuits do not correspond to the same communication port.
  • the chip system can receive and/or send data through one or more channel circuits at the same time, so that the data transmission efficiency of the chip system is higher.
  • the channel circuit includes a switch circuit and a peripheral circuit port, where the switch circuit is connected to the controller, and the switch circuit is used to receive control signals; the peripheral circuit port is used to connect to the peripheral circuit, and the same communication port corresponds to The peripheral circuit ports of different channel circuits are used to connect different peripheral circuits.
  • the channel circuit includes the peripheral circuit port, and the peripheral circuit is arranged outside the chip system.
  • the function of the chip system can be changed by changing the peripheral circuit. In this way, the complexity of the circuit in the chip system can be reduced, and the flexibility of the chip system design can also be improved.
  • the channel circuit includes a switch circuit and a peripheral circuit, where the switch circuit is connected to the controller, and the switch circuit is used to receive control signals; the peripheral circuits in different channel circuits are different.
  • the peripheral circuit is set inside the chip system, and there is no need to set the peripheral circuit outside the chip system, which makes the chip system more convenient to use.
  • the at least two channel circuits include a first channel circuit and a second channel circuit, wherein the first channel circuit includes a first switch circuit, the first switch circuit is connected to the controller, and the first switch circuit Used to receive control signals; the second channel circuit includes a second switch circuit and a second peripheral circuit port, the second switch circuit is connected to the controller, the second switch circuit is used to receive control signals, and the second peripheral circuit port is used to connect to the peripheral Circuit.
  • the first channel circuit further includes a first impedance matching circuit, or the first channel circuit further includes a first peripheral circuit port, and the first peripheral circuit port is used to connect to the first impedance matching circuit.
  • the first impedance matching circuit can reduce the attenuation of the signal and improve the performance of signal transmission.
  • the second channel circuit further includes a second impedance matching circuit; or, the second peripheral port circuit is also used to connect to the second impedance matching circuit.
  • the second impedance matching circuit can reduce the attenuation of the signal and improve the performance of signal transmission when the signal is transmitted in the second channel circuit.
  • At least one communication port includes a transmission port, and at least two channel circuits are channel circuits corresponding to the transmission port; the chip system further includes a power amplifier, wherein the power amplifier is connected to the transmission port and the at least two channels respectively. Circuit connection.
  • the power amplifier can perform power amplifying processing on the signal to be transmitted, so that the power for transmitting the signal is higher.
  • At least one communication port includes a receiving port, and at least two channel circuits are channel circuits corresponding to the receiving port; the chip system further includes a low-noise amplifier, wherein the low-noise amplifier is connected to the receiving port and the at least two channels respectively. Channel circuit connection.
  • the low-noise amplifier can process the received signal so that the quality of the processed signal is higher.
  • the at least one communication port includes a sending port and a receiving port
  • the at least two channel circuits include at least two channel circuits corresponding to the sending port and at least two channel circuits corresponding to the receiving port
  • the chip system further includes A power amplifier and a low noise amplifier, wherein the power amplifier is connected to at least two channel circuits corresponding to the transmission port and the transmission port, respectively.
  • the low noise amplifier is respectively connected to the receiving port and at least two channel circuits corresponding to the receiving port.
  • the system chip includes both a transmission path and a reception path. Therefore, both data transmission and data reception can be performed through a system chip.
  • the number of at least one communication port is greater than 1, and the chip system further includes a filter, wherein the first end of the filter is connected to at least two channel circuits; the second end of the filter is connected to the antenna Port connection.
  • the FEM when at least one communication port includes a receiving port and a sending port, the FEM can realize the simultaneous sending and receiving of data.
  • the FEM can be used to simultaneously receive two or more channels of data.
  • two or more channels of data can be sent simultaneously through FEM. Make the data transmission efficiency higher.
  • the chip system further includes a controller.
  • an embodiment of the present application provides a circuit that includes a radio frequency chip and the chip system of any one of the first aspect, the radio frequency chip includes a controller, and the radio frequency chip is used to send data to the communication port, And/or, the radio frequency chip is used to receive data from the communication port.
  • the path includes at least two channel circuits, so that the chip system can receive data through at least two channel circuits, or the chip system can transmit data through at least two channel circuits Different channel circuits are applicable to different communication scenarios. Therefore, the chip system can be applied to multiple communication scenarios, so as to improve the versatility of the chip system, thereby increasing the versatility of the circuit.
  • an embodiment of the present application provides a wireless communication device including the circuit described in the second aspect.
  • the path includes at least two channel circuits, so that the chip system can receive data through at least two channel circuits, or the chip system can transmit data through at least two channel circuits Different channel circuits are applicable to different communication scenarios. Therefore, the chip system can be applied to multiple communication scenarios, so as to improve the versatility of the chip system, thereby improving the versatility of wireless communication devices.
  • the wireless communication device further includes a memory, the memory is connected to the controller, and the information stored in the memory includes the first information.
  • the controller can easily and quickly obtain the obtained first information.
  • the radio frequency chip includes a memory. Arranging the memory inside the radio frequency chip can make the wireless communication device smaller.
  • the wireless communication device further includes a GPS module, which is connected to the controller, where the GPS module is used to obtain location information of the wireless communication device and send the location information to the controller.
  • the controller can easily obtain location information with higher accuracy.
  • each communication port corresponds to at least two channel circuits, that is, at least two channel circuits are included in one channel (receiving channel or sending channel), so that the chip system can pass through At least two channel circuits are used to receive data, or the chip system can transmit data through at least two channel circuits.
  • Different channel circuits process data differently, which in turn makes the effects of data transmission different.
  • FIG. 1A is a schematic diagram of a system architecture provided by an embodiment of this application.
  • FIG. 1B is a schematic diagram of another system architecture provided by an embodiment of this application.
  • FIG. 1C is a schematic diagram of another system architecture provided by an embodiment of the application.
  • FIG. 1D is a schematic diagram of another system architecture provided by an embodiment of this application.
  • FIG. 2 is a schematic diagram of the structure of the FEM provided by an embodiment of the application.
  • FIG. 3 is a schematic structural diagram of a wireless communication device provided by an embodiment of this application.
  • Fig. 4 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FIG. 5 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FIG. 6 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FIG. 7 is a schematic diagram of state switching of a switch circuit provided by an embodiment of the application.
  • FIG. 8 is a schematic diagram of state switching of another switch circuit provided by an embodiment of the application.
  • FIG. 9 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 10 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FIG. 11 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 12 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 13 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 14 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FIG. 15 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 16 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 17 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 18 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 19 is a schematic structural diagram of a circuit provided by an embodiment of this application.
  • FIG. 20 is a schematic structural diagram of another wireless communication device provided by an embodiment of this application.
  • the chip system shown in the embodiments of this application can be applied to wireless communication devices.
  • the wireless communication devices can be routers, mobile phones, computers, TVs, speakers, in-vehicle devices, wearable devices, industrial devices, artificial intelligence devices, and augmented reality (augmented reality (AR) equipment, virtual reality (virtual reality, VR) equipment, etc.
  • the wireless communication device can be applied to a variety of wireless communication networks, for example, wireless fidelity (WiFi) communication networks, Bluetooth communication networks, mobile cellular communication networks, wireless local area networks (WLAN) communication networks, and so on.
  • WiFi wireless fidelity
  • WLAN wireless local area networks
  • the chip system may be a front-end module (FEM).
  • FEM front-end module
  • the system chip is an FEM as an example.
  • FIG. 1A is a schematic diagram of a system architecture provided by an embodiment of the application. Please refer to Fig. 1A, which includes the transceiver 10, the FEM 20 and the antenna 30.
  • the transceiver 10, the FEM 20 and the antenna 30 may be provided in a wireless communication device.
  • the transceiver 10 may include a receiver and/or a transmitter.
  • the hardware corresponding to the receiver and the hardware corresponding to the transmitter may be independent of each other, or the receiver and the transmitter are located in the same
  • the hardware, receiver and transmitter are logically independent.
  • the transmitter can obtain the data generated by the wireless communication device, and transmit the data to the FEM 20, and then send it out via the antenna 30.
  • the antenna 30 can also receive data from other wireless communication devices, and transmit the data to the FEM 20, and then transmit the data to the wireless communication device through the receiver.
  • FEM 20 is used to perform processing such as power amplification and filtering on the data to improve the data transmission performance.
  • the FEM 20 may include a transmit (TX) path and/or a receive (RX) path.
  • TX transmit
  • RX receive
  • the FEM 20 may include a TX channel.
  • the FEM 20 may include an RX channel.
  • the FEM 20 may include a TX path and an RX path, or at least two FEMs 20 are provided in the wireless communication device, of which at least one FEM 20 is Including TX path, at least one FEM 20 includes RX path.
  • FIG. 1B is a schematic diagram of another system architecture provided by an embodiment of this application. Please refer to FIG. 1B, which includes a receiver 40, an FEM 20, and an antenna 30, where the FEM 20 includes an RX path.
  • the receiver 40, the FEM 20 and the antenna 30 may be provided in a wireless communication device.
  • the antenna 30 can receive data sent by other communication devices and send the received data to the RX path, which can filter the data and transmit the processed data to the receiver 40.
  • the wireless communication device can obtain the data sent by other wireless communication devices through the receiver 40.
  • FIG. 1C is a schematic diagram of another system architecture provided by an embodiment of this application. Please refer to FIG. 1C, which includes a transmitter 50, an FEM 20, and an antenna 30, where the FEM 20 includes a TX path.
  • the transmitter 50, the FEM 20, and the antenna 30 may be provided in a wireless communication device.
  • the transmitter 50 can obtain the data generated by the wireless communication device and transmit the data to the FEM 20.
  • the FEM 20 can perform processing such as power amplification and filtering on the data, and transmit the processed data to the antenna 30. So that the antenna 30 transmits the data.
  • FIG. 1D is a schematic diagram of another system architecture provided by an embodiment of this application.
  • FIG. 1D which includes a transmitter 50, a receiver 40, an FEM 20, and an antenna 30, where the FEM 20 includes an RX path, a TX path, and a single-pole double-throw switch.
  • the transmitter 50, the receiver 40, the FEM 20, and the antenna 30 may be provided in a wireless communication device.
  • the single-pole double-throw switch is connected to the TX path.
  • the transmitter 50 can obtain the data generated by the wireless communication device and transmit the data to the FEM 20.
  • the FEM 20 can perform power amplification, filtering and other processing on the data, and
  • the processed data is transmitted to the antenna 30 so that the antenna 30 transmits the data.
  • the single-pole double-throw switch is connected to the RX path.
  • the antenna 30 can receive data sent by other communication devices and send the received data to the RX path.
  • the RX path can filter and process the data.
  • the latter data is transmitted to the receiver 40, so that the wireless communication device can obtain the data sent by other wireless communication devices through the receiver 40.
  • the hardware corresponding to the receiver 40 and the hardware corresponding to the transmitter 50 shown in FIG. 1D may be independent of each other, or the receiver 40 and the transmitter 50 are located on the same hardware, and the receiver 40 and the transmitter 50 are logically independent.
  • the RX path usually includes one channel circuit, and data can only be sent through this one channel circuit.
  • the TX path usually includes one channel circuit, and data can only be received through this one channel circuit.
  • FEM can only receive data through a fixed channel circuit and send data through a fixed channel circuit, which makes FEM only suitable for specific communication scenarios, resulting in poor versatility of FEM.
  • this application designs an FEM.
  • the path (RX path or TX path) in the FEM in this application includes at least two channel circuits, so that the FEM can receive data through at least two channel circuits, or , So that FEM can send data through at least two channel circuits, and different channel circuits are applicable to different communication scenarios. Therefore, FEM can be applied to multiple communication scenarios to improve the versatility of FEM.
  • FIG. 2 is a schematic diagram of the structure of the FEM provided by an embodiment of the application.
  • FEM 20 includes at least one communication port PX, at least two channel circuits X corresponding to each communication port PX, and an antenna port P-ANT.
  • One end of each channel circuit X is connected to the corresponding communication port PX.
  • the other end of each channel circuit X is connected to the antenna port P-ANT.
  • Each channel circuit X is also connected to a controller (not shown in the figure), each channel circuit X is used to receive a control signal sent by the controller, and the control signal is used to control the channel state of the channel circuit X; where the channel state includes In the on state and the off state, at least one of the at least two channel circuits X corresponding to at least one communication port PX at the same time is in the on state, and the control signal is the first information of the controller according to FEM 20 and/ Or generated by the second information.
  • the first information may include one or more of FEM 20's hardware version and country code
  • the second information may include one or more of FEM 20's location information, power, rate (modulation and coding mechanism), or packet error rate.
  • the at least one communication port P-X may include a sending port and/or a receiving port.
  • the sending port is used to connect with the transmitter in the wireless communication device.
  • the receiving port is used to connect with the receiver in the wireless communication device.
  • One communication port P-X corresponds to one channel.
  • the transmitting port corresponds to the TX path, and the TX path includes the transmitting port and the circuit between the transmitting port and the antenna port.
  • the circuit in FEM 20 except for the antenna port is the TX path.
  • the circuit in the frame where the TX path is located is the TX path.
  • the receiving port corresponds to the RX path, and the RX path includes the receiving port and the circuit between the receiving port and the antenna port.
  • the circuit in FEM 20 except for the antenna port is the RX path.
  • the circuit in the frame where the RX path is located is the RX path.
  • the same communication port P-X corresponds to at least two channel circuits, and the same communication port P-X corresponds to at least two communication circuits that are different.
  • each of the at least two channel circuits corresponding to the receiving port is different, and each of the at least two channel circuits corresponding to the transmitting port is different.
  • Different channel circuits may mean that the channel circuit includes different devices, or the connection relationship of the devices included in the channel circuit is different, or the parameters of the devices included in the channel circuit are different.
  • the components included in the channel circuit TX1 are the first switch circuit
  • the components included in the channel circuit TX2 are the second switch circuit and the second peripheral circuit port P2.
  • the channel circuit TX1 and the channel circuit TX2 include The device is different, therefore, the channel circuit TX1 and the channel circuit TX2 are different.
  • the components included in the channel circuit TX1 are the first switch circuit and the first peripheral circuit port P1
  • the components included in the channel circuit TX2 are the second switch circuit and the second peripheral circuit port P2, and the first switch
  • the parameters of the circuit and the second switch circuit are different, and therefore, the channel circuit TX1 and the channel circuit TX2 are different.
  • one communication port P-X corresponds to one channel. Therefore, one communication port P-X corresponds to at least two channel circuits, which can also be understood as at least two channel circuits included in the channel corresponding to the communication port P-X.
  • the different channel circuits process the data differently, which in turn makes the data transmission achieve different effects.
  • the data sent by the wireless communication device passes through the first port corresponding to the sending port.
  • the data transmission rate can be optimized, and when the data sent by the wireless communication device passes through the second channel circuit corresponding to the sending port, the quality of data transmission can be optimized.
  • the antenna port P-ANT is used to connect with the antenna in the wireless communication device.
  • the transmitter of the wireless communication device can transmit the data to be transmitted to the antenna through the transmission port, a channel circuit corresponding to the transmission port, and the antenna port P-ANT, so that the antenna transmits the data.
  • the antenna can also receive data from other wireless communication devices, and transmit the received data to the wireless communication device through the antenna port P-ANT, a channel circuit corresponding to the receiving port, and the communication port.
  • the controller can be set in the FEM 20 or in the radio frequency chip.
  • the radio frequency chip can be a WIFI chip, a Bluetooth chip, a WLAN chip, and so on.
  • the radio frequency chip may also include a radio frequency circuit.
  • the radio frequency circuit may include the transmitter 50 and/or the receiver 40 shown in FIGS. 1A-1D.
  • the number of controllers can be one or more. When the number of controllers is one, the controller can control at least two channel circuits corresponding to each communication port. When the number of controllers is multiple, the number of controllers can be the same as the number of communication ports. That is, the communication ports and the controllers can correspond one to one. Accordingly, one controller can control at least the corresponding communication ports. Two-channel circuit. Alternatively, the number of controllers can also be greater than 1 and less than the number of communication ports. For example, the corresponding relationship between controllers and communication ports can be set. The corresponding relationship can be that one controller corresponds to one or more communication ports, which can be based on actual conditions. The corresponding relationship between the controller and the communication port needs to be set. Accordingly, one controller can control at least two channel circuits corresponding to its corresponding communication port.
  • the controller may obtain the first information and/or the second information of the FEM 20, and generate a control signal according to the first information and/or the second information.
  • the control signal is used to control the channel state of the at least two channel circuits corresponding to the at least one communication port, and the channel state includes the on state and the off state.
  • the channel state of a channel circuit being in the on state means that a channel is formed between the channel circuit and the corresponding communication port and antenna port, and data can be transmitted through the channel.
  • the channel state of a channel circuit being in the disconnected state means that a path is not formed between the channel circuit and the corresponding communication port and antenna port, and data cannot be transmitted through the path.
  • At least one of the at least two channel circuits corresponding to at least one communication port has at most one channel circuit in the on state. For example, if the FEM 20 includes two communication ports, and each communication port corresponds to two channel circuits, then the FEM 20 A total of 4 channel circuits are included in the 4 channel circuits, and at most one channel circuit of the 4 channel circuits is in the conducting state at the same time. For example, suppose that at least one communication port includes a receiving port and a sending port. When sending data, the control signal can control a channel circuit corresponding to the sending port to conduct, and when receiving data, the control signal controls a channel corresponding to the receiving port. The circuit is turned on.
  • FIG. 3 is a schematic structural diagram of a wireless communication device provided by an embodiment of the application.
  • the wireless communication device 90 includes an FEM 20, a radio frequency chip 60, a memory 70, and a global positioning system (global positioning system, GPS) module, and the radio frequency chip 60 includes a controller.
  • the memory 70 may be arranged inside the radio frequency chip 60 or outside the radio frequency chip 60.
  • the memory 70 stores first information and program instructions.
  • the first information and program instructions may also be stored in different memories 70, which are not specifically limited in the embodiment of the present application.
  • the first information may include one or more of the hardware version of FEM 20 and the country code.
  • the first information may be determined when the FEM 20 leaves the factory, and the first information may be stored in the memory 70. Accordingly, the controller may obtain the first information in the memory 70.
  • the country code can be determined according to the country to which the FEM 20 will be sold. If the FEM 20 shipped from the factory is about to be sold to the country A, the country code of the FEM 20 can be determined as the country A.
  • the hardware version refers to the version of the hardware device in FEM 20.
  • the hardware version may include the hardware version number.
  • the second information may include one or more of location information, power, rate (modulation and coding mechanism), or packet error rate of the FEM 20.
  • the power can be transmit power or receive power.
  • the rate can be the sending rate or the receiving rate.
  • the communication port is a transmission port (the communication port corresponding to the TX path)
  • the power may be the transmission power
  • the rate may be the transmission rate.
  • the communication port is the receiving port (the communication port corresponding to the RX path)
  • the power may be the receiving power
  • the rate may be the receiving rate.
  • the second information can be detected by the detection device.
  • the detection device may be the GPS module 80, that is, the location information may be detected by the GPS module 80.
  • the location information can also be determined according to the Internet Protocol (IP) address of the wireless communication device, where there is a preset correspondence between the IP address and the location information.
  • IP Internet Protocol
  • the detection device can be a controller (such as the controller shown in Figure 3).
  • the controller can perform power detection on the signal transmitted by the FEM 20 to obtain the transmission power of the FEM 20, and control
  • the receiver can perform power detection on the signal received by the FEM 20 to obtain the received power of the FEM 20.
  • the controller can obtain the modulation and coding mechanism corresponding to FEM 20 (also referred to as the modulation and coding mechanism corresponding to the wireless communication device where FEM 20 is located), and determine the rate of FEM 20 according to the modulation and coding mechanism corresponding to FEM 20, for example, modulation and coding mechanism There is a preset corresponding relationship between FEM and rate.
  • the controller can determine the rate of FEM 20 according to the modulation and coding mechanism corresponding to FEM 20 and the corresponding relationship.
  • the wireless communication device adopts a coding modulation mechanism for modulation and coding
  • the wireless communication device The currently used modulation and coding mechanism can be written into the configuration file, and the configuration file can be stored in the memory.
  • the controller can obtain the currently used modulation and coding mechanism of the wireless communication device in the memory.
  • the controller may analyze the data packets sent and/or received by the FEM 20 in a preset time period, and determine the packet error rate according to the analysis result.
  • the controller can read the program instructions in the memory 70, and generate a control signal according to the acquired first information and/or second information and the program instructions. It should be noted that, in the following embodiments, the process of generating the control signal by the controller is described, which will not be repeated here.
  • each communication port in the FEM 20 corresponds to at least two channel circuits, that is, one channel (RX channel or TX channel) includes at least two channel circuits, so that the FEM 20 can pass at least Two channel circuits are used for data reception, or FEM 20 can transmit data through at least two channel circuits.
  • Different channel circuits process data differently, which in turn makes the effects of data transmission different.
  • the conduction of different channel circuits can be controlled according to actual needs (the effect achieved by data transmission), so that the FEM 20 can be applied to multiple communication scenarios with different transmission effect requirements, and the versatility of the FEM 20 is improved.
  • FEM 20 may include TX channel and/or RX channel.
  • TX channel and/or RX channel.
  • the structure of the FEM 20 including one TX channel will be described.
  • at least one communication port includes a transmission port.
  • the structure of FEM 20 will be described by taking two channel circuits (the first channel circuit and the second channel circuit) corresponding to the sending port as an example.
  • FIG. 4 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FEM 20 includes transmission port P-TX, power amplifier PA, first channel circuit TX1, second channel circuit TX2, and antenna port P-ANT.
  • the first channel circuit TX1 includes a first switch circuit and a second channel.
  • the circuit TX2 includes a second switch circuit and a second peripheral circuit port P2P2.
  • One end of the power amplifier PA is connected to the transmission port P-TX, the other end of the power amplifier PA is respectively connected to one end of the first switch circuit and the second switch circuit, and the other end of the first switch circuit is connected to the antenna port P-ANT, The other end of the second switch circuit is connected to the second peripheral circuit port P2, and the second peripheral circuit port P2 is also connected to the antenna port P-ANT.
  • the first switch circuit and the second switch circuit are respectively connected to the controller.
  • the first channel circuit TX1 When the state of the first switch circuit is in the on state, the first channel circuit TX1 is a through circuit. In this way, when the signal passes through the first channel circuit TX1, no additional processing is required, so that the signal can be efficiently transmitted through the first channel.
  • the channel circuit TX1 is transmitted to the antenna port P-ANT, and the signal is sent by the antenna.
  • the second channel circuit TX2 includes a peripheral circuit, so that when the signal passes through the second channel circuit TX2, the peripheral circuit can process the signal and combine the processed signal It is transmitted to the antenna port P-ANT, and the signal is sent by the antenna.
  • the peripheral circuit may be a processing circuit that improves signal quality.
  • the peripheral circuit may include a filter or the like. After the signal is processed by the peripheral circuit, the transmission quality of the signal can be made higher.
  • the peripheral circuit includes a filter, signals in a part of the frequency band can also be filtered through the filter to change the operating frequency corresponding to the wireless communication device.
  • the controller can generate the control signal corresponding to each switch circuit, and send the control signal corresponding to the first switch circuit to the first switch circuit, and send the control signal corresponding to the second switch circuit to the second switch circuit, the first switch circuit corresponds to
  • the control signal of can control the state of the first switch circuit
  • the control signal corresponding to the second switch circuit can control the state of the second switch circuit.
  • the states of the first switch circuit and the second switch circuit include an on state and an off state.
  • the channel state of the first channel circuit TX1 is in the on state, and when the state of the first switch circuit is in the off state, the channel state of the first channel circuit TX1 is off status.
  • the state of the second switch circuit is in the on state, the channel state of the second channel circuit TX2 is in the on state, and when the state of the second switch circuit is in the off state, the channel state of the second channel circuit TX2 is off status.
  • the control signal corresponding to the first switch circuit and the control signal corresponding to the second switch circuit sent by the controller may be the same.
  • the first switch circuit is turned on at a low level
  • the second switch circuit is turned on at a high level.
  • the controller can respectively switch to the first switch.
  • the circuit and the second switch circuit send low-level signals.
  • the controller can send high-level signals to the first switch circuit and the second switch circuit respectively.
  • the control signal corresponding to the first switch circuit and the control signal corresponding to the second switch circuit sent by the controller may be different.
  • the first switch circuit is turned on at a low level
  • the second switch circuit is also at a low level.
  • the controller can send a low-level signal to the first switch circuit and a high-level signal to the second switch circuit.
  • the controller can send a high-level signal to the first switch circuit and a low-level signal to the second switch circuit.
  • the TX path includes two channel circuits (the first channel circuit TX1 and the second channel circuit TX2), so that the FEM 20 can transmit data through the two channel circuits.
  • the data processing is different, which makes the effect of data transmission different.
  • the second channel circuit TX2 includes a second peripheral circuit port P2, and the peripheral circuit is set outside the FEM 20. In the actual application process, the peripheral circuit can be set according to actual needs.
  • a filter can be set in the peripheral circuit, and when the signal needs to be transmitted through the second channel circuit TX2 to have a small attenuation, an impedance matching circuit can be set in the peripheral circuit.
  • the peripheral circuit is set outside the FEM 20, and the function of the FEM can be changed by changing the peripheral circuit. In this way, not only the complexity of the circuit in the FEM 20 can be reduced, but the flexibility of FEM design can also be improved.
  • FIG. 5 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FEM 20 includes transmission port P-TX, power amplifier PA, first channel circuit TX1, second channel circuit TX2, and antenna port P-ANT.
  • the first channel circuit TX1 includes a first switch circuit and a second channel.
  • the circuit TX2 includes a second switch circuit and peripheral circuits.
  • One end of the power amplifier PA is connected to the transmission port P-TX
  • the other end of the power amplifier PA is respectively connected to one end of the first switch circuit and the second switch circuit
  • the other end of the first switch circuit is connected to the antenna port P-ANT
  • the other end of the second switch circuit is connected to the peripheral circuit, and the peripheral circuit is also connected to the antenna port P-ANT.
  • the first switch circuit and the second switch circuit are respectively connected to the controller.
  • the TX path includes two channel circuits (the first channel circuit TX1 and the second channel circuit TX2), so that the FEM 20 can transmit data through the two channel circuits.
  • the data processing is different, which makes the effect of data transmission different.
  • the peripheral circuit is set inside the EFM, and there is no need to set the peripheral circuit outside the FEM 20, which makes the FEM 20 more convenient to use.
  • the structure of the switching circuit (the first switching circuit and the second switching circuit) will be described below in conjunction with FIG. 6.
  • FIG. 6 is a schematic structural diagram of another FEM provided by an embodiment of the application. Based on the embodiment shown in FIG. 4, please refer to FIG. 6, the first switching circuit capacitor C1, capacitor C2, inductor L1, and diode D1.
  • the second switch circuit includes a capacitor C3, a capacitor C4, an inductor L2, and a diode D2, respectively.
  • the control signal 1 output by the controller may be low level, and the control signal 2 may be high level.
  • D1 is negatively biased
  • D2 is positively biased.
  • the input impedance from the output of the PA to the second channel circuit is very large, which is equivalent to An open circuit makes the second channel circuit in an off state and the first channel circuit in an on state.
  • the control signal 1 output by the controller may be at a high level, and the control signal 2 may be at a low level.
  • the control signal 1 is high, D1 is positively biased.
  • the control signal 2 is low, D2 is negatively biased.
  • the input impedance from the output of the PA to the first channel circuit is very large, which is equivalent to an open circuit, making the first channel The circuit is in the off state, and the second channel circuit is in the on state.
  • FIG. 6 only illustrates the structure of the switch circuit by way of example, and does not limit the structure of the switch circuit.
  • the structure of the switch circuit may also be other, which is not specifically limited in the embodiment of the present application.
  • the controller obtains the first information and/or the second information of the FEM 20, and generates a control signal according to the first information and/or the second information.
  • the first information may include one or more of FEM 20's hardware version and country code
  • the second information may include one or more of FEM 20's location information, power, rate (modulation and coding mechanism), or packet error rate.
  • the process for the controller to obtain the first information and/or the second information of the FEM 20 can refer to the embodiment shown in FIG. 3, which will not be repeated here.
  • the controller can generate a control signal according to the first information and/or the second information in the following two ways.
  • the controller determines the corresponding transmission requirement according to the first information and/or the second information, and generates a control signal according to the transmission requirement.
  • the transmission demand is the priority of transmission efficiency or transmission quality.
  • different channel circuits in a path correspond to different transmission effects.
  • the transmission effect may be higher transmission efficiency or higher transmission quality.
  • the controller may generate a control signal according to the determined transmission demand, and the control signal is used to control one of the channel circuits to be turned on, and the transmission effect of the turned-on channel circuit matches the transmission demand determined by the controller.
  • the transmission effect of the first channel circuit TX1 is higher transmission efficiency
  • the transmission effect of the second channel circuit TX2 is higher transmission quality.
  • the control signal generated by the controller can control the first channel circuit TX1 to turn on and the second channel circuit TX2 to turn off, So that the signal can be sent through the first channel circuit TX1.
  • the controller determines the corresponding operating frequency according to the first information and/or the second information, and generates a control signal according to the operating frequency.
  • the working frequency may be the transmitting frequency of the signal sent by the antenna, or the receiving frequency of the signal received by the receiver.
  • different channel circuits in a channel may correspond to different operating frequencies.
  • the controller may generate a control signal according to the determined operating frequency.
  • the control signal is used to control one of the channel circuits to be turned on, and the operating frequency of the turned-on channel circuit is consistent with the operating frequency determined by the controller.
  • a filter can be set in the channel circuit, and the working frequency of the channel circuit can be changed through the filter.
  • the filter may perform frequency filtering processing on the signal to be transmitted, so that after the frequency filtering processed signal is transmitted through the antenna, the frequency of the transmitted signal is within the preset frequency range corresponding to the filter.
  • the transmission frequency of the first channel circuit TX1 is frequency range 1
  • the transmission frequency of the second channel circuit TX2 is frequency range 2.
  • the control signal generated by the controller can control the second channel circuit TX2 to turn on and the first channel circuit TX1 to turn off, So that the signal can be sent through the second channel circuit TX2.
  • controller may also generate control information in other ways, which is not specifically limited in the embodiment of the present application.
  • the controller generates a control signal according to the position information in the second information.
  • the location information can indicate the area where the FEM 20 is currently located.
  • the location information can include longitude and latitude, and the area where the FEM 20 is currently located can be determined based on the longitude and latitude.
  • the controller can obtain location information from the GPS module.
  • signal transmission requirements may be different.
  • signal transmission requirements are priority to transmission efficiency
  • area B signal transmission requirements are priority to transmission quality.
  • the corresponding relationship between the area and the transmission demand can be set in advance, and the corresponding relationship can be stored in the memory.
  • the controller can determine the area where the FEM 20 is currently located according to the location information, and obtain the transmission requirements (rate priority or quality priority) corresponding to the area where the FEM 20 is currently located according to the corresponding relationship, and according to the transmission requirements corresponding to the area where the FEM 20 is currently located , Generate control signals.
  • the controller can read the program instructions in the memory and execute the program instructions to realize the generation of the control signal according to the position information and the corresponding relationship.
  • the requirements for the operating frequency may be different.
  • the operating frequency in area A, the operating frequency may range from frequency a to frequency b, and in area B, the operating frequency may range from frequency c to frequency d.
  • the corresponding relationship between the area and the operating frequency can be set in advance, and the corresponding relationship can be stored in the memory.
  • the controller can determine the area where the FEM 20 is currently located according to the location information, obtain the operating frequency corresponding to the area where the FEM 20 is currently located according to the corresponding relationship, and generate a control signal according to the operating frequency corresponding to the area where the FEM 20 is currently located.
  • the controller can read the program instructions in the memory and execute the program instructions to realize the generation of the control signal according to the position information and the corresponding relationship.
  • FIG. 7 is a schematic diagram of state switching of a switch circuit provided by an embodiment of the application. Please refer to Figure 7, including the state of the switching circuit in FEM 20 at time 1 and time 2.
  • FEM 20 is located at position 1, which belongs to area 1.
  • the controller generates control signal 1 corresponding to the first switch circuit and control signal 2 corresponding to the second switch circuit, and sends control signal 1 to the first switch circuit and to the first switch circuit.
  • the two switch circuits send a control signal 2, the control signal 1 is used to control the first switch circuit to turn on, and the control signal 2 is used to control the second switch circuit to turn off.
  • the first switch circuit is turned on and the second switch circuit is turned off, when a signal is transmitted through the FEM 20, the signal is transmitted to the antenna through the transmission port, PA, the first channel circuit, and the antenna interface, and the signal is transmitted by the antenna. Since the first channel circuit is a through path, there is no need to perform additional processing on the signal, so that the signal can be efficiently transmitted through the first channel circuit, and the signal transmission efficiency is high.
  • the controller At time 2, suppose FEM 20 has moved to position 2, and the position belongs to area 2. Assuming that the transmission requirement corresponding to area 2 is quality priority, the controller generates a control signal 3 corresponding to the first switch circuit and a control signal 4 corresponding to the second switch circuit, and sends the control signal 3 to the first switch circuit and sends the control signal 3 to the first switch circuit.
  • the two switch circuits send a control signal 4, the control signal 3 is used to control the first switch circuit to turn off, and the control signal 4 is used to control the second switch circuit to turn on.
  • the signal After the first switch circuit is turned off and the second switch circuit is turned on, when a signal is sent through the FEM 20, the signal is transmitted to the antenna through the transmission port, PA, the second channel circuit, and the antenna interface, and the signal is sent by the antenna. Since the peripheral circuit in the second channel circuit can process the signal, the quality of the processed signal is higher, and therefore, the transmission quality of the signal can be higher.
  • One FEM 20 in the prior art can only be applied to areas with the same transmission requirements, while in this application, the FEM 20 can be applied to areas with multiple different transmission requirements, which improves the versatility of the FEM 20.
  • the FEM 20 can be applied to areas with multiple different transmission requirements, which improves the versatility of the FEM 20.
  • different FEM 20 needs to be designed for area A and area B respectively.
  • the same FEM 20 can be designed, that is, one FEM 20 can be used in area A or area B.
  • controller generates a control signal according to the hardware version in the first information.
  • the hardware version refers to the version of the hardware device in FEM 20.
  • the hardware version may include the hardware version number.
  • the transmission requirements of signals corresponding to different hardware versions may be different.
  • the transmission requirements of the signals corresponding to version 1 are priority to transmission efficiency
  • the transmission requirements of signals corresponding to version 2 are priority to quality.
  • the corresponding relationship between the hardware version and the transmission requirement can be preset, and the corresponding relationship can be stored in the memory.
  • the controller can obtain the transmission requirement (rate priority or quality priority) corresponding to the hardware version according to the corresponding relationship, and generate a control signal according to the transmission requirement.
  • the controller can read the program instructions in the memory and execute the program instructions to realize the generation of control signals according to the hardware version and the corresponding relationship.
  • An FEM 20 structure in the prior art can only be applied to hardware versions corresponding to the same transmission requirements, and in this application, a FEM 20 structure can be applied to hardware versions corresponding to multiple different transmission requirements, and an improved FEM 20 Versatility.
  • a FEM 20 structure can be applied to hardware versions corresponding to multiple different transmission requirements, and an improved FEM 20 Versatility.
  • FEM 20 with different structures for hardware version A and hardware version B respectively.
  • FEM 20 with the same structure can be designed for hardware For version A and hardware version B.
  • controller generates a control signal according to the country code in the first information.
  • country 1’s signal transmission requirements give priority to transmission efficiency
  • country 2’s signal transmission requirements give priority to quality.
  • the corresponding relationship between the country code and the transmission requirement can be set in advance, and the corresponding relationship can be stored in the memory.
  • the controller can obtain the transmission demand corresponding to the country code according to the corresponding relationship, and generate a control signal according to the transmission demand.
  • the controller can read the program instructions in the memory and execute the program instructions to realize the according to the country code. And the corresponding relationship generates a control signal.
  • One FEM 20 in the prior art can only be applied to countries with the same transmission requirements, while in this application, the FEM 20 can be applied to countries with multiple different transmission requirements to improve the versatility of the FEM 20.
  • the FEM 20 can be applied to countries with multiple different transmission requirements to improve the versatility of the FEM 20.
  • different FEM 20 needs to be designed for country A and country B.
  • the same FEM 20 can be designed, that is, one FEM 20 can be used in country A or country B.
  • the operating frequency requirements are different in different countries.
  • the working frequency required by country 1 may be from frequency a to frequency b
  • the working frequency required by country 2 may be from frequency c to frequency d.
  • the corresponding relationship between the country and the operating frequency can be set in advance, and the corresponding relationship can be stored in the memory.
  • the controller can obtain the working frequency corresponding to the country code according to the corresponding relationship, and generate a control signal according to the working frequency.
  • the controller can read the program instructions in the memory and execute the program instructions to realize the according to the country code. And the corresponding relationship generates a control signal.
  • One FEM 20 in the prior art can only be applied to countries that have the same operating frequency requirements.
  • the FEM 20 can be applied to multiple countries that have different operating frequency requirements to improve the versatility of the FEM 20.
  • country A and country B have different requirements for working frequencies
  • different FEM 20 needs to be designed for country A and country B respectively.
  • country A and country B The same FEM 20 can be designed, that is, one FEM 20 can be used in country A or country B.
  • the controller generates a control signal according to the power in the second information.
  • the power of the signal sent by the transmitter may be different, and the transmission requirements for different powers may be different. For example, when the power is less than the preset power threshold, the transmission demand is given priority to transmission efficiency, and when the power is greater than or equal to the preset power threshold, the transmission demand is given priority to the transmission quality.
  • the preset power threshold may be set according to actual needs, and the preset power threshold may be stored in the memory.
  • the controller can obtain the power of the signal sent by the transmitter, and generate a control signal according to the power and the preset power threshold. For example, the controller can read the program instructions in the memory and execute the program instructions to realize the The power of the signal sent by the generator and the preset power threshold generate a control signal.
  • FIG. 8 is a schematic diagram of state switching of another switch circuit provided by an embodiment of the application. Please refer to Figure 8, including the state of the switching circuit in FEM 20 at time 1 and time 2.
  • the signal to be transmitted by the transmitter (connected to the transmitting port, not shown in FIG. 8) is signal 1, and the power of the transmitter transmitting signal 1 is power 1.
  • the controller Assuming that the power 1 is less than the preset power threshold, the controller generates the control signal 1 corresponding to the first switch circuit and the control signal 2 corresponding to the second switch circuit according to the relationship between the power 1 and the preset power threshold, and sends it to the first
  • the switch circuit sends a control signal 1 and a control signal 2 to the second switch circuit.
  • the control signal 1 is used to control the first switch circuit to turn on, and the control signal 2 is used to control the second switch circuit to turn off.
  • the transmitter transmits signal 1 through FEM 20
  • signal 1 is transmitted to the antenna through the transmitting port, PA, first channel circuit and antenna interface, and the signal is transmitted by the antenna 1. Since the first channel circuit is a through path, there is no need to perform additional processing on the signal 1, so that the signal 1 can be efficiently transmitted through the first channel circuit, so that the transmission efficiency of the signal 1 is higher.
  • the signal to be transmitted by the transmitter (connected to the transmission port, not shown in FIG. 7) is signal 2, and the power at which the transmitter transmits signal 2 is power 2.
  • the controller Assuming that the power 2 is greater than the preset power threshold, the controller generates the control signal 3 corresponding to the first switch circuit and the control signal 4 corresponding to the second switch circuit according to the relationship between the power 2 and the preset power threshold, and sends the control signal 4 to the first switch circuit.
  • the switch circuit sends a control signal 3 and a control signal 4 to the second switch circuit.
  • the control signal 3 is used to control the first switch circuit to turn off, and the control signal 4 is used to control the second switch circuit to turn on.
  • the first switch circuit After the first switch circuit is turned off and the second switch circuit is turned on, when the transmitter transmits signal 2 through FEM 20, signal 2 is transmitted to the antenna through the transmitting port, PA, second channel circuit and antenna interface, and the signal is transmitted by the antenna 2. Since the peripheral circuit in the second channel circuit can process the signal 2 so that the quality of the processed signal 2 is higher, the transmission quality of the signal 2 can be made higher.
  • the power in different communication scenarios is usually within a corresponding range, and the power range in different communication scenarios may be different.
  • the communication scene may be an industrial communication scene, a home communication scene, and so on.
  • the power in communication scenario 1 may be in power range 1
  • the power in communication scenario 2 may be in power range 2.
  • different FEMs 20 need to be designed, that is, one FEM 20 can only be applied to power less than the preset power threshold.
  • the communication scenario of the power threshold can only be applied to the communication scenario where the power is greater than or equal to the preset power threshold.
  • the same FEM 20 can be designed, that is, one FEM 20 can be applied to power less than the preset power Threshold communication scenarios can also be applied to communication scenarios with power greater than or equal to the preset power threshold, making FEM 20 more versatile.
  • Another feasible implementation manner generate the control signal according to the rate in the first information.
  • the rate at which the transmitter sends signals may be different, and the transmission requirements for different rates may be different. For example, when the rate is less than the preset rate threshold, the transmission requirement is priority to transmission efficiency, and when the rate is greater than or equal to the preset rate threshold, the transmission requirement is priority to transmission quality.
  • the preset rate threshold may be set according to actual needs, and the preset rate threshold may be stored in the memory.
  • the controller obtains the rate at which the transmitter sends the signal, and generates a control signal according to the rate and the preset rate threshold.
  • the controller can read the program instructions in the memory and execute the program instructions to realize the The rate at which the signal is sent and the preset rate threshold generate a control signal.
  • the state of the switching circuit in FEM 20 is also different.
  • the switching process of the state of the switching circuit in FEM 20 please refer to the switching process of the switching circuit shown in the embodiment of FIG. Go ahead and repeat.
  • the rate in different communication scenarios is usually within the corresponding range, and the rate corresponding to the range in different communication scenarios may be different.
  • the communication scene may be an industrial communication scene, a home communication scene, and so on.
  • the rate in communication scenario 1 may be in rate range 1
  • the rate in communication scenario 2 may be in rate range 2.
  • different FEMs 20 need to be designed, that is, one FEM 20 can only be applied to a rate less than the preset rate threshold.
  • the communication scenario with the rate threshold can only be applied to the communication scenario with the rate greater than or equal to the preset rate threshold.
  • the same FEM 20 can be designed, that is, one FEM 20 can be applied to a rate less than the preset rate Threshold communication scenarios can also be applied to communication scenarios where the rate is greater than or equal to the preset rate threshold, making FEM 20 more versatile.
  • Another feasible implementation manner generate a control signal according to the packet error rate in the first information.
  • the packet error rate refers to the ratio of the number of data packets with errors during transmission to the total number of data packets transmitted. Different packet error rates may correspond to different transmission requirements. For example, when the packet error rate is less than the preset packet error rate threshold, the transmission demand is given priority to transmission efficiency, and when the packet error rate is greater than or equal to the preset packet error rate threshold, the transmission demand is given priority to transmission quality.
  • the preset packet error rate threshold may be set according to actual needs, and the preset packet error rate threshold may be stored in the memory.
  • the controller obtains the packet error rate of the transmitter within a preset period of time before the current time, and generates a control signal according to the packet error rate and the preset packet error rate threshold. For example, the controller can read the packet error rate in the memory Program instructions and execute the program instructions to realize the generation of control signals according to the packet error rate of the signal sent by the transmitter and the preset packet error rate threshold.
  • the state of the switching circuit in FEM 20 is also different.
  • the switching process of the state of the switching circuit in FEM 20 please refer to the switching process of the switching circuit shown in the embodiment of FIG. 8, here Do not repeat it here.
  • the packet error rate in different communication scenarios is usually within the corresponding range, and the packet error rate corresponding to the range in different communication scenarios may be different.
  • the communication scene may be an industrial communication scene, a home communication scene, and so on.
  • the packet error rate in communication scenario 1 may be in the packet error rate range 1
  • the packet error rate in communication scenario 2 may be in the packet error rate range 2.
  • the priority corresponding to each of the foregoing information can be set.
  • the controller can generate a control signal according to the priority of each information. For example, assuming that the second information includes location information and power, and assuming that the priority of the location information is greater than the priority of the power, the controller generates a control signal according to the location information.
  • a first impedance matching circuit may be provided in the first channel circuit, and a second impedance matching circuit may be provided in the second channel circuit.
  • a first impedance matching circuit may be provided in the first channel circuit
  • a second impedance matching circuit may be provided in the second channel circuit.
  • FIG. 9 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • the first channel circuit TX1 also includes a first impedance matching circuit, one end of the first impedance matching circuit is connected to the first switch circuit, and the other of the first impedance matching circuit One end is connected to the antenna port P-ANT.
  • the second channel circuit TX2 also includes a second impedance matching circuit, one end of the second impedance matching circuit is connected to the second switch circuit, and the other end of the second impedance matching circuit is connected to the second peripheral circuit port P2.
  • FIG. 10 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • the first channel circuit TX1 also includes a first peripheral circuit port, the first peripheral circuit port is used to connect to the first impedance matching circuit, and the first impedance matching circuit is located at FEM 20 external.
  • the second channel circuit TX2 also includes a second impedance matching circuit, the second impedance matching circuit is connected to the second peripheral circuit port P2, and the second impedance matching circuit is located outside the FEM 20.
  • the circuit complexity of the FEM 20 can be reduced, and the first impedance matching circuit and the second impedance matching circuit can also be designed according to actual needs.
  • the first impedance matching circuit can be changed according to actual needs, so that the first channel circuit TX1 can achieve different impedance matching effects, or the second impedance matching circuit can be changed according to actual needs, so that the second channel circuit TX2 can achieve Different impedance matching effects make the circuit design more flexible.
  • the first impedance matching circuit may be composed of one or more of resistors, capacitors, and inductors. In the process of signal transmission in the first channel circuit, the first impedance matching circuit can reduce the attenuation of the signal.
  • the second impedance matching circuit may be composed of one or more of resistors, capacitors, and inductors. In the process of signal transmission in the second channel circuit, the second impedance matching circuit can reduce the attenuation of the signal.
  • Figures 9-10 are only examples of the structure of FEM 20, and are not a limitation on the structure of FEM 20.
  • the first impedance matching circuit can be set inside FEM 20, and the second impedance matching circuit is set Outside the FEM 20, or alternatively, the first impedance matching circuit may be arranged inside the FEM 20, and the second impedance matching circuit may be arranged outside the FEM 20.
  • the connection sequence between the transmitting port, the PA, the first channel circuit, the second channel circuit, and the antenna port can also be other.
  • the PA can also be set between the first channel circuit, the second channel circuit and the antenna port.
  • the number of PAs can also be two, which are respectively denoted as the first PA and the second PA. One end of the first PA is connected to the transmission port, the other end of the first PA is connected to the first switch circuit, and the second PA is One end is connected to the transmitting port, and the other end of the second PA is connected to the second switch circuit.
  • the FEM 20 may also include other paths.
  • the FEM 20 may also include the RX path in the prior art, or as shown in Figs. 11-14 below. RX path.
  • At least one communication port includes a receiving port.
  • the structure of FEM 20 will be described by taking two channel circuits (the first channel circuit and the second channel circuit) corresponding to the sending port as an example.
  • FIG. 11 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FEM 20 includes a receiving port P-RX, a low noise amplifier LNA, a first channel circuit RX1, a second channel circuit RX2, and an antenna port P-ANT.
  • the first channel circuit RX1 includes a first switch circuit, and a second channel circuit RX2.
  • the channel circuit RX2 includes a second switch circuit and a second peripheral circuit port P2.
  • One end of the low noise amplifier LNA is connected to the receiving port P-RX, the other end of the low noise amplifier LNA is respectively connected to one end of the first switch circuit and the second switch circuit, and the other end of the first switch circuit is connected to the antenna port P-ANT Connected, the other end of the second switch circuit is connected to the second peripheral circuit port P2, and the second peripheral circuit port P2 is also connected to the antenna port P-ANT.
  • the first switch circuit and the second switch circuit are respectively connected to the controller.
  • FIG. 12 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • FEM 20 includes receiving port P-RX, low noise amplifier LNA, first channel circuit RX1 and antenna port P-ANT.
  • the first channel circuit RX1 includes a first switch circuit
  • the second channel circuit RX2 includes a second channel. Switch circuit and peripheral circuit.
  • One end of the low noise amplifier LNA is connected to the receiving port P-RX
  • the other end of the low noise amplifier LNA is respectively connected to one end of the first switch circuit and the second switch circuit
  • the other end of the first switch circuit is connected to the antenna port P-ANT Connected
  • the other end of the second switch circuit is connected to the peripheral circuit
  • the peripheral circuit is also connected to the antenna port P-ANT.
  • the first switch circuit and the second switch circuit are respectively connected to the controller.
  • FIG. 13 is a schematic structural diagram of yet another FEM provided by an embodiment of the application. Based on the FEM 20 shown in FIG. 11, the first channel circuit RX1 further includes a first impedance matching circuit, and the second channel circuit RX2 further includes a second impedance matching circuit.
  • FIG. 14 is a schematic structural diagram of another FEM provided by an embodiment of the application.
  • the first channel circuit RX1 further includes a first peripheral circuit port, the first peripheral circuit port is used to connect to the first impedance matching circuit, and the first impedance matching circuit is located outside the FEM 20.
  • the second peripheral circuit port P2 is also used to connect a second impedance matching circuit, and the second impedance matching circuit is located outside the FEM 20.
  • the process of acquiring the first information and/or the second information by the controller can refer to the embodiment shown in FIG. 3.
  • the controller generates the information according to the first information and/or the second information.
  • the process of the control signal can be referred to the above-mentioned embodiment, which will not be repeated here.
  • first channel circuit in the embodiment of FIGS. 11-14 is not the same channel circuit as the first channel circuit in FIGS. 4-10, and the same description is used for ease of description.
  • second channel circuit in the embodiment of FIGS. 11-14 is not the same channel circuit as the first channel circuit in FIGS. 4-10.
  • the first switching circuit in the embodiment of FIGS. 11-14 and the first switching circuit in FIGS. 4-10 are not the same switching circuit.
  • the second switching circuit in the embodiment of FIGS. 11-14 is not the same switching circuit as the second switching circuit in FIGS. 4-10.
  • the first peripheral circuit interface in the embodiments of FIGS. 11-14 and the first peripheral circuit interface in FIGS. 4-10 are not the same interface.
  • the second peripheral circuit interface in the embodiments of FIGS. 11-14 and the second peripheral circuit interface in FIGS. 4-10 are not the same interface.
  • the FEM 20 may also include other paths.
  • the FEM 20 may also include the RX path in the prior art, or the above-mentioned embodiment shown in Figs. The TX path shown.
  • FEM 20 When FEM 20 includes one TX channel and one RX channel, at least one communication port includes a sending port and a receiving port. In this case, the FEM 20 includes the circuits in the TX path shown in any of the embodiments of FIGS. 4 to 5 and 9 to 10, and the circuit in the RX path shown in any of the embodiments of FIGS. 11 to 14.
  • a structure of FEM 20 including one TX channel and one RX channel is introduced.
  • FIGS. 11-14 are only examples of the structure of the FEM 20, and are not a limitation on the structure of the FEM 20.
  • the first impedance matching circuit can be arranged inside the FEM 20, and the second impedance matching circuit is arranged Outside the FEM 20, or alternatively, the first impedance matching circuit may be arranged inside the FEM 20, and the second impedance matching circuit may be arranged outside the FEM 20.
  • the connection sequence between the transmitting port, the LNA, the first channel circuit, the second channel circuit, and the antenna port can also be other.
  • the LNA can also be arranged between the first channel circuit, the second channel circuit and the antenna port. .
  • the number of LNAs can also be two, denoted as the first LNA and the second LNA, one end of the first LNA is connected to the receiving port, the other end of the first LNA is connected to the first switch circuit, and the second LNA One end is connected to the receiving port, and the other end of the second LNA is connected to the second switch circuit.
  • FIG. 15 is a schematic structural diagram of yet another FEM provided by an embodiment of the application. Please refer to FIG. 15, including the circuit in the TX path shown in FIG. 9 and the circuit in the RX path shown in FIG. For the connection relationship and working process, please refer to the above-mentioned embodiment, which will not be repeated here. It should be noted that when the FEM 20 includes the TX path and the RX path, the FEM 20 may include the TX path in any embodiment of FIGS. 4-10 and the RX path in any embodiment of FIGS. 11-14.
  • the data transmission method adopted by FEM is time division multiplexing. In other words, at a time, there is usually only one channel among the RX1 channel circuit, the RX2 channel circuit, the TX1 channel circuit, and the TX2 channel circuit. The circuit is turned on.
  • the data transmission mode adopted by FEM is time division multiplexing, or frequency division multiplexing.
  • the data transmission method adopted by FEM is time division multiplexing
  • one of all channel circuits in FEM receives or sends data through the antenna port.
  • all channel circuits in FEM exist at most A channel circuit receives or sends data through an antenna port.
  • M channel circuits in all channel circuits in the chip system receive or send data through antenna ports; among them, 1 ⁇ M ⁇ N, N is the number of communication ports, M is an integer and N is an integer.
  • M is greater than or equal to 2
  • any two channel circuits in the M channel circuits do not correspond to the same communication port.
  • at most one of the at least two channel circuits corresponding to the communication port can receive or send data through the antenna port.
  • FIG. 16 is a schematic structural diagram of another FEM provided by an embodiment of the application. Please refer to Figure 16, including the circuit in the TX path shown in Figure 9, the circuit in the RX path shown in Figure 13, and the filter. The first end of the filter is connected to the RX1 channel circuit, the RX2 channel circuit, and the TX1 channel circuit. Connect to the TX2 channel circuit, and the other end of the filter is connected to the antenna port P-ANT.
  • the connection relationship and working process of the components in the TX path and the RX path can be referred to the above-mentioned embodiments, which will not be repeated here.
  • the FEM 20 may include the TX path in any embodiment of FIGS. 4-10 and the RX path in any embodiment of FIGS. 11-14.
  • the data transmission mode adopted by FEM may be time division multiplexing or frequency division multiplexing.
  • the data transmission method adopted by FEM is usually time division multiplexing.
  • the data transmission method used by FEM is usually frequency division multiplexing.
  • the data transmission mode adopted by FEM is time division multiplexing
  • the filter can filter the transmitted data.
  • the filter can also perform filtering processing on the received data to achieve the limitation of the frequency of the received data within the frequency range corresponding to the RX path.
  • the FEM may also include two or more receiving channels, or the FEM may also include two or more sending channels.
  • the FEM includes two receiving channels as an example for description.
  • FIG. 17 is a schematic structural diagram of yet another FEM provided by an embodiment of the application.
  • FIG. 17 includes the circuits and filters in the two RX paths shown in Figure 13 (represented as RX path 1 and RX path 2).
  • the first end of the filter is connected to the RX11 channel circuit and the RX12 channel circuit
  • the RX21 channel circuit is connected to the RX22 channel circuit
  • the other end of the filter is connected to the antenna port P-ANT.
  • the connection relationship and working process of the components in the RX path 1 and the RX path 2 can be referred to the above-mentioned embodiment, which will not be repeated here.
  • the RX path included in the FEM 20 may be the RX path in any of the embodiments in FIGS. 11-14.
  • the data transmission mode adopted by FEM may be time division multiplexing or frequency division multiplexing.
  • the data transmission method adopted by FEM is usually time division multiplexing.
  • the data transmission method adopted by FEM is usually frequency division multiplexing.
  • the data transmission mode adopted by FEM is time division multiplexing
  • the data transmission method adopted by FEM is frequency division multiplexing
  • the frequency corresponding to RX channel 1 and the frequency corresponding to RX channel 2 are different.
  • data can be received through RX channel 1 and RX channel 2 at the same time.
  • the filter can perform data reception on the received data.
  • the first filtering process is to obtain data with a frequency in the frequency range corresponding to RX channel 1, and transmit the data to RX channel 1.
  • the filter can also perform a second filtering process on the received data to obtain the frequency in the RX channel.
  • the data in the frequency range corresponding to channel 2 is transmitted to the RX channel 2.
  • the FEM includes multiple (more than 2) receiving channels
  • the structure and working process of the FEM can be seen in FIG. 17, and details are not described here.
  • the structure and working process of the FEM can be seen in FIG. 17, which will not be repeated here.
  • FIG. 18 is a schematic structural diagram of another FEM provided by an embodiment of the application. On the basis of the embodiment shown in FIG. 4, please refer to FIG. 18.
  • the FEM 20 also includes a controller.
  • the function of the controller shown in the embodiment of FIG. 18 is the same as the function of the controller in the above-mentioned embodiment and the connection relationship with each component in the FEM 20, which will not be repeated here.
  • FIG. 19 is a schematic structural diagram of a circuit provided by an embodiment of the application. 19, the circuit 100 includes the FEM 20 and the radio frequency chip 60 shown in any of the above embodiments, the radio frequency chip 50 includes the controller shown in any of the above embodiments, the radio frequency chip is used to send data to the communication port, and/or , The radio frequency chip is used to receive data from the communication port.
  • the radio frequency chip 60 refer to the description of the radio frequency chip in the embodiment of FIG. 3, which will not be repeated here.
  • FIG. 20 is a schematic structural diagram of another wireless communication device according to an embodiment of this application.
  • the wireless communication device 90 includes the circuit 100 shown in the embodiment of FIG. 19, that is, the wireless communication device 90 includes an FEM 20 (the FEM 20 shown in any of the foregoing embodiments) and a radio frequency chip 60.
  • the wireless communication device 90 further includes a memory 70 connected to the controller, and the information stored in the memory 70 includes the first information.
  • the memory 70 can also be provided outside the radio frequency chip 60.
  • the wireless communication device 90 may also include a GPS module 80.
  • the GPS module 80 is used to obtain location information of the wireless communication device and send the location information to the controller.
  • the term “include” and its variations may mean non-limiting inclusion; the term “or” and its variations may mean “and/or”.
  • the terms “first”, “second”, etc. in this application are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence.
  • “plurality” means two or more.
  • “And/or” describes the association relationship of the associated objects, indicating that there can be three types of relationships, for example, A and/or B, which can mean: A alone exists, A and B exist at the same time, and B exists alone.
  • the character “/” generally indicates that the associated objects before and after are in an "or” relationship.

Abstract

本申请实施例提供一种芯片系统、电路及无线通信设备，该芯片系统包括：天线端口、至少一个通信端口、每个通信端口对应的至少两条通道电路，其中，每条通道电路的第一端与对应的通信端口连接，每条通道电路的第二端与天线端口连接；每条通道电路的第三端与控制器连接，每条通道电路用于接收控制器发送的控制信号，控制信号用于控制通道电路通过天线端口接收或者发送的数据；控制信号为控制器根据芯片系统的第一信息和/或第二信息生成的，第一信息包括如下至少一种：硬件版本或国家码，第二信息包括如下至少一种：位置信息、功率、速率或误包率。提高了芯片系统的通用性。

Description

芯片系统、电路及无线通信设备
本申请要求于2019年09月29日提交中国专利局、申请号为201910935565.1、申请名称为“芯片系统、电路及无线通信设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电路技术领域，尤其涉及一种芯片系统、电路及无线通信设备。
背景技术
在无线通信系统中，无线通信设备为了实现数据的接收和发送功能，无线通信设备中通常设置有收发器、芯片系统和天线，芯片系统通常设置在收发器和天线之间。
芯片系统中通常设置有发送通路、接收通路和单刀双掷开关。当无线通信设备发送数据时，单刀双掷开关将发送通路与天线接通，收发器将待发送的数据传输至芯片系统，经过芯片系统中的发送通路和天线将数据发送出去。当无线通信设备接收数据时，单刀双掷开关将接收通路和天线接通，天线接收数据，并将接收到的数据通过芯片系统中的接收通路发送至收发器，以使无线通信设备通过收发器接收到数据。然而，上述芯片系统的电路结构固定，导致芯片系统的通用性差。
发明内容
本申请提供一种芯片系统、电路及无线通信设备，提高了芯片系统的通用性。
第一方面，本申请实施例提供一种芯片系统，该芯片系统包括：天线端口、至少一个通信端口、每个通信端口对应的至少两条通道电路。每条通道电路的第一端与对应的通信端口连接，每条通道电路的第二端与天线端口连接；每条通道电路的第三端与控制器连接，每条通道电路用于接收控制器发送的控制信号，控制信号用于控制通道电路通过所述天线端口接收或者发送的数据；控制信号为控制器根据芯片系统的第一信息和/或第二信息生成的，第一信息包括如下至少一种：硬件版本或国家码，第二信息包括如下至少一种：位置信息、功率、速率或误包率。
在本申请所示的芯片系统中，每个通信端口对应至少两条通道电路，即，一条通路(接收通路或者发送通路)中至少包括两条通道电路，使得芯片系统可以通过至少两条通道电路进行数据接收，或者，使得芯片系统可以通过至少两条通道电路进行数据发送，不同通道电路对数据进行的处理不同，进而使得数据传输所达到的效果不同，在实际应用过程中，可以根据实际需求(需要数据传输所达到的效果)，控制不同的通道电路导通，使得芯片系统可以适用于多个具有不同传输效果需求的通信场景，提高了芯片系统的通用性。
通路包括对应的通信端口、以及该通信端口与天线端口之间的电路。例如，发送通路包括发送端口、以及发送端口和天线端口之间的电路。接收通路包括接收端口、以及接收端口和天线端口之间的电路。
在一种可能的实施方式中，芯片系统采用的数据传输方式为时分复用；所述芯片系统 中的所有通道电路中的一条通道电路通过所述天线端口接收或者发送的数据。在上述过程中，芯片系统在同一时刻仅通过一条通道电路接收数据，或者仅通过一条通道电路发送数据，避免数据传输过程中，不同通道电路上的数据之间产生干扰。
在另一种可能的实施方式中，芯片系统采用的数据传输方式为频分复用；芯片系统中的所有通道电路中的M条通道电路通过天线端口接收或者发送数据；其中，1≤M≤N，N为通信端口的数量，M为整数，N为整数，当M大于或等于2时，M条通道电路中任意两条通道电路不对应同一个通信端口。在上述过程中，芯片系统在同一时刻可以通过一条或多条通道电路进行数据接收和/或发送，使得芯片系统的数据传输效率较高。
在一种可能的实施方式中，通道电路包括开关电路和外围电路端口，其中，开关电路与控制器连接，开关电路用于接收控制信号；外围电路端口用于连接外围电路，同一通信端口对应的不同通道电路的外围电路端口用于连接不同的外围电路。
在上述过程中，通道电路包括外围电路端口，外围电路设置在芯片系统的外部。在实际应用过程中，通过改变外围电路，即可改变芯片系统的功能，这样，不但可以降低芯片系统中电路的复杂性，还可以提高对芯片系统设计的灵活性。
在一种可能的实施方式中，通道电路包括开关电路和外围电路，其中，开关电路与控制器连接，开关电路用于接收控制信号；不同通道电路中的外围电路不同。
在上述过程中，外围电路设置在芯片系统的内部，无需在芯片系统外部再设置外围电路，使得芯片系统的使用便捷性较高。
在一种可能的实施方式中，至少两条通道电路包括第一通道电路和第二通道电路，其中，第一通道电路包括第一开关电路，第一开关电路与控制器连接，第一开关电路用于接收控制信号；第二通道电路包括第二开关电路和第二外围电路端口，第二开关电路与控制器连接，第二开关电路用于接收控制信号，第二外围电路端口用于连接外围电路。
在一种可能的实施方式中，第一通道电路还包括第一阻抗匹配电路，或者，第一通道电路还包括第一外围电路端口，第一外围电路端口用于连接第一阻抗匹配电路。
在上述过程中，在信号在第一通道电路进行传输的过程中，第一阻抗匹配电路可以减小信号的衰减，提高了信号传输的性能。
在一种可能的实施方式中，第二通道电路还包括第二阻抗匹配电路；或者，第二外围端口电路还用于连接第二阻抗匹配电路。
在上述过程中，在信号在第二通道电路进行传输的过程中，第二阻抗匹配电路可以减小信号的衰减，提高了信号传输的性能。
在一种可能的实施方式中，至少一个通信端口包括发送端口，至少两条通道电路为发送端口对应的通道电路；芯片系统还包括功率放大器，其中，功率放大器分别与发送端口和至少两条通道电路连接。
在上述过程中，功率放大器可以对待发送的信号进行功率放大处理，使得对信号进行发送的功率较高。
在一种可能的实施方式中，至少一个通信端口包括接收端口，至少两条通道电路为接收端口对应的通道电路；芯片系统还包括低噪声放大器，其中，低噪声放大器分别与接收端口和至少两条通道电路连接。
在上述过程中，低噪声放大器可以对接收到的信号进行处理，使得处理后的信号的质 量较高。
在一种可能的实施方式中，至少一个通信端口包括发送端口和接收端口，至少两条通道电路包括发送端口对应的至少两条通道电路和接收端口对应的至少两条通道电路；芯片系统还包括功率放大器和低噪声放大器，其中，功率放大器分别与发送端口和发送端口对应的至少两条通道电路连接。低噪声放大器分别与接收端口和接收端口对应的至少两条通道电路连接。
在上述过程中，系统芯片中既包括发送通路也包括接收通路，因此，通过一个系统芯片既可以进行数据发送，也可以进行数据接收。
在一种可能的实施方式中，至少一个通信端口的个数大于1，芯片系统还包括滤波器，其中，滤波器的第一端与至少两条通道电路连接；滤波器的第二端与天线端口连接。
在上述过程中，当至少一个通信端口中包括接收端口和发送端口时，则通过FEM可以实现数据的同时发送和接收。当至少一个通信端口中包括两个或多个接收端口时，则通过FEM可以实现同时接收两路或者多路数据。当至少一个通信端口中包括两个或多个发送端口时，则通过FEM可以实现同时发送两路或者多路数据。使得数据的传输效率较高。
在一种可能的实施方式中，芯片系统还包括控制器。
第二方面，本申请实施例提供一种电路，该电路中包括射频芯片和第一方面任一项的芯片系统，射频芯片包括控制器，所述射频芯片用于向所述通信端口发送数据，和/或，所述射频芯片用于从所述通信端口接收数据。
在上述过程中，通路(接收通路或者发送通路)中至少包括两条通道电路，使得芯片系统可以通过至少两条通道电路进行数据接收，或者，使得芯片系统可以通过至少两条通道电路进行数据发送，不同的通道电路所适用的通信场景不同，因此，可以使得芯片系统可以适用于多种通信场景，以提高芯片系统的通用性，进而提高了电路的通用性。
第三方面，本申请实施例提供一种无线通信设备，包括第二方面所述的电路。
在上述过程中，通路(接收通路或者发送通路)中至少包括两条通道电路，使得芯片系统可以通过至少两条通道电路进行数据接收，或者，使得芯片系统可以通过至少两条通道电路进行数据发送，不同的通道电路所适用的通信场景不同，因此，可以使得芯片系统可以适用于多种通信场景，以提高芯片系统的通用性，进而提高了无线通信设备的通用性。
在一种可能的实施方式中，无线通信设备还包括存储器，存储器与控制器连接，存储器中存储的信息包括第一信息。通过将第一信息存储至存储器，使得控制器可以方便快捷的获取得到的第一信息。
在一种可能的实施方式中，射频芯片包括存储器。将存储器设置在射频芯片内部，可以使得无线通信设备的体积较小。
在一种可能的实施方式中，无线通信设备还包括GPS模块，GPS模块与控制器连接，其中，GPS模块用于获取无线通信设备的位置信息，并向控制器发送位置信息。这样，可以使得控制器可以方便的获取准确性较高的位置信息。
本申请实施例提供的芯片系统、电路及无线通信设备，每个通信端口对应至少两条通道电路，即，一条通路(接收通路或者发送通路)中至少包括两条通道电路，使得芯片系统可以通过至少两条通道电路进行数据接收，或者，使得芯片系统可以通过至少两条通道电路进行数据发送，不同通道电路对数据进行的处理不同，进而使得数据传输所达到的效 果不同，在实际应用过程中，可以根据实际需求(需要数据传输所达到的效果)，控制不同的通道电路导通，使得芯片系统可以适用于多个具有不同传输效果需求的通信场景，提高了芯片系统的通用性。
附图说明
图1A为本申请实施例提供一种系统架构示意图；
图1B为本申请实施例提供的另一种系统架构示意图；
图1C为本申请实施例提供的又一种系统架构示意图；
图1D为本申请实施例提供的又一种系统架构示意图；
图2为本申请实施例提供的FEM的结构示意图；
图3为本申请实施例提供的一种无线通信设备的结构示意图；
图4为本申请实施例提供的另一种FEM的结构示意图；
图5为本申请实施例提供的又一种FEM的结构示意图；
图6为本申请实施例提供的又一种FEM的结构示意图；
图7为本申请实施例提供的一种开关电路的状态切换示意图；
图8为本申请实施例提供的另一种开关电路的状态切换示意图；
图9为本申请实施例提供的又一种FEM的结构示意图；
图10为本申请实施例提供的另一种FEM的结构示意图；
图11为本申请实施例提供的又一种FEM的结构示意图；
图12为本申请实施例提供的又一种FEM的结构示意图；
图13为本申请实施例提供的再一种FEM的结构示意图；
图14为本申请实施例提供的另一种FEM的结构示意图；
图15为本申请实施例提供的再一种FEM的结构示意图；
图16为本申请实施例提供的又一种FEM的结构示意图；
图17为本申请实施例提供的再一种FEM的结构示意图
图18为本申请实施例提供的又一种FEM的结构示意图；
图19为本申请实施例提供的一种电路的结构示意图；
图20为本申请实施例提供的另一种无线通信设备的结构示意图。
具体实施方式
本申请实施例所示的芯片系统可以应用于无线通信设备，例如，无线通信设备可以为路由器、手机、电脑、电视、音箱、车载设备、可穿戴设备、工业设备、人工智能设备、增强现实(augmented reality，AR)设备、虚拟现实(virtual reality，VR)设备等。无线通信设备可以适用多种无线通信网络，例如，无线保真(wireless fidelity，WiFi)通信网络、蓝牙通信网络、移动蜂窝通信网络、无线局域网(wireless local area networks，WLAN)通信网络等。
芯片系统可以为前端模块(front-end module，FEM)，为了便于描述，在下文中，以系统芯片为FEM为例进行说明。
为了便于理解，下面，结合图1A-图1D，对FEM所在的系统架构进行说明。
图1A为本申请实施例提供一种系统架构示意图。请参见图1A，包括收发器10、FEM 20和天线30。收发器10、FEM 20和天线30可以设置在无线通信设备中。收发器10可以包括接收器和/或发送器，当收发器10包括接收器和发送器时，接收器对应的硬件和发送器对应的硬件可以相互独立，或者，接收器和发送器位于相同的硬件，接收器和发送器逻辑上独立。发送器可以获取无线通信设备生成的数据，并将数据传输至FEM 20，再经过天线30发送出去。天线30还可以接收来自其它无线通信设备的数据，并将数据传至FEM 20，再经过接收器传输至无线通信设备。在数据收发的过程中，FEM 20用于对数据进行功率放大、滤波等处理，以提高数据的传输性能。
在实际应用过程中，FEM 20可以包括发送(transport，TX)通路和/或接收(receive，RX)通路。当FEM 20所在的无线通信设备具有数据发送功能时，则FEM 20中可以包括TX通路。当FEM 20所在的无线通信设备具有数据接收功能时，则FEM 20中可以包括RX通路。当FEM 20所在的无线通信设备具有数据发送功能和数据接收功能时，则FEM 20中可以包括TX通路和RX通路，或者，无线通信设备中设置至少两个FEM 20，其中，至少一个FEM 20中包括TX通路，至少一个FEM 20中包括RX通路。
下面，结合图1B-图1D，对多种不同的结构下的FEM 20所在的系统结构进行说明。
图1B为本申请实施例提供的另一种系统架构示意图。请参见图1B，包括接收器40、FEM 20和天线30，其中，FEM 20包括RX通路。接收器40、FEM 20和天线30可以设置在无线通信设备中。在实际应用过程中，天线30可以接收其它通信设备发送的数据，并将接收到的数据发送给RX通路，RX通路可以对数据进行滤波等处理，并将处理后的数据传输至接收器40，以使无线通信设备通过接收器40获取得到其它无线通信设备发送的数据。
图1C为本申请实施例提供的又一种系统架构示意图。请参见图1C，包括发送器50、FEM 20和天线30，其中，FEM 20包括TX通路。发送器50、FEM 20和天线30可以设置在无线通信设备中。在实际应用过程中，发送器50可以获取无线通信设备生成的数据，并将数据传输至FEM 20，FEM 20可以对数据进行功率放大、滤波等处理，并将处理后的数据传输至天线30，以使天线30发送该数据。
图1D为本申请实施例提供的又一种系统架构示意图。请参见图1D，包括发送器50、接收器40、FEM 20和天线30，其中，FEM 20包括RX通路、TX通路和单刀双掷开关。发送器50、接收器40、FEM 20和天线30可以设置在无线通信设备中。在数据发送过程中，单刀双掷开关与TX通路连通，发送器50可以获取无线通信设备生成的数据，并将数据传输至FEM 20，FEM 20可以对数据进行功率放大、滤波等处理，并将处理后的数据传输至天线30，以使天线30发送该数据。在数据接收过程中，单刀双掷开关与RX通路连通，天线30可以接收其它通信设备发送的数据，并将接收到的数据发送给RX通路，RX通路可以对数据进行滤波等处理，并将处理后的数据传输至接收器40，以使无线通信设备通过接收器40获取得到其它无线通信设备发送的数据。其中，图1D中所示的接收器40对应的硬件和发送器50对应的硬件可以相互独立，或者，接收器40和发送器50位于相同的硬件，接收器40和发送器50逻辑上独立。
在现有的FEM中，RX通路中通常包括一条通道电路，仅可以通过该一条通道电路进行数据发送。TX通路中通常包括一条通道电路，仅可以通过该一条通道电路进行数据接收。导致FEM仅能通过固定的通道电路进行数据接收，以及通过固定的通道电路进行数据发送， 进而使得FEM仅适用于特定的通信场景，导致FEM的通用性差。为了解决该技术问题，本申请设计一种FEM，本申请中的FEM中的通路(RX通路或者TX通路)中至少包括两条通道电路，使得FEM可以通过至少两条通道电路进行数据接收，或者，使得FEM可以通过至少两条通道电路进行数据发送，不同的通道电路所适用的通信场景不同，因此，可以使得FEM可以适用于多种通信场景，以提高FEM的通用性。
下面，通过具体实施例对本申请所示的FEM 20的结构进行说明。需要说明的是，下面几个实施例可以独立存在，也可以相互结合，对于相同或相似的内容，在不同的实施例中不再重复说明。
图2为本申请实施例提供的FEM的结构示意图。请参见图2，FEM 20包括至少一个通信端口P-X、每个通信端口P-X对应的至少两条通道电路X、以及天线端口P-ANT，每条通道电路X的一端分别与对应的通信端口P-X连接，每条通道电路X的另一端分别与天线端口P-ANT连接。每条通道电路X还与控制器(图中未示出)连接，每条通道电路X用于接收控制器发送的控制信号，控制信号用于控制通道电路X的通道状态；其中，通道状态包括导通状态和断开状态，至少一个通信端口P-X对应的至少两条通道电路X中同时最多存在一条通道电路X的状态为导通状态，控制信号为控制器根据FEM 20的第一信息和/或第二信息生成的。第一信息可以包括FEM 20的硬件版本、国家码中的一种或多种，第二信息可以包括FEM 20的位置信息、功率、速率(调制编码机制)或误包率中的一种或多种。
至少一个通信端口P-X可以包括发送端口和/或接收端口。发送端口用于与无线通信设备中的发送器连接。接收端口用于与无线通信设备中的接收器连接。一个通信端口P-X对应一条通路。发送端口对应TX通路，TX通路包括发送端口、以及发送端口和天线端口之间的电路。例如，如图4-图10所示，FEM 20中除天线端口之外的电路为TX通路，如图15所示，TX通路所在框体中的电路为TX通路。接收端口对应RX通路，RX通路包括接收端口、以及接收端口和天线端口之间的电路。例如，如图11-图14所示，FEM 20中除天线端口之外的电路为RX通路，如图15所示，RX通路所在框体中的电路为RX通路。
同一个通信端口P-X对应至少两条通道电路，且同一通信端口P-X对应的至少两条通信电路不同。例如，接收端口对应的至少两条通道电路中每条通道电路不同，发送端口对应的至少两条通道电路中每条通道电路不同。通道电路不同可以是指：通道电路中包括不同的器件，或者通道电路中包括的器件的连接关系不同，或者通道电路中包括的器件的参数不同。例如，请参见图4，通道电路TX1中包括的器件为第一开关电路，通道电路TX2中包括的器件为第二开关电路和第二外围电路端口P2，由于通道电路TX1和通道电路TX2中包括的器件不同，因此，通道电路TX1和通道电路TX2不同。例如，请参见图10，通道电路TX1中包括的器件为第一开关电路和第一外围电路端口P1，通道电路TX2中包括的器件为第二开关电路和第二外围电路端口P2，第一开关电路和第二开关电路的参数不同，因此，通道电路TX1和通道电路TX2不同。
需要说明的是，一个通信端口P-X对应一条通路，因此，一个通信端口P-X对应至少两条通道电路，还可以理解为，该通信端口P-X对应的通路中包括的至少两条通道电路。
当数据通过同一通信端口P-X对应的不同通道电路时，不同的通道电路对数据进行不同的处理，进而使得数据传输所达到的效果不同，例如，无线通信设备发送的数据通过发送端口对应的第一条通道电路时，可以使得数据传输的速率达到最优，无线通信设备发送 的数据通过发送端口对应的第二条通道电路时，可以使得数据传输的质量达到最优。在实际应用过程中，可以根据实际需求(需要数据传输所达到的效果)，控制不同的通道电路导通。
天线端口P-ANT用于与无线通信设备中的天线连接。无线通信设备的发送器可以通过发送端口、发送端口对应的一条通道电路和天线端口P-ANT将待发送的数据传输至天线，以使天线发送该数据。天线还可以接收来自其它无线通信设备的数据，并通过天线端口P-ANT、接收端口对应的一条通道电路和通信端口将接收到的数据传输至无线通信设备。
控制器可以设置在FEM 20中，还可以设置在射频芯片中，例如，射频芯片可以为WIFI芯片、蓝牙芯片、WLAN芯片等。射频芯片中还可以包括射频电路，例如，射频电路可以包括图1A-图1D中所示的发送器50和/或接收器40。
控制器的数量可以为一个，也可以为多个。当控制器的数量为一个时，控制器可以控制每个通信端口对应的至少两条通道电路。当控制器的数量为多个时，控制器的数量可以与通信端口的数量相同，即，通信端口和控制器可以一一对应，相应的，一个控制器可以控制其对应的通信端口对应的至少两条通道电路。或者，控制器的数量还可以大于1，且小于通信端口的数量，例如，可以设置控制器与通信端口的对应关系，该对应关系可以为一个控制器对应一个或多个通信端口，可以根据实际需要设置控制器与通信端口之间的对应关系，相应的，一个控制器可以控制其对应的通信端口对应的至少两条通道电路。
控制器可以获取FEM 20的第一信息和/或第二信息，并根据第一信息和/或第二信息生成控制信号。控制信号用于控制至少一个通信端口对应的至少两条通道电路的通道状态，通道状态包括导通状态和断开状态。一个通道电路的通道状态为导通状态是指，该通道电路与对应的通信端口和天线端口之间形成通路，数据可以通过该通路进行传输。一个通道电路的通道状态为断开状态是指，该通道电路与对应的通信端口和天线端口之间未形成通路，数据无法通过该通路进行传输。
至少一个通信端口对应的至少两条通道电路中同时最多存在一条通道电路的状态为导通状态，例如，假设FEM 20中包括两个通信端口，每个通信端口对应两条通道电路，则FEM 20中一共包括4条通道电路，该4条通道电路同时最多有一个通道电路为导通状态。例如，假设至少一个通信端口中包括接收端口和发送端口，在进行数据发送时，控制信号可以控制发送端口对应的一条通道电路导通，在进行数据接收时，控制信号控制接收端口对应的一条通道电路导通。
下面，以控制器设置在射频芯片中为例，结合图3，对控制器获取第一信息和/或第二信息的过程进行说明。
图3为本申请实施例提供的一种无线通信设备的结构示意图。请参见图3，无线通信设备90中包括FEM 20、射频芯片60、存储器70和全球定位系统(global positioning system，GPS)模块，射频芯片60中包括控制器。存储器70可以设置在射频芯片60内部，也可以设置在射频芯片60外部。存储器70中存储有第一信息和程序指令，可选的，第一信息和程序指令还可以存储在不同的存储器70中，本申请实施例对此不作具体限定。
第一信息可以包括FEM 20的硬件版本、国家码中的一种或多种。可以在FEM 20出厂时确定第一信息，并将第一信息存储至存储器70中，相应的，控制器可以在存储器70中获取第一信息。例如，在FEM 20出厂时，可以根据该FEM 20即将销售至的国家确定 国家码，若出厂的FEM 20即将销售至国家A，则可以确定该FEM 20的国家码为国家A。硬件版本是指FEM 20中硬件器件的版本，例如，硬件版本可以包括硬件版本号等。
第二信息可以包括FEM 20的位置信息、功率、速率(调制编码机制)或误包率中的一种或多种。功率可以为发送功率或者接收功率。速率可以为发送速率或者接收速率。例如，当通信端口为发送端口(TX通路对应的通信端口)时，功率可以为发送功率，速率可以为发送速率。当通信端口为接收端口(RX通路对应的通信端口)时，功率可以为接收功率，速率可以为接收速率。可以由检测器件检测得到第二信息。例如，对于位置信息，检测器件可以为GPS模块80，即，可以通过GPS模块80检测得到位置信息。还可以根据无线通信设备的互联网协议(Internet Protocol，IP)地址确定位置信息，其中，IP地址与位置信息之间具有预设对应关系。对于功率、速率或者误包率，检测器件可以为控制器(例如图3所示的控制器)，例如，控制器可以对FEM 20发射的信号进行功率检测，以得到FEM 20的发送功率，控制器可以对FEM 20接收的信号进行功率检测，以得到FEM 20的接收功率。控制器可以获取FEM 20对应的调制编码机制(还可以称为FEM 20所在的无线通信设备对应的调制编码机制)，并根据FEM 20对应的调制编码机制确定FEM 20的速率，例如，调制编码机制和速率之间具有预设的对应关系，控制器可以根据FEM 20对应的调制编码机制和该对应关系确定FEM 20的速率，在无线通信设备采用一种编码调制机制进行调制编码时，无线通信设备可以将当前采用的调制编码机制写入至配置文件，并将配置文件存储至存储器中，相应的，控制器可以在存储器中获取无线通信设备当前采用的调制编码机制。控制器可以对FEM 20在预设时段发送和/或接收的数据包进行分析，并根据分析结果确定误包率。
控制器可以读取存储器70中的程序指令，并根据获取得到的第一信息和/或第二信息、以及该程序指令生成控制信号。需要说明的是，在下述实施例中，对控制器生成控制信号的过程进行说明，此处不再进行赘述。
在图2所示的实施例中，FEM 20中的每个通信端口对应至少两条通道电路，即，一条通路(RX通路或者TX通路)中至少包括两条通道电路，使得FEM 20可以通过至少两条通道电路进行数据接收，或者，使得FEM 20可以通过至少两条通道电路进行数据发送，不同通道电路对数据进行的处理不同，进而使得数据传输所达到的效果不同，在实际应用过程中，可以根据实际需求(需要数据传输所达到的效果)，控制不同的通道电路导通，使得FEM 20可以适用于多个具有不同传输效果需求的通信场景，提高了FEM 20的通用性。
在实际应用过程中，FEM 20中可能包括TX通路和/或RX通路。下面，分别对FEM 20中包括不同通路时FEM 20的结构进行说明。
下面，对包括一条TX通路的FEM 20的结构进行说明。在FEM 20中包括一条TX通路时，至少一个通信端口中包括发送端口。下面，结合图4-图10，以发送端口对应两条通道电路(第一通道电路和第二通道电路)为例，对FEM 20的结构进行说明。
图4为本申请实施例提供的另一种FEM的结构示意图。请参见图4，FEM 20包括发送端口P-TX、功率放大器PA、第一通道电路TX1、第二通道电路TX2和天线端口P-ANT，第一通道电路TX1包括第一开关电路，第二通道电路TX2包括第二开关电路和第二外围电路端口P2P2。功率放大器PA的一端与发送端口P-TX连接，功率放大器PA的另一端分别与第一开关电路和第二开关的电路的一端连接，第一开关电路的另一端与天线端口 P-ANT连接，第二开关电路的另一端与第二外围电路端口P2连接，第二外围电路端口P2还与天线端口P-ANT连接。第一开关电路和第二开关电路还分别与控制器连接。
在第一开关电路的状态为导通状态时，第一通道电路TX1为一条直通电路，这样，在信号经过该第一通道电路TX1时，无需额外处理，使得信号可以高效率的传输通过第一通道电路TX1传输至天线端口P-ANT，并由天线发送该信号。
在第二开关电路的状态为导通状态时，第二通道电路TX2中包括外围电路，这样，在信号经过该第二通道电路TX2时，外围电路可以对信号进行处理，并将处理后的信号传输至天线端口P-ANT，并由天线发送该信号。外围电路可以为提高信号质量的处理电路，例如，外围电路可以包括滤波器等。在外围电路对信号进行处理之后，可以使得信号的传输质量较高。可选的，当外围电路包括滤波器时，还可以通过滤波器滤除部分频段的信号，以改变无线通信设备对应的工作频率。
在同一时刻，第一开关电路和第二开关电路中最多存在一个开关电路的状态为导通状态。控制器可以生成每个开关电路对应的控制信号，并向第一开关电路发送第一开关电路对应的控制信号，以及向第二开关电路发送第二开关电路对应的控制信号，第一开关电路对应的控制信号可以控制第一开关电路的状态，第二开关电路对应的控制信号可以控制第二开关电路的状态。第一开关电路和第二开关电路的状态包括导通状态和断开状态。当第一开关电路的状态为导通状态时，第一通道电路TX1的通道状态为导通状态，当第一开关电路的状态为断开状态时，第一通道电路TX1的通道状态为断开状态。当第二开关电路的状态为导通状态时，第二通道电路TX2的通道状态为导通状态，当第二开关电路的状态为断开状态时，第二通道电路TX2的通道状态为断开状态。
在同一时刻，控制器发送的第一开关电路对应的控制信号和第二开关电路对应的控制信号可以相同。例如，第一开关电路为低电平导通，第二开关电路为高电平导通，当需要第一开关电路导通、第二开关电路断开时，则控制器可以分别向第一开关电路和第二开关电路发送低电平信号，当需要第一开关电路断开、第二开关电路导通时，则控制器可以分别向第一开关电路和第二开关电路发送高电平信号。
在同一时刻，控制器发送的第一开关电路对应的控制信号和第二开关电路对应的控制信号可以不同、例如，第一开关电路为低电平导通，第二开关电路也为低电平导通，当需要第一开关电路导通、第二开关电路断开时，则控制器可以向第一开关电路发送低电平信号，向第二开关电路发送高电平信号，当需要第一开关电路断开、第二开关电路导通时，则控制器可以向第一开关电路发送高电平信号，向第二开关电路发送低电平信号。
在图4所示的实施例中，TX通路中包括两条通道电路(第一通道电路TX1和第二通道电路TX2)，使得FEM 20可以通过该两条通道电路进行数据发送，不同通道电路对数据进行的处理不同，进而使得数据传输所达到的效果不同，在实际应用过程中，可以根据实际需求(需要数据传输所达到的效果)，控制不同的通道电路导通，使得FEM 20可以适用于多个具有不同传输效果需求的通信场景，提高了FEM 20的通用性。第二通道电路TX2中包括第二外围电路端口P2，外围电路设置在FEM 20外部，在实际应用过程中，可以根据实际需要设置外围电路，例如，当需要第二通道电路TX2具有滤波功能时，则可以在外围电路中设置滤波器，当需要信号经过第二通道电路TX2的传输时具有较小的衰减时，则可以在外围电路中设置阻抗匹配电路。将外围电路设置在FEM 20的外部，通过改变外围电路，即 可改变FEM的功能，这样，不但可以降低FEM 20中电路的复杂性，还可以提高对FEM设计的灵活性。
图5为本申请实施例提供的又一种FEM的结构示意图。请参见图5，FEM 20包括发送端口P-TX、功率放大器PA、第一通道电路TX1、第二通道电路TX2和天线端口P-ANT，第一通道电路TX1包括第一开关电路，第二通道电路TX2包括第二开关电路和外围电路。功率放大器PA的一端与发送端口P-TX连接，功率放大器PA的另一端分别与第一开关电路和第二开关的电路的一端连接，第一开关电路的另一端与天线端口P-ANT连接，第二开关电路的另一端与外围电路连接，外围电路还与天线端口P-ANT连接。第一开关电路和第二开关电路还分别与控制器连接。
需要说明的是，图5中各部件的功能与图4类似，此处不再进行赘述。
在图5所示的实施例中，TX通路中包括两条通道电路(第一通道电路TX1和第二通道电路TX2)，使得FEM 20可以通过该两条通道电路进行数据发送，不同通道电路对数据进行的处理不同，进而使得数据传输所达到的效果不同，在实际应用过程中，可以根据实际需求(需要数据传输所达到的效果)，控制不同的通道电路导通，使得FEM 20可以适用于多个具有不同传输效果需求的通信场景，提高了FEM 20的通用性。外围电路设置在EFM内部，无需在FEM 20外部再设置外围电路，使得FEM 20的使用便捷性较高。
在图4所示实施例的基础上，下面，结合图6，对开关电路(第一开关电路和第二开关电路)的结构进行说明。
图6为本申请实施例提供的又一种FEM的结构示意图。在图4所示实施例的基础上，请参见图6，第一开关电路电容C1、电容C2、电感L1和二极管D1。第二开关电路分别包括电容C3、电容C4、电感L2和二极管D2。
当需要第一开关电路导通，第二开关电路断开时，控制器输出的控制信号1可以为低电平，控制信号2为高电平。当控制信号1为低电平时，D1负偏，当控制信号2为高电平时，D2正偏，在该种情况下，从PA的输出端到第二通道电路的输入阻抗非常大，相当于开路，使第二通道电路处于断开状态，第一通道电路为导通状态。
当需要第一开关电路断开，第二开关电路导通时，控制器输出的控制信号1可以为高电平，控制信号2为低电平。当控制信号1为高电平时，D1正偏，当控制信号2为低电平时，D2负偏，从PA的输出端到第一通道电路的输入阻抗非常大，相当于开路，使第一通道电路处于断开状态，第二通道电路为导通状态。
需要说明的是，图6只是以示例的形式示意开关电路的结构，并非对开关电路的结构进行的限定，当然，开关电路的结构还可以为其它，本申请实施例对此不作具体限定。
可选的，控制器获取FEM 20的第一信息和/或第二信息，并根据第一信息和/或第二信息生成控制信号。第一信息可以包括FEM 20的硬件版本、国家码中的一种或多种，第二信息可以包括FEM 20的位置信息、功率、速率(调制编码机制)或误包率中的一种或多种。控制器获取FEM 20的第一信息和/或第二信息的过程可以参见图3所示的实施例，此处不再进行赘述。控制器可以通过如下两种方式，根据第一信息和/或第二信息生成控制信号。
一种可行的实现方式：
控制器根据第一信息和/或第二信息，确定对应的传输需求，并根据传输需求生成控制 信号。其中，传输需求为传输效率优先或者传输质量优先。
可选的，一条通路中不同的通道电路对应的传输效果不同，例如传输效果可以为传输效率较高或者传输质量较高。控制器可以根据确定得到的传输需求生成控制信号，控制信号用于控制其中的一条通道电路导通，该导通的通道电路的传输效果与控制器确定得到的传输需求匹配。
例如，假设TX通路中包括第一通道电路TX1和第二通道电路TX2，第一通道电路TX1的传输效果为发送效率较高，第二通道电路TX2的传输效果为发送质量较高。假设控制器根据第一信息和/或第二信息确定得到的传输需求为传输效率优先，则控制器生成的控制信号可以控制第一通道电路TX1导通、以及控制第二通道电路TX2断开，以使信号可以通过第一通道电路TX1发送。
另一种可行的实现方式：
控制器根据第一信息和/或第二信息，确定对应的工作频率，并根据工作频率生成控制信号。其中，工作频率可以为天线发送信号的发送频率，也可以为接收器接收到信号的接收频率。
可选的，一条通路中不同的通道电路对应的工作频率可能不同。控制器可以根据确定得到的工作频率生成控制信号，控制信号用于控制其中的一条通道电路导通，该导通的通道电路对应的工作频率与控制器确定得到的工作频率一致。
可选的，可以在通道电路中设置滤波器，通过滤波器可以改变通道电路的工作频率。例如，滤波器可以对待发送的信号进行频率滤波处理，以使频率滤波处理后的信号经过天线发送之后，发送出去的信号的频率在该滤波器对应的预设频率范围内。
例如，假设TX通路中包括第一通道电路TX1和第二通道电路TX2，第一通道电路TX1的发送频率为频率范围1，第二通道电路TX2的发送频率为频率范围2,。假设控制器根据第一信息和/或第二信息确定得到的发送频率为频率范围2，则控制器生成的控制信号可以控制第二通道电路TX2导通、以及控制第一通道电路TX1断开，以使信号可以通过第二通道电路TX2发送。
当然，控制器还可以通过其它方式生成控制信息，本申请实施例对此不作具体限定。
当控制器生成控制信号所依据的容不同时，控制器生成控制信号的过程也不同，下面，介绍几种控制器生成控制信号的可行的实现方式：
一种可行的实现方式：控制器根据第二信息中的位置信息生成控制信号。
位置信息可以指示FEM 20当前所在的区域。例如，位置信息中可以包括经度和纬度，可以根据经度和纬度确定FEM 20当前所在的区域。例如，请参见图3，控制器可以从GPS模块中获取位置信息。
可选的，在不同的区域，可能对信号的传输需求可能不同，例如，在区域A，对信号的传输需求为传输效率优先，在区域B，对信号的传输需求为传输质量优先。可以预先设置区域与传输需求之间的对应关系，并在存储器中存储该对应关系。相应的，控制器可以根据位置信息确定FEM 20当前所在的区域，并根据对应关系获取FEM 20当前所在的区域对应的传输需求(速率优先或者质量优先)，根据FEM 20当前所在区域对应的传输需求，生成控制信号。例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据位置信息和对应关系生成控制信号。
可选的，在不同的区域，可能对工作频率的要求不同。例如，在区域A，工作频率可能为频率a至频率b，在区域B，工作频率可能为频率c至频率d。可以预先设置区域与工作频率之间的对应关系，并在存储器中存储该对应关系。相应的，控制器可以根据位置信息确定FEM 20当前所在的区域，并根据对应关系获取FEM 20当前所在的区域对应的工作频率，根据FEM 20当前所在区域对应的工作频率，生成控制信号。例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据位置信息和对应关系生成控制信号。
在图4所示的FEM 20的结构的基础上，下面，结合图7，对FEM 20的位置发生变化时，FEM 20中开关电路的状态进行说明。
图7为本申请实施例提供的一种开关电路的状态切换示意图。请参见图7，包括时刻1和时刻2时FEM 20中开关电路的状态。
在时刻1时，FEM 20位于位置1，该位置1属于区域1。假设区域1对应的传输需求为速率优先，则控制器生成第一开关电路对应的控制信号1，以及第二开关电路对应的控制信号2，并向第一开关电路发送控制信号1，以及向第二开关电路发送控制信号2，控制信号1用于控制第一开关电路导通，控制信号2用于控制第二开关电路断开。在第一开关电路导通，第二开关电路断开之后，通过FEM 20发送信号时，信号通过发送端口、PA、第一通道电路和天线接口传输至天线，由天线发送该信号。由于第一通道电路为直通通路，无需对信号进行额外处理，使得通过第一通道电路可以对信号进行高效率的传输，使得信号的传输效率较高。
在时刻2时，假设FEM 20移动至了位置2，位置为属于区域2。假设区域2对应的传输需求为质量优先，则控制器生成第一开关电路对应的控制信号3，以及第二开关电路对应的控制信号4，并向第一开关电路发送控制信号3，以及向第二开关电路发送控制信号4，控制信号3用于控制第一开关电路断开，控制信号4用于控制第二开关电路导通。在第一开关电路断开，第二开关电路导通之后，通过FEM 20发送信号时，信号通过发送端口、PA、第二通道电路和天线接口传输至天线，由天线发送该信号。由于第二通道电路中的外围电路可以对信号进行处理，使得处理后的信号的质量较高，因此，可以使得信号的传输质量较高。
现有技术中的一个FEM 20只能应用于具有相同传输需求的区域，而在本申请中，FEM 20可以应用于具有多种不同传输需求的区域，提高的FEM 20的通用性。例如，在现有技术中，当区域A和区域B对信息的传输需求不同时，则需要分别针对区域A和区域B设计不同的FEM 20，而在本申请中，针对区域A和区域B，可以设计相同的FEM 20，即，一个FEM 20既可以在区域A中使用，也可以在区域B中使用。
另一种可行的实现方式：控制器根据第一信息中的硬件版本生成控制信号。
硬件版本是指FEM 20中硬件器件的版本，例如，硬件版本可以包括硬件版本号等。不同硬件版本对应的信号的传输需求可能不同，例如，版本1对应的信号的传输需求为传输效率优先，版本2对应的信号的传输需求为质量优先。可以预先设置硬件版本与传输需求之间的对应关系，并在存储器中存储该对应关系。相应的，控制器可以根据该对应关系获取硬件版本对应的传输需求(速率优先或者质量优先)，并根据传输需求，生成控制信号。例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据硬件版本 和对应关系生成控制信号。
现有技术中的一种FEM 20结构只能适用于对应相同传输需求的硬件版本，而在本申请中，一种FEM 20结构可以适用于对应多种不同传输需求的硬件版本，提高的FEM 20的通用性。例如，在现有技术中，当硬件版本A和硬件版本B对信息的传输需求不同时，则需要分别针对硬件版本A和硬件版本B设计不同结构的FEM 20，而在本申请中，针对硬件版本A和硬件版本B，可以设计相同结构的FEM 20。
再一种可行的实现方式：控制器根据第一信息中的国家码生成控制信号。
不同国家具有不同的国家码，不同国家对信号的传输需求可能不同，例如，国家1对信号的传输需求为传输效率优先，国家2对信号的传输需求为质量优先。可以预先设置国家码与传输需求之间的对应关系，并在存储器中存储该对应关系。相应的，控制器可以根据该对应关系获取国家码对应的传输需求，并根据传输需求，生成控制信号，例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据国家码和对应关系生成控制信号。
现有技术中的一个FEM 20只能应用于具有相同传输需求的国家，而在本申请中，FEM 20可以应用于具有多种不同传输需求的国家，提高的FEM 20的通用性。例如，在现有技术中，当国家A和国家B对信息的传输需求不同时，则需要分别针对国家A和国家B设计不同的FEM 20，而在本申请中，针对国家A和国家B，可以设计相同的FEM 20，即，一个FEM 20既可以在国家A中使用，也可以在国家B中使用。
可选的，在不同国家工作频率的要求不同。例如，国家1要求的工作频率可能为频率a至频率b，国家2要求的工作频率可能为频率c至频率d。可以预先设置国家与工作频率之间的对应关系，并在存储器中存储该对应关系。相应的，控制器可以根据该对应关系获取国家码对应的工作频率，并根据工作频率，生成控制信号，例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据国家码和对应关系生成控制信号。
现有技术中的一个FEM 20只能应用于对工作频率要求相同的国家，而在本申请中，FEM 20可以应用于对工作频率要求不同的多个国家，提高的FEM 20的通用性。例如，在现有技术中，当国家A和国家B对工作频率的要求不同时，则需要分别针对国家A和国家B设计不同的FEM 20，而在本申请中，针对国家A和国家B，可以设计相同的FEM 20，即，一个FEM 20既可以在国家A中使用，也可以在国家B中使用。
又一种可行的实现方式：控制器根据第二信息中的功率生成控制信号。
发送器发送信号的功率可能不同，不同功率对应的传输需求可能不同。例如，当功率小于预设功率阈值时，则传输需求为传输效率优先，当功率大于或等于预设功率阈值时，则传输需求为传输质量优先。在实际应用过程中，可以根据实际需要设置该预设功率阈值，并在存储器中存储该预设功率阈值。相应的，控制器可以获取发送器发送信号的功率，并根据该功率和预设功率阈值，生成控制信号，例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据发送器发送信号的功率和预设功率阈值生成控制信号。
在图4所示的FEM 20的结构的基础上，下面，结合图8，对发送器发送信号的功率不同时，FEM 20中开关电路的状态进行说明。
图8为本申请实施例提供的另一种开关电路的状态切换示意图。请参见图8，包括时刻1和时刻2时FEM 20中开关电路的状态。
在时刻1时，发送器(与发送端口连接，图8中未示出)待发送的信号为信号1，且发送器发送信号1的功率为功率1。假设功率1小于预设功率阈值，则控制器根据功率1和预设功率阈值的大小关系，生成第一开关电路对应的控制信号1，以及第二开关电路对应的控制信号2，并向第一开关电路发送控制信号1，以及向第二开关电路发送控制信号2，控制信号1用于控制第一开关电路导通，控制信号2用于控制第二开关电路断开。在第一开关电路导通，第二开关电路断开之后，发送器通过FEM 20发送信号1时，信号1通过发送端口、PA、第一通道电路和天线接口传输至天线，由天线发送该信号1。由于第一通道电路为直通通路，无需对信号1进行额外处理，使得通过第一通道电路可以对信号1进行高效率传输，使得信号1的传输效率较高。
在时刻2时，发送器(与发送端口连接，图7中未示出)待发送的信号为信号2，且发送器发送信号2的功率为功率2。假设功率2大于预设功率阈值，则控制器根据功率2和预设功率阈值的大小关系，生成第一开关电路对应的控制信号3，以及第二开关电路对应的控制信号4，并向第一开关电路发送控制信号3，以及向第二开关电路发送控制信号4，控制信号3用于控制第一开关电路断开，控制信号4用于控制第二开关电路导通。在第一开关电路断开，第二开关电路导通之后，发送器通过FEM 20发送信号2时，信号2通过发送端口、PA、第二通道电路和天线接口传输至天线，由天线发送该信号2。由于第二通道电路中的外围电路可以对信号2进行处理，使得处理后的信号2的质量较高，因此，可以使得信号2的传输质量较高。
不同通信场景下的功率通常在对应的范围内，不同通信场景下功率范围可能不同。例如，通信场景可以为工业通信场景、家庭通信场景等。例如，通信场景1下的功率可能在功率范围1中，通信场景2下的功率可能在功率范围2中。在现有技术中，针对功率小于预设功率阈值的通信场景和功率大于或等于预设功率阈值的通信场景，需要设计不同的FEM 20，即，一个FEM 20要么只能适用于功率小于预设功率阈值的通信场景，要么只能适用于功率大于或等于预设功率阈值的通信场景。而在本申请中，针对功率小于预设功率阈值的通信场景和功率大于或等于预设功率阈值的通信场景，可以设计相同的FEM 20，即，一个FEM 20既可以应用于功率小于预设功率阈值的通信场景，也能适用于功率大于或等于预设功率阈值的通信场景，使得FEM 20的通用性较高。
另一种可行的实现方式：根据第一信息中的速率生成控制信号。
发送器发送信号的速率可能不同，不同速率对应的传输需求可能不同。例如，当速率小于预设速率阈值时，则传输需求为传输效率优先，当速率大于或等于预设速率阈值时，则传输需求为传输质量优先。在实际应用过程中，可以根据实际需要设置该预设速率阈值，并在存储器中存储该预设速率阈值。相应的，控制器获取发送器发送信号的速率，并根据该速率和预设速率阈值，生成控制信号，例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据发送器发送信号的速率和预设速率阈值生成控制信号。
需要说明的是，当速率不同时，FEM 20中开关电路的状态也不同，FEM 20中开关电路的状态的切换过程，可以参见图8实施例所示的开关电路的切换过程，此处不再进行赘述。
不同通信场景下的速率通常在对应的范围内，不同通信场景下速率对应的范围可能不同。例如，通信场景可以为工业通信场景、家庭通信场景等。例如，通信场景1下的速率 可能在速率范围1中，通信场景2下的速率可能在速率范围2中。在现有技术中，针对速率小于预设速率阈值的通信场景和速率大于或等于预设速率阈值的通信场景，需要设计不同的FEM 20，即，一个FEM 20要么只能适用于速率小于预设速率阈值的通信场景，要么只能适用于速率大于或等于预设速率阈值的通信场景。而在本申请中，针对速率小于预设速率阈值的通信场景和速率大于或等于预设速率阈值的通信场景，可以设计相同的FEM 20，即，一个FEM 20既可以应用于速率小于预设速率阈值的通信场景，也能适用于速率大于或等于预设速率阈值的通信场景，使得FEM 20的通用性较高。
另一种可行的实现方式：根据第一信息中的误包率生成控制信号。
误包率是指传输中的出错的数据包个数与所传输的总数据包个数的比值。不同的误包率对应的传输需求可能不同。例如，当误包率小于预设误包率阈值时，则传输需求为传输效率优先，当误包率大于或等于预设误包率阈值时，则传输需求为传输质量优先。在实际应用过程中，可以根据实际需要设置该预设误包率阈值，并在存储器中存储该预设误包率阈值。相应的，控制器获取发送器在当前时刻之前的预设时段内的误包率，并根据该误包率和预设误包率阈值，生成控制信号，例如，控制器可以读取存储器中的程序指令，并执行程序指令，以实现根据发送器发送信号的误包率和预设误包率阈值生成控制信号。
需要说明的是，当误包率不同时，FEM 20中开关电路的状态也不同，FEM 20中开关电路的状态的切换过程，可以参见图8实施例所示的开关电路的切换过程，此处不再进行赘述。
不同通信场景下的误包率通常在对应的范围内，不同通信场景下误包率对应的范围可能不同。例如，通信场景可以为工业通信场景、家庭通信场景等。例如，通信场景1下的误包率可能在误包率范围1中，通信场景2下的误包率可能在误包率范围2中。在现有技术中，针对误包率小于预设误包率阈值的通信场景和误包率大于或等于预设误包率阈值的通信场景，需要设计不同的FEM 20，即，一个FEM 20要么只能适用于误包率小于预设误包率阈值的通信场景，要么只能适用于误包率大于或等于预设误包率阈值的通信场景。而在本申请中，针对误包率小于预设误包率阈值的通信场景和误包率大于或等于预设误包率阈值的通信场景，可以设计相同的FEM 20，即，一个FEM 20既可以应用于误包率小于预设误包率阈值的通信场景，也能适用于误包率大于或等于预设误包率阈值的通信场景，使得FEM 20的通用性较高。
可选的，当第一信息和第二信息包括位置信息、硬件版本、国家码、功率、速率或误包率中的两种或者更多种时，可以设置上述每个信息对应的优先级，控制器可以根据每个信息的优先级生成控制信号。例如，假设第二信息中包括位置信息和功率，假设位置信息的优先级大于功率的优先级，则控制器根据位置信息生成控制信号。
在图4所示的FEM 20的基础上，可选的，为了提高信号传输质量，还可以在第一通道电路中设置第一阻抗匹配电路，在第二通道电路中设置第二阻抗匹配电路。下面，结合图9-图10，对FEM 20的结构进行说明。
图9为本申请实施例提供的又一种FEM的结构示意图。在图4所示实施例的基础上，请参见图9，第一通道电路TX1还包括第一阻抗匹配电路，第一阻抗匹配电路的一端与第一开关电路连接，第一阻抗匹配电路的另一端与天线端口P-ANT连接。第二通道电路TX2还包括第二阻抗匹配电路，第二阻抗匹配电路的一端与第二开关电路连接，第二阻抗匹配 电路的另一端与第二外围电路端口P2连接。
图10为本申请实施例提供的另一种FEM的结构示意图。在图4所示实施例的基础上，请参见图10，第一通道电路TX1还包括第一外围电路端口，第一外围电路端口用于与第一阻抗匹配电路连接，第一阻抗匹配电路位于FEM 20外部。第二通道电路TX2还包括第二阻抗匹配电路，第二阻抗匹配电路与第二外围电路端口P2连接，第二阻抗匹配电路位于FEM 20的外部。通过将第一阻抗匹配电路和第二阻抗匹配电路设置在FEM 20外部，可以降低FEM 20的电路复杂性，还可以根据实际需要设计第一阻抗匹配电路和第二阻抗匹配电路，例如，在实际应用过程中，可以根据实际需要改变第一阻抗匹配电路，以使第一通道电路TX1达到不同的阻抗匹配效果，或者，可以根据实际需要改变第二阻抗匹配电路，以使第二通道电路TX2达到不同的阻抗匹配效果，使得电路设计的灵活性较高。
在图9-图10所示的FEM 20中，第一阻抗匹配电路可以由电阻、电容、电感中的一种或多种构成。在信号在第一通道电路进行传输的过程中，第一阻抗匹配电路可以减小信号的衰减。第二阻抗匹配电路可以由电阻、电容、电感中的一种或多种构成。在信号在第二通道电路进行传输的过程中，第二阻抗匹配电路可以减小信号的衰减。
需要说明的是，图9-图10只是以示例的形式示意FEM 20的结构，并非对FEM 20的结构的限定，例如，第一阻抗匹配电路可以设置在FEM 20内部，第二阻抗匹配电路设置在FEM 20外部，或者，第一阻抗匹配电路可以设置在FEM 20内部，第二阻抗匹配电路设置在FEM 20外部。例如，发送端口、PA、第一通道电路、第二通道电路和天线端口之间的连接顺序还可以为其它，例如，PA还可以设置在第一通道电路、第二通道电路与天线端口之间。例如，PA的个数还可以为两个，分别记为第一PA和第二PA，第一PA的一端与发送端口连接，第一PA的另一端与第一开关电路连接，第二PA的一端与发送端口连接，第二PA的另一端与第二开关电路连接。
需要说明的是，当FEM 20中包括上述TX通路时，FEM 20中还可以包括其它通路，例如，FEM 20中还可以包括现有技术中的RX通路，或者下述图11-图14所示的RX通路。
在FEM 20中包括一条RX通路时，至少一个通信端口中包括接收端口。下面，结合图11-图14，以发送端口对应两条通道电路(第一通道电路和第二通道电路)为例，对FEM 20的结构进行说明。
图11为本申请实施例提供的又一种FEM的结构示意图。请参见图11，FEM 20包括接收端口P-RX、低噪声放大器LNA、第一通道电路RX1、第二通道电路RX2和天线端口P-ANT，第一通道电路RX1包括第一开关电路，第二通道电路RX2包括第二开关电路和第二外围电路端口P2。低噪声放大器LNA的一端与接收端口P-RX连接，低噪声放大器LNA的另一端分别与第一开关电路和第二开关的电路的一端连接，第一开关电路的另一端与天线端口P-ANT连接，第二开关电路的另一端与第二外围电路端口P2连接，第二外围电路端口P2还与天线端口P-ANT连接。第一开关电路和第二开关电路还分别与控制器连接。
图12为本申请实施例提供的又一种FEM的结构示意图。请参见图12，FEM 20包括接收端口P-RX、低噪声放大器LNA、第一通道电路RX1和天线端口P-ANT，第一通道电路RX1包括第一开关电路，第二通道电路RX2包括第二开关电路和外围电路。低噪声放大器LNA的一端与接收端口P-RX连接，低噪声放大器LNA的另一端分别与第一开关电 路和第二开关的电路的一端连接，第一开关电路的另一端与天线端口P-ANT连接，第二开关电路的另一端与外围电路连接，外围电路还与天线端口P-ANT连接。第一开关电路和第二开关电路还分别与控制器连接。
图13为本申请实施例提供的再一种FEM的结构示意图。在图11所示的FEM 20的基础上，第一通道电路RX1还包括第一阻抗匹配电路，第二通道电路RX2还包括第二阻抗匹配电路。
图14为本申请实施例提供的另一种FEM的结构示意图。在图11所示的FEM 20的基础上，第一通道电路RX1还包括第一外围电路端口，第一外围电路端口用于连接第一阻抗匹配电路，第一阻抗匹配电路位于FEM 20外部。第二外围电路端口P2还用于连接第二阻抗匹配电路，第二阻抗匹配电路位于FEM 20外部。
在图11-图14所示的实施例中，控制器获取第一信息和/或第二信息的过程可以参见图3所示的实施例，控制器根据第一信息和/或第二信息生成控制信号的过程可以参见上述实施例，此处不再进行赘述。
需要说明的是，图11-图14实施例中的第一通道电路与图4-图10中的第一通道电路并非同一通道电路，只是为了便于描述，采用了相同的描述。同理，图11-图14实施例中的第二通道电路与图4-图10中的第一通道电路并非同一通道电路。图11-图14实施例中的第一开关电路与图4-图10中的第一开关电路并非同一开关电路。图11-图14实施例中的第二开关电路与图4-图10中的第二开关电路并非同一开关电路。图11-图14实施例中的第一外围电路接口与图4-图10中的第一外围电路接口并非同一接口。图11-图14实施例中的第二外围电路接口与图4-图10中的第二外围电路接口并非同一接口。
需要说明的是，图11-图14所示的FEM 20的结构以及工作过程可以参见图4-图10所示的实施例，此处不再进行赘述。
需要说明的是，当FEM 20中包括上述RX通路时，FEM 20中还可以包括其它通路，例如，FEM 20中还可以包括现有技术中的RX通路，或者上述图4-图10实施例所示的TX通路。
在FEM 20中包括一条TX通路和一条RX通路时，至少一个通信端口中包括发送端口和接收端口。在该种情况下，FEM 20包括图4-图5、图9-图10任意实施例所示的TX通路中的电路，以及图11-图14任意实施例所示的RX通路中的电路。下面，结合图15，介绍一种包括一条TX通路和一条RX通路时的FEM 20的结构。
需要说明的是，图11-图14只是以示例的形式示意FEM 20的结构，并非对FEM 20的结构的限定，例如，第一阻抗匹配电路可以设置在FEM 20内部，第二阻抗匹配电路设置在FEM 20外部，或者，第一阻抗匹配电路可以设置在FEM 20内部，第二阻抗匹配电路设置在FEM 20外部。例如，发送端口、LNA、第一通道电路、第二通道电路和天线端口之间的连接顺序还可以为其它，例如，LNA还可以设置在第一通道电路、第二通道电路与天线端口之间。例如，LNA的个数还可以为两个，分别记为第一LNA和第二LNA，第一LNA的一端与接收端口连接，第一LNA的另一端与第一开关电路连接，第二LNA的一端与接收端口连接，第二LNA的另一端与第二开关电路连接。
图15为本申请实施例提供的再一种FEM的结构示意图。请参见图15，包括图9所示的TX通路中的电路，以及图13所示的RX通路中的电路。其连接关系和工作过程可以参 见上述实施例，此处不再进行赘述。需要说明的是，当FEM 20中包括TX通路和RX通路时，FEM 20中可以包括图4-图10任意实施例中的TX通路，以及图11-图14任意实施例中的RX通路。
在图15所示的实施例中，通过FEM采用的数据传输方式为时分复用，换句话说，在一个时刻，RX1通道电路、RX2通道电路、TX1通道电路和TX2通道电路中通常只有一条通道电路导通。
在实际应用过程中，FEM采用的数据传输方式为时分复用，也可以为频分复用。
在FEM采用的数据传输方式为时分复用时，FEM中的所有通道电路中的一条通道电路通过天线端口接收或者发送的数据，换句话说，在一个时刻，FEM中的所有通道电路中最多存在一条通道电路通过天线端口接收或者发送的数据。
在FEM采用的数据传输方式为频分复用时，芯片系统中的所有通道电路中的M条通道电路通过天线端口接收或者发送数据；其中，1≤M≤N，N为通信端口的数量，M为整数，N为整数，当M大于或等于2时，M条通道电路中任意两条通道电路不对应同一个通信端口。换句话说，针对任意一个通信端口，该通信端口对应的至少两条通道电路中最多存在一条通道电路通过天线端口接收或者发送数据。
下面，结合图16-图17所示的实施例，对FEM采用时分复用或者频分复用进行数据传输的过程进行说明。
图16为本申请实施例提供的又一种FEM的结构示意图。请参见图16，包括图9所示的TX通路中的电路、图13所示的RX通路中的电路、以及滤波器，滤波器的第一端与RX1通道电路、RX2通道电路、TX1通道电路和TX2通道电路连接，滤波器的另一端与天线端口P-ANT连接。TX通路和RX通路中各部件的连接关系和工作过程可以参见上述实施例，此处不再进行赘述。需要说明的是，当FEM 20中包括TX通路和RX通路时，FEM 20中可以包括图4-图10任意实施例中的TX通路，以及图11-图14任意实施例中的RX通路。
在图16所示的实施例中，FEM采用的数据传输方式可以为时分复用，也可以为频分复用。例如，在WIFI通信场景下，FEM采用的数据传输方式通常为时分复用。在长期演进LTE(long term evolution，LTE)、第五代移动通信技术(5th generation mobile networks，5G)等场景下，FEM采用的数据传输方式通常为频分复用。
在FEM采用的数据传输方式为时分复用时，RX1通道电路、RX2通道电路、TX1通道电路和TX2通道电路中通常只有一条通道电路通过天线端口接收或者发送的数据。
在FEM采用的数据传输方式为频分复用时，RX1通道电路和RX2通道电路中存在一条通道电路通过天线端口接收数据，或者，RX1通道电路和RX2通道电路均不接收数据；TX1通道电路和TX2通道电路中存在一条通道电路通过天线端口发送数据，或者，TX1通道电路和TX2通道电路均不发送数据。在该种情况下，RX通路对应的频率和TX通路对应的频率不同，同一时刻，可以通过RX通路和TX通路同时进行数据的发送和接收，例如，滤波器可以对发送的数据进行滤波处理，以实现将发送的数据的频率限定在TX通路对应的频率范围内，滤波器还可以对接收到的数据进行滤波处理，以实现将接收到的数据的频率限定在RX通路对应的频率范围内。
可选的，FEM中还可以包括两条或者多条接收通路，或者，FEM中还可以包括两条 或者多条发送通路。下面，结合图17，以FEM中包括两条接收通路为例进行说明。
图17为本申请实施例提供的再一种FEM的结构示意图。请参见图17，包括两条图13所示的RX通路(分别记为RX通路1和RX通路2)中的电路、以及滤波器，滤波器的第一端与RX11通道电路、RX12通道电路、RX21通道电路和RX22通道电路连接，滤波器的另一端与天线端口P-ANT连接。RX通路1和RX通路2中各部件的连接关系和工作过程可以参见上述实施例，此处不再进行赘述。需要说明的是，FEM 20中包括的RX通路可以为图11-图14任意实施例中的RX通路。
在图17所示的实施例中，FEM采用的数据传输方式可以为时分复用，也可以为频分复用。例如，在WIFI通信场景下，FEM采用的数据传输方式通常为时分复用。在LTE、5G等场景下，FEM采用的数据传输方式通常为频分复用。
在FEM采用的数据传输方式为时分复用时，RX11通道电路、RX12通道电路、RX21通道电路和RX22通道电路中通常只有一条通道电路通过天线端口接收或者发送的数据。
在FEM采用的数据传输方式为频分复用时，RX11通道电路和RX12通道电路中存在一条通道电路通过天线端口接收数据，或者，RX11通道电路和RX12通道电路均不接收数据；RX21通道电路和RX22通道电路中存在一条通道电路通过天线端口接收数据，或者，RX21通道电路和RX22通道电路均不发送数据。在该种情况下，RX通路1对应的频率和RX通路2对应的频率不同，在一个时刻，可以通过RX通路1和RX通路2同时进行数据接收，例如，滤波器可以对接收到的数据进行第一滤波处理，以获取频率在RX通路1对应的频率范围内的数据，并将该数据传输至RX通路1；滤波器还可以对接收到的数据进行第二滤波处理，以获取频率在RX通路2对应的频率范围内的数据，并将该数据传输至RX通路2。
需要说明的是，当FEM中包括多条(大于2条)接收通路时，FEM的结构、以及工作过程可以参见图17，此处不再进行赘述。当FEM中包括两条或多条发送通路时，FEM的结构、以及工作过程可以参见图17，此处不再进行赘述。
图18为本申请实施例提供的又一种FEM的结构示意图。在图4所示实施例的基础上，请参见图18，FEM 20中还包括控制器。图18实施例中所示的控制器与上述实施例中的控制器的功能以及与FEM 20中各部件的连接关系相同，此处不再进行赘述。
图19为本申请实施例提供的一种电路的结构示意图。请参见图19，电路100包括上述任意实施例所示的FEM 20和射频芯片60，射频芯50片包括上述任意实施例所示的控制器，射频芯片用于向通信端口发送数据，和/或，射频芯片用于从通信端口接收数据。射频芯片60可以参见图3实施例中关于射频芯片的描述，此处不再进行赘述。
图20为本申请实施例还提供另一种无线通信设备的结构示意图。请参见图20，无线通信设备90包括图19实施例所示的电路100，即，无线通信设备90包括FEM 20(上述任意实施例所示的FEM 20)和射频芯片60。
请参见图3，无线通信设备90还包括存储器70，存储器70与所述控制器连接，存储器70中存储的信息包括所述第一信息。可选的，存储器70还可以设置在射频芯片60的外部。
请参见图3，无线通信设备90还可以包括GPS模块80，GPS模块80用于获取无线通信设备的位置信息，并向控制器发送位置信息。
显然，本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。
在本申请中，术语“包括”及其变形可以指非限制性的包括；术语“或”及其变形可以指“和/或”。本本申请中术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。本申请中，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系。

Claims (18)

  1. 一种芯片系统，其特征在于，包括：天线端口、至少一个通信端口、每个通信端口对应的至少两条通道电路，其中，
    每条通道电路的第一端与对应的通信端口连接，每条通道电路的第二端与所述天线端口连接；
    每条通道电路的第三端与控制器连接，每条通道电路用于接收所述控制器发送的控制信号，所述控制信号用于控制所述通道电路通过所述天线端口接收或者发送的数据；所述控制信号为所述控制器根据所述芯片系统的第一信息和/或第二信息生成的，所述第一信息包括如下至少一种：硬件版本或国家码，所述第二信息包括如下至少一种：位置信息、功率、速率或误包率。
  2. 根据权利要求1所述的芯片系统，其特征在于，所述芯片系统采用的数据传输方式为时分复用；
    所述芯片系统中的所有通道电路中的一条通道电路通过所述天线端口接收或者发送的数据。
  3. 根据权利要求1所述的芯片系统，其特征在于，所述芯片系统采用的数据传输方式为频分复用；
    所述芯片系统中的所有通道电路中的M条通道电路通过所述天线端口接收或者发送数据；
    其中，1≤M≤N，所述N为通信端口的数量，所述M为整数，所述N为整数，当所述M大于或等于2时，所述M条通道电路中任意两条通道电路不对应同一个通信端口。
  4. 根据权利要求1-3任一项所述的芯片系统，其特征在于，所述通道电路包括开关电路和外围电路端口，其中，
    所述开关电路与所述控制器连接，所述开关电路用于接收所述控制信号；
    所述外围电路端口用于连接外围电路，同一通信端口对应的不同通道电路的外围电路端口用于连接不同的外围电路。
  5. 根据权利要求1-3任一项所述的芯片系统，其特征在于，所述通道电路包括开关电路和外围电路，其中，
    所述开关电路与所述控制器连接，所述开关电路用于接收所述控制信号；
    不同通道电路中的外围电路不同。
  6. 根据权利要求1-3任一项所述的芯片系统，其特征在于，所述至少两条通道电路包括第一通道电路和第二通道电路，其中，
    所述第一通道电路包括第一开关电路，所述第一开关电路与所述控制器连接，所述第一开关电路用于接收所述控制信号；
    所述第二通道电路包括第二开关电路和第二外围电路端口，所述第二开关电路与所述控制器连接，所述第二开关电路用于接收所述控制信号，所述第二外围电路端口用于连接外围电路。
  7. 根据权利要求6所述的芯片系统，其特征在于，
    所述第一通道电路还包括第一阻抗匹配电路，或者，
    所述第一通道电路还包括第一外围电路端口，所述第一外围电路端口用于连接第一阻 抗匹配电路。
  8. 根据权利要求6或7所述的芯片系统，其特征在于，
    所述第二通道电路还包括第二阻抗匹配电路；或者，
    所述第二外围端口电路还用于连接第二阻抗匹配电路。
  9. 根据权利要求1-8任一项所述的芯片系统，其特征在于，所述至少一个通信端口包括发送端口，至少两条通道电路为所述发送端口对应的通道电路；所述芯片系统还包括功率放大器，其中，所述功率放大器分别与所述发送端口和所述至少两条通道电路连接。
  10. 根据权利要求1-8任一项所述的芯片系统，其特征在于，所述至少一个通信端口包括接收端口，至少两条通道电路为所述接收端口对应的通道电路；所述芯片系统还包括低噪声放大器，其中，所述低噪声放大器分别与所述接收端口和所述至少两条通道电路连接。
  11. 根据权利要求1-8任一项所述的芯片系统，其特征在于，所述至少一个通信端口包括发送端口和接收端口，所述至少两条通道电路包括所述发送端口对应的至少两条通道电路和所述接收端口对应的至少两条通道电路；所述芯片系统还包括功率放大器和低噪声放大器，其中，
    所述功率放大器分别与所述发送端口和所述发送端口对应的至少两条通道电路连接；
    所述低噪声放大器分别与所述接收端口和所述接收端口对应的至少两条通道电路连接。
  12. 根据权利要求9-11任一项所述的芯片系统，其特征在于，所述至少一个通信端口的个数大于1，所述芯片系统还包括滤波器，其中，
    所述滤波器的第一端与所述至少两条通道电路连接；
    所述滤波器的第二端与所述天线端口连接。
  13. 根据权利要求1-12任一项所述的芯片系统，其特征在于，所述芯片系统还包括所述控制器。
  14. 一种电路，其特征在于，包括射频芯片和权利要求1-12任一项所述的芯片系统，所述射频芯片包括所述控制器，所述射频芯片用于向所述通信端口发送数据，和/或，所述射频芯片用于从所述通信端口接收数据。
  15. 一种无线通信设备，其特征在于，包括权利要求14所述的电路。
  16. 根据权利要求15所述的无线通信设备，其特征在于，所述无线通信设备还包括存储器，所述存储器与所述控制器连接，所述存储器中存储的信息包括所述第一信息。
  17. 根据权利要求16所述的无线通信设备，其特征在于，所述射频芯片包括所述存储器。
  18. 根据权利要求16或17所述的无线通信设备，其特征在于，所述无线通信设备还包括全球定位系统GPS模块，所述GPS模块与所述控制器连接，其中，
    所述GPS模块用于获取所述无线通信设备的位置信息，并向所述控制器发送所述位置信息。
PCT/CN2020/116387 2019-09-29 2020-09-21 芯片系统、电路及无线通信设备 WO2021057637A1 (zh)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060135084A1 (en) * 2004-12-22 2006-06-22 Airoha Technology Corp. RF front-end matching circuits for a transceiver module with T/R switch integrated in a transceiver chip
CN101303403A (zh) * 2007-06-11 2008-11-12 杭州中科微电子有限公司 多模式卫星导航接收射频前端芯片
CN101594163A (zh) * 2008-05-28 2009-12-02 北京中电华大电子设计有限责任公司 一种基于wlan的零中频结构实现收发的方法和装置
CN201937576U (zh) * 2011-02-18 2011-08-17 中国移动通信集团公司 一种射频前端接收装置、发射装置及终端
CN104601192A (zh) * 2013-11-01 2015-05-06 南京亚瑟电子科技有限公司 一种支持tdd和fdd同时工作的前端单元设计方案
CN110875755A (zh) * 2019-09-29 2020-03-10 华为技术有限公司 芯片系统、电路及无线通信设备

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060135084A1 (en) * 2004-12-22 2006-06-22 Airoha Technology Corp. RF front-end matching circuits for a transceiver module with T/R switch integrated in a transceiver chip
CN101303403A (zh) * 2007-06-11 2008-11-12 杭州中科微电子有限公司 多模式卫星导航接收射频前端芯片
CN101594163A (zh) * 2008-05-28 2009-12-02 北京中电华大电子设计有限责任公司 一种基于wlan的零中频结构实现收发的方法和装置
CN201937576U (zh) * 2011-02-18 2011-08-17 中国移动通信集团公司 一种射频前端接收装置、发射装置及终端
CN104601192A (zh) * 2013-11-01 2015-05-06 南京亚瑟电子科技有限公司 一种支持tdd和fdd同时工作的前端单元设计方案
CN110875755A (zh) * 2019-09-29 2020-03-10 华为技术有限公司 芯片系统、电路及无线通信设备

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