WO2021045379A1

WO2021045379A1 - Data driving device for determining bonding defect, and display device including same

Info

Publication number: WO2021045379A1
Application number: PCT/KR2020/009468
Authority: WO
Inventors: 전재욱; 최기백; 김홍석; 윤정배
Original assignee: 주식회사 실리콘웍스
Priority date: 2019-09-02
Filing date: 2020-07-17
Publication date: 2021-03-11
Also published as: KR20210026929A; KR102654549B1

Abstract

A data driving device of the present invention comprises: a first channel processing unit for charging a first load capacitor of a first data line; a second channel processing unit for charging a second load capacitor of a second data line; a channel MUX for connecting the first channel processing unit to the first data line and connecting the second channel processing unit to the second data line; a first switch for selectively connecting the first data line and the second data line; a charge sharing line in which charges charged in the first and second load capacitors are shared with each other when the first switch is turned on; a control unit; and a comparator, which compares the output voltage of the charge sharing line with a reference voltage so as to output a comparative voltage that indicates whether bonding of the data driving device and a display panel is defective.

Description

Data driving device for determining bonding failure and display device including the same

The present invention relates to a data driving apparatus.

As the information society develops, demands for display devices for displaying images are increasing in various forms. Accordingly, in recent years, various types of display devices such as a liquid crystal display device (LCD) or an organic light emitting display device (OLED) have been used.

The display device includes data lines, gate lines, a display panel including a plurality of pixels connected to the data lines and gate lines, a gate driving device supplying gate signals to the gate lines, and a source signal to the data lines. A data driving device for supplying them, and a timing control unit for controlling operation timings of the gate driving device and the data driving device.

In this case, the data driving device may be mounted on a flexible film using a chip on film (COF) method or a chip on glass (COG) method, and bonded on the pads of the display panel using a tape automated bonding (TAB) method.

Since the data driving device and the display panel are bonded by applying a physical force, the bonding may be opened or may be shorted with another line. In this case, since a source signal may not be transmitted to the data line or an overcurrent may flow, a process of determining whether bonding is defective is essential.

However, in the related art, since the display device is simply driven to determine whether the bonding is defective or not, there is a problem that it is impossible to take appropriate measures because it is impossible to know whether the bonding is open or short.

In addition, not only may a problem occur in other configurations of the display device due to an erroneous measure, but there is a problem in that cost loss increases as the bonding process is performed again.

An object of the present invention is to provide a data driving device capable of determining a bonding defect between a data driving device and a display panel, and a display device including the same.

In addition, another object of the present invention is to provide a data driving apparatus for determining bonding defects capable of determining bonding defects in a data driving apparatus and a display device including the same.

In addition, another object of the present invention is to provide a data driving device and a display device including the same for determining bonding failure capable of measuring bonding resistance formed by bonding between a data driving device and a display panel.

A data driving device for determining bonding failure according to an aspect of the present invention for achieving the above-described technical problem is to charge a first load capacitor of the first data line by supplying a voltage of a first level to a first data line. A first channel processing unit; A second channel processor configured to charge a second load capacitor of the second data line by supplying a second level voltage to a second data line; A channel mux connecting the first channel processing unit to the first data line and connecting the second channel processing unit to the second data line; A charge sharing line including a first switch selectively connecting the first data line and the second data line, and in which charges charged in the first and second load capacitors are shared with each other when the first switch is turned on; A control unit for controlling the channel mux and the first switch; And a comparator for comparing the output voltage of the charge sharing line with a reference voltage and outputting a comparison voltage indicating whether bonding between the data driving device and the display panel is defective.

In addition, a display device for determining bonding failure according to another aspect of the present invention includes: a first load capacitor connected to a first data line and charged with a voltage of a first level; A second load capacitor connected to the second data line and charged with a voltage of a second level; A charge sharing line connected to the first and second data lines when charging of the first and second load capacitors is completed to share the charges charged in the first and second load capacitors; And a determining unit for determining whether bonding between the data driving device and the display panel is defective by using the output voltage of the charge sharing line.

According to the present invention, since it is possible to determine the bonding defect between the data driving device and the display panel, appropriate measures can be taken according to the bonding defect, so that the data voltage is not supplied from the data driving device to the display panel or an overcurrent occurs to the display panel. It has the effect of preventing it from flowing.

In addition, according to the present invention, since the data driving device itself can determine the bonding defect, a separate configuration for determining the bonding defect is not required, thus simplifying the manufacturing process and lowering the manufacturing cost. have.

In addition, according to the present invention, since the bonding defect can be determined by the data driving device itself, the bonding defect can be determined even before the display device is shipped, and the bonding defect can be determined even after the display device is shipped. There is an effect that immediate action is possible according to bonding defects.

In addition, according to the present invention, since the bonding resistance can be measured, the inspector does not need to manually measure the bonding resistance each time, so not only the inspection efficiency is increased, but also the accuracy of the inspection is improved because it is performed automatically. .

1 is a perspective view of a display device to which a data driving device for determining bonding failure according to an embodiment of the present invention is applied.

2 is a diagram illustrating bonding of a data driving device and a display panel according to an exemplary embodiment of the present invention.

3 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors by first and second channel processing units according to an embodiment of the present invention.

4 is a diagram illustrating an example of an output voltage graph of a charge sharing line when the first switch is turned on and charges of the first and second load capacitors are shared.

5 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors using a second switch and a ground switch according to an embodiment of the present invention.

6 is a diagram illustrating that a charge sharing line according to another embodiment of the present invention further includes an external capacitor line connected to an external capacitor.

7 is a flowchart showing a method of determining bonding defects using a data driving device according to an embodiment of the present invention.

FIG. 8 is a detailed flowchart illustrating a method of determining whether or not bonding is defective using an output voltage of a charge sharing line by a data driving device.

When'include','have','consists of' and the like mentioned in the present specification are used, other parts may be added unless'only' is used. In the case of expressing the constituent elements in the singular, it includes the case of including the plural unless specifically stated otherwise.

In interpreting the constituent elements, it is interpreted as including an error range even if there is no explicit description.

First, second, etc. are used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one component from another component. Accordingly, the first component mentioned below may be a second component within the technical idea of the present invention.

The term “at least one” is to be understood as including all possible combinations from one or more related items. For example, the meaning of “at least one of the first item, the second item, and the third item” means 2 among the first item, the second item, and the third item, as well as each of the first item, the second item, and the third item. It may mean a combination of all items that can be presented from more than one.

Each of the features of the various embodiments of the present invention can be partially or entirely combined or combined with each other, technically various interlocking and driving are possible, and each of the embodiments may be independently implemented with respect to each other or can be implemented together in an association relationship. May be.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Hereinafter, it will be described that the display device 100 according to an exemplary embodiment is an organic light emitting display device, but the present invention is not limited thereto. That is, the display device 100 according to an embodiment of the present invention includes not only an organic light emitting display device, but also a liquid crystal display device, a field emission display device, and a quantum dot light emitting display device. Lighting Emitting Diode), and an electrophoresis display device (Electrophoresis Display) may be implemented.

Referring to FIG. 1, a display device 100 according to an embodiment of the present invention determines a display panel 110, a timing control unit 130, a circuit board 140, a flexible film 150, and bonding defects. It includes a data driving device 200 (hereinafter referred to as a'data driving device').

The display panel 110 includes a first substrate 111 and a second substrate 112. The first substrate 110 may be a plastic film or a glass substrate. The second substrate 112 may be a plastic film, a glass substrate, or an encapsulation film.

Gate lines, data lines, and pixels are formed on one surface of the first substrate 111 facing the second substrate 112. The pixels are formed in a region defined by an intersection structure of gate lines and data lines.

Each pixel may include a thin film transistor and an organic light emitting device. In this case, the organic light-emitting device may include a first electrode, an organic light-emitting layer, and a second electrode. When a gate signal is input from a gate line using a thin film transistor, each pixel supplies a predetermined current to the organic light emitting device according to a data voltage applied through the data line. Accordingly, the organic light emitting device of each pixel can emit light with a predetermined brightness according to a predetermined current.

The display panel 110 may be divided into a display area in which pixels are formed to display an image and a non-display area in which an image is not displayed. Gate lines, data lines, and pixels may be formed in the display area. Gate pads and data pads may be formed in the non-display area.

A gate driving device (not shown) supplies gate signals to the gate lines according to a gate control signal input from the timing controller 130. The gate driving device may be formed on one or both sides of the display panel 110 in a GIP (Gate Driver In Panel) method. Alternatively, the gate driving device may be manufactured as a driving chip and mounted on a flexible film, and may be attached to one or both outer edges of the display panel 110 in a TAB (Tape Automated Bonding) method.

The timing controller 130 receives digital video data and a timing signal from an external system board through a cable of the circuit board 140. At this time, the timing signal includes a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable signal (Data Enable, DE), and the like.

The timing controller 130 generates a gate control signal for controlling an operation timing of the gate driving apparatus and a data control signal for controlling the data driving apparatus 200 based on the timing signal. The timing controller 170 supplies a gate control signal to the gate driving device and a data control signal to the data driving devices 200.

To this end, the timing control unit 130 rearranges the digital video data from among the signals received from the receiving unit and the digital video data among the signals received from the external system board to match the display panel 110 and rearranged digital video data. A video data processing unit that generates a video data processor, a control signal generation unit that generates a gate control signal and a data control signal for controlling the gate driving device and the data driving device 200 by using the timing signal received from the receiving unit, and the gate control signal. And a transmission unit for outputting to the gate driving device and outputting the rearranged digital video data and data control signal to the data driving device 200.

At this time, the gate control signal includes a gate clock (CLK), a start signal (VST), a gate output enable signal (GOE), and the like, and the data control signal includes a source start pulse (SSP) and a source shift clock signal (SSC). , And a source output enable signal (SOE), and the like.

In the flexible film 150, wirings connecting the pads of the display panel 110 and the data driving device 200, and wirings connecting the pads of the display panel 110 and the wirings of the circuit board 140 are formed. I can. The flexible film 150 may be attached to the pads of the display panel 110 in a TAB (Tape Automated Bonding) method. In addition, the flexible film 150 may be attached on the pads using an anisotropic conducting film, whereby the pads and wirings of the flexible film 150 may be connected.

The data driving device 200 receives digital video data and a data control signal from the timing control unit 170. The data driving apparatus 200 converts digital video data into analog data voltages according to a data control signal and supplies them to data lines. When the data driving device 200 is made of a driving chip, the data driving device 200 may be mounted on the flexible film 150 in a chip on film (COF) or chip on plastic (COP) method.

To this end, the data driving apparatus 200 may include a shift register unit, a latch unit, a digital-to-analog conversion unit, an output buffer, a channel mux, and the like.

The shift register unit outputs a sampling signal using data control signals received from the timing controller 130. The latch unit latches the digital video data sequentially received from the timing controller 130 according to the sampling signal and simultaneously outputs the latched digital video data to the digital-to-analog converter. The digital-to-analog conversion unit converts the digital video data transmitted from the latch unit into a data voltage and outputs it. The output buffer outputs the data voltage transmitted from the digital-to-analog converter to data lines according to the data control signal.

The channel mux connects each output buffer terminal and data lines to supply the data voltage output to each output buffer to the data line.

As described above, the data driving apparatus 200 applies a data voltage to each data line connected to the display panel 110 to display an image on the display panel 110.

In particular, the data driving apparatus 200 according to the present invention may determine whether the bonding between the data driving apparatus 200 and the display panel 110 is defective.

To this end, the data driving apparatus 200 according to the present invention may operate in a display mode or a test mode. The display mode refers to a mode in which the data driving device 200 applies a data voltage to each data line connected to the display panel 110 to display an image on the display panel 110, and the test mode determines whether bonding is defective. Means the mode.

In one embodiment, the display mode or the test mode may be set by the data driving device 200. In another embodiment, the display mode or the test mode may be set by the timing controller 130. In another embodiment, the display mode or the test mode may be set by an external device (not shown).

Hereinafter, the data driving apparatus 200 according to the present invention will be described in more detail with reference to FIG. 2.

The data driving apparatus 200 according to the present invention includes a first channel processing unit 210, a second channel processing unit 220, a channel mux 230 (MUX), a charge sharing line (CSL), a control unit 240, and a comparator ( 250). In FIG. 2, the data driving device 200 is illustrated as including the first channel processing unit 210 and the second channel processing unit 220, but this is only one embodiment. It may include a channel processing unit or three or more channel processing units.

The first channel processing unit 210 charges the _{first load capacitor C Load1} of the first data line DL1 by supplying a first level voltage to the first data line DL1. Specifically, when the first channel processing unit 210 is connected to the first data line DL1 by the channel mux 230, the first data line DL1 is supplied by supplying a voltage of the first level to the first data line DL1. ) Of the first load capacitor C _Load1 is charged with a voltage of the first level. In this case, the voltage of the first level may be a voltage of a level corresponding to the maximum gray level among the plurality of gray levels.

In one embodiment, the first channel processing unit 210 includes a shift register unit, a latch unit, a digital-to-analog conversion unit, and an output buffer. Since the functions of each component have been described above, detailed descriptions are omitted.

The second channel processing unit 220 charges the _{second load capacitor C Load2} of the second data line DL2 by supplying a second level voltage to the second data line DL2. Specifically, when the second channel processing unit 210 is connected to the second data line DL2 by the channel mux 230, the second data line DL2 is supplied by supplying a second level voltage to the second data line DL2. ) Of the second load capacitor C _Load2 is charged with a voltage of the second level. In this case, the voltage of the second level may be a voltage of a level corresponding to the minimum gray level among the plurality of gray levels.

In one embodiment, the second channel processing unit 220 includes a shift register unit, a latch unit, a digital-to-analog conversion unit, and an output buffer. Since the functions of each component have been described above, detailed descriptions are omitted.

The channel mux 230 (MUX) connects the first channel processing unit 210 to the first data line DL1 and connects the second channel processing unit 220 to the second data line DL2. Accordingly, the first load capacitor C _Load1 is charged by the first channel processing unit 230 and the second load capacitor C _Load2 is charged by the second channel processing unit 240.

In the charge sharing line CSL, charges charged in the first and second load capacitors C _Load1 and C _Load2 are shared with each other. To this end, the charge sharing line CSL is a first switch S1 that selectively connects the first data line DL1 and the second data line DL2, and the external voltage Vexit of the third level is applied to the first load capacitor. selectively fed to the (C _Load1) includes a first load capacitor a second switch (S2), and a charge sharing line grounding switch (S3) for selectively connecting the (CSL) to the ground terminal for charging the (C _Load1) . In this case, the third level may be a voltage of a corresponding level corresponding to half of the maximum gray scale.

The control unit 240 operates the data driving device 200 in a display mode or a test mode. Here, the display mode refers to a mode in which an image is displayed on the display panel 110 by applying a data voltage to each data line connected to the display panel 110, and the test mode is a data driving device 200 and a display panel 100. Refers to a mode for determining bonding defects between ). Here, the bonding defect means that the bonding between the data driving device 200 and the display panel 100 is open, and the bonding between the data driving device 200 and the display panel 100 is different from a line and a short ( It includes short-circuit defects, which means to be short.

The control unit 240 includes a first switch S1 included in a charge sharing line CSL in which charges charged in the channel mux 230 and the first and second load capacitors C _Load1 and C _{Load2 are shared.} Controls the 2 switch S2 and the ground switch S3.

Specifically, as shown in FIG. 3, the control unit 240 turns off the channel mux 230 and turns on the first switch S1 and the ground switch S3, so that the first load capacitor C _Load1 and Discharge all the charges charged in the second load capacitor C _Load2. The controller 240 turns off the first switch S1 and the ground switch S3 when a predetermined time elapses. Through this, the first load capacitor C _Load1 and the second load capacitor C _Load1 are initialized.

Controller 240 includes a first load capacitor (C _Load1) and a second load capacitor when the (C _Load2) is initialized, the first load capacitor (C _Load1) and a second so that the electric charge to the load capacitor (C _Load2) can be filled The channel mux 230 is turned on. Channel multiplexer 230 is supplied to the first load capacitor (C _Load1) of the voltage of the first level of the first data line (DL1) by a first channel processing unit 210 as the turn-on the first load capacitor (C _Load1 ) is being charged, the two of the second level voltage by a second channel processor 220 2 is supplied to a second load capacitor (C _Load2) of the data line (DL2) is a second load capacitor (C _Load2) is charged with . In this case, the voltage of the first level may be the maximum gray voltage, and the voltage of the second level may be the minimum gray voltage. For example, the voltage of the second level may be a voltage of the ground level.

When the charging of the first and second load capacitors C _Load1 and C _Load2 is completed, the control unit 240 turns off the channel mux 230 and turns on the first switch S1 to open the charge sharing line CSL. Through this, the charges charged in the first and second load capacitors C _Load1 and C _Load2 are shared with each other. A first voltage (V _CLoad1) of the load capacitor (C _Load1), a first load capacitor (C _Load1) as the charge is shared between the second load capacitor (C _Load2) is lowered to a voltage (V1) of a constant level, The voltage V _CLoad2 of the second load capacitor C _Load2 rises to a voltage V1 of a certain level. At this time, the output voltage V _CSL of the charge sharing line CSL is compared with the reference voltage Vref by the comparator 250 to be output as a comparison voltage Vout.

The controller 240 turns off the first switch S1 after a predetermined time has elapsed. In this case, the predetermined time may mean a time when the open defect and the short defect are determined by the comparison voltage output by the comparator 250.

The comparator 250 outputs a comparison voltage by comparing the output voltage of the charge sharing line CSL with a predetermined reference voltage. Specifically, when the first switch S1 is turned on so that the charges charged in the first load capacitor C _Load1 and the second load capacitor C _{Load2 are shared, the first output at the first point in time.} The voltage V _CSL is compared with the first reference voltage Vref1 to output a first comparison voltage Vout at a first time point. In this case, the first point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a transient response.

In one embodiment, the comparator 250 outputs a high-level first comparison voltage indicating open bonding when the first output voltage at the first time point is less than or equal to the first reference voltage Vref1, and outputs the first comparison voltage at the first time point. When the output voltage exceeds the first reference voltage Vref1, a low-level first comparison voltage indicating normal bonding is output. In this case, the first reference voltage may be set as the first output voltage when the bonding resistance has a value that can be determined to be open.

In addition, when the first switch S1 is turned on so that the charge charged in the first load capacitor C _Load1 and the second load capacitor C _{Load2 is shared, the comparator 250 is} Is compared with the second reference voltage Vref2 to output a second comparison voltage Vout. In this case, the second point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a Steady State Response.

In one embodiment, when the second output voltage at the second point of time is different from the second reference voltage Vref2, the comparator 250 outputs a high level second comparison voltage indicating short bonding, and 2 If the output voltage is the same as the second reference voltage Vref2, a low-level second comparison voltage indicating normal bonding is output. In this case, the second reference voltage Vref2 may be set to a level at which _{the output voltage V CSL} of the charge sharing line CSL converges in a steady state response when the short-circuit is normal.

FIG. 4 is a diagram illustrating an example of a graph of _{an output voltage V CSL} of a charge sharing line when the first switch S1 is turned on and charges of the first and second load capacitors are shared.

As shown in FIG. 4, the first graph a1 is an output voltage graph that is a reference for normal bonding.

The second graph (a2) indicates that the first output voltage at the first time point exceeds the first reference voltage (Vref1), so that the open is normal, and the second output voltage at the second time point is the second reference voltage (Vref2). Because it converges to, it indicates that the short is normal.

The third graph (a3) indicates that the short circuit is normal because the second output voltage at the second time point converges to the second reference voltage Vref2, but the first output voltage at the first time point is the first reference voltage Vref1 ) Or less, indicating that it is an open defect.

The fourth graph (a4) indicates that the first output voltage at the first time point exceeds the first reference voltage Vref1, so that the open is normal, but the second output voltage at the second time point is the second reference voltage (Vref1). It is different from ), indicating that the short circuit is defective.

Meanwhile, the display device 100 according to the present invention may further include a determination unit 260 as shown in FIG. 2. The determination unit 260 determines an open fault or a short fault according to the comparison voltage output from the comparator 250. In FIG. 2, the determination unit 260 is illustrated as having a separate configuration from the data driving device 200, but in another embodiment, the determination unit 260 is implemented in one configuration with the data driving device 200 or is a timing control unit. It may be implemented in one configuration with 130. In another embodiment, the determination unit 260 is not included in the display device 100 and may be implemented as a separate external device.

In one embodiment, the determination unit 260 may determine an open normal when the first comparison voltage Vout output from the comparator 250 at a first time point is at a low level, and a high level to determine an open failure. I can.

In one embodiment, the determination unit 260 may determine that the second comparison voltage Vout output from the comparator 250 is at a low level as a short-circuit normal, and if the second comparison voltage Vout is a high level, it may be determined as a short-circuit failure. I can.

In one embodiment, the determination unit 260 is a bonding resistance value table in which the bonding resistance value between the data driving device 200 and the display panel 110 is mapped for each output voltage when it is determined as normal bonding. It may be determined as a resistance value mapped to the first output voltage at a first point in time, which is a transient response.

In this case, the bonding resistance value table may be a table in which bonding resistance values according to the slope of the first output voltage are mapped. Alternatively, the bonding resistance value table may be a table in which bonding resistance values according to the level of the first output voltage are mapped.

When the determination unit 260 is determined to be short-circuit or open-fail, when the data driving device 200 operates in the display mode, the channel mux 130 may be turned off to cut off the data voltage supplied to the data lines. .

In the above-described embodiment, it has been described that the first channel processing unit 210 and the second channel processing unit 220 charge the first and second load capacitors C _Load1 and C _Load2 to determine bonding failure. Alternatively, in a modified embodiment, the bonding defect may be determined by charging the first and second load capacitors C _Load1 and C _{Load2 using the external voltage Vexit.}

Hereinafter, detailed descriptions of the same contents as those of the above-described embodiment will be omitted, and changed contents according to the modified embodiment will be described with reference to FIG. 5.

As shown in FIG. 5, the control unit 240 turns off the channel mux 230 and turns on the first switch S1 and the ground switch S3 to thereby turn on the first load capacitor C _Load1 and the second load. Discharge all the charges in the capacitor (C _Load2). The controller 240 turns off the first switch S1 and the ground switch S3 when a predetermined time elapses. Through this, the first load capacitor C _Load1 and the second load capacitor C _Load2 are initialized.

When the first load capacitor C _Load1 and the second load capacitor C _Load2 are initialized, the controller 240 supplies a third level external voltage Vexit to the first data line DL1. Turn on S2) to charge the first load capacitor (C _Load1 ), and turn on the ground switch (S3) to connect the second data line (DL1) to the ground terminal to discharge _{the second load capacitor (C Load2).} Let it. Accordingly, a third level voltage is applied to the first data line DL1 by the external voltage Vexit, so that the first load capacitor C _Load1 of the first data line DL1 is charged. When the second data line DL2 is connected to the ground terminal, the second load capacitor C _Load2 of the second data line DL2 is discharged. In this case, the voltage of the third level may correspond to a voltage corresponding to half of the maximum gray scale.

When the charging of the first and second load capacitors (C _Load1 and C _Load2 ) is completed, the control unit 240 turns off the second switch (S2) and the ground switch (S3), and turns on the first switch (S1). Charges charged in the first and second load capacitors C _Load1 and C _Load2 are shared with each other through the charge sharing line CSL. Accordingly, charge is shared between the first load capacitor (C _Load1 ) and the second load capacitor (C _Load2 ), so that the voltage (V _CLoad1 ) of the first load capacitor (C _Load1 ) falls to a predetermined level of the voltage (V2), The voltage V _CLoad2 of the second load capacitor C _Load2 rises to a voltage V2 of a predetermined level. At this time, the output voltage V _CSL of the charge sharing line CSL is compared with the reference voltage Vref by the comparator 250 to be output as a comparison voltage Vout.

The control unit 240 turns off the first switch S1 after a predetermined time has elapsed. In this case, the predetermined time may mean a time when the open defect and the short defect are determined by the comparison voltage output by the comparator 250.

In one embodiment, the comparator 250 is turned on the first switch S1 so that the charges charged _{in the first load capacitor C Load1} and the second load capacitor C _{Load2 are shared in the charge sharing line CSL.} When turned on, the first output voltage at the first point in time is compared with the first reference voltage Vref1 to output the first comparison voltage Vout. In this case, the first point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a transient response.

In one embodiment, the comparator 250 outputs a high-level first comparison voltage indicating open bonding when the first output voltage at the first time point is less than or equal to the first reference voltage Vref1, and outputs the first comparison voltage at the first time point. When the output voltage exceeds the first reference voltage Vref1, the first comparison voltage is output at a low level indicating normal bonding. In this case, the first reference voltage may be set as the first output voltage when the bonding resistance has a value that can be determined to be open.

In one embodiment, the comparator 250 is turned on the first switch S1 so that the charges charged _{in the first load capacitor C Load1} and the second load capacitor C _{Load2 are shared in the charge sharing line CSL.} When turned on, the second output voltage at the second point in time is compared with the second reference voltage Vref2 to output a second comparison voltage Vout. At this time, the second point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a Steady State Response.

In one embodiment, when the second output voltage is different from the second reference voltage Vref2, the comparator 250 outputs a high level second comparison voltage indicating short bonding, and the second output voltage is the second reference voltage. If it is equal to (Vref2), the second comparison voltage is output at a low level indicating normal bonding. In this case, the second reference voltage may be set to a level at which _{the output voltage V CSL} of the charge sharing line CSL converges in the steady state response when the short-circuit is normal.

In an embodiment, if the first comparison voltage Vout output from the comparator 260 is a low level, the determination unit 260 may determine an open normal, and a high level may determine an open failure.

In an embodiment, if the second comparison voltage Vout output from the comparator 260 is at a low level, the determination unit 260 may determine that the short circuit is normal, and if the second comparison voltage Vout is at a high level, it may determine that the short circuit is defective.

In one embodiment, the determination unit 260 determines the bonding resistance value between the data driving device 200 and the display panel 110 as normal bonding, a bonding resistance value table in which the bonding resistance value is mapped for each output voltage. It may be determined as a resistance value mapped to the first output voltage at a first point in time, which is a transient response.

In this case, the bonding resistance value table may be a table in which a bonding resistance value according to a slope of the first output voltage is mapped, or a bonding resistance value according to a level of the first output voltage is mapped.

Hereinafter, a method for determining bonding defects using a data driving device will be described in more detail with reference to FIGS. 3 and 5.

The control unit 240 sets an operation mode. In this case, the operation mode includes a display mode and a test mode.

During the reset period, the control unit 240 _{turns off the channel mux 230 so that all the charges charged in the first load capacitor C Load1} and the second load capacitor C _Load2 are discharged, and the first switch S1 and the ground are discharged. Turn on the switch S3. Accordingly, the first load capacitor C _Load1 and the second load capacitor C _Load2 are discharged. _{The voltage V CLoad2} of the second load capacitor may appear at a low level. When the reset period ends, the controller 240 turns off the first switch S1 and the ground switch S3.

The control unit 240 turns on the channel mux 230 so that electric charges can be charged in the first load capacitor C _Load1 and the second load capacitor C _{Load2 between chargers.} Accordingly, the first level voltage is applied to the first data line DL1 by the first channel processing unit 210 to charge _{the first load capacitor C Load1 of the first data line DL1.} A second level voltage is applied to the second data line DL2 by the second channel processing unit 210 to charge _{the second load capacitor C Load2 of the second data line DL2.}

In one embodiment, when the voltage of the first level is set to the voltage of the level corresponding to the maximum gray scale and the voltage of the second level is set to the voltage of the level corresponding to the minimum gray scale, the voltage of the first load capacitor (V _CLoad1 ) May appear as a high level, and the voltage of the second load capacitor (V _CLoad2 ) may appear as a low level.

When the open defect determination period P1 arrives, the controller 240 is a channel so that the charges charged in _{the first load capacitor C Load1} and the second load capacitor C _{Load2 are shared with each other through the charge sharing line CSL.} The mux 230 is turned off, and the first switch S1 is turned on.

Accordingly, charge is shared between the first load capacitor (C _Load1 ) and the second load capacitor (C _Load2 ), so that the voltage (V _CLoad1 ) of the first load capacitor (C _Load1 ) falls to a certain level of the voltage (V1), The voltage V _CLoad2 of the second load capacitor C _Load2 rises to a voltage V1 of a certain level.

Further, the output voltage (V _CSL) includes a first load capacitor (C _Load1) and bonding resistance level higher than the voltage (V _CLoad1) of the first load capacitor (C _Load1) by (R _Bonding) of the charge sharing line (CSL) It rises to the voltage Va. At this time, the comparator 250 compares the output voltage at the first time point with the first reference voltage Vref1 and outputs the first comparison voltage Vout. In this case, the first point in time refers to a point in time when _{the output voltage V CSL of the charge sharing line CSL is output in a transient response.}

The comparator 250 outputs a low-level first comparison voltage indicating an open normal when the output voltage at the first point in time exceeds the first reference voltage Vref1 in the open defect determination period P1, and If the output voltage is less than or equal to the first reference voltage Vref1, a high-level first comparison voltage indicating an open failure is output.

The determination unit 260 determines that the first comparison voltage output by the comparator 250 is output as a low level, and the determination unit 260 determines that the second comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as open defect.

The comparator 250 outputs a low-level second comparison voltage indicating an open normal when the output voltage at the second point in time is the same as the second reference voltage Vref2 in the short-circuit failure determination period P2, and When the output voltage is different from the second reference voltage, a second comparison voltage of a high level indicating a short circuit fault is output.

When the second comparison voltage output by the comparator 250 is output at a low level, the determination unit 260 determines that a short circuit is normal, and the determination unit 260 determines that the second comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as short circuit defect.

When determining that the bonding is normal, the determination unit 260 outputs the bonding resistance value between the data driving device 200 and the display panel 110 at the first point in time, which is a transient response on a table in which the bonding resistance value is mapped for each output voltage. It can be determined by the resistance value mapped to the voltage. In this case, the bonding resistance value table may be a table in which a bonding resistance value according to a slope of an output voltage at a first time point is mapped, or a bonding resistance value according to a level of an output voltage at a first time point is mapped.

When the short-circuit defect determination period P2 ends, the controller 240 turns off the first switch S1.

5 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors using a second switch and a ground switch according to another embodiment of the present invention.

The control unit 240 sets an operation mode. At this time, the operation mode includes a display mode and a test mode.

During the reset period, the control unit 240 turns off the channel mux 230 so that all the charges charged in _{the first load capacitor C Load1} and the second load capacitor C _{Load2 are discharged, and the first switch S1 and ground} Turn on the switch S3. Accordingly, the first load capacitor C _Load1 and the second load capacitor C _Load2 are discharged. _{The voltage V CLoad2} of the second load capacitor may appear at a low level. When the reset period ends, the controller 240 turns off the first switch S1 and the ground switch S3.

The controller 240 turns on the second switch S2 and the ground switch S3 so that electric charges can be charged in the first load capacitor C _Load1 and the second load capacitor C _{Load2 between chargers.}

When the open defect determination period P1 arrives, the controller 240 provides the charge charged in the first load capacitor C _Load1 and the second load capacitor C _Load2 to be shared with each other through the charge sharing line CSL. 2 The switch S2 and the ground switch S3 are turned off, and the first switch S1 is turned on.

Accordingly, charge is shared between the first load capacitor (C _Load1 ) and the second load capacitor (C _Load2 ), so that the voltage (V _CLoad1 ) of the first load capacitor (C _Load1 ) falls to a predetermined level of the voltage (V2), The voltage V _CLoad2 of the second load capacitor C _Load2 rises to a voltage V2 of a certain level.

Further, the output voltage (V _CSL) includes a first load capacitor (C _Load1) and bonding resistance level higher than the voltage (V _CLoad1) of the first load capacitor (C _Load1) by (R _Bonding) of the charge sharing line (CSL) It rises to the voltage (Vb) of. In this case, the comparator 250 compares the output voltage V _CSL at the first time point with the first reference voltage Vref1 and outputs the first comparison voltage Vout. In this case, the first point in time refers to a point in time when _{the output voltage V CSL of the charge sharing line CSL is output in a transient response.}

When the first comparison voltage output by the comparator 250 is output as a low level, the determination unit 260 determines that the first comparison voltage is open and normal, and the determination unit 260 determines that the first comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as open defect.

The comparator 250 outputs a low-level second comparison voltage indicating an open normal when the output voltage at the second point in time is the same as the second reference voltage Vref2 in the short-circuit failure determination period P2, and If the output voltage is different from the second reference voltage Vref2, a high-level second comparison voltage indicating short circuit failure is output.

When the second comparison voltage output by the comparator 250 is output at a low level, the determination unit 260 determines that a short circuit is normal, and the determination unit 260 determines that the second comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as short circuit failure

When it is determined that the bonding is normal, the determination unit 260 determines the bonding resistance value between the data driving device 200 and the display panel 110 using the output voltage at the first time point. The bonding resistance value by bonding with 110) can be determined.

Unlike the above-described embodiment, the charge sharing line CSL may further include an external capacitor line connected to the external capacitor. Hereinafter, referring to FIG. 6, it will be described in detail that the charge sharing line CSL is connected to the external capacitor through the external capacitor line.

As shown in FIG. 6, the charge sharing line CSL further includes an external capacitor line CL.

The external capacitor line CL is connected to the external capacitor Cexit. The external capacitor Cexit is installed on one side of the display panel 110 and has a value greater than the capacitances of _{the first load capacitor C Load1} and the second load capacitor C _Load2.

Accordingly, the external capacitor Cexit _{shares charges with each other through the first load capacitor C Load1} and the second load capacitor C _Load2 and the charge sharing line CSL.

In general, since the first load capacitor C _Load1 and the second load capacitor C _Load2 have low capacitance, the increase rate _{of the output voltage V CSL} of the charge sharing line CSL due to charge sharing is very high. Accordingly, the external capacitor line CL according to the present invention is connected to the external capacitor Cexit, and the increase rate of the output voltage of the charge sharing line CSL is reduced by the external capacitor Cexit.

As described above, according to the present invention, as the _{increase rate of the output voltage V CSL} of the charge sharing line CSL decreases, the stability of the data driving device operating in the test mode can be enhanced.

Hereinafter, a method for determining bonding defects using a data driving device will be described in detail with reference to FIGS. 7 and 8.

The data driving device grounds the charge sharing line to initialize charges charged in the first load capacitor of the first data line and the second load capacitor of the second data line (S700).

When the first load capacitor and the second load capacitor are initialized, the data driving device charges the first load capacitor of the first data line to a voltage of the first level, and the second load capacitor of the second data line is charged with the voltage of the second level. To be charged (S710).

In this case, the voltage of the first level may be a voltage corresponding to the maximum gradation, and the voltage of the second level may be a voltage of the ground level as a voltage corresponding to the minimum gradation. Alternatively, the first load capacitor may be charged with a voltage of a third level rather than the voltage of the first level and the second level, and the second load capacitor may be charged with a voltage of the ground level. That is, the first load capacitor and the second load capacitor may be charged with voltages of different levels.

When the charging of the first and second load capacitors is completed, the data driving device shares the charges charged in the first and second load capacitors with each other through a charge sharing line connecting the first and second data lines (S720). .

When electric charges are shared between the first and second load capacitors, the data driving apparatus determines whether the bonding between the data driving apparatus and the display panel is defective using the output voltage of the charge sharing line (S730).

Hereinafter, a method of determining whether or not bonding is defective by the data driving device using the output voltage of the charge sharing line will be described in more detail with reference to FIG. 8.

8 is a flowchart illustrating a method of determining whether or not bonding is defective by using an output voltage of a charge sharing line by a data driving apparatus according to an embodiment of the present invention.

When electric charges are shared between the first and second load capacitors, the data driving apparatus determines whether a predetermined first time point has arrived (S800). In this case, the first point in time refers to a point in time when the output voltage of the charge sharing line is output as a transient response.

When it is determined that the first time point has arrived, the data driving apparatus compares the output voltage at the first time point with the first reference voltage to determine whether an open defect has occurred (S810). When the output voltage at the first point in time exceeds the first reference voltage, the data driving apparatus determines as open normal, and if the output voltage at the first point in time is less than or equal to the first reference voltage, it determines as open failure.

Thereafter, the data driving apparatus determines whether a second predetermined point in time has arrived (S820). In this case, the second point in time refers to a point in time when the output voltage of the charge sharing line is output as a steady state response.

When it is determined that the second time point has arrived, the data driving apparatus compares the output voltage at the second time point with the second reference voltage to determine whether a short circuit is defective (S830). If the output voltage at the second time point is the same as the second reference voltage, the data driving apparatus determines that the short circuit is normal, and if the output voltage at the second time point is different from the second reference voltage, it determines that the short circuit is defective.

Referring back to FIG. 7, if it is determined that the data driving device is normally bonded, the bonding resistance value may be determined using the output voltage at the first time point (S740). Specifically, the data driving device determines the bonding resistance value between the data driving device and the display panel as a resistance value mapped to the output voltage at the first point in time, which is a transient response, on the bonding resistance value table in which the bonding resistance value is mapped for each output voltage. I can.

In this case, the bonding resistance value table may be a table in which a bonding resistance value according to a slope of an output voltage at a first time point is mapped or a bonding resistance value according to a level of an output voltage at a first time point is mapped.

When it is determined that the open defect or the short circuit is defective, the data driving device reports to the user and cuts off the data voltage supplied to the data lines when operating in the display mode.

Those skilled in the art to which the present invention pertains will be able to understand that the above-described present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof.

For example, all disclosed methods and procedures described herein may be implemented, at least in part, using one or more computer programs or components. This component is a series of computer-readable or machine-readable media including volatile and nonvolatile memory such as RAM, ROM, flash memory, magnetic or optical disks, optical memory, or other storage media. It can be provided as computer directives. The directives may be provided as software or firmware, and may, in whole or in part, be implemented in a hardware configuration such as ASICs, FPGAs, DSPs, or any other similar device. The directives may be configured to be executed by one or more processors or other hardware configurations, wherein the processor or other hardware configurations perform all or part of the methods and procedures disclosed herein when executing the series of computer directives, or To be able to perform.

Therefore, it should be understood that the embodiments described above are illustrative in all respects and not limiting. The scope of the present invention is indicated by the claims to be described later rather than the detailed description, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present invention. do.

Claims

A first channel processor configured to charge a first load capacitor of the first data line by supplying a voltage of a first level to a first data line;

A second channel processor configured to charge a second load capacitor of the second data line by supplying a second level voltage to a second data line;

A channel mux connecting the first channel processing unit to the first data line and connecting the second channel processing unit to the second data line;

A first switch selectively connecting the first data line and the second data line;

A charge sharing line in which charges charged in the first and second load capacitors are shared with each other when the first switch is turned on;

A control unit for controlling the channel mux and the first switch; And

A data driving device for determining bonding defects, including a comparator for comparing the output voltage of the charge sharing line with a reference voltage and outputting a comparison voltage indicating whether bonding between the data driving device and the display panel is defective.
The method of claim 1,

When the charging of the first and second load capacitors is completed, the control unit turns on the first switch so that the charges charged in the first and second load capacitors are shared with each other through the charge sharing line, and a predetermined time When this elapses, the first switch is turned off,

When the first switch is turned on, the comparator compares the output voltage with a reference voltage to determine a bonding defect for outputting the comparison voltage.
The method of claim 1,

The controller turns on the channel mux so that the first load capacitor is charged with the voltage of the first level, the second load capacitor is charged with the voltage of the second level, and the first switch is turned on. If so, the data driving device for determining a bonding defect that turns off the channel mux.
The method of claim 3,

Further comprising a ground switch for initializing the first and second load capacitors by connecting the first and second load capacitors to a ground terminal,

The control unit turns on the first switch and the ground switch to initialize the first and second load capacitors, and when the channel mux is turned on, the data for determining a bonding defect that turns off the first switch and the ground switch Drive.
The method of claim 1,

When the first switch is turned on, the comparator outputs a first comparison voltage obtained by comparing a first output voltage at a first point in time, which is a transient response, with a first reference voltage in order to determine whether an open is defective, and determines whether a short circuit is defective. A data driving apparatus for determining bonding failure for outputting a second comparison voltage obtained by comparing a second output voltage at a second point in time, which is a normal state response, with a second reference voltage to determine.
The method of claim 5,

When the first output voltage is less than or equal to the first reference voltage, the comparator outputs a high level first comparison voltage indicating an open failure, and when the second output voltage and the second reference voltage are different from each other, a high level indicating a short circuit failure. A data driving device that determines a bonding defect that outputs a second comparison voltage of a level.
The method of claim 1,

The bonding resistance value between the data driving device and the display panel is a transient response at a first point in time on a table in which bonding resistance values are mapped for each output voltage when it is determined that the bonding between the data driving device and the display panel is normal. A data driving device that determines a bonding defect determined by a resistance value mapped to a first output voltage.
The method of claim 1,

The first level voltage is a voltage corresponding to a maximum gray level among a plurality of gray levels, and the second level voltage is a voltage corresponding to a minimum gray level among the gray levels.
The method of claim 1,

The charge sharing line further includes an external capacitor line connected to an external capacitor,

The external capacitor is a data driving device for determining a bonding defect that reduces an increase rate of an output voltage of the charge sharing line by sharing charge with the first and second load capacitors.
The method of claim 9,

The external capacitor is a data driving device for determining a bonding defect having a capacitance greater than that of the first and second load capacitors.
A first load capacitor connected to the first data line and charged with a voltage of a first level;

A second load capacitor connected to the second data line and charged with a voltage of a second level;

A charge sharing line connected to the first and second data lines when charging of the first and second load capacitors is completed to share the charges charged in the first and second load capacitors; And

A display device that determines bonding defects, including a determination unit, using an output voltage of the charge sharing line to determine whether bonding between a data driving device and a display panel is defective.
The method of claim 11,

The determination unit,

If the first output voltage at the first point in time, which is a transient response, is less than or equal to the first reference voltage, it is determined as an open defect, and if the second output voltage, which is a steady state response, is different from the second reference voltage, it is determined as a short circuit defect Display device.
The method of claim 11,

The determination unit,

When it is determined that the bonding between the data driving device and the display panel is normal, the bonding resistance value between the data driving device and the display panel is mapped to the first point in time that is a transient response on a table in which bonding resistance values are mapped for each output voltage. 1 A display device that determines bonding defects determined by a resistance value mapped to an output voltage.
The method of claim 11,

Further comprising a ground switch for initializing the first and second load capacitors by connecting the charge sharing line to a ground terminal,

The grounding switch,

A display device configured to determine a bonding defect for initializing the first and second load capacitors by connecting the charge sharing line to a ground terminal before the first and second load capacitors are charged.
The method of claim 11,

The first level voltage is a voltage corresponding to a maximum gray level among a plurality of gray levels, and the second level voltage is a voltage corresponding to a minimum gray level among the gray levels.