CN114758614A - Display driving circuit and method for compensating brightness thereof - Google Patents

Display driving circuit and method for compensating brightness thereof Download PDF

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Publication number
CN114758614A
CN114758614A CN202210505756.6A CN202210505756A CN114758614A CN 114758614 A CN114758614 A CN 114758614A CN 202210505756 A CN202210505756 A CN 202210505756A CN 114758614 A CN114758614 A CN 114758614A
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load
representing
partition
pixel circuits
pixel
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CN114758614B (en
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彭俊杰
赵健富
简民峰
杨智翔
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AU Optronics Corp
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AU Optronics Corp
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0626Adjustment of display parameters for control of overall brightness
    • G09G2320/064Adjustment of display parameters for control of overall brightness by time modulation of the brightness of the illumination source
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0626Adjustment of display parameters for control of overall brightness
    • G09G2320/0646Modulation of illumination source brightness and image signal correlated to each other

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

A display driving circuit and a method for compensating brightness thereof are used for controlling a display panel. The display driving circuit includes a memory and a processor. The display panel includes a plurality of pixel circuits forming a plurality of partitions. Each partition includes a portion of the plurality of pixel circuits. The memory is used for storing a plurality of compensation data of a plurality of partitions. The processor is used for reading a plurality of compensation data to respectively compensate the brightness of a plurality of subareas, and voltage correction quantities represented by different compensation data are positively correlated to voltage drops of different subareas. The processor is also used for calculating the global load according to the gray-scale values of the pixel circuits; calculating a local load according to gray-scale values of part of pixel circuits of a first partition of the plurality of partitions; and adjusting the original slope of the control signal received by the first partition into an adjusted slope according to the global load and the local load so as to control the light-emitting time length of the first partition.

Description

Display driving circuit and method for compensating brightness thereof
Technical Field
The present disclosure relates to a brightness control technique of a display device, and more particularly, to a display driving circuit capable of avoiding brightness error compensation and a method for compensating brightness thereof.
Background
The sub-millimeter Light Emitting Diode (Mini Light-Emitting Diode) refers to a Light Emitting Diode with a grain size of about 100 microns, and the Micro Light Emitting Diode (Micro Light-Emitting Diode) is a Light Emitting Diode with a grain size of less than 50 microns. When the submillimeter light-emitting diode and the micro light-emitting diode are applied to a display, the driving current is large when the submillimeter light-emitting diode and the micro light-emitting diode emit light, so that the voltage drop (IR drop) generated by the system impedance is large, the driving current can be different among different pixels, and the light-emitting brightness of the display is uneven.
In the conventional brightness test and correction process before the display panel leaves the factory, compensation data is written into a memory to compensate for the brightness unevenness of the display panel which may occur due to the voltage drop. However, as the current drawn by the display panel is different, the voltage drop of different blocks will also change. Therefore, the compensation data fixed at the factory may cause overcompensation or overcompensation, i.e., some blocks of the display panel are too bright or some blocks are too dark.
Disclosure of Invention
The present disclosure provides a display driving circuit for controlling a display panel. The display panel includes a plurality of pixel circuits forming a plurality of partitions. Each partition includes a plurality of pixel circuits and a portion of the pixel circuits. The display driving circuit includes a memory and a processor. The memory is used for storing a plurality of compensation data of a plurality of partitions. The processor is used for reading the compensation data to compensate the brightness of the partitions respectively, and the voltage correction represented by different compensation data is positively related to the voltage drop of different partitions. The processor is further used for calculating the global load according to the gray-scale values of the pixel circuits; calculating a local load according to gray-scale values of a part of pixel circuits of a first partition of the plurality of partitions; and adjusting the original slope of the control signal received by the first partition into an adjusted slope according to the global load and the local load so as to control the light-emitting time length of the first partition.
The present disclosure provides a method for compensating brightness, which is suitable for a display driving circuit. The display driving circuit is used for controlling the display panel. The display panel includes a plurality of pixel circuits forming a plurality of partitions. Each partition includes a portion of the plurality of pixel circuits. The display driving circuit is further used for accessing a plurality of compensation data to respectively compensate the brightness of the plurality of subareas. The method includes calculating a global load according to gray levels of a plurality of pixels; calculating a local load according to gray-scale values of a part of pixel circuits of a first partition of the plurality of partitions; obtaining the current load current and the heaviest load current of the first partition from the lookup table according to the global load and the local load; calculating a load current difference value according to the current load current and the heaviest load current; and adjusting the original slope of the control signal received by the first partition into an adjusted slope according to the load current difference so as to control the light-emitting time length of the first partition.
The present disclosure provides a method for compensating brightness, which is suitable for a display driving circuit. The display driving circuit is used for controlling the display panel. The display panel includes a plurality of pixel circuits forming a plurality of partitions. Each partition includes a portion of the plurality of pixel circuits. The display driving circuit is further used for accessing a plurality of compensation data to respectively compensate the brightness of the plurality of subareas. The method includes calculating a global load according to gray levels of a plurality of pixels; calculating a local load according to gray-scale values of a part of pixel circuits of a first partition of the plurality of partitions; obtaining the current load current and the heaviest load current of the first partition from the lookup table according to the global load and the local load; calculating a load current difference value according to the current load current and the heaviest load current; and adjusting the original frequency of the control signal received by the first partition into the adjusted frequency according to the load current difference so as to control the light-emitting time length of the first partition.
Drawings
FIG. 1A is a simplified functional block diagram of a display panel according to an embodiment of the present disclosure.
Fig. 1B is a simplified circuit diagram of a pixel circuit according to an embodiment of the disclosure.
FIG. 2 is a simplified functional block diagram of a display driver circuit according to an embodiment of the present disclosure.
Fig. 3 is a simplified waveform diagram of signals input to the pixel circuit of fig. 2.
FIG. 4 is a flowchart illustrating a method of compensating brightness according to an embodiment of the disclosure.
Fig. 5 is a simplified waveform diagram of the control signal of the pixel circuit in fig. 2.
FIG. 6 is a flowchart illustrating a method for compensating luminance according to an embodiment of the present disclosure.
Fig. 7 is a simplified waveform diagram of signals input to the pixel circuit.
[ description of symbols ]
Data _ v image Data
Data _ d display Data
100 display panel
110 display driving circuit
120 source driver
130 gate driver
140, division into zones
150 pixel circuit
GS control clock signal
VdataData voltage
VscanScanning signals
VEMLuminous signal
S11-Sij control signal
151, 152, 153 transistors
154 pulse width modulation signal generator
155 light emitting element
VDDA first operating voltage
VSSA second operating voltage
ILEDDrive current
210 memory
220, processor
Cm _11 to Cm _ ij compensation data
VoutOutput signal
VoriginalInitial voltage value
400, 600 method
S410, S420, S430, S440, S450, S610, S620, S630, S640, S650
Δ t time difference
TEM_stageThe total time length of the lighting phase
TEM_original_onThe original light-emitting time length of the pixel circuit
TEM_after_onLength of time for emitting light
Detailed Description
Embodiments of the present disclosure will be described below with reference to the accompanying drawings. In the drawings, the same reference numbers indicate the same or similar elements or process flows.
Fig. 1A is a simplified functional block diagram of a display panel 100 according to an embodiment of the disclosure. The display panel 100 includes a plurality of pixel circuits 150 forming a plurality of partitions 140, i.e., each partition 140 includes a portion of the pixel circuits 150 of the plurality of pixel circuits 150. The display panel 100 further includes a display driving circuit 110, a source driver 120, and a gate driver 130. The display driving circuit 110 is used for providing display Data _ d to the source driver 120, providing a control clock signal GS to the gate driver 130, and providing control signals S11 to Sij to the plurality of partitions 140 according to the image Data _ v. In some embodiments, the image Data _ v may come from a Graphics Processor (GPU) or a Central Processing Unit (CPU). The display Data _ d is used to specify gray-scale values of the plurality of pixel circuits 150. The source driver 120 is used for providing a plurality of Data voltages V according to the display Data _ d data(only one of which is shown for simplicity) to a plurality of pixel circuits 150. The gate driver 130 is used for providing a plurality of scan signals VscanOne of which is shown for simplicity as a representative, to the plurality of pixel circuits 150 for driving the plurality of pixel circuits 150 to receive the data voltage Vdata
In an embodiment, the Display driving circuit 110 may be implemented by a Display Driver IC (DDIC). In an embodiment, the display driving circuit 110 may be implemented by a Timing Controller (TCON), a Field Programmable Gate Array (FPGA), or an Application Specific Integrated Circuit (ASIC). The timing controller may be configured to control a timing operation of the display panel 100, for example, adjust a frequency of the clock signal GS to control a refresh rate of the display panel 100 to achieve a power saving function; the timing controller may also process the image Data _ v, such as decoding the image Data _ v, changing the resolution (Scaling) of the image Data _ v, performing analog-to-digital conversion on the image Data _ v when the image Data _ v is in an analog form, and the like.
The plurality of partitions 140 are arranged in a matrix having i rows and j columns, i.e., a total of i × j partitions 140, where i and j are positive integers. The control signals S11 through Sij are respectively transmitted to the i × j partitions 140, and the index in each of the labels of the control signals S11 through Sij represents the corresponding partition 140. For example, the control signal S11 is sent to all the pixel circuits 150 in the partition 140 located at the top left corner of fig. 1A; the control signal Sij is sent to all pixel circuits 150 in the partition 140 located at the bottom right corner of FIG. 1A, and so on.
Fig. 1B is a simplified circuit diagram of a pixel circuit 150 according to an embodiment of the disclosure. Fig. 1B shows the pixel circuits 150 in the partitions 140 receiving the control signals Sij, and it is understood that the pixel circuits 150 in different partitions 140 may have the same circuit structure but receive different control signals. The pixel circuit 150 includes transistors 151, 152, and 153, a Pulse Width Modulation (PWM) signal generator 154, and a light emitting element 155. A control terminal of the transistor 151 for receiving a scan signal VscanThe first terminal is used for receiving a data voltage VdataAnd a second terminal coupled to the PWM signal generator 154. The control terminal of the transistor 152 receives the light emitting signal V EMThe first end is used for receiving a first working voltage VDDA second terminal coupled to the first terminal of the transistor 153, wherein the light emitting signal VEMMay be generated by the gate driving circuit 130 or an additional gate driving circuit. The control terminal of the transistor 153 receives the output signal V output by the PWM signal generator 154outThe first terminal is coupled to the second terminal of the transistor 152, and the second terminal is coupled to the first terminal of the light emitting element 155.
In the present embodiment, the control signals S11 Sij are ramp signals. The PWM signal generator 154 is used for receiving the control signal Sij and for generating the data voltage V according to the slope of the control signal SijdataDetermining the output signal VoutPulse width of (3), wherein the signal V is outputoutFor turning on the transistor T153. Therefore, the light-emitting time of the pixel circuit 150 is related to the slope of the control signal Sij and the data voltage VdataAnd the output signal VoutThe pulse width of (2).
FIG. 2 is a simplified functional block diagram of the display driving circuit 110 according to an embodiment of the present disclosure. The display driver circuit 110 includes a memory 210 and a processor 220. The memory 210 is used for storing a plurality of compensation data Cm _11 to Cm _ ij of a plurality of partitions 140, and an index in each label of the compensation data Cm _11 to Cm _ ij represents the partition 140 corresponding thereto. The processor 220 is used for reading the compensation data Cm _11 to Cm _ ij to compensate the brightness of the partitions 140 respectively. For example, the processor 220 can adjust the display Data _ d according to the compensation Data Cm _11, so that the plurality of Data voltages V provided to the upper left corner partition 140 of fig. 1A dataHave a common voltage correction. For another example, the processor 220 may adjust the display Data _ d according to the compensation Data Cm _ ij, so that the Data voltages V provided to the lower right corner partition 140 of fig. 1AdataWith another common voltage modifier.
The voltage modifiers represented by the different compensation data are positively correlated to the voltage drop (IR drop) for the different bins 140. The voltage drop refers to a first operating voltage VDD(or the second operating voltage V)SS) When the voltage is transmitted to the power supply line, the voltage decreases (or increases) due to the impedance of the power supply line. In some embodiments, the lower partitions 140 in FIG. 1A have larger voltage drops. For example, the voltage drop of the partition 140 corresponding to the compensation data Cm _ ij is greater than the voltage drop of the partition 140 corresponding to the compensation data Cm _1j, so that the voltage correction represented by the compensation data Cm _ ij is greater than the voltage correction represented by the compensation data Cm _1j, and so on, thereby enabling to obtain the effect of reducing the voltage drop of the partition 140 corresponding to the compensation data Cm _ ijThe brightness non-uniformity (mura) phenomenon of the display panel 100 is eliminated. However, the present disclosure is not limited thereto, and the voltage drop of each partition 140 may be different due to the arrangement of the power lines.
In some embodiments, the pre-factory brightness test and calibration process of the display panel 100 writes the compensation data Cm _11 to Cm _ ij into the memory 210. However, as the current drawn by the display panel 100 varies, the voltage drop of the block 140 also varies. Therefore, the compensation data Cm _11 to Cm _ ij fixed at the factory may cause over-compensation or under-compensation, i.e. the brightness of the block 140 is too bright or too dark. Thus, the present disclosure improves this problem by providing two methods 400 and 600 of compensating for luminance, which methods 400 and 600 will be described in subsequent paragraphs with reference to fig. 4 and 6. To facilitate understanding of the luminance compensation method 400, the control signals provided by the display panel 100 to the pixel circuit 150 of fig. 2 and the operation of the pixel circuit 150 of fig. 2 are described with reference to fig. 3.
Fig. 3 is a simplified waveform diagram of signals input to the pixel circuit 150 of fig. 2. In the embodiment of fig. 3, transistors 151, 152, and 153 are P-type transistors. The operation of the pixel circuit 150 in one frame can be divided into three phases, namely a reset phase, a scan phase and a light-emitting phase TEM_Stage. In fig. 3, the waveform of the control signal Sij shown by the dotted line is the preset waveform of the control signal Sij, and the waveform shown by the solid line is the waveform adjusted by the method 400 for compensating the luminance, and actually the control signal Sij output to the pixel circuit 150 has the waveform shown by the dotted line.
Referring to fig. 2 and 3, in the reset stage, the data signal V with the voltage correction amount added theretodataIs input to the PWM signal generator 154.
In the scan stage, the pixel circuit 150 can detect and compensate the threshold voltage variation of the transistor 153, so that the driving current I generated by the transistor 153LEDThe size is not affected by the threshold voltage of the transistor 153. Methods for compensating for the threshold voltage variation are well known to those skilled in the art, and therefore, the related description is omitted here.
In the light-emitting stage, the control signal Sij will be from the initial voltage value VoriginalBegins to fall when the control signal Sij falls below the data voltage V dataThe PWM signal generator 154 will output the signal VoutHaving pulses to turn on transistor 153 to generate drive current ILED. As can be seen from FIG. 3, the adjusted waveform of the control signal Sij will result in the output signal VoutThe pulse width is decreased by the time difference Δ t, i.e., the light-emitting time length of the pixel circuit 150 is shortened by the time difference Δ t. By adjusting the slope of the control signal Sij to control the time difference Δ t, the above-mentioned over-compensation or under-compensation problem can be improved. The step of adjusting the slope of the control signal Sij by the method 400 for brightness compensation will be described in detail with reference to fig. 4.
FIG. 4 is a flowchart of a method 400 for compensating brightness according to an embodiment of the disclosure. The method 400 is described below with reference to FIGS. 2-4. The method 400 adjusts the slope of a control signal (e.g., the control signal Sij, for example, below) to avoid the luminance overcompensation or the under compensation of the block 140 corresponding to the control signal. However, the method 400 may be performed multiple times to adjust the slope of all of the control signals S11 Sij. Any combination of the features of the method 400 or other methods described herein may be implemented by a plurality of instructions stored in a non-transitory computer readable medium or the aforementioned memory 210. When executed, the instructions cause the processor 220 to perform some or all of any of the methods described above. It should be understood that any method described herein may include more or fewer steps than shown in the flow chart, and that the steps in the method may be performed in any suitable order.
In step S410, the global load L (i.e. the average gray level of all the pixel circuits 150 in the display panel 100) is calculated according to the gray levels of all the pixel circuits 150 in the display panel 100gThe calculation is as in formula 1:
Figure BDA0003635957820000071
in equation 1In large, npixelRepresenting the number of the plurality of pixel circuits 150, giRepresents the gray scale value, g, of each pixel circuit 150maxRepresents the maximum gray scale value of the display panel 100, and i is a positive integer.
In one embodiment, the resolution of the display panel 100 is 800 × 600 (i.e., the number of pixels is 480000), and the gray scale value ranges from 0 to 255. If the gray scale value of each pixel circuit 150 is 100, the global load LgThe content was 39.2%.
Step S420 is to calculate the local load L according to the gray-scale values of all the pixel circuits 150 of one partition 140l(the average gray scale value of all pixel circuits 150 in the partition 140 can be understood) wherein the local load LlThe calculation is as in equation 2:
Figure BDA0003635957820000072
in equation 2, npart_pixelRepresenting the number of pixel circuits 150 in the partition 140, j being a positive integer.
In one embodiment, the number of the pixel circuits 150 in a partition 140 is 1000, the gray-scale value of the display panel 100 ranges from 0 to 255, and if the gray-scale value of each pixel circuit 150 in the partition 140 is 150, the local load L is determined lIt was 58.8%.
The step S430 depends on the global load LgAnd a local load L of partition 140lObtaining the present load current I for that partition 140 from a lookup tablepresentAnd the most heavy load current Imax. In one embodiment, the lookup table may be stored in the memory 210 of FIG. 2. Now load current IpresentIt can be understood that the partition 140 now has the driving currents I of all the pixel circuits 150LEDAverage value of (a). The heaviest load current ImaxIt can be understood that when all the pixel circuits 150 in the display device 100 display the highest gray level, the driving current I of the pixel circuits 150 in the partition 140LED
Step S440 is based on the present load current LlAnd the most heavy load current ImaxCalculating the difference Δ I between the load currents, e.g.Equation 3 shows:
ΔI=Ipresent-Imaxequation 3
In step S450, the slope of the control signal Sij is adjusted according to the load current difference Δ I, and the relationship between the slope of the control signal Sij before and after the adjustment will be described by formula derivation.
First, a representative data voltage V of the partition 140 after considering the voltage drop of the partition 140dataCan be expressed by equation 4, where the initial voltage VoriginalRepresents the voltage value of the control signal Sij at the beginning of the light emission phase:
Vdata=Voriginal×LgLlequation 4
Referring to FIG. 3 again, when the control signal Sij falls to be less than the data voltage V dataAt this time, the pixel circuit 150 starts emitting light. Therefore, with the triangle-like relationship, when the slope of the control signal Sij is not adjusted, the original emitting time of the pixel circuit 150 can be expressed by equation 5:
Figure BDA0003635957820000081
in the above formula, TEM_original_onRepresents the original light-emitting time duration, T, of the pixel circuit 150EM_stageRepresenting the total length of time of the light emission phase,
as mentioned above, the slope adjustment of the control signal Sij will cause the light-emitting time of the pixel circuit 150 to be shortened by a time difference Δ t, which can be determined by the current load current IpresentAnd the heaviest load current ImaxExpressed, as shown in equation 6:
Figure BDA0003635957820000082
then, when the slope of the control signal Sij is adjusted, a representative light-emitting time duration of all the pixel circuits 150 in the partition 140 can be expressed by equation 7:
Figure BDA0003635957820000083
therefore, the slope of the control signal Sij before adjustment can be expressed as equation 8, where slopeoriginalRepresents the slope of the control signal Sij before adjustment:
Figure BDA0003635957820000084
the adjusted slope of the control signal S _ ij can be expressed as equation 9, where slope represents the adjusted slope of the control signal Sij:
Figure BDA0003635957820000085
Figure BDA0003635957820000091
load L over the whole areagWhen smaller, the voltage drop of the entire panel is smaller, so that the driving current I flowing through the pixel circuit 150 is smaller LEDRise and overcompensation may occur. However, as shown in equation 9, the rising drive current ILEDThe load current difference Δ I is increased to increase the slope of the control signal Sij (since the slope of the control signal Sij is negative), and the light emitting time of the pixel circuit 150 is shortened to reduce the brightness thereof, thereby avoiding the over-compensation phenomenon. On the other hand, load L is applied over the entire areagWhen the voltage is larger, the voltage drop of the whole panel is larger, so that the driving current I flowing through the pixel circuit 150 is largerLEDAt this time, the load current difference Δ I is decreased to decrease the slope of the control signal Sij properly, thereby avoiding the insufficient compensation. That is, the load current difference Δ I and the slope of the control signal Sij are positively correlated.
FIG. 5 is a simplified waveform diagram of the control signal of the pixel circuit 150 in FIG. 2. In the embodiment of FIG. 5, transistors 151, 152, and 153 are P-type transistors and control signals S11 Sij are clock signals. The operation of the pixel circuit 150 is divided into three phases, namely, a reset phase, a scan phase and a light-emitting phase TEM_Stage. In fig. 5, the waveform of the control signal Sij shown by a dotted line is a predetermined waveform of the control signal Sij, and the waveform shown by a solid line is a waveform adjusted by the method 600 for compensating luminance, and the control signal Sij actually outputted to the pixel circuit 150 has a waveform shown by a solid line. The operation contents of the reset phase and the scan phase in fig. 5 are the same as those in fig. 3, and are not repeated herein.
In the light-emitting period, when the control signal Sij has continuous pulses, the PWM signal generator 154 will make the output signal VoutHaving a pulse to turn on transistor 153 to generate a driving current ILED. As shown in fig. 5, the control signal Sij has a predetermined number (e.g. 4) of pulses in the light-emitting period, and the frequency of the waveform adjusted by the control signal Sij is higher, so that the output signal V is increasedoutThe pulse width is decreased by the time difference Δ t, i.e., the light-emitting time length of the pixel circuit 150 is shortened by the time difference Δ t.
In other words, if the frequency of the control signal Sij becomes higher, the light-emitting time of the pixel circuit 150 is shortened, and if the frequency of the control signal Sij becomes lower, the light-emitting time of the pixel circuit 150 is prolonged. By adjusting the frequency of the control signal Sij to control the time difference Δ t, the above-mentioned over-compensation or under-compensation problem can be improved. The step of adjusting the frequency of the control signal Sij by the method 600 for brightness compensation will be described in detail with reference to fig. 6.
FIG. 6 is a flowchart of a method 600 for compensating luminance according to an embodiment of the disclosure. The method 600 improves the overcompensation or overcompensation phenomenon by adjusting the frequency of the control signal Sij. However, the method 600 may be performed multiple times to adjust the slope of all of the control signals S11 Sij. Any combination of the features of the method 600 or other methods described herein may be implemented by a plurality of instructions stored in a non-transitory computer readable medium or the aforementioned memory 210. When executed, the instructions cause the processor 220 to perform some or all of any of the methods described above. It should be understood that any method described herein may include more or fewer steps than shown in the flow chart, and that the steps in the method may be performed in any suitable order.
In step S610, the global load L is calculated according to the gray-scale values of all the pixel circuits 150 in the display panel 100gThe method for calculating the global load is the same as step S410, and will not be repeated herein.
Step S620 is to calculate the local load according to the gray-scale values of all the pixel circuits 150 of one partition 140, wherein the manner of calculating the local load is the same as step S420, and the description thereof is not repeated herein.
In step S630, the present load current I of a partition 140 is obtained from the lookup table according to the global load and the local loadpresentAnd the heaviest load current Imax
Step S640 is based on the present load current IpresentAnd the heaviest load current ImaxThe load current difference Δ I is calculated in the same manner as step S440, which is not repeated herein.
In step S650, the frequency of the control signal Sij is adjusted according to the load current difference Δ I, and the relationship between the frequency of the control signal Sij before and after the adjustment will be described by formula derivation.
The adjusted light-emitting time of the pixel circuit 150 can be determined by the present load current IpresentAnd the heaviest load current ImaxAnd (4) calculating, as shown in formula 10:
Figure BDA0003635957820000101
the frequency of the control signal Sij is inversely proportional to the length of the light emitting time, as shown in equation 11:
Figure BDA0003635957820000102
in equation 11 Middle, freqoriginalRepresenting the frequency of the control signal Sij before adjustment, and freqafterRepresenting the adjusted frequency of the control signal Sij.
From equation 11, the rising drive current ILEDThe load current difference Δ I is increased to increase the frequency of the control signal Sij, so that the light emitting time of the pixel circuit 150 is shortened to reduce the brightness thereof, thereby avoiding the over-compensation phenomenon. On the other hand, in the global load LgWhen the voltage drop is larger, the voltage drop of the whole panel is larger, so that the driving current I flowing through the pixel circuit 150 is largerLEDAt this time, the load current difference Δ I is decreased to reduce the frequency of the control signal Sij, thereby avoiding the insufficient compensation. That is, the load current difference Δ I and the frequency of the control signal Sij are positively correlated.
Fig. 7 is a simplified waveform diagram of signals input to the pixel circuit 150. The signal waveforms of fig. 7 are applicable to an embodiment in which the transistors 151, 152, and 153 of the pixel circuit 150 are implemented as N-type transistors. Thus, the data voltage VdataControl signal Sij, scanning signal VscanAnd a light emission signal VEMWith a waveform that is the inverse of the corresponding signal in fig. 4.
In the embodiment of fig. 7, the waveform of the control signal Sij shown by the solid line is the predetermined waveform of the control signal Sij, and the waveform shown by the dotted line is the waveform adjusted by the method 400, and the control signal Sij actually outputted to the pixel circuit 150 has the waveform shown by the dotted line. As can be seen from fig. 7, if the current difference Δ I increases, the slope of the control signal Sij should decrease (the slope of the control signal Sij is a positive value) to reduce the light emitting time of the pixel circuit 150, and if the current difference Δ I decreases, the slope of the control signal Sij should increase. That is, when the method 400 is applied to the pixel circuit 150 made of N-type transistors, the method 400 can be adaptively modified so that the current difference Δ I and the slope of the control signal Sij are in negative correlation.
On the other hand, when the method 600 is applied to the pixel circuit 150 made of N-type transistors, the relationship between the current difference Δ I and the frequency of the control signal Sij can still maintain positive correlation, and thus the description thereof is omitted.
Certain terms are used throughout the description and following claims to refer to particular components. However, it will be understood by those skilled in the art that the same elements may be referred to by different names. The description and the claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Further, "coupled" herein includes any direct and indirect means of connection. Therefore, if a first element is coupled to a second element, the first element may be directly connected to the second element through an electrical connection or a signal connection such as wireless transmission or optical transmission, or may be indirectly connected to the second element through another element or a connection means.
As used herein, the term "and/or" is inclusive of any combination of one or more of the listed items. In addition, any reference to singular is intended to include the plural unless the specification specifically states otherwise.
The above are only preferred embodiments of the present disclosure, and all equivalent changes and modifications made by the claims of the present disclosure should be covered by the present disclosure.

Claims (10)

1. A display drive circuit for controlling a display panel including a plurality of pixel circuits forming a plurality of partitions, each partition including a part of the pixel circuits of the plurality of pixel circuits, the display drive circuit comprising:
a memory for storing a plurality of compensation data for the plurality of partitions; and
the processor is used for reading a plurality of compensation data to respectively compensate the brightness of the plurality of subareas, and the voltage correction quantities represented by different compensation data are positively related to the voltage drop of different subareas;
wherein the processor is further configured to:
calculating the global load according to the gray-scale values of the pixel circuits;
calculating a local load according to the gray-scale values of the part of the pixel circuits of a first partition of the plurality of partitions; and
according to the global load and the local load, the original slope of the control signal received by the first partition is adjusted to be the adjusted slope so as to control the light-emitting time length of the first partition.
2. The display driver circuit of claim 1, wherein the global load is derived from the following equation:
Figure FDA0003635957810000011
Wherein L isgRepresenting the global load, npixelRepresenting the number of the plurality of pixel circuits, giRepresenting the gray-scale value, g, of each pixel circuit in the display panelmaxRepresenting the maximum gray scale value of the display panel, wherein i is a positive integer; and
wherein the local load is derived from the following equation:
Figure FDA0003635957810000012
wherein L islRepresenting the local load, npart_pixelRepresenting the number of the partial pixel circuits, gjRepresents the gray scale value of each pixel circuit in the first partition, and j is a positive integer.
3. The display driver circuit of claim 1, wherein the processor is further configured to:
obtaining the current load current and the most heavily loaded current of the first partition from a lookup table according to the global load and the local load, calculating a load current difference according to the current load current and the most heavily loaded current, and adjusting the slope of the control signal according to the load current difference.
4. A display driver circuit according to claim 3, wherein the adjusted slope of the control signal is obtained by the following equation:
Figure FDA0003635957810000021
wherein slopeoriginalRepresents the original slope, slopeafterRepresents the adjusted slope, Δ I represents the load current difference, IpresentRepresenting the present load current, LgRepresenting the global load, L lRepresenting the local load.
5. A method for compensating brightness of a display driver circuit, wherein the display driver circuit is adapted to control a display panel, the display panel including a plurality of pixel circuits forming a plurality of partitions, each partition including a portion of the pixel circuits of the plurality of pixel circuits, the display driver circuit further adapted to access a plurality of compensation data for respectively compensating brightness of the plurality of partitions, the compensation data representing voltage corrections positively correlated to voltage drops of different partitions, the method comprising:
calculating the global load according to the gray-scale values of the pixels;
calculating a local load according to the gray-scale values of the part of the pixel circuits of a first partition of the plurality of partitions;
obtaining the current load current and the heaviest load current of the first partition from a lookup table according to the global load and the local load;
calculating a load current difference value according to the current load current and the heaviest load current; and
and adjusting the original slope of the control signal received by the first partition into an adjusted slope according to the load current difference so as to control the light-emitting time length of the first partition.
6. The method of claim 5, wherein the global load is derived from the following equation:
Figure FDA0003635957810000022
Wherein L isgRepresenting the global load, npixelRepresenting the number of the plurality of pixel circuits, giRepresenting the gray-scale value, g, of each pixel circuit in the display panelmaxRepresenting the maximum gray scale value of the display panel, wherein i is a positive integer; and
wherein the local load is derived from the following equation:
Figure FDA0003635957810000023
wherein L islRepresenting the local load, npart_pixelRepresenting the number of the partial pixel circuits, gjRepresents the gray scale value of each pixel circuit in the first partition, and j is a positive integer.
7. The method of claim 5, wherein the adjusted slope of the control signal is obtained by the following equation:
Figure FDA0003635957810000031
wherein slopeoriginalRepresents the original slope, slopeafterRepresents the adjusted slope, Δ I represents the load current difference, IpresentRepresenting the present load current, LgRepresenting the global load, LlRepresenting the local load.
8. A method for compensating brightness of a display driver circuit, the display driver circuit for controlling a display panel, the display panel including a plurality of pixel circuits forming a plurality of partitions, each partition including a portion of the pixel circuits of the plurality of pixel circuits, the display driver circuit further for accessing a plurality of compensation data to compensate brightness of the plurality of partitions respectively, and voltage corrections represented by different compensation data being positively correlated to voltage drops of different partitions, the method comprising:
Calculating the global load according to the gray-scale values of the pixel circuits;
calculating a local load according to the gray-scale values of the part of the pixel circuits of a first partition of the plurality of partitions;
obtaining the current load current and the heaviest load current of the first partition from a lookup table according to the global load and the local load;
calculating a load current difference value according to the current load current and the heaviest load current; and
and adjusting the original frequency of the control signal received by the first partition into an adjusted frequency according to the load current difference so as to control the light-emitting time length of the first partition.
9. The method of claim 8, wherein the global load is obtained by the following equation:
Figure FDA0003635957810000032
wherein L isgRepresenting the global load, npixelRepresenting the number of the plurality of pixel circuits, giRepresenting the gray-scale value, g, of each pixel circuit in the display panelmaxRepresenting the maximum gray scale value of the display panel, wherein i is a positive integer; and
wherein the local load is derived from the following equation:
Figure FDA0003635957810000033
wherein L islRepresenting the local load, npart_pixelRepresenting the number of the partial pixel circuits, gjRepresents the gray scale value of each pixel circuit in the first partition, and j is a positive integer.
10. The method of claim 8, wherein the adjusted frequency of the control signal is obtained by the following equation:
Figure FDA0003635957810000041
Wherein Δ I represents the load current difference, IpresentRepresenting the present load current, freqoriginalRepresenting the original frequency, freqafterRepresenting the adjusted frequency.
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