WO2021039177A1 - Energization control device and power supply unit - Google Patents

Abstract

An energization control device is provided with an inter-system switch (inter-system SW) and a SW control circuit that is an inter-system switch control unit. The inter-system SW switches between conduction and cutoff of an electric current in an inter-system bus. The SW control circuit controls an operating state of the inter-system SW. The SW control circuit has a current acquisition unit (S40), a cutoff control unit (S60), a state acquisition unit (S20), and a threshold change unit (S30). The cutoff control unit deems that a ground fault abnormality has occurred and cuts off the inter-system SW when a current value Ismr acquired by the current acquisition unit rises above an abnormality threshold IsmrTH. The threshold change unit causes the abnormality threshold IsmrTH to be changed according to a sub-power supply voltage Vs (system state value) acquired by the state acquisition unit.

Description

Energization control device and power supply unit Cross-reference of related applications

This application is based on Patent Application No. 2019-156094 filed in Japan on August 28, 2019, and the description thereof is incorporated herein by reference.

The disclosure in this specification relates to an energization control device and a power supply unit mounted on a vehicle.

In the redundancy system described in Patent Document 1, power supply can be made redundant by making it possible to supply electric power from either of the two batteries to the load group mounted on the vehicle. This redundant system includes a first system bus, a second system bus, and an intersystem bus. The first system bus transmits the electric power supplied from the first battery to the first load. The second system bus transmits the electric power supplied from the second power source to the second load. The inter-system bus electrically connects the first system bus and the second system bus.

In such a redundant system, even if a ground fault occurs in either of the two system buses, the voltage of both the first system bus and the second system bus drops significantly. In this case, there is a concern that both the first and second loads may malfunction. In response to this concern, the inter-system bus is provided with an inter-system switch for switching between energization and interruption of current. Then, in the normal state where no ground fault has occurred, the inter-system switch is turned on to exert the redundancy function. On the other hand, when the current flowing through the inter-system bus rises beyond the threshold value, it is considered that a ground fault has occurred and the inter-system switch is shut off. As a result, both the first and second system buses reduce the possibility of falling into a state of a large voltage drop (abnormally low voltage state) that causes a malfunction.

Japanese Patent No. 6432355

By the way, if the above threshold value is set to an excessively high value, the response time from the timing when the ground fault actually occurs until the inter-system switch is shut off becomes long. Then, the voltage drop of the system bus caused by the response time becomes large, and there is a concern that the shutoff may not be in time and the operation may malfunction. On the other hand, if the threshold value is set to an excessively small value, there is a concern that a ground fault may be erroneously detected and the inter-system switch may be shut off, for example, the inrush current flowing at the start of the load may exceed the threshold value.

One purpose to be disclosed is to provide an energization control device that achieves both quick shutoff and suppression of false detection when shutting off the switch between systems when a ground fault occurs.

In order to achieve the above object, one aspect disclosed is
The first system bus that transmits the power supplied from the first power supply to the first load, and
The second system bus that transmits the power supplied from the second power supply to the second load, and
An inter-system bus that electrically connects the first system bus and the second system bus,
In the energization control device applied to the redundant power supply system for vehicles equipped with
An inter-system switch that switches between energizing and shutting off current in the inter-system bus,
An inter-system switch control unit that controls the operating state of the inter-system switch,
With
The inter-system switch control unit
A current acquisition unit that acquires the current value flowing through the redundant power supply system,
When the current value acquired by the current acquisition unit rises above the abnormal threshold value, it is considered that a ground fault has occurred and the inter-system switch is controlled to the cutoff state.
A status acquisition unit that acquires the system status value that represents the status of the redundant power supply system during normal operation, which is not considered to be a ground fault abnormality.
It is an energization control device having a threshold value changing unit that changes an abnormal threshold value according to a system state value acquired by the state acquisition unit.

According to the above-mentioned energization control device, when the current value flowing through the redundant power supply system rises beyond the abnormality threshold value, it is considered that a ground fault has occurred and the inter-system switch is controlled to the cutoff state. Therefore, it is possible to reduce the possibility that both the first and second system buses fall into a state of a large voltage drop (abnormally low voltage state) that causes a malfunction.

Then, the abnormality threshold value used for detecting the ground fault abnormality is changed according to the state value (system state value) of the redundant power supply system at the normal time. Therefore, even if the response time from the timing when the ground fault actually occurs to the time when the inter-system switch is shut off is long, if the system state value does not cause an abnormally low voltage state, the abnormality threshold is set high. Can be set to a value. As a result, false detection can be suppressed. On the other hand, if the system state value has a high probability of falling into an abnormally low voltage state when the response time is long, the abnormality threshold value can be set to a low value. As a result, quick shutoff can be realized, and the risk of load malfunction can be reduced. That is, it is possible to achieve both quick shutoff and suppression of false positives.

Note that the reference numbers in parentheses described in the claims merely indicate an example of the correspondence with the specific configuration in the embodiment described later, and do not limit the technical scope at all.

It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 1st Embodiment, and is the figure which shows the operation when the ground fault occurs in the sub system bus. It is a block diagram which shows the operation when the ground fault occurs in the main system bus in 1st Embodiment. In the first embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. In the second embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. In the third embodiment, it is a figure which shows the relationship between the combination of a plurality of kinds of system state values and a threshold value. In the third embodiment, it is a time chart showing an example of the correspondence relationship between the time change of a plurality of types of system state values and the time change of the abnormality threshold value IsmrTH. In the third embodiment, it is a time chart showing an example of the correspondence relationship between the time change of a plurality of types of system state values and the time change of the abnormality threshold value IisoTH. In the third embodiment, it is a time chart showing an example of the correspondence relationship between the time change of the discharge current value Ismr and the time change of the abnormal threshold value IsmrTH. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 4th Embodiment. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 5th Embodiment. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 6th Embodiment. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 7th Embodiment.

Hereinafter, a plurality of embodiments of the present disclosure will be described with reference to the drawings. In addition, duplicate description may be omitted by assigning the same reference numerals to the corresponding components in each embodiment. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration.

(First Embodiment)
In the present embodiment shown in FIG. 1, an example in which the energization control device D is applied to a redundant power supply system for a vehicle will be described. However, the energization control device D can also be applied to a redundant power supply system other than that for vehicles.

The redundant power supply system shown in FIG. 1 includes a main power supply B10 and a sub power supply B20 as a first power supply and a second power supply mounted on the vehicle. Although only one main power supply B10 and one sub power supply B20 are shown in FIG. 1, a plurality of main power supplies B10 and / or a plurality of sub power supplies B20 may be provided as vehicle-mounted power supplies.

These main power supply B10 and sub power supply B20 are secondary batteries that generate a voltage of, for example, about 12V. The charging capacity of the main power supply B10 is larger than the charging capacity of the sub power supply B20. The energy density of the sub power supply B20 is higher than the energy density of the main power supply B10. For example, a lead storage battery is used for the main power supply B10, and a lithium ion battery is used for the sub power supply B20.

Further, the redundant power supply system includes a main system bus 10 (first system bus), a sub system bus 20 (second system bus), and an inter-system bus 30. The main system bus 10 transmits the electric power supplied from the main power source B10 to the first loads L10 and L11. The sub system bus 20 transmits the electric power supplied from the sub power source B20 to the second loads L20 and L21. The inter-system bus 30 electrically connects the main system bus 10 and the sub-system bus 20.

Specifically, one end of the inter-system bus 30 is connected to the junction box (JB11) of the main system, and the other end of the inter-system bus 30 is connected to the junction box (JB21) of the sub system.

In the following description, among the main system buses 10, the bus that connects JB11 and the main power supply B10 is called the main power supply side bus 10a, and the bus that connects JB11 and the first loads L10 and L11 is the main load side bus 10b. Called. Among the sub system buses 20, the bus connecting the JB 21 and the sub power supply B20 is called the sub power supply side bus 20a, and the bus connecting the JB 21 with the second loads L20 and L21 is called the sub load side bus 20b. Of the inter-system buses 30, the bus that connects the inter-system switch 31a and JB11, which will be described later, is called the main inter-system bus 30a. Of the inter-system buses 30, the bus that connects the inter-system switch 31b and JB21, which will be described later, is called the sub-side inter-system bus 30b. The JB 11 corresponds to the first node located between the main power supply B10 and the first load in the main system bus 10. The JB 21 corresponds to a second node located between the sub power supply B20 and the second load in the sub system bus 20.

A generator G10 (alternator) is connected to the main system bus 10 via JB11. The electric power output from the generator G10 is used for charging the main power source B10, charging the sub power source B20, supplying the first loads L10 and L11 and the second loads L20 and L21. It is also possible to charge the sub power source B20 from the main power source B10 via the inter-system bus 30. It is also possible to charge the main power supply B10 from the sub power supply B20 via the inter-system bus 30.

In the case of a hybrid vehicle having an engine and a drive motor as a power source, or an electric vehicle having a drive motor as a power source, a high-voltage power source may be provided as a power source for the drive motor. The voltage of the high-voltage power supply may be stepped down by a DC-DC converter so that the main power supply B10 or the like can be charged.

Further, the redundant power supply system includes a set of inter-system switches 31a and 31b provided on the inter-system bus 30. Each of the set of inter-system switches 31a and 31b is composed of a semiconductor switching element made of MOSFET. Due to the structure of MOSFET, a body diode (parasitic diode) is formed between drain and source. Therefore, even if the MOSFET is cut off, the current flows through the body diode, so that the bidirectional current cannot be cut off with only one MOSFET. In a redundant power supply system, current may flow in both directions between the main system bus 10 and the sub system bus 20. Therefore, in the present embodiment, a pair of MOSFETs in which the forward directions of the body diodes are opposite to each other are adopted as one set of inter-system switches 31a and 31b. As a result, when a power failure occurs, one set of inter-system switches 31a and 31b are both cut off, so that the current can be completely cut off regardless of the direction in which the current flows.

Further, the redundant power supply system includes a set of cutoff switches 22a and 22b provided on the sub power supply side bus 20a. Each of the set of cutoff switches 22a and 22b is composed of a semiconductor switching element made of MOSFET. A pair of MOSFETs in which the forward directions of the body diodes are opposite to each other are adopted as one set of cutoff switches 22a and 22b.

In the following description, one set of inter-system switches 31a and 31b and one set of cut- off switches 22a and 22b may be simply referred to as inter-system SW and system main relay (SMR). The inter-system SW and SMR are not limited to MOSFETs, and other semiconductor switching elements may be used. At this time, when a semiconductor switching element such as a so-called IGBT in which a body diode does not exist is adopted, the semiconductor switching element alone can be used as an inter-system SW or SMR. Although only one set of intersystem switches 31a and 31b and one set of cutoff switches 22a and 22b are shown in FIG. 1, a plurality of sets of these switches may be provided.

As described above, the redundant power supply system is provided with a plurality of power supplies such as the main power supply B10 and the sub power supply B20. The reason is that even if power cannot be supplied from one power source, power can be supplied from the remaining power sources to prevent the in-vehicle load from becoming inoperable. Specific examples of the inability to supply power include the case where the power supply itself fails, the case where a ground fault occurs at any part of the electrical wiring path such as each bus or junction box, and the like.

The in-vehicle load corresponds to the first loads L10 and L11 and the second loads L20 and L21 described above. In-vehicle loads are classified into general loads and important loads. These two types of loads are connected to each of the main load side bus 10b and the sub load side bus 20b.

The general loads L10 and L20 are loads that have little influence on the running of the vehicle even if the worst operation is stopped when the power supply fails. Specific examples of the general loads L10 and L20 include a power window, an electric fan for cooling the radiator, an audio device, a device for air-conditioning the vehicle interior, and the like.

The important loads L11 and L21 are loads that need to be continued even when one of the main power supply B10 and the sub power supply B20 fails and the inter-system SW is turned off (cut off). Specific examples of the important loads L11 and L21 include a drive motor for traveling, a braking device, a power steering device, and the like. A pair of important loads L11 and L21 have different types of functions such as a camera and a distance measuring device for monitoring the front of a vehicle, even if they are made redundant by one component such as completely redundant power steering. It is also possible to use a combination realized by the device. Then, one important load L11 is connected to the main load side bus 10b, and the other important load L21 is connected to the sub load side bus 20b, so that the redundancy of the power supply is ensured.

For example, when the sub system bus 20 has a ground fault as illustrated in FIG. 1, the power supply from the main power supply B10 to the first loads L10 and L11 is normally performed by switching the inter-system SW from the conductive state to the cutoff state. You can continue. As a result, for example, when the important loads L11 and L21 are components necessary for vehicle traveling and a ground fault occurs in the sub system bus 20, the operation is as follows. That is, although the sub system bus 20 cannot supply power to the important load L21, the main system bus 10 can continue to supply power to the important load L11, so that the traveling can be continued.

Further, the redundant power supply system includes a switch control circuit (SW control circuit 40) that controls the operation of the inter-system SW and SMR. The SW control circuit 40 when controlling the inter-system SW corresponds to the "power switch control unit", and the SW control circuit 40 when controlling the SMR corresponds to the "inter-system switch control unit".

The SW control circuit 40 acquires the inter-system current value Iiso, which is the magnitude of the current flowing through the inter-system SW, and the discharge current value Ismr, which is the magnitude of the current discharged from the sub power supply B20. Explaining a specific method for acquiring the current value, a shunt resistor 31c is connected to a portion of the inter-system bus 30 between one set of inter-system switches 31a and 31b. Further, a shunt resistor 22c is connected to a portion of the sub power supply side bus 20a between one set of cutoff switches 22a and 22b. Then, the SW control circuit 40 detects the potentials across the shunt resistors 22c and 31c, and calculates the inter-system current value Iiso and the discharge current value Ismr based on the potential difference between the two ends.

The inter-system current value Iiso is defined as a positive value in the direction in which the current flows from the side of the main system bus 10 to the side of the sub-system bus 20 through the inter-system bus 30. The discharge current value Ismr is defined as a positive value in the direction of discharge from the sub power supply B20. Further, the cutoff switches 22a and 22b and the shunt resistor 22c are unitized as one SMR device 22. Further, the inter-system switches 31a and 31b and the shunt resistor 31c are unitized as one inter-system device 31.

Further, the redundant power supply system includes a higher-level control circuit 50 (upper-level control unit) that commands the control content to the SW control circuit 40. The upper control circuit 50 commands the operation of the inter-system SW and SMR based on the charging state of the main power source B10 and the sub power source B20, the power generation state of the generator G10, the vehicle running state, the amount of power required by the load, and the like. When an abnormality such as a ground fault is not detected, the SW control circuit 40 controls the operation of the inter-system SW and SMR according to the command of the host control circuit 50 (normal control). When a ground fault abnormality or the like is detected, the SW control circuit 40 has priority over the command of the upper control circuit 50, and the SW control circuit 40 has an inter-system SW and SMR based on the acquired inter-system current value Iiso and discharge current value Ismr. Controls the operation of (control in case of abnormality).

In normal control, when the vehicle start switch is turned on, the SMR is turned on (energized) and the on operation is continued. However, when it is predicted that the sub-power supply B20 will fall into an over-discharged state, the SMR is turned off (cut-off operation) to prevent the sub-power supply B20 from being over-discharged. Further, when the sub power supply B20 is in an overheated state, the SMR is turned off to avoid thermal damage to the sub power supply B20. In this case, the power supply to the second loads L20 and L21 is supplied from the main system bus 10 through the intersystem bus 30. In the normal control of the inter-system SW, on operation and off operation are switched according to the charging state of the main power source B10 and the sub power source B20, the power generation state of the generator G10, the load required electric energy, and the like.

For example, when charging the sub power supply B20, the inter-system SW is turned on to supply power from the main power supply B10 or the generator G10 to the sub power supply B20. Further, when the sub power source B20 is charged with the regenerative energy generated by the generator G10, the inter-system SW is turned on. Further, when power is supplied from the sub power source B20 to the main power source B10 to charge the main power source B10, the inter-system SW is turned on. Further, the operation of the inter-system SW is controlled so that the terminal voltage (main voltage) of the main power supply B10 becomes higher than the terminal voltage (sub-voltage) of the sub power supply B20. For example, when the sub voltage becomes higher than the main voltage, the inter-system SW is turned off so that the sub power supply B20 is not charged. In normal control, the inter-system SW may be always on.

The SW control circuit 40 and the upper control circuit 50 include, for example, a memory as a non-transitional and substantive storage medium in which software is temporarily recorded, a processor that executes the software, an input / output interface, and the like. It can be configured by a equipped microcomputer. Alternatively, these control circuits may be realized by a dedicated hardware logic circuit, or may be realized by a combination of a processor and one or more hardware logic circuits. The upper control circuit 50 may be provided in an ECU different from the control unit (ECU) having the SW control circuit 40, or may be provided in a common ECU.

Next, the abnormal time control executed by the SW control circuit 40 will be described with reference to FIGS. 1, 2 and 3.

As illustrated in FIG. 1, when a ground fault occurs in the sub-load side bus 20b while the SMR and the system-to-system SW are on in normal control, the ground fault occurs at the moment of the ground fault occurrence. A large amount of current flows into the location. That is, a large current flows from the main power supply B10 to the ground fault portion through the main power supply side bus 10a, the inter-system bus 30 and the subload side bus 20b. As a result, the voltage of the main system bus 10 is significantly lowered (abnormally low voltage state), and there is a concern that the first load may malfunction.

In addition, a large current flows from the sub power supply B20 to the ground fault point through the sub system bus 20. As a result, the voltage of the sub system bus 20 is significantly lowered (abnormally low voltage state), and there is a concern that the second load may malfunction.

As illustrated in FIG. 2, when a ground fault occurs in the main load side bus 10b while the SMR and the system-to-system SW are on in normal control, the ground fault occurs at the moment of the ground fault occurrence. A large amount of current flows into the location. That is, a large current flows from the sub power supply B 20 to the ground fault portion through the sub power supply side bus 20a, the inter-system bus 30 and the main load side bus 10b. As a result, the voltage of the sub system bus 20 is significantly lowered (abnormally low voltage state), and there is a concern that the second load may malfunction.

In addition, a large current flows from the main power supply B10 to the ground fault point through the main system bus 10. As a result, the voltage of the main system bus 10 is significantly lowered (abnormally low voltage state), and there is a concern that the first load may malfunction. Further, if such an abnormally low voltage state is left unattended, the main power supply B10 and the sub power supply B20 fall into an over-discharged state.

In response to concerns about malfunctions caused by abnormally low voltage conditions, in abnormal condition control, the inter-system SW is turned off when a ground fault is detected. As a result, when a ground fault occurs in the main system bus 10, it is possible to prevent the sub system bus 20 from falling into an abnormally low voltage state. Further, when a ground fault occurs in the sub system bus 20, it is possible to prevent the main system bus 10 from falling into an abnormally low voltage state. That is, by turning off the inter-system SW when the ground fault is detected, it is possible to prevent both the main system bus 10 and the sub system bus 20 from falling into an abnormally low voltage state.

Regarding SMR, even if a ground fault is detected on the sub system bus 20, the ON operation is continued. This is to continue the power supply from the sub power supply B20 to the second loads L20 and L21 during the period until the sub power supply B20 falls into the over-discharged state. However, in order to prevent the sub power supply B 20 from falling into an over-discharged state, the SMR may be turned off as soon as the occurrence of a ground fault in the sub system bus 20 is detected.

Next, the processing procedure of the abnormal state control executed by the SW control circuit 40 will be described with reference to FIG. This process starts execution when the SW control circuit 40 is activated, and is repeatedly executed at a predetermined cycle.

First, in step S10, the operation of the inter-system SW and SMR is controlled according to the command of the host control circuit 50. In the example shown in FIG. 3, the SMR and the system-to-system SW are turned on (energized).

In the following step S20, the sub power supply voltage Vs (second power supply voltage), which is the output voltage of the sub power supply B20 in consideration of the parasitic resistance RS of the sub power supply B20, is acquired. The sub power supply voltage Vs corresponds to one of the second state values that correlates with the voltage (second supply voltage) supplied to the second loads L20 and L21. The second state value corresponds to one of the system state values representing the state of the redundant power supply system at the normal time when no ground fault has occurred. For example, one of the states of the redundant power supply system is a deteriorated state of the sub power supply B20. As this deterioration progresses, the sub power supply voltage Vs decreases. Further, as the parasitic resistance RS increases, the sub power supply voltage Vs decreases.

In the following step S30, the abnormality threshold value IsmrTH used in the determination in step S50, which will be described later, is set based on the sub power supply voltage Vs acquired in step S20. Specifically, the higher the sub power supply voltage Vs, the higher the abnormality threshold IsmrTH is set. For example, the abnormal threshold value IsmrTH is changed in proportion to the sub power supply voltage Vs. The abnormal threshold value IsmrTH is set to a positive value.

In the following step S40, the discharge current value Ismr is detected (acquired) based on the potential difference between both ends of the shunt resistor 22c. In the following step S50, it is determined whether or not the discharge current value Ismr detected in step S40 is larger than the abnormality threshold value IsmrTH set in step S30.

When it is determined that the discharge current value Ismr is larger than the abnormality threshold value IsmrTH, it is considered that a ground fault abnormality has occurred, and the inter-system SW is turned off (cut off) in the following step S60. In step S60, the inter-system SW is turned off regardless of the content of the command from the host control circuit 50. The above-mentioned "ground fault abnormality" is not limited to the ground fault in the sub system bus 20 (see FIG. 1) and the ground fault in the main system bus 10 (see FIG. 2). For example, even when a ground fault occurs in JB11, 21, the main power supply B10, and the inter-system bus 30, the discharge current value Ismr becomes larger than the abnormal threshold value IsmrTH. Further, even when the main power supply B10, the generator G10, the first load L10, L11, the second load L20, L21, or the like fails, the discharge current value Ismr can be larger than the abnormality threshold value IsmrTH.

When step S60 is executed, unless there is a trigger such as a reset signal, the interruption of the inter-system SW is latched regardless of the command content from the host control circuit 50. That is, the SW control circuit 40 continues to cut off the SW between the systems so that the power is not supplied by the command from the host control circuit 50.

When charging the sub power supply B20, the discharge current value Ismr becomes a negative value. On the other hand, the abnormal threshold IsmrTH is set to a positive value in step S30. Therefore, when charging the sub power source B20, it is not determined in step S50 that the ground fault is abnormal.

The SW control circuit 40 when the process of step S40 is being executed corresponds to the "current acquisition unit" that acquires the discharge current value Ismr. Subsequently, step S60 corresponds to a "cutoff control unit" that shuts off the inter-system SW when the discharge current value Ismr rises above the abnormal threshold value IsmrTH. Subsequently, step S20 corresponds to a "state acquisition unit" that acquires the system state value of the redundant power supply system in the normal state. Subsequently, step S30 corresponds to a "threshold value changing unit" that changes the abnormal threshold value IsmrTH according to the system state value.

As described above, the energization control device D according to the present embodiment includes an inter-system SW and a SW control circuit 40 (inter-system switch control unit). The SW control circuit 40 has a current acquisition unit according to step S40, a cutoff control unit according to step S60, a state acquisition unit according to step S20, and a threshold value change unit according to step S30.

By the way, when a ground fault occurs when the sub power supply voltage Vs is low, if the response time from the timing when the ground fault actually occurs until the inter-system SW is cut off is long, there is a possibility that an abnormally low voltage state will occur. high. According to the present embodiment in view of this point, the lower the sub power supply voltage Vs in the normal state, the lower the abnormality threshold value IsmrTH is set. Therefore, the response time can be shortened, and the SW between systems can be quickly cut off, so that the possibility of load malfunction due to falling into an abnormally low voltage state can be reduced.

On the other hand, the higher the sub power supply voltage Vs in the normal state, the higher the abnormality threshold IsmrTH is set. Therefore, it is possible to suppress erroneous detection of a ground fault, for example, the inrush current flowing at the start of the load exceeds the abnormal threshold value IsmrTH. As described above, according to the present embodiment, it is possible to achieve both the rapid shutoff of the SW between systems when a ground fault occurs and the suppression of false detection of the ground fault.

Further, in the present embodiment, the state acquisition unit acquires a second state value (sub power supply voltage Vs) that correlates with the second supply voltage as one of the system state values. The threshold value changing unit changes the abnormal threshold value IsmrTH to a higher value based on the sub power supply voltage Vs as the second supply voltage in the normal state is higher. Here, the time until the second supply voltage, which decreases with the occurrence of a ground fault, reaches the operation guarantee voltage of the second loads L20 and L21 is referred to as a response allowable time. This allowable response time is greatly affected by the second supply voltage at the time of the occurrence of the ground fault. Therefore, according to the present embodiment in which the abnormal threshold value IsmrTH is changed according to the second supply voltage at the normal time, the abnormal threshold value IsmrTH is set so as not to fall into an abnormally low voltage state and to prevent false detection. It can be realized with high accuracy.

Further, in the present embodiment, the state acquisition unit acquires the sub power supply voltage Vs as one of the second state values. The threshold value changing unit changes the abnormal threshold value IsmrTH to a higher value as the sub power supply voltage Vs increases. Here, the second supply voltage at the time of the occurrence of the ground fault is greatly affected by the sub power supply voltage Vs. Therefore, according to the present embodiment in which the abnormal threshold value IsmrTH is changed according to the sub power supply voltage Vs at the normal time, the abnormal threshold value IsmrTH is set so as not to fall into an abnormally low voltage state and to prevent false detection. It can be realized with high accuracy.

Further, in the present embodiment, the current acquisition unit acquires the discharge current value Ismr, which is the magnitude of the current discharged from the sub power supply B20. The cutoff control unit determines the presence or absence of a ground fault abnormality based on the discharge current value Ismr. Here, contrary to the present embodiment, if it is attempted to determine the presence or absence of a ground fault abnormality based on the inter-system current value Iiso, there is a concern that the ground fault may be erroneously detected as follows.

That is, when power is supplied from the first system to the sub power supply B20 to charge it, a large current flows through the inter-system bus 30. Therefore, it is difficult to distinguish between a case where a large current flows through the inter-system bus 30 due to a ground fault abnormality and a case where a large current flows through the inter-system bus 30 due to the charging. Therefore, if it is determined that a ground fault occurs when the inter-system current value Iiso rises beyond the threshold value, there is a concern that the charging of the sub power supply B20 is erroneously detected as a ground fault and the inter-system SW is cut off.

In response to this concern, in the present embodiment, the presence or absence of a ground fault is determined based on the discharge current value Ismr, focusing on the following points. That is, the discharge current value Ismr becomes a negative value when it is desired to supply power from the main power source B10 or the generator G10 to the sub power source B20 to charge the sub power source B20. Therefore, when the sub power source B20 is charged, the discharge current value Ismr does not exceed the abnormal threshold value IsmrTH. On the other hand, when power is supplied from the sub power source B20 to the second loads L20 and L21, the value becomes a positive value. Therefore, when a ground fault occurs in the sub-load side bus 20b, it is expected that the discharge current value Ismr rises and exceeds the abnormal threshold value IsmrTH. Therefore, according to the present embodiment, the direction of the discharge current value Ismr used for detecting the ground fault differs between when the sub power source B20 is charged and when the ground fault occurs. Therefore, even if the inter-system current value Iiso increases to the extent that it exceeds the abnormal threshold value IsmrTH as the sub power source B20 is charged, the concern that it may be erroneously detected as a ground fault can be reduced.

Here, in a state where the redundant power supply system is mounted on an actual vehicle, the main system bus 10, the sub system bus 20, and the inter-system bus 30 have a predetermined physical length. Therefore, it can be said that these buses have equivalent series inductance (ESL) which is a parasitic inductance component. In FIG. 1, the inductance L1 related to the main side intersystem bus 30a and the inductance L2 related to the sub side intersystem bus 30b are shown.

When a ground fault occurs in the sub system bus 20 as shown in FIG. 1 due to the existence of the above-mentioned inductances L1 and L2, the inter-system current value Iiso does not rise rapidly. Therefore, contrary to the present embodiment, if it is attempted to determine that a ground fault has occurred (ground fault abnormality) when the inter-system current value Iiso exceeds the abnormality threshold value IsmrTH, the ground fault detection is delayed. That is, the detection time from the time when the ground fault occurs to the time when the inter-system current value Iiso rises and reaches the abnormal threshold value IsmrTH becomes long, and the detection responsiveness is poor. On the other hand, the discharge current value Ismr when a ground fault occurs in the sub power supply B20 rises rapidly without being greatly affected by the inductances L1 and L2. Therefore, according to the present embodiment in which the discharge current value Ismr is used for the ground fault detection, the ground fault generated by the sub power supply B20 can be detected more quickly than when the inter-system current value Iiso is used. If the ground fault can be detected quickly, the inter-system SW can be quickly shut off. Therefore, it is possible to quickly avoid a situation in which the voltage of both the main system bus 10 and the sub system bus 20 drops significantly. That is, it is possible to suppress the concern that both the first load and the second load will malfunction.

(Second Embodiment)
In the first embodiment, when the ground fault is detected by the current value flowing through the redundant power supply system, the ground fault is detected by the discharge current value Ismr. On the other hand, in the present embodiment, the ground fault is detected by the inter-system current value Iiso. Then, the abnormality threshold value IisoTH set for the inter-system current value Iiso is changed according to the system state value representing the state of the redundant power supply system. Specifically, the processing of steps S20, S30, S40, and S50 shown in FIG. 3 is changed to the processing of steps S20A, S30A, S40A, and S50A shown in FIG.

In step S20A, the main power supply voltage Vp (first power supply voltage), which is the output voltage of the main power supply B10 in consideration of the parasitic resistance RP of the main power supply B10, is acquired. The main power supply voltage Vp corresponds to one of the first state values that correlates with the voltage (first supply voltage) supplied to the first loads L10 and L11. The first state value corresponds to one of the system state values representing the state of the redundant power supply system at the normal time when no ground fault has occurred. For example, one of the states of the redundant power supply system is a deteriorated state of the main power supply B10. As this deterioration progresses, the main power supply voltage Vp decreases. Further, as the parasitic resistance RP increases, the main power supply voltage Vp decreases.

In the following step S30A, the abnormal threshold value IisoTH used in the determination in step S50A, which will be described later, is set based on the main power supply voltage Vp acquired in step S20A. Specifically, the higher the main power supply voltage Vp, the higher the abnormality threshold value IisoTH is set. For example, the abnormal threshold value IisoTH is changed in proportion to the main power supply voltage Vp. The abnormal threshold value IisoTH is set to a positive value.

In the following step S40A, the inter-system current value Iiso is detected (acquired) based on the potential difference between both ends of the shunt resistor 31c. In the following step S50A, it is determined whether or not the inter-system current value Iiso detected in step S40A is larger than the abnormality threshold value IisoTH set in step S30A. When it is determined that the inter-system current value Iiso is larger than the abnormality threshold value IisoTH, it is considered that a ground fault abnormality has occurred, and the inter-system SW is turned off (cut off) in the following step S60.

From the above, also in this embodiment, the abnormal threshold value IisoTH used for ground fault determination is changed according to the system state value (main power supply voltage Vp).

By the way, when a ground fault occurs when the main power supply voltage Vp is low, if the response time from the timing when the ground fault actually occurs until the inter-system SW is cut off is long, there is a possibility that an abnormally low voltage state will occur. high. According to the present embodiment in view of this point, the lower the main power supply voltage Vp in the normal state, the lower the abnormality threshold value IisoTH is set. Therefore, the response time can be shortened, and the SW between systems can be quickly cut off, so that the possibility of load malfunction due to falling into an abnormally low voltage state can be reduced.

On the other hand, the higher the main power supply voltage Vp in the normal state, the higher the abnormal threshold value IisoTH is set. Therefore, it is possible to suppress erroneous detection of a ground fault, for example, the inrush current flowing when the load is started exceeds the abnormal threshold value IisoTH. As described above, according to the present embodiment, it is possible to achieve both the rapid shutoff of the SW between systems when a ground fault occurs and the suppression of false detection of the ground fault.

Further, in the present embodiment, the state acquisition unit acquires the first state value (main power supply voltage Vp) that correlates with the first supply voltage as one of the system state values. The threshold value changing unit changes the abnormal threshold value IisoTH to a higher value based on the main power supply voltage Vp as the first supply voltage in the normal state is higher. Here, the time until the first supply voltage, which decreases with the occurrence of a ground fault, reaches the operation guarantee voltage of the first loads L10 and L11 is referred to as a response allowable time. This allowable response time is greatly affected by the first supply voltage at the time of the occurrence of the ground fault. Therefore, according to the present embodiment in which the abnormal threshold value IisoTH is changed according to the first supply voltage in the normal state, the abnormal threshold value IisoTH is set so as not to fall into an abnormally low voltage state and to prevent false detection. It can be realized with high accuracy.

Further, in the present embodiment, the state acquisition unit acquires the main power supply voltage Vp as one of the first state values. The threshold value changing unit changes the abnormal threshold value IisoTH to a higher value as the main power supply voltage Vp is higher. Here, the first supply voltage at the time of the occurrence of the ground fault is greatly affected by the main power supply voltage Vp. Therefore, according to the present embodiment in which the abnormal threshold value IisoTH is changed according to the main power supply voltage Vp in the normal state, the abnormal threshold value IisoTH is set so as not to fall into an abnormally low voltage state and to prevent false detection. It can be realized with high accuracy.

In the present embodiment, the abnormality threshold value IisoTH may be changed according to the sub power supply voltage Vs instead of the main power supply voltage Vp. Further, in the first embodiment, the abnormality threshold value IsmrTH may be changed according to the main power supply voltage Vp instead of the sub power supply voltage Vs.

(Third Embodiment)
In the first embodiment, the sub power supply voltage Vs is acquired as the system state value, and in the second embodiment, the main power supply voltage Vp is acquired as the system state value. On the other hand, in the present embodiment, seven kinds of values shown in FIG. 5 are acquired as system state values. These system state values include the sub power supply voltage Vs and the main power supply voltage Vp. In addition, the parasitic resistance RP, RS, the discharge current value Ismr, the inter-system current value Iiso, and the power generation amount WH by the generator G10 are also included as the acquired system state values.

Further, in the present embodiment, both the discharge current value Ismr and the inter-system current value Iiso are used as the current values used for short circuit detection. Then, the abnormal threshold value for each current value is changed according to the system state value.

The combination No. shown in FIG. 1 to 16 indicate a combination of seven kinds of system state values and two abnormal thresholds IsmrTH and IisoTH. For example, NO. In 1, it means that the higher the sub power supply voltage Vs, the higher the abnormal thresholds IsmrTH and IisoTH are set. NO. In No. 5, the higher the main power supply voltage Vp, the higher the abnormal thresholds IsmrTH and IisoTH are set.

Also, NO. In No. 4, the lower the parasitic resistance RS of the sub power supply B20, the higher the abnormal thresholds IsmrTH and IisoTH are set. NO. In No. 8, the lower the parasitic resistance RP of the main power supply B10, the higher the abnormal thresholds IsmrTH and IisoTH are set.

Also, NO. In No. 9, the higher the inter-system current value Iiso, the higher the abnormal threshold value IisoTH is set, and the abnormal threshold value IsmrTH is not changed. NO. In No. 11, the higher the discharge current value Ismr is, the higher the abnormal threshold value IsmrTH is set, and the abnormal threshold value IisoTH is not changed.

Also, NO. In No. 13, the higher the power generation amount WH, the higher the abnormal thresholds IsmrTH and IisoTH are set. In short, NO. 1 to NO. In No. 14, the abnormality threshold value is set higher as the system state value is a value that can lengthen the permissible response time. As described above, the allowable response time is the time from the occurrence of the ground fault to the guaranteed operation voltage when the supply voltage to the load decreases due to the occurrence of the ground fault.

NO. In 15, the abnormality threshold value is changed based on the combination of a plurality of types of system state values. For example, the abnormal threshold value is changed based on a combination of three types of sub power supply voltage Vs, parasitic resistance RS, and discharge current value Ismr. For example, a weight is set for each system state value, and the abnormality threshold value is changed based on the total value obtained by adding up the system state values in consideration of the weighting. The weighting of the sub power supply voltage Vs is set to a value larger than other system state values. Therefore, in the example shown in FIG. 5, the abnormal threshold value is set high due to the influence of the high weighted sub-power supply voltage Vs despite the high parasitic resistance RS and low discharge current value Ismr. ..

The 15 combinations shown in FIG. 5 are merely an example, and an abnormal threshold value may be set by combining arbitrary state values among a plurality of types of system state values.

FIG. 6 shows a case where the sub power supply voltage Vs, the parasitic resistance RS of the sub power supply B20, and the discharge current value Ismr change as system state values. The anomaly threshold IsmrTH set according to the table of FIG. 5 in response to these changes will change as shown in FIG. The horizontal axis of FIG. 6 indicates the elapsed time, and the reference numeral TYP in FIG. 6 indicates each system state value and a normal value for an abnormal threshold value. Further, the sub system voltage VsJB shown in FIG. 6 is the voltage at JB21 and corresponds to the second supply voltage supplied to the second loads L20 and L21.

In FIG. 6, first, the parasitic resistance RS and the discharge current value Ismr remain at the normal values, and the sub power supply voltage Vs changes to a value higher than the normal values. Therefore, the sub system voltage VsJB is higher than the normal value. This means that the permissible response time has become longer, and it means that it is effective to raise the abnormal threshold value IsmrTH to suppress false detection. Based on this idea, during the period when the sub power supply voltage Vs of FIG. 6 is high, the combination NO. According to 1, the abnormal threshold value IsmrTH is set higher than the normal value.

Next, the sub power supply voltage Vs and the parasitic resistance RS remain at the normal values, and the discharge current value Ismr changes to a value lower than the normal value. Therefore, the sub system voltage VsJB is lower than the normal value. This means that the permissible response time has become shorter, and it is effective to lower the abnormal threshold value IsmrTH to quickly shut off the inter-system SW when a ground fault occurs. Based on this idea, during the period when the discharge current value Ismr in FIG. 6 is low, the combination NO. According to 12, the abnormal threshold value IsmrTH is set lower than the normal value.

Next, the sub power supply voltage Vs and the parasitic resistance RS are higher than the normal values, and the discharge current value Ismr is changed to a value lower than the normal values. Therefore, the sub system voltage VsJB is higher than the normal value. This means that the permissible response time has become longer, and it means that it is effective to raise the abnormal threshold value IsmrTH to suppress false detection. Based on this idea, the combination NO. According to 15, the abnormal threshold value IsmrTH is set higher than the normal value.

FIG. 7 shows a case where the main power supply voltage Vp, the parasitic resistance RP of the main power supply B10, and the inter-system current value Iiso are changed as the system state values. The abnormal threshold value IisoTH set according to the table of FIG. 5 in response to these changes will change as shown in FIG. The horizontal axis of FIG. 7 indicates the elapsed time, and the reference numeral TYP in FIG. 7 indicates each system state value and a normal value for an abnormal threshold value. The main system voltage VpJB shown in FIG. 7 is the voltage at JB11 and corresponds to the first supply voltage supplied to the first loads L10 and L11.

In FIG. 7, first, the parasitic resistance RP and the inter-system current value Iiso remain at the normal values, and the main power supply voltage Vp changes to a value higher than the normal values. Therefore, the main system voltage VpJB is higher than the normal value. This means that the permissible response time has become longer, and it means that it is effective to raise the abnormal threshold value IisoTH to suppress false detection. Based on this idea, during the period when the main power supply voltage Vp in FIG. 7 is high, the combination NO. According to 5, the abnormal threshold value IisoTH is set higher than the normal value.

Next, the main power supply voltage Vp and the inter-system current value Iiso remain at the normal values, and the parasitic resistance RP changes to a value higher than the normal value. Therefore, the main system voltage VpJB is lower than the normal value. This means that the permissible response time has become shorter, and it is effective to lower the abnormal threshold value IisoTH to quickly shut off the inter-system SW when a ground fault occurs. Based on this idea, during the period when the parasitic resistance RP of FIG. 7 is high, the combination NO. According to No. 7, the abnormal threshold value IisoTH is set lower than the normal value.

Next, the main power supply voltage Vp and the parasitic resistance RP remain at the normal values, and the inter-system current value Iiso changes to a value lower than the normal value. Therefore, the main system voltage VpJB is lower than the normal value. This means that the permissible response time has become shorter, and it is effective to lower the abnormal threshold value IisoTH to quickly shut off the inter-system SW when a ground fault occurs. Based on this idea, during the period when the inter-system current value Iiso in FIG. 7 is low, the combination NO. According to 10, the abnormal threshold value IisoTH is set lower than the normal value.

The solid line in FIG. 8 shows the time change of the discharge current value Ismr as the system state value, and the alternate long and short dash line shows the time change of the abnormal threshold value IsmrTH. In the example of FIG. 8, the discharge current value Ismr temporarily rises due to the inrush current flowing with the start of the second load L20. And the combination NO. According to 11 and 12, the abnormal threshold value IsmrTH is changed as the discharge current value Ismr changes. However, the abnormal threshold value IsmrTH is changed by delaying Ta for a predetermined time.

In FIG. 8, the value obtained by adding the predetermined value Ia to the discharge current value Ismr is set as the abnormal threshold value IsmrTH. For example, the abnormal threshold value IsmrTH is changed to I2 when a predetermined time Ta elapses from the time when the discharge current value Ismr becomes I1. I2 is a value obtained by adding a predetermined value Ia to I1.

The dotted line in FIG. 8 shows the behavior of the discharge current value Ismr when a ground fault occurs. The rate of increase of the discharge current value Ismr due to the occurrence of a ground fault is faster than the rate of increase of the inrush current. When the discharge current value Ismr suddenly rises due to the occurrence of a ground fault, the abnormal threshold value IsmrTH changes with a delay of Ta for a predetermined time. Therefore, when the response time Tb elapses from the time when the ground fault occurs, the discharge current value Ismr exceeds the abnormality threshold value IsmrTH, and it is determined in step S50 of FIG. 3 that the ground fault is abnormal.

In the case of a comparative example in which the abnormal threshold value IsmrTH is fixed to a constant value contrary to the present embodiment, the abnormal threshold value IsmrTH is set to a value THx larger than the maximum value of the inrush current. In this case, the response time Tc from the time of occurrence of the ground fault to the determination of the ground fault abnormality is longer than the response time Tb according to the present embodiment. This means that the response time for detecting a ground fault abnormality can be shortened according to the present embodiment in which the abnormality threshold value IsmrTH is variably set.

The predetermined value Ia may be different depending on the value of the discharge current value Ismr. For example, the higher the discharge current value Ismr is, the smaller the predetermined value Ia may be, or conversely, the larger the predetermined value Ia may be. Further, the predetermined time Ta may be different depending on the value of the discharge current value Ismr. For example, the higher the discharge current value Ismr, the longer the predetermined time Ta may be, and conversely, the predetermined time Ta may be shortened.

In the same manner as in FIG. 8, the inter-system current value Iiso and the abnormal threshold value IisoTH as the system state values are also changed by delaying Ta for a predetermined time. Further, a value obtained by adding a predetermined value Ia to the inter-system current value Iiso is set as an abnormal threshold value IisoTH. Further, with respect to the system state values other than these current values, the abnormality threshold value may be changed by delaying Ta for a predetermined time with respect to the change of the system state value in the same manner as in FIG.

As described above, according to the present embodiment, the abnormal thresholds IsmrTH and IisoTH are changed based on a plurality of types of system state values. Therefore, it is possible to achieve both the rapid shutoff of the SW between systems when a ground fault occurs and the suppression of false detection of the ground fault with higher accuracy.

Further, in the present embodiment, the threshold value changing unit changes the abnormal threshold value to a higher value as the current value acquired by the current acquisition unit in the normal state is larger. Specifically, the larger the discharge current value Ismr, the higher the abnormal threshold value IsmrTH is changed. Further, the larger the inter-system current value Iiso, the higher the abnormal threshold value IisoTH is changed. It is highly possible that the longer the allowable response time is, the more current is flowing during normal operation. Therefore, according to the present embodiment in which the abnormality threshold value is increased as the current value is larger, both quick cutoff and false detection suppression can be realized with higher accuracy.

Further, in the present embodiment, the state acquisition unit acquires the power generation amount WH by the generator G10 as one of the system state values. Further, the threshold value changing unit changes the abnormal threshold value to a higher value as the amount of power generation WH acquired by the state acquisition unit increases. The larger the amount of power generated WH in the normal state, the longer the allowable response time is likely to be. Therefore, according to the present embodiment in which the abnormality threshold value is increased as the amount of power generation WH is increased, both rapid shutoff and false detection suppression can be realized with higher accuracy.

(Fourth Embodiment)
As shown in FIG. 9, the SW control circuit 40 according to the present embodiment includes a state detection unit 41, a threshold value change unit 42, a detection unit 43, and a drive unit 44.

The state detection unit 41 has a differential amplifier 41a that outputs an analog signal according to the difference between the acquired system state value and the reference value.

The threshold value changing unit 42 includes an AD converter 42a, a logic circuit 42b, and a DA converter 42c. The AD converter 42a converts the analog signals output from the plurality of differential amplifiers 41a into digital signals and outputs them to the logic circuit 42b.

The logic circuit 42b sets an abnormality threshold value based on signals output from a plurality of AD converters 42a, that is, a plurality of types of system state values. In the table of FIG. 5, the system state values are simply expressed as "high" and "low", but in the present embodiment, the degrees of "high" and "low" are finely divided into multiple stages. .. Then, an abnormality threshold value is set according to the divided system states. The logic circuit 42b outputs the values of the set abnormal thresholds IsmrTH and IisoTH to the DA converter 42c.

The DA converter 42c converts the digital signals of the abnormal thresholds IsmrTH and IisoTH output from the logic circuit 42b into analog signals and outputs them to the detection unit 43.

The detection unit 43 includes comparators 43a and 43b and a logic circuit 43c. The comparator 43a compares the detected inter-system current value Iiso with the abnormal threshold value IisoTH output from the threshold value changing unit 42. The comparator 43a outputs an on signal when the inter-system current value Iiso is larger than the abnormality threshold value IisoTH. The comparator 43b compares the detected discharge current value Ismr with the abnormal threshold value IsmrTH output from the threshold value changing unit 42. The comparator 43b outputs an on signal when the discharge current value Ismr is larger than the abnormal threshold value IsmrTH.

The logic circuit 43c determines whether or not to shut off the inter-system SW based on the signals output from the two comparators 43a and 43b, and outputs a command signal. For example, when both the affirmative determination in step S50 of FIG. 3 and the affirmative determination in step S50A of FIG. 4 are made, a command signal for shutting off the inter-system SW is output. Alternatively, when either of these affirmative determinations is made, a command signal for shutting off the inter-system SW is output.

The drive unit 44 outputs a gate signal to the inter-system switches 31a and 31b according to the command signal output from the logic circuit 43c.

(Fifth Embodiment)
As shown in FIG. 10, the state detection unit 41 according to the present embodiment has a backflow prevention switch 41b in addition to the differential amplifier 41a. The backflow prevention switch 41b is connected between the differential amplifier 41a and the inter-system switches 31a and 31b. The backflow prevention switch 41b is a MOSFET. The anode side of the parasitic diode included in the MOSFET is connected to the source side of the inter-system switches 31a and 31b. The cathode side of the parasitic diode is connected to the input side of the differential amplifier 41a.

Here, in the configuration shown in FIG. 10, when the inductance L2 on the sub system side is large, if the inter-system SW is cut off due to the occurrence of a ground fault, a negative surge is generated with reference to the source potentials of the inter-system switches 31a and 31b. To do. If this negative surge is large, a negative surge is applied to the differential amplifier 41a as shown by an arrow in FIG. 10, and there is a concern that the differential amplifier 41a may be damaged.

In response to this concern, in the present embodiment, the above concern is reduced by turning off the backflow prevention switch 41b when a negative surge occurs. That is, the backflow prevention switch 41b is controlled to always turn on when no ground fault has occurred and to turn off when a ground fault is detected. The backflow prevention switch 41b is turned off when the ground fault is detected before the inter-system SW is shut off.

(Sixth Embodiment)
The energization control device D according to the present embodiment includes a set of cutoff switches 12a and 12b provided on the main power supply side bus 10a (see FIG. 11). In the following description, one set of cutoff switches 12a and 12b may be referred to as SMR1, and one set of cutoff switches 22a and 22b may be referred to as SMR2.

A shunt resistor 12c is connected to a portion of the main power supply side bus 10a between one set of cutoff switches 12a and 12b. The cutoff switches 12a and 12b and the shunt resistor 12c are unitized as one SMR device 12.

The SW control circuit 40 detects the potential at both ends of the shunt resistor 12c and calculates the first discharge current value Ismr1 based on the potential difference between both ends. The first discharge current value Ismr1 is defined as a positive value in the direction of discharge from the main power supply B10. In the present embodiment, the discharge current value Ismr discharged from the sub power source B20 is referred to as the second discharge current value Ismr2.

The SW control circuit 40 controls the operation of the inter-system SW based on both the first discharge current value Ismr1 and the second discharge current value Ismr2. Specifically, the SW control circuit 40 detects (acquires) the second discharge current value Ismr2 based on the potential difference between both ends of the shunt resistor 22c. Further, the first discharge current value Ismr1 is detected (acquired) based on the potential difference between both ends of the shunt resistor 12c.

After that, the SW control circuit 40 determines whether or not the detected second discharge current value Ismr2 is larger than the abnormal threshold value Ismr2TH (second abnormal threshold value). Further, it is determined whether or not the detected first discharge current value Ismr1 is larger than the abnormal threshold value Ismr1TH (first abnormal threshold value). Then, these abnormal thresholds Ismr1TH and Ismr2TH are changed according to the system state value in the same manner as in each of the above embodiments.

(7th Embodiment)
The energization control device D according to the present embodiment is the energization control device D shown in FIG. 1 provided with a case 60 (see FIG. 12). The case 60 houses the SW control circuit 40, the inter-system SW, the SMR, and the shunt resistors 31c and 22c inside. As a result, the energization control device D is formed as one current cutoff module. A plurality of terminals 61, 62, 63 are attached to the case 60. One end of the wiring connected to the sub power supply B20 is connected to the terminal 61. One end of the wiring connected to the second loads L20 and L21 is connected to the terminal 62. One end of the wiring connected to the first loads L10 and L11, the main power supply B10, and the generator G10 is connected to the terminal 63.

As a modification of this embodiment, at least one of the sub power supply B20 and the upper control circuit 50 may be housed inside the case 60. When at least one of the main power supply B10 and the sub power supply B20 is housed inside the case 60, the housed power supply and the energization control device D provide a power supply unit.

Further, as a modification of the present embodiment, the energization control device D shown in FIG. 11 may be provided with a case 60. In this case, the case 60 houses the SW control circuit 40, the inter-system SW, SMR1, SMR2, and shunt resistors 31c, 22c, 12c inside.

(Other embodiments)
Although the plurality of embodiments of the present disclosure have been described above, not only the combination of the configurations specified in the description of each embodiment but also the plurality of embodiments even if the combination is not specified if there is no problem in the combination. It is possible to partially combine the configurations of. Further, it is assumed that the unspecified combination of the configurations described in the plurality of embodiments and modifications is also disclosed by the following description.

In each of the above embodiments, the state acquisition unit may acquire the sub system voltage VsJB and the main system voltage VpJB as system state values.

In each of the above embodiments, when the inter-system SW is shut off due to the ground fault detection, the SW control circuit 40 may notify the host control circuit 50 that such an abnormality has occurred.

In each of the above embodiments, when a ground fault occurs in the sub system bus 20, in addition to the inter-system SW shut-off latch, the SMR may also be cut-off latched. Further, in each of the above embodiments, when a ground fault occurs in the main system bus 10, in addition to shutting off the inter-system SW, the SMR may be energized and latched.

In the sixth embodiment, even if the second discharge current value Ismr2 does not exceed the second threshold value, the inter-system SW is shut off if the first discharge current value Ismr1 rises beyond the first threshold value. On the other hand, when the second discharge current value Ismr2 exceeds the second threshold value and the first discharge current value Ismr1 exceeds the first threshold value, it may be regarded as a ground fault abnormality and the inter-system SW may be shut off. ..

In the redundant power supply system shown in FIG. 1 and the like, the generator G10 is connected to the main system bus 10. Therefore, the sub power supply B20 is configured to be rechargeable by the electric power supplied through the inter-system bus 30. On the other hand, the generator G10 may be connected to the sub system bus 20. Further, the generator G10 may be connected to the high potential side of the main power source B10 or the sub power source B20, or may be connected to the ground side.

Claims (11)

1. The first system bus (10) that transmits the electric power supplied from the first power source (B10) to the first load (L10, L11), and
   The second system bus (20) that transmits the electric power supplied from the second power source (B20) to the second load (L20, L21), and
   An inter-system bus (30) that electrically connects the first system bus and the second system bus, and
   In the energization control device applied to the redundant power supply system for vehicles equipped with
   Inter-system switches (31a, 31b) that switch between energization and interruption of current in the inter-system bus, and
   An inter-system switch control unit (40) that controls the operating state of the inter-system switch,
   With
   The inter-system switch control unit
   A current acquisition unit (S40, S40A) that acquires a current value (Ismr, Iiso) flowing through the redundant power supply system, and
   When the current value acquired by the current acquisition unit rises beyond the abnormal threshold value (IsmrTH, IisoTH), it is considered that a ground fault has occurred and the inter-system switch is controlled to the cutoff state. (S60) and
   A state acquisition unit (S20, S20A) that acquires a system state value indicating the state of the redundant power supply system in a normal state that is not regarded as the ground fault abnormality, and
   Energization control having a threshold value changing unit (S30, S30A) for changing the abnormal threshold value according to the system state value (Vs, Rs, Vp, Rp, Iiso, Ismr, WH) acquired by the state acquisition unit. apparatus.
2. The state acquisition unit acquires a second state value (Vs, Rs) that correlates with the second supply voltage, which is the voltage supplied to the second load, as one of the system state values.
   The first aspect of the present invention, wherein the threshold value changing unit changes the abnormal threshold value to a higher value based on the second state value acquired by the state acquisition unit as the second supply voltage in the normal state becomes higher. Energization control device.
3. The state acquisition unit acquires the second power supply voltage (Vs), which is the output voltage of the second power supply in consideration of the parasitic resistance of the second power supply, as one of the second state values.
   The energization control device according to claim 2, wherein the threshold value changing unit changes the abnormal threshold value to a higher value as the second power supply voltage acquired by the state acquisition unit becomes higher.
4. The current acquisition unit acquires a discharge current value (Ismr), which is the magnitude of the current discharged from the second power source, as one of the current values.
   The energization control device according to any one of claims 1 to 3, wherein the cutoff control unit determines the presence or absence of the ground fault abnormality based on the discharge current value.
5. The current acquisition unit acquires an inter-system current value (Iiso), which is the magnitude of the current flowing through the inter-system bus, as one of the current values.
   The energization control device according to any one of claims 1 to 4, wherein the cutoff control unit determines the presence or absence of the ground fault abnormality based on the inter-system current value.
6. The state acquisition unit acquires a first state value (Vp, Rp) that correlates with the first supply voltage, which is the voltage supplied to the first load, as one of the system state values.
   The threshold value changing unit changes the abnormal threshold value to a higher value based on the first state value acquired by the state acquisition unit as the first supply voltage in the normal state is higher. The energization control device according to any one.
7. The state acquisition unit acquires the first power supply voltage (Vp), which is the output voltage of the first power supply in consideration of the parasitic resistance of the first power supply, as one of the first state values.
   The energization control device according to claim 6, wherein the threshold value changing unit changes the abnormal threshold value to a higher value as the first power supply voltage acquired by the state acquisition unit increases.
8. The energization according to any one of claims 1 to 7, wherein the threshold value changing unit changes the abnormal threshold value to a higher value as the current value acquired by the current acquisition unit in the normal state is larger. Control device.
9. The redundant power supply system includes a generator (G10) that supplies generated power to the first system bus or the second system bus.
   The state acquisition unit acquires the amount of power generated by the generator (WH) as one of the system state values.
   The energization control device according to any one of claims 1 to 8, wherein the threshold value changing unit changes the abnormal threshold value to a higher value as the amount of power generation acquired by the state acquisition unit increases.
10. A power switch (22) for switching between energization and disconnection between the second power supply and the second system bus, and
    A power switch control unit (40) that controls the operating state of the power switch, and
    The energization control device according to any one of claims 1 to 9, further comprising.
11. The energization control device according to any one of claims 1 to 10 and
    With at least one of the first power supply and the second power supply
    Power supply unit with.
    

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