WO2021031082A1

WO2021031082A1 - Performance monitoring device and method, system on chip, movable platform, and camera

Info

Publication number: WO2021031082A1
Application number: PCT/CN2019/101418
Authority: WO
Inventors: 徐喜林; 易斌; 柯研家
Original assignee: 深圳市大疆创新科技有限公司
Priority date: 2019-08-19
Filing date: 2019-08-19
Publication date: 2021-02-25
Also published as: CN112154419A

Abstract

Disclosed are a performance monitoring device and method, a system on chip (SoC), a movable platform, and a camera. The device is used for monitoring the performance of a plurality of processing modules in the SoC chip; the performance monitoring device comprises a plurality of monitoring modules, a bus, and a memory; the plurality of the monitoring modules and the plurality of the processing modules are connected in a one-to-one correspondence; each of the monitoring modules is connected to the memory by means of the bus; each monitoring module is configured to obtain performance parameters of each processing module in real time, and send the performance parameters to the memory by means of the bus; and the memory is configured to receive and store performance parameters of the processing modules. The present application realizes real-time acquisition of performance data of the processing modules.

Description

Performance monitoring device, method, system on chip, movable platform and camera

Technical field

This application relates to the field of SoC applications, and in particular to a performance monitoring device, method, system on chip, movable platform and camera.

Background technique

SoC (System on Chip, System on Chip) is the chip integration at the core of the information system, which integrates the key components of the system on a chip. There are many processing modules integrated in the SOC. The processing module is a pre-designed or even verified integrated circuit, device or component with a certain function, such as GPU (Graphics Processing Unit, graphics processor) ISP (Image Signal Processing, image signal processor), etc. Different processing modules have different performance requirements. When multiple processing modules work concurrently, unreasonable bandwidth preemption may cause system failures. Therefore, you need to The real-time performance of each processing module on the SoC is monitored to find out the processing modules that unreasonably occupy the bandwidth, and limit the bandwidth to ensure reasonable bandwidth allocation.

Summary of the invention

In view of this, embodiments of the present invention provide a performance monitoring device, method, system on chip, movable platform, and camera.

First, the first aspect of the embodiments of the present application provides a performance monitoring device for monitoring the performance of multiple processing modules in a SoC chip. The performance monitoring device includes multiple monitoring modules, buses, and memories. A monitoring module and a plurality of the processing modules are connected in a one-to-one correspondence; each of the monitoring modules is connected to the memory through the bus;

The monitoring module is configured to obtain the performance parameters of the processing module in real time, and send the performance parameters to the memory through the bus;

The memory is used to receive and store the performance parameters of the processing module.

According to a second aspect of the embodiments of the present application, there is provided a system on a chip, including a plurality of processing devices and a performance monitoring device, the performance monitoring device including: a plurality of monitoring modules, a bus, and a memory;

A plurality of the monitoring modules and a plurality of the processing modules are connected in a one-to-one correspondence; each of the monitoring modules and each of the processing modules are connected to the memory through the bus;

The memory is used to receive and store the performance parameters of the processing module;

The processing module is used to perform functions designated by itself, and to write data to or read data from the memory.

According to a third aspect of the embodiments of the present application, a movable platform is provided, including:

Body

A power system installed in the body and used to provide power to the movable platform; and,

A system on chip as described in any one of the second aspect.

According to a fourth aspect of the embodiments of the present application, a camera is provided, including:

shell;

The lens assembly is arranged inside the housing;

The sensor assembly is arranged inside the housing and is used to sense light passing through the lens assembly and generate an electrical signal; and,

The system-on-chip according to any one of the second aspect is used to process the electrical signal.

According to a fifth aspect of the embodiments of the present application, a monitoring method is provided for monitoring the performance of multiple processing modules in a SoC chip, which is applied to the performance monitoring device of any one of the first aspect, the method includes:

Acquiring the performance parameters of the processing module in real time;

The performance parameter is stored in the memory through the bus.

This application realizes real-time monitoring of the processing module by setting a monitoring module corresponding to the processing module one-to-one, and the monitoring module stores the performance data in the memory, so as to accurately locate the data according to the stored performance data The processing module that caused the system failure.

Description of the drawings

In order to more clearly describe the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative labor.

Fig. 1 is a structural diagram of an embodiment of a system on chip according to an exemplary embodiment of the present application.

Fig. 2 is a structural diagram of an embodiment of a second system-on-chip according to an exemplary embodiment of this application.

Fig. 3 is a structural diagram of an embodiment of a third system on chip according to an exemplary embodiment of this application.

Fig. 4 is a structural diagram of an embodiment of a fourth system on chip according to an exemplary embodiment of the present application.

Fig. 5 is a structural diagram of an embodiment of a fifth system on a chip according to an exemplary embodiment of the present application.

Fig. 6A is a structural diagram of an embodiment of a sixth system on a chip according to an exemplary embodiment of this application.

Fig. 6B is a structural diagram of an embodiment of a seventh system on a chip according to an exemplary embodiment of this application.

Fig. 7A is a structural diagram of an embodiment of an eighth system on chip according to an exemplary embodiment of this application.

Fig. 7B is a structural diagram of an embodiment of a ninth system on chip according to an exemplary embodiment of this application.

Fig. 8 is a flowchart of a performance monitoring method according to an exemplary embodiment of the application.

Fig. 9 is a structural diagram of an embodiment of a movable platform according to an exemplary embodiment of this application.

Fig. 10 is a structural diagram of an embodiment of a camera according to an exemplary embodiment of this application.

detailed description

The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of this application.

The terms used in this application are only for the purpose of describing specific embodiments and are not intended to limit the application. The singular forms of "a", "said" and "the" used in this application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and/or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this application, the first information may also be referred to as second information, and similarly, the second information may also be referred to as first information. Depending on the context, the word "if" as used herein can be interpreted as "when" or "when" or "in response to determination". The terms "include", "include", or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements that are not explicitly listed. Elements, or also include elements inherent to such processes, methods, articles, or equipment. If there are no more restrictions, the element defined by the sentence "including a..." does not exclude the existence of other identical elements in the process, method, article or equipment that includes the element.

In the process of implementing the present invention, the inventor found that in the related technology, the query and statistics of the performance data of the processing module are usually realized by software: the processing module will send an interrupt signal when a failure occurs, and then the SoC is based on the interrupt signal, The performance data is read from the performance register through software, but it takes a certain amount of time from generating an interrupt signal to reading the performance data through software. It is impossible to monitor the real-time performance of the processing module, and because the performance register is covered by data Running, may cause the performance data you want to obtain has been lost, and it is impossible to accurately locate the processing module that unreasonably grabs the bandwidth and the point of failure in real time.

Based on the above problems, an embodiment of the present application provides a system on chip 01. The system on chip 01 includes a plurality of processing modules 20 and a performance monitoring device 30. The performance monitoring device 30 is used to monitor the performance of the multiple processing modules 20. performance.

Please refer to FIG. 1, which is a structural diagram of an embodiment of a system on chip 0110 according to an exemplary embodiment of this application.

In the embodiment shown in FIG. 1, the system on chip 01 includes a plurality of processing modules 20 and a performance monitoring device 30, and the performance monitoring device 30 includes: a plurality of monitoring modules 310, a bus 320 and a memory 330. It should be noted that the embodiment of the present application does not impose any restriction on the specific number of the processing module 20 and the monitoring module 310, and specific settings can be made according to actual conditions.

Wherein, a plurality of the monitoring modules 310 and a plurality of the processing modules 20 are connected in a one-to-one correspondence; each of the monitoring modules 310 and each of the processing modules 20 are respectively connected to the memory 330 through the bus 320.

It is understandable that the embodiments of the present application do not impose any restrictions on the bus 320 protocol used, and can be specifically set based on actual conditions. For example, the AXI (Advanced Extensible Interface) bus 320 protocol can be used, which is a multi-channel The transmission bus 320 sends the address, read data, write data, and handshake signals in different channels. The order between different accesses can be disrupted. The BUSID is used to indicate the ownership of each access. The processing module 20 does not get the return data. In this case, multiple read and write operations can be issued, and the order of data read back can be disrupted, and non-aligned data access is also supported.

The monitoring module 310 is configured to obtain the performance parameters of the processing module 20 in real time, and send the performance parameters to the memory 330 through the bus 320; wherein, the monitoring module 310 can be implemented by a circuit or It is a device or component with the function of obtaining performance data.

The memory 330 is used to receive and store the performance parameters of the processing module 20. It can be understood that the embodiment of the present application does not impose any restrictions on the specific type of the memory 330, and can be specifically set according to actual conditions, for example, The memory 330 may be DDR (Double Data Rate SDRAM, double-rate synchronous dynamic random access memory 330), or DRAM (Dynamic Random Access Memory, dynamic random access memory 330), etc.

The processing module 20 is used to perform functions designated by itself, and to write data to or read data from the memory 330. It can be understood that the specific functions of the processing module 20 are There are no restrictions, and specific settings can be made according to actual conditions. For example, the processing module 20 may be an image signal processor, a decoder, an encoder, or a graphics processor.

It can be seen that the embodiment of the present application implements real-time monitoring of the processing module 20 by setting the monitoring module 310 corresponding to the processing module 20 one-to-one, and the monitoring module 310 stores the performance data in the memory 330 , So that the system-on-chip 01 can accurately locate the processing module 20 that caused the system failure and the time point of the failure according to the stored performance data.

Please refer to FIG. 2, which is a structural diagram of an embodiment of a second system on chip 01 according to an exemplary embodiment of this application.

In the embodiment shown in FIG. 2, the system on chip 01 includes a plurality of processing devices 20 and a performance monitoring device 30, and the performance monitoring device 30 includes: a plurality of monitoring modules 310, a control module 340, a bus 320 and a memory 330.

Wherein, each of the monitoring modules 310 is connected to the control module 340, and the control module 340 is connected to the memory 330 through the bus 320.

The monitoring module 310 is specifically configured to obtain the performance parameters of the processing module 20 and send them to the control module 340.

The control module 340 is configured to receive the performance data of the processing module 20 sent by the monitoring module 310 and send it to the memory 330; wherein, the control module 340 may be implemented by a circuit, or it may be capable of controlling the A device or component that monitors the function of the module 310.

In a possible implementation manner, the monitoring module 310 obtains relevant signals of the processing module 20 to perform logical operations, obtains the performance data to be processed and sent to the control module 340, and the control module 340 monitors the The to-be-processed performance data obtained by the module 310 is stored in the memory 330, and the performance data corresponding to the processing module 20 is obtained by obtaining the to-be-processed performance data stored in the memory 330 and performing mathematical operations; wherein, the performance data It may include any one or more of bandwidth, delay, or outstanding command.

In addition, considering that the SoC in the related art realizes the query statistics of the performance data of the processing module 20 through software, its related program code is integrated on the memory 330 side, resulting in the need to perform query statistics on the performance data of the processing module 20 The identification of the processing module 20 is matched. If the matching is successful, the query of the performance data of the processing module 20 is performed. Since the matching process cannot be performed at the same time, it is impossible to simultaneously count the performance data of all the processing modules 20. The monitoring module 310 and the processing module 20 are connected in a one-to-one correspondence, and the monitoring module 310 can be integrated with the processing module 20, so that the control module 340 can also send monitoring instructions to the monitoring module 310 at the same time to notify The monitoring module 310 samples the performance data of the processing module 20 at the same time, so that the performance data of multiple processing modules 20 at the same time can be obtained, so as to perform statistical analysis on the performance data of each processing module 20. The use experience is optimized, and since the performance data of the processing module 20 can be acquired at the same time in the embodiment of the present application, it is beneficial to shorten the performance data acquisition statistical period.

Please refer to FIG. 3, which is a structural diagram of an embodiment of a third system on chip 01 according to an exemplary embodiment of this application.

In the embodiment shown in FIG. 3, the system on chip 01 includes a plurality of processing devices 20 and a performance monitoring device 30, and the performance monitoring device 30 includes: a plurality of monitoring modules 310, a control module 340, a bus 320 and a memory 330.

Wherein, the control module 340 and the monitoring module 310 are connected by two unidirectional serial lines, each time transmitting one bit of data, the serial connection requires less physical media, which is beneficial to reduce deployment costs .

The control module 340 sends a monitoring instruction to the monitoring module 310 through one of the one-way serial lines to notify the monitoring module 310 to sample the performance data of the processing module 20.

The monitoring module 310 sends the performance data to the control module 340 through another one-way serial line.

In a possible implementation manner, the monitoring instruction includes an enable signal and a start signal, and the control module 340 sending the monitoring instruction to the monitoring module 310 can be implemented in the following manner: the monitoring module 310 is not enabled Under the circumstance, the function of monitoring the processing module 20 to obtain performance data is in the off state, and the control module 340 sends an enable signal (for example, high voltage) to the monitoring module 310 through one of the one-way serial lines. Active or low level) to allow the function of the monitoring module 310 to be used normally, and then the control module 340 sends a start signal to the monitoring module 310 to notify the monitoring module 310 to execute the acquisition of the processing module 20 Function of performance data.

In addition, registers can be added to the two unidirectional serial lines between the control module 340 and the monitoring module 310, and the normal transmission of data can be ensured through the transfer of the registers.

Please refer to FIG. 4, which is a structural diagram of an embodiment of a fourth system on chip 01 according to an exemplary embodiment of this application.

In the embodiment shown in FIG. 4, the system on chip 01 includes a plurality of processing devices 20 and a performance monitoring device 30. The performance monitoring device 30 includes: a plurality of monitoring modules 310, a control module 340, a bus 320, and a memory 330; The control module 340 includes a DMA (Direct Memory Access, direct memory access) unit 3401. The DMA unit 3401 allows communication between hardware devices of different speeds without relying on a large amount of interrupt load of the CPU, thereby Reduce the burden on the CPU.

The DMA unit 3401 is used to write the performance data of the processing module 20 into an address designated by the memory 330; wherein, the designated address may be a continuous address or a discrete address (for example, based on a linked list configuration). Address), the embodiment of the present application supports discrete address writing, effectively utilizes the fragmented space in the memory to realize data storage, and improves the utilization of memory resources.

Please refer to FIG. 5, which is a structural diagram of an embodiment of a fifth system on chip 01 according to an exemplary embodiment of this application.

In the embodiment shown in FIG. 5, the system on chip 01 includes a plurality of processing devices 20 and a performance monitoring device 30, and the performance monitoring device 30 includes: a plurality of monitoring modules 310, a control module 340, a bus 320, and a display module 350 And storage 330.

The display module 350 is configured to connect with the memory 330, read the performance data from the memory 330 and display it.

In a possible implementation manner, the display module 350 may read real-time performance data of multiple processing modules 20 from the memory 330, and the display module may include a GUI (Graphical User Interface) interface, And draw the real-time performance data of multiple processing modules 20 into a continuous graph and visually display it on the GUI interface, so that the user can compare the real-time performance of a single processing module 20 based on the displayed performance data of each processing module 20 The performance data is analyzed, or the performance data of multiple processing modules 20 at the same time is comprehensively analyzed, so as to facilitate the rapid location of the processing module 20 that caused the system failure and the accurate failure time point.

In an embodiment, the control module 340 is further configured to obtain preset configuration data for initial configuration, so that the control module 340 can control the monitoring module 310 to obtain the configuration data in a monitoring manner corresponding to the configuration data. Performance parameters of the processing module 20; wherein the control control module 340 can obtain the configuration data from the memory 330 or a preset configuration module 40. Wherein, the configuration module 40 is directly connected to the memory 330 or directly connected to the control module 340.

In an implementation manner, the configuration data may include any one or more of the following: the identification of the processing module to be monitored 20, sampling period, sampling times, sampling start time, sampling end time, and storage address mode; The address mode includes continuous address mode and discrete address mode; it can be seen that the embodiment of this application can select one or more of the above configuration data for setting based on the actual situation, which is beneficial to optimize the use experience. For example, the user can use the processing module to be monitored Configure correspondingly to realize the free choice of the processing module 20 that needs to be monitored; it is also possible to improve the sampling accuracy by setting the sampling times, and determine the performance data that needs to be obtained; it is also possible to determine the processing by setting the storage address mode The storage address of the performance data of the module 20.

It should be noted that the configuration module 40 can be implemented by a circuit, or a device or component with configuration functions. The embodiment of the present application does not impose any limitation on the specific existence of the configuration module 40, and can be specifically implemented according to actual conditions. Setting, for example, the configuration module 40 may be a functional component included in the system on chip 01, or may be an external functional component independent of the system on chip 01, such as a CPU.

Please refer to FIGS. 6A and 6B. FIG. 6A is a structural diagram of an embodiment of a sixth system on chip 01 according to an exemplary embodiment of the present application. In FIG. 6A, the system on chip 01 includes the configuration module 40 as an example. For explanation; FIG. 6B is a structural diagram of an embodiment of the seventh system-on-chip 01 according to an exemplary embodiment of the present application. In FIG. 6B, the configuration module 40 is an external functional module for illustration: the configuration The module 40 is connected to the memory 330, and the configuration module 40 is used to write the configuration data into the memory 330, so that the control module 340 reads the configuration data from the memory 330.

In a possible implementation, if the configuration data includes the identification, sampling period, and sampling times of the processing module 20 to be monitored, the control module 340 reads the configuration data from the memory 330, and then The control module 340 can control the monitoring module 310 to cyclically sample the performance parameters of the processing module 20 to be monitored by the number of sampling times within the sampling period.

Please refer to FIG. 7A and FIG. 7B. FIG. 7A is a structural diagram of an embodiment of an eighth system on chip 01 according to an exemplary embodiment of the present application. In FIG. 7A, the system on chip 01 includes the configuration module 40 as an example 7B is a structural diagram of an embodiment of a ninth system-on-a-chip 01 according to an exemplary embodiment of this application. In FIG. 7B, the configuration module 40 is an external functional module for illustration: the configuration The module 40 is connected to the control module 340; the configuration module 40 sends the configuration information to the control module 340.

In a possible implementation manner, if the configuration data includes the identification of the processing module 20 to be monitored, the sampling start time, and the sampling end time, the control module 340 reads the configuration data from the memory 330, Then, the control module 340 can control the monitoring module 310 to sample the performance parameters of the processing module 20 to be monitored during the sampling start time and the sampling end time.

Correspondingly, an embodiment of the present application also provides a performance monitoring device 30, which is characterized in that it is used to monitor the performance of multiple processing modules 20 in a SoC chip. The performance monitoring device 30 includes multiple monitoring modules 310 and a bus 320. And the memory 330, a plurality of the monitoring modules 310 and a plurality of the processing modules 20 are connected in a one-to-one correspondence; each of the monitoring modules 310 is connected to the memory 330 through the bus 320.

The monitoring module 310 is configured to obtain the performance parameters of the processing module 20 in real time, and send the performance parameters to the memory 330 through the bus 320.

The memory 330 is used to receive and store the performance parameters of the processing module 20.

Optionally, each of the processing modules 20 is connected to the memory 330 through the bus 320.

The processing module 20 is used to perform functions designated by itself, and to write data to or read data from the memory 330.

Optionally, the processing module 20 includes any one or more of the following:

Image signal processor, decoder, encoder, and graphics processor.

Optionally, the performance data includes any one or more of the following: bandwidth, delay, and the number of ongoing commands.

Optionally, the device further includes a control module 340; the control module 340 is connected to the memory 330 through the bus 320; each monitoring module 310 is connected to the memory 330 through the control module 340.

The control module 340 is configured to receive the performance data of the processing module 20 sent by the monitoring module 310 and send it to the memory 330.

Optionally, the control module 340 and the monitoring module 310 are connected through two unidirectional serial lines.

Optionally, the control module 340 is also configured to simultaneously send a monitoring instruction to the monitoring module 310 to notify the monitoring module 310 to sample the performance data of the processing module 20 at the same time.

Optionally, the control module 340 includes a DMA unit 3401;

The DMA unit 3401 is configured to write the performance data of the processing module 20 into the address designated by the memory 330.

Optionally, the designated address includes a continuous address and a discrete address.

Optionally, the control module 340 is further configured to obtain preset configuration data for initial configuration, so that the control module 340 can control the monitoring module 310 to obtain the configuration data in a monitoring manner corresponding to the configuration data. Processing module 20 performance parameters.

Optionally, the control module 340 obtains the configuration data from the memory 330 or the external configuration module 40.

Optionally, the external configuration module 40 is connected to the memory 330.

The external configuration module 40 is configured to write the configuration data into the memory 330 so that the control module 340 reads the configuration data from the memory 330.

Optionally, the external configuration module 40 is connected to the control module 340; the external configuration module 40 sends the configuration information to the processing module 20.

Optionally, the configuration information includes any one or more of the following: identification of the processing module 20 to be monitored, sampling period, sampling times, sampling start time, sampling end time, and storage address mode; the storage address mode includes continuous Address mode and discrete address mode.

Optionally, a display module 350 is further included.

For the implementation process of the functions and roles of each module (or unit) in the above-mentioned device, please refer to the implementation process of the corresponding module (or unit) in the above-mentioned system-on-chip 01 for details, which will not be repeated here.

Correspondingly, referring to FIG. 8, an embodiment of the present application also provides a performance monitoring method for monitoring the performance of multiple processing modules in a SoC chip, which is applied to the above performance monitoring device, and the method includes:

Step S101: Acquire the performance parameters of the processing module in real time.

Step S102: Store the performance parameter in a memory through the bus.

Optionally, the processing module includes any one or more of the following:

Image signal processor, decoder, encoder, and graphics processor.

Optionally, the storing the performance parameter to the memory via the bus includes:

The performance data is sent to the control module, so that the control module stores the performance parameters in the memory through the bus.

Optionally, the method further includes:

Receiving a monitoring instruction sent by the control module through one of the one-way serial lines, so as to sample the performance data of the processing module according to the monitoring instruction;

Send the performance data to the control module through another one-way serial line.

Optionally, if multiple processing modules are monitored, the monitoring instructions respectively corresponding to the multiple processing modules are simultaneously sent by the control module.

Optionally, the control module includes a DMA unit, and the control module writes the performance data of the processing module into an address designated by the memory through the DMA unit.

Optionally, it also includes:

The control module is initialized and configured based on the preset configuration data, so as to obtain the performance parameters of the processing module in a monitoring manner corresponding to the configuration data.

Optionally, the configuration data is obtained from the memory or an external configuration module.

Optionally, it also includes:

The configuration data is written into the memory, so that the control module reads the configuration data from the memory.

Optionally, it also includes:

The configuration information is sent to the processing module.

Optionally, the configuration information includes any one or more of the following: identification of the processing module to be monitored, sampling period, sampling times, sampling start time, sampling end time, and storage address mode; the storage address mode includes continuous addresses Mode and discrete address mode.

Optionally, it also includes:

Read the performance data from the memory and display it.

For the implementation process of each step in the above method, refer to the implementation process of the corresponding module (or unit) in the above-mentioned system-on-chip for details, which will not be repeated here.

Correspondingly, please refer to FIG. 9. An embodiment of the present application also provides a movable platform 001, including:

Body 02.

The power system 03 is installed in the body 02 to provide power for the movable platform 001.

And the above-mentioned system on chip 01.

Those skilled in the art can understand that FIG. 9 is only an example of a movable platform, and does not constitute a limitation on the movable platform. It may include more or less components than shown in the figure, or a combination of certain components, or different components. For example, the mobile platform may also include input and output devices, network access devices, and so on.

Correspondingly, referring to FIG. 10, an embodiment of the present application also provides a camera 002, including:

Shell 04.

The lens assembly 05 is arranged inside the housing 04.

The sensor assembly 06 is arranged inside the housing 04 and is used to sense light passing through the lens assembly and generate electrical signals.

And the aforementioned system on chip 01 is used to process the electrical signal.

Those skilled in the art can understand that FIG. 10 is only an example of a camera, and does not constitute a limitation on the camera. It may include more or less components than those shown in the figure, or combine certain components, or different components, such as the camera Can include network access equipment, etc.

It should be noted that all the above-mentioned modules or units can be implemented by circuits, or devices or components with corresponding functions.

After considering the specification and practicing the invention disclosed herein, those skilled in the art will easily think of other embodiments of the present application. This application is intended to cover any variations, uses, or adaptive changes of this application. These variations, uses, or adaptive changes follow the general principles of this application and include common knowledge or customary technical means in the technical field not disclosed in this application. . The description and embodiments are only regarded as exemplary, and the true scope and spirit of the application are pointed out by the following claims.

It should be understood that the present application is not limited to the precise structure that has been described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the application is only limited by the appended claims.

The above are only the preferred embodiments of this application and are not intended to limit this application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included in the protection of this application. Within range.

Claims

A performance monitoring device, characterized in that it is used to monitor the performance of multiple processing modules in a SoC chip. The performance monitoring device includes multiple monitoring modules, a bus, and a memory, multiple monitoring modules and multiple processing modules. Modules are connected in a one-to-one correspondence; each of the monitoring modules is connected to the memory through the bus;

The monitoring module is configured to obtain the performance parameters of the processing module in real time, and send the performance parameters to the memory through the bus;

The memory is used to receive and store the performance parameters of the processing module.
The device according to claim 1, wherein each of the processing modules is connected to the memory through the bus;

The processing module is used to perform functions designated by itself, and to write data to or read data from the memory.
The device according to claim 1, wherein the processing module comprises any one or more of the following:

Image signal processor, decoder, encoder, and graphics processor.
The apparatus according to claim 1, wherein the performance data includes any one or more of the following: bandwidth, delay, and the number of ongoing commands.
The device according to claim 1, wherein the device further comprises a control module; the control module is connected to the memory through the bus; each of the monitoring modules is connected to the memory through the control module connection;

The monitoring module is specifically configured to obtain the performance parameters of the processing module and send them to the control module;

The control module is configured to receive the performance data of the processing module sent by the monitoring module and send it to the memory.
The device according to claim 5, wherein the control module and the monitoring module are connected by two unidirectional serial lines;

The control module sends a monitoring instruction to the monitoring module through one of the one-way serial lines to notify the monitoring module to sample the performance data of the processing module;

The monitoring module sends the performance data to the control module through another one-way serial line.
The device according to claim 5, wherein the control module is further configured to send monitoring instructions to the monitoring module at the same time to notify the monitoring module to sample the performance data of the processing module at the same time.
The device according to claim 5, wherein the control module comprises a DMA unit;

The DMA unit is used to write the performance data of the processing module into an address designated by the memory.
The device according to claim 8, wherein the designated address includes a continuous address and a discrete address.
The device according to claim 5, wherein the control module is further configured to obtain preset configuration data for initial configuration, so that the control module can control the monitoring module according to the configuration data corresponding to the Obtain the performance parameters of the processing module in a monitoring manner.
The device according to claim 10, wherein the control module obtains the configuration data from the memory or an external configuration module.
The device according to claim 11, wherein the external configuration module is connected to the memory;

The external configuration module is used to write the configuration data into the memory, so that the control module reads the configuration data from the memory.
The device according to claim 11, wherein the external configuration module is connected to the control module; the external configuration module sends the configuration information to the processing module.
The device according to claim 10, wherein:

The configuration information includes any one or more of the following: the identification of the processing module to be monitored, sampling period, sampling times, sampling start time, sampling end time, and storage address mode; the storage address mode includes continuous address mode and discrete address mode.
The performance monitoring device of claim 1, further comprising a display module;

The display module is used to connect to the memory, read the performance data from the memory and display it.
A system on a chip, which is characterized by comprising a plurality of processing devices and a performance monitoring device, the performance monitoring device comprising: a plurality of monitoring modules, a bus, and a memory;

A plurality of the monitoring modules and a plurality of the processing modules are connected in a one-to-one correspondence; each of the monitoring modules and each of the processing modules are respectively connected to the memory through the bus;

The monitoring module is configured to obtain the performance parameters of the processing module in real time, and send the performance parameters to the memory through the bus;

The memory is used to receive and store the performance parameters of the processing module;

The processing module is used to perform functions designated by itself, and to write data to or read data from the memory.
The system on chip according to claim 16, wherein the processing module comprises any one or more of the following:

Image signal processor, decoder, encoder, and graphics processor.
The system on chip according to claim 16, wherein the performance data includes any one or more of the following: bandwidth, delay, and the number of ongoing commands.
The system on chip according to claim 16, wherein the performance monitoring device further comprises a control module; the control module is connected to the memory through the bus; each monitoring module is connected to the memory through the control module The memory connection;

The monitoring module is specifically configured to obtain the performance parameters of the processing module and send them to the control module;

The control module is configured to receive the performance data of the processing module sent by the monitoring module and send it to the memory.
The system on chip according to claim 19, wherein the control module and the monitoring module are connected by two unidirectional serial lines;

The control module sends a monitoring instruction to the monitoring module through one of the one-way serial lines to notify the monitoring module to sample the performance data of the processing module;

The monitoring module sends the performance data to the control module through another one-way serial line.
The system on chip according to claim 19, wherein the control module is further configured to simultaneously send a monitoring instruction to the monitoring module to notify the monitoring module to sample the performance data of the processing module at the same time .
The system on chip according to claim 19, wherein the control module comprises a DMA unit;

The DMA unit is used to write the performance data of the processing module into an address designated by the memory.
The system on chip of claim 22, wherein the designated address includes a continuous address and a discrete address.
The system-on-chip according to claim 19, wherein the control module is further configured to obtain preset configuration data for initial configuration, so that the control module can control the monitoring module in accordance with the configuration data The corresponding monitoring method obtains the performance parameters of the processing module.
The system on chip according to claim 24, wherein the system on chip further comprises a configuration module;

The control module obtains the configuration data from the memory or the configuration module.
The system on chip according to claim 25, wherein the configuration module is connected to the memory;

The configuration module is used to write the configuration data into the memory, so that the control module reads the configuration data from the memory.
The system-on-chip according to claim 25, wherein the configuration module is connected to the control module; and the configuration module sends the configuration information to the processing module.
The system on chip according to claim 24, wherein the configuration information includes any one or more of the following: identification of the processing module to be monitored, sampling period, sampling times, sampling start time, sampling end time, and storage address Mode; The storage address mode includes a continuous address mode and a discrete address mode.
The system on chip according to claim 16, wherein the performance monitoring device further comprises a display module;

The display module is used to connect to the memory, read the performance data from the memory and display it.
A movable platform, characterized in that it comprises:

Body

A power system installed in the body and used to provide power to the movable platform; and,

The system on chip according to any one of claims 16 to 29.
A camera, characterized in that it comprises:

shell;

The lens assembly is arranged inside the housing;

The sensor assembly is arranged inside the housing and is used to sense light passing through the lens assembly and generate an electrical signal; and,

The system on chip according to any one of claims 16 to 29, which is used to process the electrical signal.
A performance monitoring method, characterized in that it is used to monitor the performance of multiple processing modules in a SoC chip, and is applied to the performance monitoring device according to any one of claims 1 to 15. The method comprises:

Acquiring the performance parameters of the processing module in real time;

The performance parameter is stored in the memory through the bus.
The method according to claim 32, wherein the processing module comprises any one or more of the following:

Image signal processor, decoder, encoder, and graphics processor.
The method according to claim 32, wherein the performance data includes any one or more of the following: bandwidth, delay, and the number of ongoing commands.
The method according to claim 32, wherein the storing the performance parameter to the memory via the bus comprises:

The performance data is sent to the control module, so that the control module stores the performance parameter in the memory through the bus.
The method of claim 35, wherein the method further comprises:

Receiving a monitoring instruction sent by the control module through one of the one-way serial lines, so as to sample the performance data of the processing module according to the monitoring instruction;

Send the performance data to the control module through another one-way serial line.
35. The method according to claim 35, wherein if multiple processing modules are monitored, the monitoring instructions corresponding to the multiple processing modules are simultaneously sent by the control module.
The method according to claim 35, wherein the control module comprises a DMA unit, and the control module writes the performance data of the processing module into an address designated by the memory through the DMA unit.
The method according to claim 38, wherein the designated address includes a continuous address and a discrete address.
The method according to claim 35, further comprising:

The control module is initialized and configured based on the preset configuration data, so as to obtain the performance parameters of the processing module in a monitoring manner corresponding to the configuration data.
The method of claim 40, wherein the configuration data is obtained from the memory or an external configuration module.
The method according to claim 41, further comprising:

The configuration data is written into the memory, so that the control module reads the configuration data from the memory.
The method according to claim 41, further comprising:

The configuration information is sent to the processing module.
The method of claim 40, wherein:

The configuration information includes any one or more of the following: the identification of the processing module to be monitored, sampling period, sampling times, sampling start time, sampling end time, and storage address mode; the storage address mode includes continuous address mode and discrete address mode.
The method according to claim 32, further comprising:

Read the performance data from the memory and display it.