WO2020258799A1

WO2020258799A1 - Method of preparing self-aligning mram bottom electrode

Info

Publication number: WO2020258799A1
Application number: PCT/CN2019/128702
Authority: WO
Inventors: 王雷; 蒋信; 刘鲁萍
Original assignee: 浙江驰拓科技有限公司
Priority date: 2019-06-25
Filing date: 2019-12-26
Publication date: 2020-12-30
Also published as: CN112133822A

Abstract

The present invention provides a method of preparing a self-aligning MRAM bottom electrode, comprising: providing a substrate, said substrate sequentially comprising a metal interconnect layer, a first barrier layer, and a dielectric layer, a bottom via being formed in the first barrier layer and the dielectric layer, said bottom via being connected to the metal interconnect layer, the surface of the substrate being sequentially covered by a second barrier layer and a conductive metal layer, and the conductive metal layer filling the bottom via; performing chemical-mechanical polishing on the conductive metal layer to remove the conductive metal layer on the outside of the bottom via and to form a recess of a desired depth within the bottom via; depositing a bottom electrode metal layer to completely fill the recess; and performing chemical-mechanical polishing on the bottom electrode metal layer, up to the dielectric layer, so as to form an MRAM bottom electrode within the recess. The present invention simplifies the process of preparing a bottom electrode in an MRAM, and makes it possible to achieve precision alignment in the photolithography process.

Description

Self-aligned MRAM bottom electrode preparation method

Technical field

The present invention relates to the technical field of semiconductor manufacturing, in particular to a self-aligned MRAM bottom electrode preparation method.

Background technique

In recent years, MRAM (Magnetic Random Access Memory), which uses the magnetoresistance effect of MTJ (Magnetic Tunnel Junction), is considered to be the future solid-state non-volatile memory. Compared with other current types The memory has the advantages of fast read and write speed, unlimited erasing and writing, and easy compatibility with current semiconductor technology. In addition, it uses spin current to realize the spin transfer torque (Spin transfer torque, STT) MRAM The size of the storage unit can be reduced. These advantages make MRAM the main development direction of future new memory.

The main functional unit in MRAM is the MTJ unit, and its structure mainly includes a magnetic free layer/non-magnetic oxide layer (MgO)/magnetic pinned layer. Driven by an external magnetic field or current, the direction of the magnetic moment of the magnetic free layer is reversed, and the direction of the magnetic moment of the magnetic pinned layer is parallel or anti-parallel, making MRAM appear high and low resistance states, which can be defined as storage states. 0" and "1" to realize the storage of information.

The MTJ unit is made of dozens of layers of magnetic/non-magnetic films, most of which have a thickness of about 1nm, especially the thickness of the MgO tunnel barrier layer of MTJ

In between, it is very sensitive to the surface roughness and planarization of the bottom electrode. Therefore, when preparing MRAM devices, providing a flat MRAM bottom electrode is a key step, which can directly affect the performance of subsequent MTJ cells.

According to the existing technology, the preparation process of the bottom electrode of MRAM is roughly as follows: provide a substrate, open bottom through holes on the substrate, deposit a copper barrier layer and a copper layer to form a copper interconnect structure, and then deposit on the copper interconnect structure The bottom electrode metal layer is subjected to photolithography and etching to obtain the bottom electrode.

In the process of implementing the present invention, the inventor found that at least the following technical problems exist in the prior art:

In order to avoid the influence of the dish-shaped depression in the bottom through hole, the deposited bottom electrode metal should not be too thin. In the prior art, the bottom electrode metal needs to be lithographically and etched. Since the thickness of the bottom electrode metal exceeds a certain value, the transparency decreases or even becomes opaque, so that the photolithography process of the bottom electrode cannot be performed. In addition, under the condition that the photolithography process can be performed normally, the precise alignment of the two-layer photomask pattern has also become a major challenge for bottom electrode photolithography.

Summary of the invention

In order to solve the above problems, the present invention provides a self-aligned MRAM bottom electrode preparation method, which can simplify the process flow of the bottom electrode metal in the MRAM-without photolithography and etching processes, and solves the problem that the photolithography process cannot be performed and cannot be accurately The alignment problem can improve the flatness of the bottom electrode, reduce the defect rate, reduce the production cost, and shorten the production cycle.

The present invention provides a self-aligned MRAM bottom electrode preparation method, including:

A substrate is provided, the substrate includes a metal interconnection layer, a first barrier layer, and a dielectric layer in sequence. A bottom through hole is formed in the first barrier layer and the dielectric layer, and the bottom through hole is interconnected with the metal The layers are connected, and the surface of the substrate is sequentially covered with a second barrier layer and a conductive metal layer, and the conductive metal layer fills the bottom through hole;

Performing chemical mechanical polishing on the conductive metal layer to remove the conductive metal layer outside the bottom through hole and form a recess of a desired depth in the bottom through hole;

Depositing a bottom electrode metal layer to completely fill the recess;

Chemical mechanical polishing is performed on the bottom electrode metal layer, stopping at the dielectric layer to form an MRAM bottom electrode in the recess.

Optionally, the chemical mechanical polishing of the conductive metal layer includes: stopping the polishing end point at the second barrier layer, and performing polishing after the second barrier layer is detected according to an end point detection method to completely All the conductive metal layers above the second barrier layer are removed, and a recess of a desired depth is formed in the bottom through hole.

Optionally, the depth of the recess is 10-50 nm.

Optionally, the thickness of the bottom electrode metal layer is equal to or greater than the depth of the recess.

Optionally, the performing chemical mechanical polishing on the bottom electrode metal layer and stopping at the dielectric layer includes: performing polishing after detecting the dielectric layer, and at the same time removing a part of the dielectric layer to completely remove all the dielectric layer. All bottom electrode metal above the dielectric layer.

Optionally, the material of the bottom electrode metal layer is any one or a mixture of Ta, TaN, Ti and TiN.

Optionally, the material of the conductive metal layer is any one or a mixture of Cu, W, and Al.

Optionally, the material of the second barrier layer is any one or a mixture of Ta, TaN, Ti, TiN, Co, and Ru.

Optionally, the material of the dielectric layer is silicon oxide SiO, silicon dioxide SiO ₂ , carbon oxide CDO, silicon nitride SiN, fluorosilicate glass FSG, phosphosilicate glass PSG, borophosphosilicate glass BPSG, ortho silicon Ethyl acid TEOS, Low-K dielectric or Ultra-Low-K dielectric.

Optionally, the material of the first barrier layer is silicon oxynitride, silicon nitride, silicon carbonitride or silicon carbide.

In the self-aligned MRAM bottom electrode preparation method provided by the present invention, after depositing the bottom electrode metal layer, only a chemical mechanical polishing process is required, and the formed dish-shaped recess is used to form the MRAM bottom electrode in the formed dish-shaped recess. The photolithography and etching process overcomes the problem of precise alignment of photolithography in the existing process. In addition, the MRAM bottom electrode obtained by the above method has good surface flatness, and a magnetic tunnel junction MTJ can be deposited directly on it, which reduces the defect rate, reduces the production cost, and shortens the production cycle.

Description of the drawings

FIG. 1 is a schematic flowchart of a method for preparing a self-aligned MRAM bottom electrode according to an embodiment of the present invention;

2-7 are schematic cross-sectional views of various steps of a method for preparing a self-aligned MRAM bottom electrode according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of an electron micrograph of a bottom electrode of MRAM prepared according to an embodiment of the present invention.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be described clearly and completely in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is only a part of the embodiments of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

An embodiment of the present invention provides a method for preparing a self-aligned MRAM bottom electrode. As shown in FIG. 1, the method includes:

S101. Provide a substrate. The substrate includes a metal interconnection layer, a first barrier layer, and a dielectric layer in sequence. A bottom through hole is formed in the first barrier layer and the dielectric layer, and the bottom through hole is connected to the The metal interconnection layer is connected, and the surface of the substrate is sequentially covered with a second barrier layer and a conductive metal layer, and the conductive metal layer fills the bottom through hole;

S102: Perform chemical mechanical polishing on the conductive metal layer to remove the conductive metal layer outside the bottom through hole and form a recess of a required depth in the bottom through hole;

S103, depositing a bottom electrode metal layer to completely fill the recess;

S104, performing chemical mechanical polishing on the bottom electrode metal layer, stopping at the dielectric layer, to form an MRAM bottom electrode in the recess.

Regarding step S101, referring to FIGS. 2 to 4, the initial structure of the substrate is shown in FIG. 2, and includes a metal interconnection layer 201 from bottom to top (the metal interconnection layer 201 includes a silicon substrate and a front surface on the substrate). All necessary structures and devices prepared by the channel process, for example, including CMOS and intermediate metal interconnection layer), the first barrier layer 202 and the dielectric layer 203.

As shown in FIG. 3, bottom through holes are formed in the first barrier layer 202 and the dielectric layer 203, and the bottom through holes are connected to the metal interconnection layer 201, wherein the material of the first barrier layer 202 includes but It is not limited to silicon oxynitride, silicon nitride, silicon carbonitride or silicon carbide, and is used to prevent the diffusion of Cu ions in the metal interconnection layer 201. The material of the dielectric layer 203 includes, but is not limited to, silicon oxide SiO, silicon dioxide SiO ₂ , carbon oxide CDO, silicon nitride SiN, fluorosilicate glass FSG, phosphosilicate glass PSG, borophosphosilicate glass BPSG, and orthosilicate. Ester TEOS (chemical formula Si(OC ₂ H ₅ ) ₄ ), Low-K dielectric and Ultra-Low-K dielectric. The bottom through hole can use conventional photolithography and etching techniques to define a pattern on the dielectric layer 203, and selectively etch to remove part of the first barrier layer 202 and the dielectric layer 203, and stop on the metal interconnection layer 201 to form Bottom through hole required for metal interconnection.

As shown in FIG. 4, a second barrier layer 204 and a conductive metal layer 205 are further deposited on the surface of the substrate in sequence, and the conductive metal layer 205 fills the bottom through holes to obtain the final substrate structure. Wherein, the second barrier layer 204 covers the bottom surface and the side surface of the bottom through hole of the substrate, and covers the surface of the substrate outside the bottom through hole. The second barrier layer 204 is formed by physical vapor deposition. The materials used include but are not limited to Any one or a mixture of TaN, Ta, TiN and Ti. The conductive metal layer 205 is formed by a common semiconductor method such as physical vapor deposition or chemical vapor deposition, and the thickness of the conductive metal layer 205 is equal to or greater than the depth of the bottom through hole. The material of the conductive metal layer 205 includes, but is not limited to, any one or a mixture of Cu, W, and Al.

Regarding step S102, the conductive metal layer 205 is a copper layer as an example for description. As shown in FIG. 5, the copper layer 205 is chemically mechanically polished, where only the copper layer 205 is chemically mechanically polished, and the second barrier layer 204 is not required. According to the end point detection method, the second barrier layer 204 is detected during polishing and then polished for 30 seconds to completely remove all the copper layer above the second barrier layer 204. 205. At this time, a dish-shaped depression 21 of the required depth will be formed in the bottom through hole. The depth of the dish-shaped depression 21 is recorded as H1. In this step, polishing is added so that the formed dish-shaped depression is between 10-50 nm. The specific time can be set according to the actual process needs, such as

Regarding step S103, as shown in FIG. 6, a bottom electrode metal layer 206 of sufficient thickness is directly deposited on the surface of the second barrier layer 204 and the copper layer 205 in the bottom via hole. The material of the bottom electrode metal layer 206 includes but is not limited to Ta, Any one or a mixture of TaN, Ti and TiN. The bottom electrode metal layer 206 is filled with the dish-shaped recess 21, the thickness of the bottom electrode metal layer 206 is denoted as H2, generally H2>=2.5H1, preferably H2>=3H1, such as

To completely fill the dish-shaped recess 21.

Regarding step S104, as shown in FIG. 7, chemical mechanical polishing is performed on the bottom electrode metal layer 206, and the polishing end point stops at the dielectric layer 203 to remove the excess second barrier layer 204 above the dielectric layer outside the bottom via hole. Ensure that the second barrier layer 204 is completely removed. After the dielectric layer 203 is detected during polishing, the dielectric layer 203 is polished, and a certain thickness of the dielectric layer is removed at the same time.

At this time, a part of the bottom electrode metal will be left in the dish-shaped recess 21 in the bottom through hole to form the MRAM bottom electrode 207.

It should be noted that in order to ensure that the surface of the bottom electrode of the finally formed MRAM is flat, if the surface flatness does not meet the requirements after performing a chemical mechanical polishing, the bottom electrode metal layer can be deposited repeatedly and chemical mechanical polishing is performed as needed, until the final formed The surface of the bottom electrode of the MRAM is flat.

The bottom electrode preparation method provided in the above embodiments is a self-aligned MRAM bottom electrode preparation method. After the bottom electrode metal layer is deposited, only a chemical mechanical polishing process is required, and the formed dish-shaped depression is used in the formed dish The bottom electrode of the MRAM is formed in the shaped recess, without photolithography and etching process, and overcomes the problem of precise alignment of photolithography in the existing process. In addition, the MRAM bottom electrode obtained by the above method has good surface flatness, and a magnetic tunnel junction MTJ can be deposited directly on it, which reduces the defect rate, reduces the production cost, and shortens the production cycle.

Referring to the scanning electron microscope (SEM) photo of FIG. 8, a process photo of the MRAM bottom electrode prepared according to the embodiment of the present invention is given, which verifies the feasibility of the self-aligned MRAM bottom electrode preparation method of the present invention.

The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. All should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

A method for preparing a self-aligned MRAM bottom electrode, which is characterized in that it comprises:

A substrate is provided, the substrate includes a metal interconnection layer, a first barrier layer, and a dielectric layer in sequence. A bottom through hole is formed in the first barrier layer and the dielectric layer, and the bottom through hole is interconnected with the metal The layers are connected, and the surface of the substrate is sequentially covered with a second barrier layer and a conductive metal layer, and the conductive metal layer fills the bottom through hole;

Performing chemical mechanical polishing on the conductive metal layer to remove the conductive metal layer outside the bottom through hole and form a recess of a desired depth in the bottom through hole;

Depositing a bottom electrode metal layer to completely fill the recess;

Chemical mechanical polishing is performed on the bottom electrode metal layer, stopping at the dielectric layer to form an MRAM bottom electrode in the recess.
The method of claim 1, wherein the chemical mechanical polishing of the conductive metal layer comprises: stopping the polishing end point at the second barrier layer, and detecting the second barrier layer according to an end point detection method. After the barrier layer is polished, all the conductive metal layers above the second barrier layer are completely removed, and a recess of a desired depth is formed in the bottom through hole.
The method of claim 1, wherein the depth of the recess is 10-50 nm.
The method according to claim 1, wherein the thickness of the bottom electrode metal layer is equal to or greater than the depth of the recess.
The method according to claim 1, wherein the chemical mechanical polishing of the bottom electrode metal layer and stopping at the dielectric layer comprises: performing polishing after detecting the dielectric layer, and simultaneously removing Part of the dielectric layer to completely remove all the bottom electrode metal above the dielectric layer.
The method according to claim 1, wherein the material of the bottom electrode metal layer is any one or a mixture of Ta, TaN, Ti and TiN.
The method according to claim 1, wherein the material of the conductive metal layer is any one or a mixture of Cu, W, and Al.
The method according to claim 1, wherein the material of the second barrier layer is any one or a mixture of Ta, TaN, Ti, TiN, Co, and Ru.
The method according to claim 1, wherein the material of the dielectric layer is silicon oxide SiO, silicon dioxide SiO 2 , oxycarbide CDO, silicon nitride SiN, fluorosilicate glass FSG, phosphosilicate glass PSG , Borophosphosilicate glass BPSG, TEOS, Low-K dielectric or Ultra-Low-K dielectric.
The method according to claim 1, wherein the material of the first barrier layer is silicon oxynitride, silicon nitride, silicon carbonitride, or silicon carbide.