WO2020254421A1

WO2020254421A1 - Circuit with galvanic isolation and capacitive signal feedback

Info

Publication number: WO2020254421A1
Application number: PCT/EP2020/066788
Authority: WO
Inventors: Reimar KLOTZ
Original assignee: Tridonic Gmbh & Co Kg
Priority date: 2019-06-17
Filing date: 2020-06-17
Publication date: 2020-12-24
Also published as: DE202019103377U1; EP3963706A1

Abstract

The invention relates to a circuit with electrical potential isolation and in particular a converter circuit (1), for example a synchronous flyback converter circuit. The circuit comprises a transformer with at least one primary winding and at least one secondary winding, which electrically isolates a primary side of the converter circuit (1), which is supplied by a mains voltage, from a secondary side of the converter circuit (1) by means of a potential barrier (5). The secondary side is designed to provide at least one load current via a load output. The converter circuit (1) transmits at least one feedback signal from the secondary side to the primary side of the converter circuit (1), wherein the feedback signal is transferred capacitively and as an analogue signal via the potential barrier (5). The feedback signal is preferably supplied on the secondary side as voltage to a means for transferring it to the primary side. The transfer means (12) can be constructed with three capacitors (13, 14, 15), preferably arranged as capacitive voltage dividers. The invention also comprises an operating device (30) comprising a corresponding voltage converter circuit and a luminaire comprising a corresponding operating device and the lamps (31) supplied thereby. The invention also relates to a method for controlling a converter circuit.

Description

Circuit with galvanic isolation and capacitive signal feedback

The invention relates to an electrical circuit with galvanic isolation. In particular, a clocked voltage converter circuit with a potential barrier between the primary side and the secondary side and transmission of a signal via the potential barrier is proposed. The clocked voltage converter circuit can be designed, for example, as a flyback converter circuit, preferably as a synchronous flyback converter circuit, for operating lighting means, in particular light-emitting diodes.

Clocked voltage converters are DC voltage converters that are used electrically to transfer energy between an input and an output side using a transformer in a galvanically decoupled manner. With a clocked voltage converter circuit, a DC voltage supplied at the input can be converted into a

DC voltage can be converted to a different voltage level, the

Voltage difference in a simple way by choosing the winding ratio of the

Transformer can be influenced.

The transformer separates the input side of the pulsed voltage converter circuit from the output side of the pulsed voltage converter circuit and thus realizes an electrical potential barrier. By means of this potential barrier, e.g. higher electrical voltages on the input side (primary side, primary circuit) of the pulsed voltage converter circuit are electrically isolated from the lower electrical voltages on the output side (secondary side, secondary circuit) of the pulsed voltage converter circuit. The output side can thus be designed in such a way that only voltages less than or equal to a protective extra-low voltage level occur in the output circuit, which means that fewer requirements for protection against accidental contact have to be met.

A known clocked voltage converter circuit is, for example, a clocked

Flyback converter circuit is known in which a control device switches a switch, which couples the primary winding of the transformer to ground, for clocking the flyback converter selectively with a specific frequency and duty cycle.

Such clocked flyback converter circuits are used for the direct supply of lighting means, in particular light-emitting diodes, the current flowing through the controllable switch on the primary side being detected by means of a measuring resistor and the switch by means of one of the

Control device output control signal is switched off as soon as the detected current reaches a predetermined threshold value for the maximum switch current (peak current value). In order to regulate the electrical power of the clocked flyback converter delivered via the output circuit to the lighting means, the threshold value can be adapted to the determined deviation between the load current delivered to the light-emitting diodes (actual load current) and a specified target load current. The actual value of the load current delivered to the lighting means is determined for this purpose by means of a measuring resistor in the output circuit. The determined actual value is then fed back to the control device via the electrical potential barrier. The return of the determined actual value of the load current while ensuring galvanic isolation requires the use of suitable circuit technology, for example an optocoupler or a transformer.

For example, US 2013/0016535 A1 shows a clocked flyback converter circuit which feeds a signal generated on the secondary side back to the primary side via a potential barrier by means of an optocoupler.

The international application WO 2014/172727 A1 exclusively uses transformers to transmit a test signal generated on the primary side to the secondary side of the potential barrier and to monitor a corresponding secondary-side reaction to the test signal.

The known transmission of any (measurement) signals, as well as control signals, via the electrical potential barrier is disadvantageous, since an optocoupler and a transformer represent additional, cost-intensive components. The space requirement of a transformer is also considerable and therefore disadvantageous for the construction of electrical circuits. The transmission of measured values for the load current via the electrical potential barrier by means of an optocoupler can be further

circuitry for generating and processing signals, for example modulation, and receiving and evaluating the transmission signal. This involves additional circuit engineering effort in development and production.

The laid-open specification US 2008/0192509 A1 implements an isolated transmission path for a feedback signal by means of capacitors and generates a digital format of the feedback signal for the transmission, which is generated on the secondary side, for example by means of oversampling and conversion to a higher frequency level, and converted back into an analog feedback signal on the primary side by low-pass filters becomes. Here, too, a considerable amount of circuitry is required to transmit the feedback signal by means of a digital signal across the potential barrier and to recover the feedback signal from the transmitted digital signal.

The task is therefore to transmit signals generated on the secondary side in a circuit-efficient manner via an electrical potential barrier.

The object is achieved by a clocked converter circuit according to claim 1 in a first aspect. A second aspect of the invention relates to a method for controlling a converter circuit. The dependent claims define further versions of the converter circuit according to the invention.

A clocked converter circuit according to a first aspect of the invention has a transformer with at least one primary winding and at least one secondary winding. The transformer electrically isolates a primary side of the converter circuit, which is supplied from a mains voltage, from a secondary side of the converter circuit by means of a potential barrier. The secondary side is set up to output at least one load current to a load via a load output of the converter circuit. The converter circuit is also set up to transmit at least one feedback signal from the secondary side of the converter circuit to the primary side of the converter circuit. The converter circuit according to the invention is characterized by means which are set up to capacitively transmit the feedback signal as an analog signal across the potential barrier.

The converter circuit according to the invention uses a capacitive transmission via the potential barrier and can therefore dispense with complex and expensive winding goods such as transmitters (transformers) or costly optocouplers, possibly in conjunction with additional components for generating transmission signals. The converter circuit is therefore simple in terms of circuit technology, space-saving in terms of the circuit elements used, and can be manufactured inexpensively. The evaluation of a feedback signal generated on the secondary side can take place on the primary side in a control circuit present there for the control of the primary-side switch of the clocked converter.

An analog signal here denotes a signal form of an electrical signal with a stepless and uninterrupted course. For example, the time-continuous course of a physical variable can be described with an analog signal, the range of values of the analog signal being referred to as the dynamic range. In contrast to a digital signal, the analog signal has a stepless curve that can theoretically assume an infinite number of signal values within the dynamic range.

A particularly preferred embodiment of the converter circuit shows the means for capacitive transmission of the feedback signal with the circuit topology of a capacitive voltage divider.

This is a circuit that is simple, purely passive and therefore energetically advantageous

Realize the implementation of signal feedback via the potential barrier.

A preferred embodiment of the converter circuit is characterized in that the means for capacitive transmission of the feedback signal has the feedback signal on the secondary side of the

Flyback converter circuit is supplied as a voltage.

The transmission of the feedback signal from the secondary side to the primary side via the potential barrier thus takes place in the case of the invention by means of analog voltage. There are no additional elements required to modulate the information to be transmitted onto a carrier signal, for example by means of pulse width modulation or delta modulation.

The converter circuit, in particular the means for transmitting the feedback signal, of an advantageous embodiment comprises a first capacitor and a second capacitor. A first connection of the first capacitor and a first connection of the second capacitor are arranged on the primary side of the converter circuit. A second connection of the first capacitor and a second connection of the second capacitor are arranged on the secondary side of the converter circuit. The feedback signal is applied as an electrical voltage between the second connection of the first capacitor and the second connection of the second capacitor.

A preferred embodiment of the converter circuit is characterized in that the

Converter circuit, in particular the means for feedback, arranges a third capacitor between the first connection of the first capacitor and the second connection of the second capacitor on the primary side of the converter circuit. A voltage is fed to inputs of a control circuit of the converter circuit via the third capacitor.

The use of capacitors in the means according to the invention for transmitting the

Feedback signal enables a temperature range, frequency response and

To build up space requirement favorable circuit, which, compared to known means for transmission over a potential barrier, is easy to dimension in terms of its parameters and to manufacture inexpensively.

With the first, second and third capacitors, the means for transmission comprises exclusively passive components. Circuitry elements on the secondary side for the voltage supply for the means for transmitting the feedback signal can thus be omitted.

The control circuit of the converter circuit can be set up at the inputs of the

Evaluate the control circuit voltage present across the third capacitor as an indicator of a load current on the secondary side of the converter circuit.

The primary-side evaluation of an analog voltage fed back via the potential barrier, which represents the load current output by the clocked converter circuit, enables an advantageously simple clocked converter circuit to be set up and manufactured which can regulate the load current in a primary-side control circuit via a primary-side switch and at the same time meets the requirements for protective extra-low voltages at your load output without great additional effort.

One embodiment of the converter circuit is characterized in that the means for

Transfer a primary-side resistance between the first terminal of the first Capacitor and the first connection of the second capacitor on the primary side of the

Converter circuit arranges.

Inputs of a control circuit of the converter circuit is a voltage across the

primary-side resistance supplied.

With the arrangement of the primary-side resistor between the first terminal of the first capacitor and the first terminal of the second capacitor on the primary side of the

Converter circuit, an embodiment of the means for transmission with particularly high measurement accuracy for measuring the secondary-side load current is created. The advantageous, capacitive transmission of the feedback signal via the potential barrier in connection with the ohmic resistance on the primary side between the first inputs of the first and the second capacitor prevents in particular a voltage drift which would falsify the feedback signal. This enables the high measurement accuracy to be achieved. The feedback signal preferably forms one

AC voltage, in particular a bipolar AC voltage.

An advantageous converter circuit is characterized in that the feedback signal reproduces a measured value for a load current delivered by the converter circuit to an electrical load.

The converter circuit can have a measuring resistor in series with a load output on the

Have arranged secondary side of the converter circuit. The feedback signal essentially corresponds to a voltage drop across the measuring resistor.

In particular, the feedback signal can be shifted by an offset (offset voltage) with respect to the voltage drop across the measuring resistor by the capacitive voltage divider if the means for capacitive transmission of the feedback signal is designed as a capacitive voltage divider. The amplitude of the feedback signal is reduced by the capacitive voltage divider compared to the voltage drop across the measuring resistor in accordance with a division ratio of the capacitive voltage divider.

This enables a primary-side regulation of the load current on the basis of an actual value of the returned measured value for the load current with little circuitry complexity, in particular for the purely passive means for transmitting the feedback signal.

Another embodiment of the converter circuit has a current transformer on the secondary side of the converter circuit, a first winding of the current transformer being connected in series with a load output on the secondary side of the converter circuit, and a second winding of the current transformer on the secondary side of the current transformer in parallel with a secondary-side resistor is switched. The feedback signal corresponds to a Voltage drop across the secondary resistance on the secondary side of the

Current transformer.

The current transformer is arranged exclusively on the secondary side of the converter circuit. This means that the current transformer does not have to meet any requirement with regard to SELV separation and can be designed accordingly simply. That puts the additional cost of the

Current transformer low, and the use of the current transformer has the additional advantage that a limitation of the signal amplitudes on the secondary side of the converter circuit due to the measuring resistor is avoided. Signalverzemmgen are particularly advantageous

Resonances caused by a parasitic capacitance of the secondary-side switch S and hard switching operations of the switch by means of the current transformer are reduced. In an advantageous embodiment of the invention, the clocked converter circuit is a flyback converter circuit, in particular a synchronous flyback converter circuit.

In particular the flyback converter, also implemented as a synchronous one

Flyback converter circuit can, using the means according to the invention for feedback, carry out precise control of a load current by means of the teaching according to the invention, can be dimensioned in a simple electrical manner with little effort, designed compactly, and manufactured at low cost.

An operating device for lighting means according to a second aspect, wherein the operating device comprises at least one converter circuit constructed according to one of the embodiments discussed above, achieves the object in an advantageous manner.

According to a third aspect of the invention, a lamp with at least one lamp and at least one operating device for supplying the at least one lamp also solves the technical problem.

The at least one lighting means can comprise one or more light-emitting diodes.

Both operating devices for lamps, and especially when using light-emitting diodes (LED) and lights, benefit from a compact design of the clocked devices used for this

Converter circuits and low manufacturing costs for these converter circuits. For the designer in the design process of a luminaire, there are additional degrees of freedom for the design and new lighting solutions.

A method for controlling a clocked converter circuit according to a second aspect of the invention solves the technical problem. The clocked converter circuit comprises a first controllable switch, a second controllable switch, a transformer with a

Primary winding coupled to the first switch and a secondary winding coupled to the second switch. The transformer electrically isolates one from one Mains voltage supplied to the primary side of the converter circuit from a secondary side of the converter circuit by means of a potential barrier. The secondary side of the converter circuit outputs a fast current via a fast output of the converter circuit. The converter circuit has a control device arranged on the primary side. The method is characterized by the following steps: generating an analog feedback signal on the basis of a current flowing through the second switch; Transferring the analog feedback signal capacitively across the potential barrier from the secondary side of the converter circuit to the primary side of the converter circuit; Reading of the transmitted analog feedback signal by the control device on the primary side of the

Converter circuit; Generation of at least one switch control signal on the basis of the read-in analog feedback signal by the control device.

Embodiments of the invention are presented below with reference to the figures. Show it:

1 shows a synchronous flyback converter circuit according to an embodiment of the invention,

Fig. 2 characteristic voltage and current curves of the clocked synchronous

Flyback converter circuit according to one embodiment of the invention,

3 shows a basic arrangement for signal transmission via a potential barrier according to an embodiment of the invention,

Fig. 4 voltage curves of the basic arrangement for signal transmission via a

Potential barrier according to FIG. 3,

5 shows an operating device for dampening solution according to an embodiment of the invention,

6 shows a further embodiment of a synchronous flyback converter circuit according to FIG

Invention,

7 shows yet another embodiment of a synchronous flyback converter circuit according to the invention,

8 voltage and current profiles of the clocked synchronous flyback converter circuit according to an embodiment of the invention, and

FIG. 9 shows a simple flow chart of a method for current measurement according to a

Implementation of the invention.

In the figures, the same reference symbols denote elements with the same or corresponding ones

Functions. The discussion of the same reference symbols in different figures is, as far as this appears possible without impairing the intelligibility, in favor of a concise one

Representation omitted. 1 shows a simplified illustration of a clocked synchronous flyback converter circuit 1 according to an embodiment of the invention,

Such a clocked flyback converter circuit 1 represents a special embodiment of a clocked power supply (switched mode power supply, abbreviated to SMPS), in particular a clocked DC-DC converter (also: DC-DC power converter) also known as a flyback converter.

At the primary-side input connections of the flyback converter circuit 1 shown, a

Supply voltage UBUS (input voltage) supplied. UBUS is a direct voltage or a rectified alternating voltage, which is generated in FIG. 1 by an ideal direct voltage source 6. The clocked synchronous flyback converter circuit 1 converts the input voltage UBUS into a direct voltage with a different voltage level and provides the generated output voltage ULAST at two secondary-side output connections (load connections) of the flyback converter circuit 1. Illuminants, for example a light-emitting diode 7, can be connected to the two output connections on the secondary side and supplied with a load current ILAST. Alternatively, a further voltage converter (not shown) can be connected to the output connections on the secondary side.

A primary winding 3 of the transformer 2 and a first controllable switch 8 are in series between the first primary-side input connection and the second primary-side

Input connection switched. A secondary winding 4 of the transformer 2 and a second controllable switch 9 are connected in series between a first output terminal on the secondary side and a second output terminal on the secondary side. A capacitor 10 is arranged in parallel with the secondary-side output connections. The primary and secondary windings 3, 4 of the transformer 2 have different polarities (different winding directions, winding directions). The primary and secondary windings 3, 4 of the transformer 2 each have a certain number of NPRIMARY, NSEECONDARY windings. The ratio of the number of windings NPRIMARY, NSECONDARY determines a ratio of input voltage UBUS and load voltage ULAST of the flyback converter circuit 1. NPRIMARY and NSECONDARY can be the same or different.

The transformer 2 realizes an electrical barrier (potential barrier) 5 between the primary side and the secondary side via the galvanic separation of the primary side and the secondary side

Flyback converter circuit 1. The potential barrier 5 is also referred to as the SELV barrier and separates circuit areas with safety extra low voltage (SELV for short) from circuit areas that do not meet the requirements for safety extra low voltage.

The first switch 8 and the second switch 9 can be implemented by means of transistors, for example as a bipolar transistor with an insulated gate electrode (IGBT) or metal-oxide-semiconductor field-effect transistors (MOSFET). The first switch 8 and the second switch 9 are of one Control circuit 18 controlled by means of switch control signals 16, 17 in order to switch the first switch 8 and the second switch 9 on and off.

The transformer 2 is referred to here as a transformer, although primary winding 3 and

Secondary winding 4 under the assumption of ideal magnetic coupling against one

conventional electrical transformers do not carry electricity at the same time.

The control circuit 18 can be implemented as a microcontroller, as an application-specific circuit (ASIC) or generally by means of suitable integrated circuits (IC).

After the first switch 8 has been switched on, a current IBUS (IPRIMÄR) flows through the primary winding 3 of the transformer 2, the switched off second switch 9 at the same time preventing a current flow on the secondary side. The current flow IPRIMÄR through the first switch 8 can be determined by means of a measuring resistor (not shown in the drawing) and the voltage dropping across the measuring resistor and detected by the control circuit 18. When the determined current IPRIMARY reaches a defined threshold value, the control circuit 18 switches off the first switch 8 (non-conductive) and closes the second switch 9 (conductive).

After opening (beginning of the blocking phase) the first switch 8, the magnetic energy stored in the primary winding 3 is released via the secondary winding 4 of the transformer 2 and generates a current flow ISEKUNDÄR on the secondary side of the flyback converter 1 through the second, then closed switch 9. This current ISECONDARY charges the capacitor 10. The capacitor 10, in particular the electrical energy stored in an electrical field of the capacitor 10, drives a load current ILAST, which is output via a load output of the flyback converter circuit 1.

The primary current IPRIMÄR and the secondary current ISEKUNDÄR have different peak values IPRIMÄR, ISEKUNDÄR at the time when the first switch 8 is switched off, which arise due to different numbers of turns NPRIMÄR, NSEECUNDÄR of the primary winding 3 and the secondary winding 4 of the transformer 2, respectively. The current ISECONDARY on the secondary side decreases linearly and finally becomes zero. As long as the second switch 9 is initially still closed, the drives

Capacitor 10 a current ISECUNDARY in the opposite direction through the secondary winding 4 and the second switch 9. This current ISECUNDARY can flow until the second switch 9 is opened by the control device 18 by means of the switch control signal 17.

Alternatively, the second switch 9 can only be closed after the first switch 8 has been opened in order to avoid undesired damage to the components, a short period of time t _dead between opening the first switch 8 and closing the second switch 9. A parasitic diode of the second switch 9 enables rapid commutation. The second However, switch 9 should be closed (switched on) quickly to avoid unnecessary losses.

The control circuit 18 determines the current ISEKUNDÄR flowing through the second switch 9 at the time of its opening or the voltage ULAST provided by the flyback converter circuit 1 at a load output.From this, the control circuit 18 can determine a time for opening the second switch 9. On the basis of the point in time determined in this way for opening the second switch 9, the control circuit 18 generates the suitable switch control signal 17.

The control signal 17 can be fed to the second switch 9 via a circuit means suitable for bridging the potential barrier, for example an optocoupler not shown in FIG. 1.

The flyback converter circuit 1 according to the invention shows a means 12 for capacitive transmission of a voltage from one side of the electrical potential barrier 5 to the other side of the electrical potential barrier 5. The means 12 is shown in FIG. 1 designed in such a way that an analog voltage UMESS, which is an indicator for the height of the measured by means of the measuring resistor RMESS 11

Load current ILAST represents, via the potential barrier 5 on the primary side of the flyback converter circuit 1 is transmitted (returned).

The means 12 for capacitive transmission is constructed here as a capacitive voltage converter and comprises a first capacitor 13 and a second capacitor 14. A first connection of the first capacitor 13 and a first connection of the second capacitor 14 are arranged on the primary side of the flyback converter circuit 1, and a The second connection of the first capacitor 13 and a second connection of the second capacitor 14 are on the secondary side of the

Flyback converter circuit 1 arranged. The first connection of the first capacitor 13 and the first connection of the second capacitor 14 are thus arranged on one side of the electrical potential barrier 5, and the second connection of the first capacitor 13 and the second connection of the second capacitor 14 are on the other side of the potential barrier 5 of the flyback converter circuit 1 arranged.

The means 12 furthermore has a third capacitor 15, connected between the first connection of the first capacitor 13 and the first connection of the second capacitor 14 on the primary side of the flyback converter circuit 1.

The first capacitor 13, the second capacitor 14 and the third capacitor 15 are thus connected in series as viewed from an input of the means 12. The input of the means 12 is formed by the second connection of the first capacitor 13 and the second connection of the second capacitor 14. The entrance of the means 12 is thus on the secondary side of the

Flyback converter circuit 1. The feedback signal to be carried over the potential barrier 5 is called Voltage is applied between the input terminals of the means 12. In FIG. 1, the feedback signal is the voltage UMESS across the measuring resistor 11.

Thus, the feedback signal is used as a voltage between the second terminal of the first

Capacitor 13 and the second terminal of the second capacitor 14 applied.

The output of the means 12 comprises output connections which are each connected to the first connection of the third capacitor 15 and the second connection of the third capacitor 15. The output of the means 12 is thus on the primary side of the flyback converter circuit 1.

The output connections of the means 12 are each connected to inputs of the control circuit 18 of the flyback converter circuit 1. Thus, the control circuit 18 is fed back

Voltage URÜCK supplied, which corresponds to the voltage URÜCK falling across the third capacitor 15. The voltage URÜCK is essentially, apart from a possible offset, as will be explained with reference to FIG. 2, proportional to the voltage UMESS supplied to the means 12 on the input side.

The voltage URÜCK is thus shifted by the offset (offset voltage) compared to the voltage drop UMESS across the measuring resistor 11 by the capacitive voltage divider if the means 12 for capacitive transmission of the feedback signal is designed as a capacitive voltage divider. The voltage URÜCK is reduced in its amplitude in relation to the voltage UMESS across the measuring resistor 11 by the means 12 in accordance with a division ratio of the capacitive voltage divider.

The invention can carry out the transmission of an analog signal via the potential barrier 5 by means of capacitors approved under SELV regulations. These capacitors, for example class Y interference suppression capacitors, are also referred to as Y capacitors. Y capacitors are electrical capacitors that are arranged between a phase conductor L, a neutral conductor N on the one hand, and accessible circuit parts, for example a circuit housing, and thus bridge an electrically insulating potential barrier. For use as Y capacitors, class Y capacitors are permitted which, with limited capacity, have a tested, increased electrical and mechanical safety in order to reliably prevent danger to a person in the event of a failure.

The capacitors 13, 14, 15 can, for example, be ceramic capacitors, approved for use as interference suppression capacitors, and in particular designed as surface-mounted components (English: Surface-Mounted Devices, abbreviated: SMD).

The means 12 is designed as a passive circuit, comprising essentially a capacitive voltage divider with the capacitors 13, 14, 15. A special voltage supply, for example an additional secondary-side extra-low voltage supply (Low Voltage Power Supply, abbreviated LVPS) is therefore not required. The required circuit board area for the solution according to the invention is therefore correspondingly small and the voltage converter circuit 1 can be designed to be compact.

The control circuit 18 can be designed to use the returned voltage URÜCK via the third capacitor 15 as an indicator of a load current LAST on the secondary side of the

Evaluate flyback converter circuit 1. Regulation of the flyback converter circuit 1, in particular regulation of the load current LAST, can thus take place on the basis of the actual value of the load current LAST.

Fig. 2 shows simplified examples of voltage and current curves of the clocked synchronous flyback converter circuit 1 according to an embodiment of the invention.

In the upper part of FIG. 2, the course of the primary-side current LRIMÄR through the primary-side winding 3 of the transformer 2 and the secondary-side current ISEKUNDÄR through the secondary-side winding 4 of the transformer 2 with a switching cycle T are shown schematically.

The switching cycle T begins at a point in time to and ends at a point in time U, or at point in time U the subsequent switching cycle begins.

During a time period I, a primary-side current LRIMÄR flows through the primary winding 2.

At time to, the first switch 8 is opened. The second switch 9 is closed at this point in time to. During the time period II, the current ISEKUNDÄR is fed from the energy stored in the magnetic field of the transformer 2 and decreases linearly. At a point in time ti, the ISECUNDARY current reaches zero and then becomes negative.

At time Ϊ2, the second switch 9 is opened. The first switch 8 remains open. A negative current LRIMÄR begins to flow through the primary-side winding 3 of the transformer 2.

At time Ϊ ₃ , the first switch 8 is closed and the second switch 9 remains open. The current LRIMÄR increases until it reaches a threshold value IPRIMÄRI at time U. The first switch 8 is now opened and the second switch 9 is closed. The threshold value IPRIMÄRI can be set by the control circuit 18, for example as a function of a received dimming signal.

In particular, the control circuit 18 can set the threshold value IPRIMÄRI as a function of a determined current or voltage value. The threshold value IPRIMÄRI can be increased when the determined current or voltage value at the load output of the flyback converter circuit 1 falls below a predetermined value. The threshold value IPRIMÄRI is reduced if the determined current value for LOAD or the determined voltage value ULAST is greater than the specified value. The first switch 8 can be switched on after a waiting time has elapsed, which begins when the second switch 9 is switched off at time Ϊ2.

In the lower part of FIG. 2, the course of a voltage UMESS, which drops across the secondary-side measuring resistor 11, and the returned voltage URÜCK at the input of the control circuit 18 are shown schematically.

The voltage UMESS shows a time curve corresponding to the curve of the secondary-side load current ILAST:

UMESS— RMESS ^X ISECONDARY; ( 1)

This voltage drop across the measuring resistor 11 (current measuring resistor, “shunt”) corresponds to a voltage drop across the capacitive voltage divider comprising the first, second and third capacitors 13, 14, 15.

If parasitic effects of the components are disregarded, the result is a UMESS corresponding amplitude corresponding to the capacitances and in principle comparable to a resistive voltage subnetwork for the voltage U _R üc _KÜ across the capacitor 15 _. Based on the known capacitance values of the capacitors 13, 14, 15 and the resistance value of the

Measuring resistor RMESS 11, a proportionality factor can be determined with which the voltage URÜCK can be used to infer the secondary-side current ISEKUNDÄR and thus the Uload current ILOAD.

In the lower part of FIG. 2, a DC component is shown in the course of the returned voltage URÜCK at the input of the control circuit 18. This constant component (constant component,

Offset) of the voltage URÜCK returned via the electrical potential barrier is based on an offset shift which is the result of an approximately real consideration of parasitic effects when modeling the capacitors 13, 14, 15. The real circuit of the first, second and third capacitors 13, 14, 15 will show a parasitic discharge of the capacitances in one switching cycle.

The DC component of the returned voltage URÜCK can be determined during the time period I (phase I), as can also be seen from the upper part of FIG. 2, when the first switch 8 is closed.

As explained above, the amplitude of the alternating component of the returned voltage URÜCK can be determined by modeling the circuit comprising the first, second and third capacitors 13, 14, 15 as a capacitive voltage divider. A proportionality factor is thus determined.

The control circuit 18 can thus perform an offset correction for the returned signal, in accordance with the profile of the returned voltage URÜCK, as well as under _Reconstruct the analog measurement signal for the secondary-side current Is _EK U _NDÄ and the load current LAST taking into account the proportionality constant.

The returned voltage URÜCK is an analog voltage, which is preferably the inputs of the

Control circuit 18 is supplied, the analog inputs of an analog -digital converter (A / D converter) are. Conventional microcontrollers often include one or more A / D converters with corresponding inputs and are therefore well suited for use as control circuit 18.

In Fig. 3 is a basic arrangement for signal transmission via an electrical

Potential barrier 5 shown according to an embodiment of the invention.

In the upper partial figure 3, the generation of a measurement voltage UMESS is shown on the left as a voltage drop across a measurement resistor 11 through which the current ILAST to be measured flows.

The voltage UMESS is fed to the means 12 for transmission via the electrical potential barrier 5 to the inputs of the control circuit 18.

The means 12 for transmission over the electrical potential barrier is more capacitive

Voltage divider constructed with the first capacitor 13, the second capacitor 14 and the third capacitor 15. If there is a voltage change in the voltage U _MESS or Ui supplied to the means 12, for example a voltage drop, the voltage URÜCK falling at the output of the means 12 in parallel with the third capacitor 15 is divided according to the values of the capacitors 13, 14, 15.

First and second capacitors 13, 14 at the same time ensure the galvanic separation of the inputs of the means 12 from the outputs of the means 12. The means 12 thus ensures the electrical potential barrier 5 between the inputs of the means 12 and the outputs of the means 12.

An analog input signal with a changing voltage level, an alternating signal, in particular also a bipolar alternating signal, is transmitted from the inputs of the means 12 to the outputs of the means 12.

This transmission of the information contained in the signal change via the means 12 takes place purely capacitively and thus without complex transformers or optocouplers and associated signal-generating and signal-evaluating assemblies. The solution according to the invention is space-efficient and inexpensive with its use of only a few capacitors.

In one embodiment, the voltage UMESS is fed directly to the means 12 for transmission via the electrical potential barrier 5 for transmission to the inputs of the control circuit 18, that is, contrary to the illustration in FIG. 3. In an alternative embodiment of the invention, the voltage UMESS is amplified with an amplifier 19 and then fed to the means 12 for transmission. The amplifier 19 shown in FIG. 3 is optional and particularly advantageous in the case of small values of the voltage UMESS.

However, the invention is not restricted to the transmission of the measured voltage UMESS as a voltage value representative of the value of the current ILAST. The procedure according to the invention can generally be used for the transmission of a voltage Ui, as shown in the lower right partial FIG. 3 by an ideal voltage source 20, by means of the means 12 via the potential barrier 5.

The voltage URÜCK across the third capacitor 15 is proportional to the voltage Ui, as is the case for the measured voltage UMESS in the upper part of FIG. The voltage URÜCK can thus be used as a representative voltage value for the voltage Ui dem

corresponding input of the control circuit 18 are supplied.

The voltage URÜCK across the third capacitor 15 is directly proportional to the voltage Ui if an ideal observation is made without taking into account parasitic effects. When considering parasitic effects, an additional offset must be taken into account.

The lower left partial figure 3 takes into account a parasitic load of the real third capacitor 15 with a parasitic resistance 21 in the means 12 ‘. The parasitic resistor 21 is connected in parallel with the third capacitor 15. The resistor 21 typically has a high ohmic resistance value.

In summary, the returned voltage URÜCK is therefore both representative of a voltage, for example the voltage Ui or UMESS, or also representative of a current, for example a load current ILAST.

A possible voltage offset of the representative returned voltage URÜCK is to be determined, as shown above with reference to FIG. 2, and thus corrected. The voltage offset of the returned voltage URÜCK can be corrected in the control circuit 18, for example.

FIG. 4 shows schematic voltage profiles of the basic arrangement for signal transmission across a potential barrier according to FIG. 3. The parasitic load of the real third

Capacitor 15 with the parasitic resistor 21 parallel to the third capacitor 15, is taken into account. The behavior shown in FIG. 4 applies to very small capacitance values of the first, second and third capacitors 13, 14, 15. The first capacitor 13 and the second capacitor 14 have the same capacitance values. The capacitance of the third capacitor 15 is smaller than the capacitance value of the first capacitor 13 and the second capacitor 14. The parasitic load through the resistor 21 is assumed to be small, the resistance value of the resistor 21 is thus large. 4 shows a time period with a continuously applied signal profile of the voltage UAMP at the input of the means 12 with a capacitive voltage divider comprising the first, second and third capacitors 13, 14, 15. When the first, second and third capacitors 13, 14, 15 are all fully discharged, the voltage URÜCK at the output of the means 12 corresponds to the voltage UAMP at the input of the means 12. A slow discharge of the third capacitor 15 via the parallel resistor 21 causes the first capacitor 13 and the second capacitor 14 to be slowly charged an offset shift of the returned voltage URÜCK is caused. This offset shift of the real voltage URÜCK must be taken into account when the returned voltage URÜCK is used according to the invention.

The upper part of Figure 4 shows the voltage offset of the returned voltage URÜCK.

The lower part of Figure 4 shows the course of the voltage offset of the returned voltage URÜCK over several periods, each for maximum values and minimum values of the returned voltage URÜCK.

5 schematically shows a lamp 34 with an operating device 30 for a lighting means 31 according to an embodiment of the invention.

The operating device 30 can also be referred to as a ballast.

The operating device 30 has the synchronous flyback converter circuit 1 shown in FIG

Mains connection with the connection devices (inputs) for conductors L, N, GND for connecting the operating device 30 to a mains alternating voltage and a rectifier 33, in particular also designed with means for power factor correction. The rectifier 33 generates from the

Mains AC voltage UNETZ that is present at the inputs of the flyback converter circuit 1

DC voltage UBUS · The flyback converter circuit 1 converts the generated DC voltage UBUS into a voltage ULAST for the operation of one or more lamps 31 connected to the outputs of the flyback converter circuit 1. The lighting means 31 preferably comprising one or more light emitting diodes 7 (LEDs), also referred to as lighting means path 31, is supplied with a load current ILED (LED current) via the outputs of the flyback converter circuit 1.

The operating device 32 in the embodiment shown has a control circuit 18 which generates and provides control signals 32 for other elements of the operating device 30 as well. Alternatively or additionally, control circuits can be arranged in other elements of the operating device 30 or at the level of the operating device 30 and the lamp 34 and perform tasks such as controlling the switches 8, 9 and other control tasks.

One or more operating devices 30 can form the lamp 34 with one or more illuminants 31. The lamp 34 can comprise further elements such as switching, dimming and interfaces to other assemblies of lighting technology and building technology, not shown in FIG. 5. The converter circuit 1 according to the invention enables a particularly cost-effective construction of the operating device 30, taking into account a galvanic separation of the inputs and outputs of the operating device 30.

Fig. 6 shows a further embodiment of a synchronous flyback converter circuit as

Converter circuit 1‘ according to the invention.

The converter circuit 1 differs from the converter circuit 1 in that it has a means for transmission 12 ″ as an alternative to the means for transmission 12 or 12 Fig according to FIGS. 1 and 3.

The means for transmission 12 ″ arranges a primary-side resistor 35 between the first connection of the first capacitor 13 and the first connection of the second capacitor 14 on the primary side of the converter circuit 12 ″. For the arrangement and interpretation of the first

Capacitor 13 and of the second capacitor 14, the statements made in relation to FIGS. 1 and 3 apply in a corresponding manner.

The voltage URÜCK dropping across the primary-side resistor 35 is fed to the inputs of the control circuit 18 of the converter circuit 12 ″. The converter circuit 12 ″ is designed due to the means for transmission 12 ″ for a higher measuring accuracy than the means for transmission 12 or 12. The first capacitor 13 and the second capacitor 14, in conjunction with the third capacitor 15, can cause a shift (drift) in the potential level of the feedback voltage URÜCK. This can cause measurement errors in the determination of the fast current ILAST to be measured in the control circuit 18. The execution of the

Converter circuit 1 ″ with the means for transmission 12 ″ arranges the primary-side resistor 35 instead of the third capacitor 15, avoids the voltage shift and thus enables particularly precise determination of the fast current FAST based on the feedback voltage URÜCK in the control circuit 18.

In the converter circuit 1 'of an embodiment shown in FIG. 6, the switch 9 is designed as a MOSFET and is shown with a simple equivalent circuit diagram. As can be seen from the equivalent circuit diagram, the equivalent circuit diagram of the secondary-side switch 9 implemented as a MOSFET has a parasitic capacitance 9.1 caused by the junction capacitance of the internal diode, as well as a diode 9.2 and an ideal switch 9.3 in parallel. The parasitic capacitance 9.1, in conjunction with the secondary winding 4 of the transformer 2, forms a series resonant circuit which, triggered in particular by the hard switching operations of the second switch 9 on the secondary side, triggers undesired oscillations (resonance oscillations) that cause corresponding signal distortions. The use of a current transformer 36 instead of a measuring resistor RMESS 11 can avoid such signal distortions. This enables an exact measurement of the secondary-side fast current FAST. FIG. 7 shows a further embodiment of a converter circuit 1 ″ designed as a synchronous flyback converter circuit according to the invention. The converter circuit 1 ″ according to FIG. 7 is designed as a MOSFET and shown with the equivalent circuit diagram, as in the converter circuit 1 ′ the second switch 9. The second switch 9 shows the parasitic capacitance 9.1 caused by the junction capacitance of the internal diode, which, in conjunction with the secondary winding 4, can trigger unwanted resonance oscillations due to the hard switching processes of the second switch 9, which distort the signal and thus cause measurement errors. The use of a current transformer 36 according to FIG. 7 as an alternative to the measuring resistor RMESS 11 according to FIG. 1 or FIG.

6 can such signal distortions and the measurement errors caused by them when determining the

Avoid load current ILLOAD.

In FIG. 7, as an alternative to the measuring resistor 11 according to FIG. 1, a current transformer 36 is used for measuring the load current ILAST. The current transformer 36 is arranged on the secondary side of the converter circuit 1 ″. A first winding 37 of the current transformer 36 is arranged in series with the load output on the secondary side of the converter circuit 1 ″. A current flows through the first winding 37 of the current transformer 36, which is a measure of the load current ILAST.

A second winding 38 of the current transformer 36 is parallel to a secondary-side

Resistor 39 switched. The secondary-side resistor 39 is thus arranged on the secondary side of the current transformer 36. A current IMESS flows through the second winding 38 of the current transformer 36, which is caused by the current flow through the first winding 37.

The current transformer 36 is arranged with first and second windings 37, 38 on the secondary side of the potential barrier 5 and can therefore be used without any requirements for protective separation

be dimensioned. This is associated with lower costs and increased degrees of freedom in the design compared to, for example, a transformer, according to the requirements

Protective separation, especially SELV requirements.

The first winding 37 and the second winding 37 are wound in the same direction in the embodiment shown in FIG. 7.

A current IMESS through the secondary winding 38 is therefore dependent on the current through the primary winding 37, and thus at the same time a measure of the load current ILAST. A voltage drop UMESS across the secondary resistor 39 is therefore dependent on the load current ILLOAD. This voltage drop UMESS is fed as an input voltage to the transmission means 12 “. The feedback signal across the potential barrier 5 in the embodiment according to FIG. 7 thus corresponds to the voltage drop UMESS across the secondary-side resistor 39. The converter circuit 1 ″ according to FIG. 7 shows a further alternative embodiment of the means for transmission 12 ″ for the feedback signal via the potential barrier 5. The means for transmission 12 ″ arranges a primary-side resistor 35 between the first connection of the first capacitor 13 and the first connection of the second capacitor 14 on the primary side of the converter circuit 12 ″. For the arrangement and design of the first capacitor 13 and the second

Capacitor 14 is the same as that explained in connection with FIG. 1.

The voltage URÜCK dropping across the primary-side resistor 35 is fed to the inputs of the control circuit 18 of the converter circuit 12 ″. The determination of the load current ILAST by means of the feedback signal, in particular the voltage URÜCK, can be implemented in the

Converter circuit 1 ″ in a corresponding manner to converter circuit 1 and converter circuit 1 ‘.

In Fig. 8 voltage and current curves of a clocked synchronous flyback converter circuit are shown according to an embodiment of the invention.

The switch states "OPEN" (on) and

“CLOSED” (off) for the first switch 8 and the second switch 9 over the time t for a full clock period T of the clocked converter circuit 1. 1 ‘. 1 ”shown. The illustrated

Switch states “OPEN” and “CLOSED” over time correspond, for example, to respective control signals for the gate electrode of MOSFETs used as the first switch 8 and second switch 9.

The switch states “OPEN” and “CLOSED” define the (time) sections I to IV of a clock period T of the converter circuit 1, 1 ‘, 1”, which are run through one after the other.

The lower part of FIG. 8 shows the course of the currents ILAST and IMESS over time t and is the

Sections I to IV of the upper part of Figure 8 are shown assigned. The course of the load current ILAST over the time segments I, II, III and IV corresponds to the course of the output current or load current ILAST, known for clocked flyback converter circuits, as a function of the

Switch states “ON” and “OFF” of the primary-side first switch 8 and the second switch 9.

The current profile of the measured current IMESS, defined according to the circuit example according to FIG. 7, over the time segments I to IV is dependent on the profile of the load current ILAST.

In particular, the course of the current IMESS is proportional to the course of the load current ILAST. The current IMESS shows an additional DC component IOFFSET. This DC component IOFFSET must be determined in order to determine a current value of the load current ILAST on the basis of the current IMESS. The size of the DC component IOFFSET can be determined in the time segments I and IV of the clock period T in a simple manner. In one embodiment of the converter circuit 1,, 1 ″, the size of the DC component IOFFSET is determined in time segment IV by the control circuit 18 by means of sampling an instantaneous current value. With the knowledge of the DC component IOFFSET, the control circuit 18 is able to carry out an evaluation of the current IMESS which is returned as a feedback signal via the potential barrier. In particular, the control circuit 18 can determine an average load current LAST, AVG or a negative peak value ILAST, PEAK of the load current LAST on the basis of the course of the current IMESS and the determined direct component IOFFSET.

9 shows a simple flow chart of a method for controlling a clocked

Converter circuit 1, 1 ‘, 1 ″ according to an embodiment of the invention. The method for controlling a clocked converter circuit uses the inventive transmission of a feedback signal representative of the load current LAST on the output side via the potential barrier 5 to the primary side of the converter circuit 1, 1 ‘, 1 ″.

The converter circuit 1, 1 ‘, 1 ″ controlled by means of the method can be constructed, for example, according to one of the exemplary embodiments with the features according to FIG. 1, FIG. 3, FIG. 6 and / or FIG. Converter circuit 1, 1 ′, 1 ″ comprises a first controllable switch 8, a second controllable switch 9, a transformer 2 with a primary winding 3, which is coupled to the first switch 8, and a secondary winding 4, which is coupled to the second switch 9 is. The transformer 2 electrically insulates a primary side of the converter circuit 1. 1 ‘which is supplied from a mains voltage. 1 ”from a secondary side of the converter circuit 1. 1‘. 1 ”by means of a potential barrier 5. The secondary side of the converter circuit is set up to transmit the load current LAST via a load output of the converter circuit 1. 1‘. 1 ”to be output.

The converter circuit has a control device 18 arranged on the primary side. The method of Figure 9 comprises the following steps.

In step S1, an analog feedback signal is first generated on the basis of a current flowing through the second switch 9.

The analog feedback signal is capacitively transmitted in step S2 by means of the means for transmitting 12, 12 ‘, 12 ″ via the potential barrier 5 from the secondary side of the converter circuit 1. 1‘. 1 “on the primary side of the converter circuit 1. 1‘. 1 "transferred. In step S3 this is done via the

Potential barrier 5, the analog feedback signal transmitted by the control device 18 on the primary side of the converter circuit 1. 1 '. 1 "read in. The control circuit 18 then generates at least one switch control signal 16, 17 for the control of the first and / or the second switch 8, 9 on the basis of the analog feedback signal read in in step S4. Then in step S5 the at least one switch control signal 16, 17 is sent to at least one of the switches 8, 9 issued. The features of different exemplary embodiments can be combined with one another within the scope of the invention defined in the following claims.

Claims

Expectations:

1. Clocked converter circuit, comprising a transformer (2) with at least one primary winding (3) and at least one secondary winding (4), the transformer (2) having a primary side of the converter circuit supplied from a mains voltage from a secondary side of the converter circuit by means of a potential barrier ( 5) electrically isolated, the secondary side being set up to output a load current via a load output of the converter circuit, and the converter circuit being set up to transmit at least one feedback signal from the secondary side to the primary side of the converter circuit, characterized in that the converter circuit has means (12) has to capacitively transmit the feedback signal as an analog signal across the potential barrier (5).

2. Converter circuit according to claim 1, characterized in that the means (12) for capacitive transmission of the feedback signal is constructed as a capacitive voltage divider.

3. Converter circuit according to claim 1 or 2, characterized in that the means (12) for capacitive transmission of the feedback signal is set up to receive the feedback signal supplied to the secondary side of the converter circuit as a voltage (UMESS).

4. converter circuit according to one of the preceding claims, characterized in that that the means (12) has a first capacitor (13) and a second capacitor (14), a first connection of the first capacitor (13) and a first connection of the second capacitor (14) being arranged on the primary side of the converter circuit, and a second

Connection of the first capacitor (13) and a second connection of the second capacitor (14) are arranged on the secondary side of the converter circuit, and the feedback signal as a voltage between the second connection of the first capacitor (13) and the second connection of the second capacitor (14) is created.

5. Converter circuit according to claim 4, characterized in that the means (12) arranges a third capacitor (15) between the first connection of the first capacitor (13) and the second connection of the second capacitor (14) on the primary side of the converter circuit, wherein

A voltage (URÜCK) is fed to inputs of a control circuit (18) of the converter circuit via the third capacitor (15).

6. Converter circuit according to claim 5, characterized in that the control circuit (18) is set up to use the voltage present at the inputs of the control circuit (18) via the third capacitor (15) as an indicator of a load current (ILAST) on the secondary side of the converter circuit to evaluate.

7. converter circuit according to claim 4, characterized in that the means for transmission (12 ') has a primary-side resistor (35) between the first connection of the first capacitor (13) and the first connection of the second capacitor (14) on the primary side of the converter circuit arranges, and

A voltage (URÜCK) is fed to inputs of a control circuit (18) of the converter circuit via the primary-side resistor (35).

8. Converter circuit according to one of the preceding claims, characterized in that the feedback signal is an alternating voltage, in particular a bipolar one

AC voltage, depicts.

9. Converter circuit according to one of the preceding claims, characterized in that the feedback signal reproduces a measured value for a load current (ILAST).

10. Converter circuit according to claim 9, characterized in that the converter circuit has a measuring resistor (11) arranged in series with a load output on the secondary side of the converter circuit, the feedback signal corresponding to a voltage drop across the measuring resistor (11).

11. Converter circuit according to claim 9 that the converter circuit has a current transformer (36) on the secondary side of the converter circuit, a first winding (37) of the current transformer (36) being connected in series to a load output on the secondary side of the converter circuit, and a second winding (38) of the current transformer (36) is connected in parallel to a secondary-side resistor (39), and the feedback signal corresponds to a voltage drop across the secondary-side resistor (39).

12. Converter circuit according to one of the preceding claims, characterized in that the converter circuit is a flyback converter circuit, in particular a synchronous flyback converter circuit (1).

13. Operating device for lighting means (31), having at least one clocked converter circuit according to one of the preceding claims.

14. Lamp, having at least one lighting means (31), and at least one operating device (30) according to claim 10, designed for the supply of the at least one lighting means (31).

15. Light according to claim 14, characterized in that the at least one lighting means (31) comprises at least one light-emitting diode (7).

16. A method for controlling a clocked converter circuit (1, 1 ', 1 "), which has a first controllable switch (8), a second controllable switch (9), a transformer (2) with a primary winding (3) that is connected to the first switch (8) is coupled, and a secondary winding (4) which is coupled to the second switch (9),

wherein the transformer electrically insulates a primary side of the converter circuit (1, 1, 1 "), which is supplied from a mains voltage, from a secondary side of the converter circuit (1, 1‘, 1 ") by means of a potential barrier (5), and

the secondary side is set up to output a load current (LOAD) via a load output of the converter circuit (1, 1 ‘, 1”), and

the converter circuit (1, 1 ‘, 1") has a control device (18) arranged on the primary side, the method having the following steps:

Generating an analog feedback signal on the basis of a current flowing through the second switch (9) on the basis of an analog feedback signal (S1),

Transmission of the analog feedback signal capacitively across the potential barrier (5) (S2), reading in by the control device (18) of the transmitted analog feedback signal (S3), generation of at least one switch control signal (16), 17) on the basis of the analog feedback signal (S4) read in .