WO2020253575A1 - 译码器迭代次数确定方法及装置、存储介质、电子装置 - Google Patents

译码器迭代次数确定方法及装置、存储介质、电子装置 Download PDF

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WO2020253575A1
WO2020253575A1 PCT/CN2020/095100 CN2020095100W WO2020253575A1 WO 2020253575 A1 WO2020253575 A1 WO 2020253575A1 CN 2020095100 W CN2020095100 W CN 2020095100W WO 2020253575 A1 WO2020253575 A1 WO 2020253575A1
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Prior art keywords
iterations
virtual code
decoder
virtual
type
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PCT/CN2020/095100
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English (en)
French (fr)
Inventor
王红展
章伟
张鹤
许晨
周海涛
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中兴通讯股份有限公司
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Priority to EP20826814.4A priority Critical patent/EP3979505A4/en
Publication of WO2020253575A1 publication Critical patent/WO2020253575A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3746—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3707—Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
    • H03M13/3715—Adaptation to the number of estimated errors or to the channel state
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H04L1/0051—Stopping criteria
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1867—Arrangements specially adapted for the transmitter end
    • H04L1/1887—Scheduling and prioritising arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy

Definitions

  • the present disclosure relates to the field of mobile communication, and in particular, to a method and device for determining the number of iterations of a decoder, a storage medium, and an electronic device.
  • decoders are used for bit-level processing, such as 5G Low Density Parity Check Code (LDPC) decoders, 4G Turbo decoders Or convolutional decoders, etc.
  • LDPC Low Density Parity Check Code
  • 4G Turbo decoders or convolutional decoders, etc.
  • the performance of these decoders has a great relationship with the number of iterations.
  • a method for determining the number of decoder iterations including:
  • a device for determining the number of decoder iterations including:
  • the first determining module is configured to determine the newly transmitted transport block (TB) and the virtual code block (CB) of the retransmitted TB to be processed by the decoder in a time slot;
  • a classification module configured to classify the virtual CB
  • the second determining module is configured to determine the number of iterations of each type of virtual CB in the decoder.
  • a storage medium in which a computer program is stored, and the computer program is configured to execute the steps in the above method embodiment when running.
  • an electronic device including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute the method in the foregoing method embodiment. step.
  • FIG. 1 is a block diagram of the hardware structure of a base station running the method for determining the number of iterations of a decoder according to an embodiment of the present disclosure
  • Fig. 2 is a flowchart of a time slot aggregation method according to an embodiment of the present disclosure
  • Fig. 3 is a block diagram of a device for determining the number of iterations of a decoder according to an embodiment of the present disclosure
  • FIG. 4 is a block diagram of an example of a device for determining the number of iterations of a decoder according to an embodiment of the present disclosure
  • Fig. 5 is a block diagram of another example of a device for determining the number of iterations of a decoder according to an embodiment of the present disclosure.
  • the decoder capacity is fixed under certain conditions. If a fixed number of iterations strategy is used, the decoder capacity will be wasted. For example, when the system capacity is small, the decoder's maximum performance cannot be exerted; or At first, it is impossible to configure the number of iterations reasonably. Too small or too large may cause the system capacity to decrease, or even cause the system to crash.
  • the embodiments of the present disclosure at least propose solutions to the problem of how to configure the number of iterations of the decoder in the case of variable system capacity in the related art.
  • FIG. 1 is a hardware structural block diagram of a base station running the method for determining the number of decoder iterations of an embodiment of the present disclosure.
  • the base station 10 may include One or more (only one is shown in FIG. 1) processor 102 (processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or programmable logic device FPGA) and a memory 104 for storing data.
  • processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or programmable logic device FPGA) and a memory 104 for storing data.
  • the aforementioned base station 10 may further include a transmission device 106 and an input/output device 108 for communication functions.
  • a transmission device 106 may further include a transmission device 106 and an input/output device 108 for communication functions.
  • the structure shown in FIG. 1 is only for illustration, and does not limit the structure of the above-mentioned base station.
  • the base station 10 may also include more or fewer components than those shown in FIG. 1, or have a different configuration from that shown in FIG.
  • the memory 104 may be used to store computer programs, for example, software programs and modules of application software, such as the computer programs corresponding to the message receiving method in the embodiments of the present disclosure.
  • the processor 102 executes the computer programs stored in the memory 104 by running Various functional applications and data processing, namely to achieve the above methods.
  • the memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
  • the memory 104 may further include a memory remotely provided with respect to the processor 102, and these remote memories may be connected to the base station 10 through a network. Examples of the aforementioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
  • the transmission device 106 is used to receive or send data via a network.
  • a specific example of the aforementioned network may include a wireless network provided by the communication provider of the base station 10.
  • the transmission device 106 includes a network adapter (Network INterface CoNtroller, NIC for short), which can be connected to other network devices through a base station to communicate with the Internet.
  • the transmission device 106 may be a radio frequency (Radio FrequeNcy, referred to as RF) module, which is used to communicate with the Internet in a wireless manner.
  • RF Radio FrequeNcy
  • FIG. 2 is a flowchart of the method for determining the number of decoder iterations according to an embodiment of the present disclosure. As shown in FIG. 2, the process includes the following steps :
  • Step S202 Determine the newly transmitted TB (transport block) and the virtual CB (code block) of the retransmitted TB to be processed by the decoder in a time slot;
  • Step S204 classify the virtual CB
  • Step S206 Determine the number of iterations of each type of virtual CB in the decoder.
  • the number of iterations of the decoder is configured through the CB classified as TB, thereby improving the decoder Throughput utilization.
  • step S204 may specifically include:
  • the virtual CB is classified to obtain the X type virtual CB, and the minimum iteration number limit and the maximum iteration number limit are set for the X type virtual CB, where X is an integer greater than or equal to 1.
  • the above step S206 may specifically include: determining the number of iterations of the X-type virtual CB in the decoder according to the minimum iteration number limit and the maximum iteration number limit.
  • the foregoing step S206 may specifically include:
  • S2062 Determine the number of iterations L 0 of the first type of virtual CB in the decoder according to the initial number of iterations E 0 , the limit of the minimum number of iterations of the first type of virtual CB, and the limit of the maximum number of iterations;
  • S2063 Determine the initial number of iterations E j-1 of the j- th type of virtual CB; determine according to the initial number of iterations E j-1 of the j-th type of virtual CB, the limit of the minimum number of iterations and the limit of the maximum number of iterations of the j- th virtual CB The number of iterations L j-1 of the j- th type virtual CB in the decoder; where j is an integer greater than or equal to 2 and less than or equal to X, and repeat S2063 until it is determined that the type X virtual CB is in the The number of iterations in the decoder.
  • step S2061 may specifically include:
  • the ratio of the initial number of all available cycles to the sum of the number of cycles corresponding to a single iteration of the decoder required by all virtual CBs is determined as the initial number of iterations E 0 of all virtual CBs.
  • the above step S2062 may specifically include:
  • the foregoing step S2063 may specifically include:
  • the sum of the time required for the number of iterations of the virtual CB of the first type in the decoder to the time required for the number of iterations of the virtual CB of the j-1th type in the decoder is allocated from the decoding
  • the remaining decoding time is obtained by removing all the available decoding time in, where all available decoding time allocated by the decoding is determined according to the initial number of all available cycles of decoding allocation in a time slot;
  • the ratio of the remaining decoding time to the time required for the number of iterations of the remaining virtual CBs in the decoder is determined as the initial number of iterations E j-1 of the j- th virtual CB.
  • the foregoing step S2063 may specifically include:
  • step S202 may specifically include:
  • Virtualization processing is performed on the CB of the newly transmitted TB and the retransmitted TB to obtain virtual CBs of the newly transmitted TB and the retransmitted TB.
  • the TB in the embodiment of the present disclosure includes a newly transmitted TB and a retransmitted TB, and the virtual CB of the newly transmitted TB and the retransmitted TB is virtualized to obtain the virtual CB of the newly transmitted TB and the retransmitted TB.
  • the embodiments of the present disclosure provide an adaptive method for determining the number of decoding iterations, which can make better use of the capabilities of the decoder, and is suitable for bit-level processing in mobile communications, including:
  • the virtual CB of the first type is removed from the overall decoding time according to the time required for the calculated number of iterations.
  • the remaining virtual CB and the corresponding decoder parameters matrix size) , Matrix type, expansion factor, and cycle number of a single iteration
  • the number of iterations is compared to obtain the minimum value, and the minimum value is compared with the minimum iteration number limit of this type of virtual CB configuration, and the maximum value is taken to obtain the number of iterations of the second type of virtual CB;
  • the virtual CB of the first type and the virtual CB of the second type are removed from the overall decoding time according to the time required for the number of iterations calculated respectively.
  • the remaining virtual CBs and their corresponding The parameters of the decoder are calculated to obtain the initial iterations of all virtual CBs of the remaining class, and the maximum iteration limit set by the third type of virtual CB Compare with the initial iteration number of all virtual CBs of the remaining class to get the minimum value, compare this minimum value with the minimum iteration number limit of this type of virtual CB configuration, and take the maximum value to get the number of iterations of the third type of virtual CB ;
  • this slot includes: the number of newly transmitted TBs is m and the number of retransmitted TBs is n; the initial number of all available cycles (cycle) allocated for decoding in a slot is S.
  • TB (including new transmission TB and retransmission TB)
  • the number of cycles (cycle) of the decoder to process a single iteration is sequentially: X 0 , X 1 , X 2 ,..., X m-1 , X m ,X m+1 ,X m+2 , whil, X m+n-1 ;
  • the number of CBs of the newly transmitted TB is C 0 , C 1 ,..., C m-1 ;
  • the virtual factors of the newly transmitted TB are: ⁇ 0 , ⁇ 1 , ⁇ 2 ,..., ⁇ m-1 ;
  • the virtual factor of the newly transmitted TB can be calculated according to the position of the first CB of each TB in the initial available cycles. Assume the time when the first CB of the i-th newly transmitted TB is started. Is Ti, then
  • the number of virtual CBs of the newly transmitted TB are: ⁇ 0 *C 0 , ⁇ 1 *C 1 , ⁇ 2 *C 2 ,..., ⁇ m-1 *C m-1 ;
  • the number of CBs in the last decoding error of the retransmitted TB is O 0 , O 1 , O 2 ,..., On -1 ;
  • the virtual factors for retransmission of TB are: ⁇ 0 , ⁇ 1 , ⁇ 2 ,..., ⁇ n-1 ;
  • the virtual factor of the retransmission TB can be calculated according to the position in all the initial available cycles at the time when the last decoding error CB for each TB is started. The moment of the last decoding error CB is Ti, then
  • the number of virtual CBs for retransmitting TB are: ⁇ 0 *O 0 , ⁇ 1 *O 1 , ⁇ 2 *O 2 ,..., ⁇ n-1 *O n-1 ;
  • the virtual CB included in the newly transmitted TB is the first type, assuming that the range of iteration times is [MIN 0 :MAX 0 ];
  • the virtual CB contained in a TB with a retransmission error rate of less than or equal to 10% is the second type, and suppose that there are p TBs with a retransmission error rate of less than or equal to 10%, and the range of iteration times is [MIN 1 :MAX 1 ];
  • the virtual CB contained in a TB with a retransmission error rate greater than 10% is the third type, and the number of TBs with a retransmission error rate greater than 10% is np, and the range of iteration times is [MIN 2 :MAX 2 ];
  • the method of categorizing and calculating the number of iterations of the CB after virtualizing the CB of each TB can adaptively configure the number of decoder iterations for the TB, thereby greatly improving the throughput utilization of the decoder Rate, improve the performance of the entire mobile communication system.
  • each virtual factor can also be calculated based on the position in all the initial available cycles at the time when the processing of the penultimate of each TB or any other CB that was decoded incorrectly was started.
  • the processing time available for each TB in principle is the entire time slot, but the actual processing time of each TB is not the entire time slot.
  • the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, of course, it can also be implemented only by hardware, but in many cases The former is a better implementation.
  • the technical solution of the present disclosure can be embodied in the form of a software product in essence or a part that contributes to the prior art.
  • the computer software product can be stored in a storage medium (such as ROM/RAM, magnetic disk, The optical disc) includes a number of instructions to enable a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to execute the method described in each embodiment of the present disclosure.
  • the embodiments of the present disclosure also provide a device for determining the number of decoder iterations, which is used to implement the above-mentioned embodiments and implementations, and the descriptions that have been described will not be repeated.
  • the term "module” may be a combination of software and/or hardware with predetermined functions.
  • the devices described in the following embodiments are preferably implemented by software, implementation by hardware or a combination of software and hardware is also possible and conceived.
  • Fig. 3 is a block diagram of a decoder iteration number determining device according to an embodiment of the present disclosure. As shown in Fig. 3, the decoder iteration number determining device includes:
  • the first determining module 32 is configured to determine the virtual CB of the newly transmitted TB and the retransmitted TB to be processed by the decoder in a time slot;
  • the classification module 34 is configured to classify the virtual CB
  • the second determining module 36 is configured to determine the number of iterations of each type of virtual CB in the decoder.
  • the classification module 34 is further configured to:
  • the virtual CB is classified to obtain the X type virtual CB, and the minimum iteration number limit and the maximum iteration number limit are set for the X type virtual CB, where X is an integer greater than or equal to 1.
  • the second determining module 36 is further configured to:
  • FIG. 4 is a block diagram of an example of a device for determining the number of iterations of a decoder according to an embodiment of the present disclosure.
  • the second determining module 36 includes:
  • the first determining unit 42 is configured to determine the initial number of iterations E 0 of all virtual CBs;
  • the second determining unit 44 is configured to determine the value of the first type of virtual CB in the decoder according to the initial number of iterations E 0 , the minimum number of iterations limit of the first type of virtual CB, and the maximum number of iterations limit.
  • the first determining unit 42 is further configured to:
  • the ratio of the initial number of all available cycles to the sum of the number of cycles corresponding to a single iteration of the decoder required by all virtual CBs is determined as the initial number of iterations E 0 of all virtual CBs.
  • the second determining unit 44 is further configured to:
  • the third determining unit 46 is further configured to:
  • the sum of the time required for the number of iterations of the virtual CB of the first type in the decoder to the time required for the number of iterations of the virtual CB of the j-1th type in the decoder is allocated from the decoding
  • the remaining decoding time is obtained by removing all the available decoding time in, where all available decoding time allocated by the decoding is determined according to the initial number of all available cycles of decoding allocation in a time slot;
  • the ratio of the remaining decoding time to the time required for the number of iterations of the remaining virtual CBs in the decoder is determined as the initial number of iterations E j-1 of the j- th virtual CB.
  • the third determining unit 46 is further configured to:
  • the first determining module 32 is further configured to:
  • Virtualization processing is performed on the CB of the newly transmitted TB and the retransmitted TB to obtain virtual CBs of the newly transmitted TB and the retransmitted TB.
  • FIG. 5 is a block diagram of another example of a device for determining the number of decoder iterations according to an embodiment of the present disclosure.
  • the first determining module 32 includes:
  • the first virtualization processing unit 52 is configured to obtain the newly transmitted TB that needs to be processed in the current processing time period, calculate the number of CBs contained in the newly transmitted TB, and perform virtualization processing on the number of CBs to obtain the The number of virtual CB newly transmitted TB;
  • the second virtualization processing unit 54 is configured to obtain the retransmission TB that needs to be processed in the current processing time period, calculate the position and number of CBs that need to be actually processed by the retransmission TB, and perform calculations on the number of CBs Through virtualization processing, the number of virtual CBs of the retransmitted TB is obtained.
  • each of the above modules can be implemented by software or hardware.
  • it can be implemented in the following manner, but not limited to this: the above modules are all located in the same processor; or, the above modules are combined in any combination The forms are located in different processors.
  • the embodiment of the present disclosure also provides a storage medium in which a computer program is stored, and the computer program is configured to execute the steps in the above method embodiment when running.
  • the above-mentioned storage medium may be configured to store a computer program for executing the following steps:
  • S11 Determine the virtual CB of the newly transmitted TB and the retransmitted TB to be processed by the decoder in a time slot;
  • the above-mentioned storage medium may include, but is not limited to: U disk, read-only memory (Read-ONly Memory, ROM for short), Random Access Memory (RAM for short), mobile hard disk, magnetic disk Various media such as discs or optical discs that can store computer programs.
  • the embodiment of the present disclosure also provides an electronic device including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute the steps in the foregoing method embodiment.
  • the above-mentioned electronic device may further include a transmission device and an input-output device, the transmission device is connected to the aforementioned processor, and the input-output device is connected to the aforementioned processor.
  • the aforementioned processor may be configured to execute the following steps through a computer program:
  • S11 Determine the virtual CB of the newly transmitted TB and the retransmitted TB to be processed by the decoder in a time slot;
  • modules or steps of the present disclosure can be implemented by a general computing device, and they can be concentrated on a single computing device or distributed in a network composed of multiple computing devices. Above, they can be implemented with program codes executable by a computing device, so that they can be stored in a storage device for execution by the computing device, and in some cases, they can be executed in a different order than shown here. Or the described steps, or fabricate them into individual integrated circuit modules, or fabricate multiple modules or steps of them into a single integrated circuit module to achieve.
  • the present disclosure is not limited to any specific hardware and software combination.

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Abstract

一种译码器迭代次数确定方法、一种译码器迭代次数确定装置、一种存储介质和一种电子装置，所述译码器迭代次数确定方法包括：确定一个时隙内译码器需处理的新传传输块和重传传输块的虚拟代码块(S202)；对所述虚拟代码块进行分类(S204)；确定每类虚拟代码块在所述译码器中的迭代次数(S206)。

Description

译码器迭代次数确定方法及装置、存储介质、电子装置 技术领域
本公开涉及移动通信领域，具体而言，涉及译码器迭代次数确定方法及装置、存储介质、电子装置。
背景技术
在移动通信系统中，会使用译码器进行位(Bit)级处理，如5G的低密度奇偶校验码(Low Density Parity Check Code，简称为LDPC)的译码器，4G的Turbo译码器或卷积译码器等，这些译码器的性能与迭代次数关系很大。
公开内容
根据本公开的实施例，提供了一种译码器迭代次数确定方法，包括：
确定一个时隙内译码器需处理的新传传输块(TB)和重传TB的虚拟代码块(CB)；
对所述虚拟CB进行分类；
确定每类虚拟CB在所述译码器中的迭代次数。
根据本公开的实施例，还提供了一种译码器迭代次数确定装置，包括：
第一确定模块，配置为确定一个时隙内译码器需处理的新传传输块(TB)和重传TB的虚拟代码块(CB)；
分类模块，配置为对所述虚拟CB进行分类；
第二确定模块，配置为确定每类虚拟CB在所述译码器中的迭代次数。
根据本公开的实施例，还提供了一种存储介质，所述存储介质中存储有计算机程序，所述计算机程序被设置为运行时执行上述方法 实施例中的步骤。
根据本公开的实施例，还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述方法实施例中的步骤。
附图说明
此处所说明的附图用来提供对本公开的技术方案的进一步理解，构成说明书的一部分，本公开的示意性实施例及其说明用于解释本公开的技术方案，并不构成对本公开的技术方案的不当限定。在附图中：
图1是运行了本公开实施例的译码器迭代次数确定方法的基站的硬件结构框图；
图2是根据本公开实施例的一种时隙聚合方法的流程图；
图3是根据本公开实施例的译码器迭代次数确定装置的框图；
图4是根据本公开实施例的译码器迭代次数确定装置的一个实例的框图；
图5是根据本公开实施例的译码器迭代次数确定装置的另一个实例的框图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本公开的技术方案。需要说明的是，在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。
需要说明的是，本公开的说明书和权利要求书及上述附图中的术语“第一”、“第二”等用于区别类似的对象，而不限定特定的顺序或先后次序。
一般来说，迭代次数越多性能越好。但译码器能力在一定条件下是固定的，如果使用固定迭代次数策略，译码器的能力会存在浪费的情况，比如在系统容量小的时候，无法发挥译码器的最大性能；或者一开始无法合理地配置迭代次数，过小和过大都可能会造成系统容量减小，甚至造成系统崩溃。
因此，在系统容量多变的情况之下，找到一个最优配置译码器的迭代次数的方法是必要的，用以最大限度地利用译码器的能力，提升移动通信系统的性能指标。
本公开的实施例至少针对相关技术中在系统容量多变的情况下如何配置译码器的迭代次数的问题，提出解决方案。
本公开的实施例提供的方法可以在基站、移动终端、计算机终端或者类似的运算装置中执行。以本公开的实施例提供的方法运行在基站上为例，图1是运行了本公开实施例的译码器迭代次数确定方法的基站的硬件结构框图，如图1所示，基站10可以包括一个或多个(图1中仅示出一个)处理器102(处理器102可以包括但不限于微处理器MCU或可编程逻辑器件FPGA等的处理装置)和用于存储数据的存储器104，在一些实施方式中，上述基站10还可以包括用于通信功能的传输设备106以及输入输出设备108。本领域普通技术人员可以理解，图1所示的结构仅为示意，其并不对上述基站的结构造成限定。例如，基站10还可包括比图1中所示更多或者更少的组件，或者具有与图1所示不同的配置。
存储器104可用于存储计算机程序，例如，应用软件的软件程序以及模块，如本公开实施例中的报文接收方法对应的计算机程序，处理器102通过运行存储在存储器104内的计算机程序，从而执行各种功能应用以及数据处理，即实现上述的方法。存储器104可包括高速随机存储器，还可包括非易失性存储器，如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实施方式中，存储器104可进一步包括相对于处理器102远程设置的存储器，这些远程存储器可以通过网络连接至基站10。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
传输装置106用于经由一个网络接收或者发送数据。上述网络的具体实例可包括基站10的通信供应商提供的无线网络。在一些实施方式中，传输装置106包括网络适配器(Network INterface CoNtroller，简称为NIC)，其可通过基站与其他网络设备相连从而 可与互联网进行通讯。在一些实施方式中，传输装置106可以为射频(Radio FrequeNcy，简称为RF)模块，其用于通过无线方式与互联网进行通讯。
基于上述基站，本实施例提供了一种译码器迭代次数确定方法，图2是根据本公开实施例的译码器迭代次数确定方法的流程图，如图2所示，该流程包括如下步骤：
步骤S202，确定一个时隙内译码器需处理的新传TB(transport block)和重传TB的虚拟CB(code block)；
步骤S204，对所述虚拟CB进行分类；
步骤S206，确定每类虚拟CB在所述译码器中的迭代次数。
通过上述步骤S202至S206，可以解决相关技术中在系统容量多变的情况下如何配置译码器的迭代次数的问题，通过分类为TB的CB配置译码器迭代次数，从而提升了译码器的吞吐量利用率。
本公开实施例中，上述步骤S204具体可以包括：
对所述虚拟CB进行分类，得到X类虚拟CB，并为所述X类虚拟CB设置最小迭代次数限值和最大迭代次数限值，其中，X为大于或等于1的整数。
本公开实施例中，上述步骤S206具体可以包括：根据所述最小迭代次数限值和所述最大迭代次数限值确定所述X类虚拟CB在所述译码器中的迭代次数。
在一些实施方式中，上述步骤S206具体可以包括：
S2061，确定所有虚拟CB的初始迭代次数E 0；
S2062，根据所述初始迭代次数E 0、第一类虚拟CB的最小迭代次数限值以及最大迭代次数限值确定所述第一类虚拟CB在所述译码器中的迭代次数L 0；
S2063，确定第j类虚拟CB的初始迭代次数E j-1；根据第j类虚拟CB的初始迭代次数E j-1、第j类虚拟CB的最小迭代次数限值以及最大迭代次数限值确定所述第j类虚拟CB在所述译码器中的迭代次数L j-1；其中，j为大于等于2且小于等于X的整数，重复执行S2063直到确定所述X类虚拟CB在所述译码器中的迭代次数。
在一些实施方式中，上述步骤S2061具体可以包括：
根据所述译码器的工作频率和系统分配的译码时间确定一个时隙内译码分配的初始所有可用周期数目；
将所述初始所有可用周期数目与所有虚拟CB所需的译码器单次迭代对应的周期数目之和的比值确定为所有虚拟CB的初始迭代次数E 0。
在一些实施方式中，上述步骤S2062具体可以包括：
将所述第一类虚拟CB的最大迭代次数限值MAX 0与所述初始迭代次数E 0进行比较；
获取所述MAX 0与所述E 0中的较小值F 0；
将所述F 0和所述第一类虚拟CB的最小迭代次数限值MIN 0进行比较；
获取所述F 0和所述MIN 0中的较大值，得到所述第一类虚拟CB在所述译码器中的迭代次数L 0。
在一些实施方式中，上述步骤S2063具体可以包括：
将第一类的虚拟CB在所述译码器中的迭代次数所需要的时间至第j-1类的虚拟CB在所述译码器中的迭代次数所需要的时间之和从译码分配的所有可用译码时间中去除，得到剩余译码时间，其中，所述译码分配的所有可用译码时间是根据一个时隙内译码分配的初始所有可用周期数目确定的；
将所述剩余译码时间与剩余类虚拟CB在所述译码器中的迭代次数所需要的时间之和的比值确定为所述第j类虚拟CB的初始迭代次数E j-1。
在一些实施方式中，上述步骤S2063具体可以包括：
将所述第j类虚拟CB的最大迭代次数限值MAX j-1与所述第j类虚拟CB的初始迭代次数E j-1进行比较；
获取所述MAX j-1与所述E j-1中的较小值F j-1；
将所述F j-1和所述第j类虚拟CB的最小迭代次数限值MIN j-1进行比较；
获取所述F j-1和所述MIN j-1中的较大值，得到所述第j类虚拟CB 在所述译码器中的迭代次数L j-1。
本公开实施例中，上述步骤S202具体可以包括：
对所述新传TB和所述重传TB的CB进行虚拟化处理，得到所述新传TB和重传TB的虚拟CB。
本公开实施例中的TB包括新传TB和重传TB，对所述新传TB和所述重传TB的CB进行虚拟化处理，得到所述新传TB和重传TB的虚拟CB具体可以包括：
获取当前处理时间段需要处理的新传TB，计算所述新传TB所包含的CB个数，并对所述CB个数进行虚拟化处理(即将所述CB个数乘以虚拟因子)，得到所述新传TB的虚拟CB个数；
获取所述当前处理时间段需要处理的重传TB，计算所述重传TB需要实际处理的CB的位置和个数，并对所述CB的个数进行虚拟化处理，得到所述重传TB的虚拟CB个数。
本公开实施例提供了一种自适应的译码迭代次数确定方法，可以较好的利用译码器的能力，适用于移动通信中的位(bit)级处理环节中，包括：
1、CB个数虚拟化处理，包括：
1)计算本处理时间段内所需处理的新传CB的虚拟化个数，具体包括：收集本处理时间段需要处理的新传TB，计算每个新传TB所包含的CB个数，并将此CB个数乘以虚拟因子计算本TB的虚拟CB个数(虚拟化的CB后续都称为虚拟CB)；
2)计算本处理时间段内所需处理的重传CB的虚拟化个数，具体包括：收集本处理时间段需要处理的重传TB，得到重传TB需要实际处理的CB的位置和个数，并根据此CB个数和位置计算本重传TB的虚拟CB个数；
2、计算每一类虚拟CB的迭代次数，包括：
1)对本处理时间段内的虚拟CB进行分类，设置每类虚拟CB的最小迭代次数限值和最大迭代次数限值；
2)计算所有虚拟CB的初始迭代次数，包括：根据译码器的工作频率、每个虚拟CB所需的译码器的单次迭代对应的周期(cycle) 数目、系统分配的译码时间，计算得到此段时间内所有虚拟CB的初始迭代次数；
3)计算第一类虚拟CB的迭代次数，包括：将第一类的虚拟CB所设置的最大迭代次数限值和所有虚拟CB的初始迭代次数进行比较，得到最小值，将此最小值和此类虚拟CB配置的最小迭代次数限值进行比较，取最大值，得到第一类虚拟CB的迭代次数；
4)计算第二类虚拟CB的迭代次数，包括：
将第一类的虚拟CB按照计算出来的迭代次数所需要的时间从整体译码时间中去除，根据剩余的译码时间、剩余类的虚拟CB及其所对应的译码器的参数(矩阵大小、矩阵类型、扩展因子以及单次迭代cycle数)计算得到剩余类的所有虚拟CB的初始迭代次数，并将第二类虚拟CB所设置的最大迭代次数限值和剩余类的所有虚拟CB的初始迭代次数进行比较，得到最小值，将此最小值和此类虚拟CB配置的最小迭代次数限值进行比较，取最大值，得到第二类虚拟CB的迭代次数；
5)计算第三类虚拟CB的迭代次数，包括：
将第一类的虚拟CB和第二类的虚拟CB按照各自计算出来的迭代次数所需要的时间都从整体译码时间中去除，根据剩余的译码时间、剩余类的虚拟CB及其所对应的译码器的参数(矩阵大小、矩阵类型、扩展因子以及单次迭代cycle数)计算得到剩余类的所有虚拟CB的初始迭代次数，并将第三类虚拟CB所设置的最大迭代次数限值和剩余类的所有虚拟CB的初始迭代次数进行比较，得到最小值，将此最小值和此类虚拟CB配置的最小迭代次数限值进行比较，取最大值，得到第三类虚拟CB的迭代次数；
6)依次类推，依次得到剩余其他类的虚拟CB的迭代次数。
下面以一个时隙(slot)内调度的m+n个TB为例对本公开的具体实现进行详细描述。
假设此slot内包括：新传的TB数目为m个和重传的TB数为n个；一个slot为译码分配的初始所有可用周期(cycle)数目是S。
TB(包括新传TB和重传TB)所引出来的译码器处理单次迭代的 周期(cycle)数依次为：X 0，X 1，X 2，...，X m-1,X m,X m+1,X m+2，......，X m+n-1；
新传TB的CB个数依次为C 0，C 1，...，C m-1；
新传TB的虚拟因子依次为：α 0，α 1，α 2，....，α m-1；
作为示例，新传TB的虚拟因子可以根据启动处理每个TB的第1个CB的时刻在初始所有可用周期中的位置计算得到，假设启动处理第i个新传TB的第1个CB的时刻为Ti，则
α i＝S/(S-T i)
从而新传TB的虚拟CB个数依次为：α 0*C 0，α 1*C 1，α 2*C 2，....，α m-1*C m-1；
重传TB上次译码错误的CB个数依次为O 0，O 1，O 2，...，O n-1；
重传TB的虚拟因子依次为：β 0，β 1，β 2，....，β n-1；
作为示例，重传TB的虚拟因子可以根据启动处理每个TB的最后一个上次译码错误的CB的时刻在初始所有可用周期中的位置计算得到，假设启动处理第i个重传TB的最后一个上次译码错误的CB的时刻为Ti，则
β i＝S/(S-T i)
从而重传TB的虚拟CB个数依次为：β 0*O 0，β 1*O 1，β 2*O 2，....，β n-1*O n-1；
将虚拟CB分成多类，比如分成三类：
新传TB所包含的虚拟CB为第一类，假设其迭代次数范围为[MIN 0:MAX 0]；
重传误码率小于等于10％的TB所包含的虚拟CB为第二类，且假设重传误码率小于等于10％的TB为p个，且其迭代次数范围为[MIN 1:MAX 1]；
重传误码率大于10％的TB包含的虚拟CB则为第三类，则重传误码率大于10％的TB为n-p个，且其迭代次数范围为[MIN 2:MAX 2]；
使用可用周期(cycle)计算单元和一级迭代次数计算单元，根据下面的公式，计算所有虚拟CB的初始迭代次数E 0：
Figure PCTCN2020095100-appb-000001
使用二级迭代次数计算单元，将MAX 0和E 0比较，取较小值F 0，并将F 0和MIN 0进行比较，取较大值，得到第一类虚拟CB在译码器中的迭代次数L 0；
继续使用可用周期(cycle)计算单元和一级迭代次数计算单元，根据下面的公式，计算第二类虚拟CB的初始迭代次数E 1：
Figure PCTCN2020095100-appb-000002
继续使用二级迭代次数计算单元，将MAX 1和E1比较，取较小值记为F 1，并将F 1和MIN 1进行比较，取较大值，即可得到第二类虚拟CB在译码器中的迭代次数L 1；
继续使用可用周期(cycle)计算单元和一级迭代次数计算单元，根据下面的公式，计算第三类虚拟CB的初始迭代次数E 2：
Figure PCTCN2020095100-appb-000003
继续使用二级迭代次数计算单元，将MAX 2和E 2比较，取较小值记为F 2，并将F 2和MIN 2进行比较，取较大值，得到第三类虚拟CB在译码器中的迭代次数L 2；
根据各个CB配置的迭代次数，并行译码或串行译码，直至本时隙(slot)内所有的CB译码完毕。
通过本公开实施例，采用对每个TB的CB进行虚拟化处理后分类计算CB的迭代次数的方法，可以为TB自适应地配置译码器迭代次数，从而大大提升译码器的吞吐量利用率，提升整个移动通信系统的性能。
应当理解，上述虚拟因子的计算方式仅作为示例，实际上，还可以根据需要通过其他方式来计算或设置各虚拟因子。例如，对于重传TB而言，其虚拟因子也可以根据启动处理每个TB的倒数第二个、或者任意其他上次译码错误的CB的时刻在初始所有可用周期中的位置计算得到。总之，每个TB原则上可利用的处理时间是整个时隙，但是，每个TB实际利用的处理时间并非整个时隙，因此，对于每个 新传或重传TB而言，可以考虑处理该TB中需要译码的CB实际占用的时间在整个时隙内的占比而合理计算或设置该TB的虚拟因子，以较好的利用译码器的能力。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到，根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以仅通过硬件实现，但很多情况下前者是更佳的实施方式。基于这样的理解，本公开的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品可存储在存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得终端设备(可以是手机、计算机、服务器、或者网络设备等)执行本公开各个实施例所述的方法。
本公开的实施例还提供了一种译码器迭代次数确定装置，该装置用于实现上述实施例及实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以是预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现，但是硬件、或者软件和硬件的组合的实现也是可能并被构想的。
图3是根据本公开实施例的译码器迭代次数确定装置的框图，如图3所示，所述译码器迭代次数确定装置包括：
第一确定模块32，配置为确定一个时隙内译码器需处理的新传TB和重传TB的虚拟CB；
分类模块34，配置为对所述虚拟CB进行分类；
第二确定模块36，配置为确定每类虚拟CB在所述译码器中的迭代次数。
在一些实施方式中，所述分类模块34还配置为：
对所述虚拟CB进行分类，得到X类虚拟CB，并为所述X类虚拟CB设置最小迭代次数限值和最大迭代次数限值，其中，X为大于或等于1的整数。
在一些实施方式中，所述第二确定模块36还配置为：
根据所述最小迭代次数限值和所述最大迭代次数限值确定所述 X类虚拟CB在所述译码器中的迭代次数。
图4是根据本公的实施例的译码器迭代次数确定装置的一个实例的框图，如图4所示，所述第二确定模块36包括：
第一确定单元42，配置为确定所有虚拟CB的初始迭代次数E 0；
第二确定单元44，配置为根据所述初始迭代次数E 0、第一类虚拟CB的最小迭代次数限值以及最大迭代次数限值确定所述第一类虚拟CB在所述译码器中的迭代次数L 0；
第三确定单元46，配置为确定第j类虚拟CB的初始迭代次数E j-1；根据第j类虚拟CB的初始迭代次数E j-1、第j类虚拟CB的最小迭代次数限值以及最大迭代次数限值确定所述第j类虚拟CB在所述译码器中的迭代次数L j-1，其中，j为大于等于2且小于等于X的整数，j可从j＝2开始递增，直到确定所述X类虚拟CB在所述译码器中的迭代次数。
在一些实施方式中，所述第一确定单元42还配置为：
根据所述译码器的工作频率和系统分配的译码时间确定一个时隙内译码分配的初始所有可用周期数目；
将所述初始所有可用周期数目与所有虚拟CB所需的译码器单次迭代对应的周期数目之和的比值确定为所有虚拟CB的初始迭代次数E 0。
在一些实施方式中，第二确定单元44还配置为：
将所述第一类虚拟CB的最大迭代次数限值MAX 0与所述初始迭代次数E 0进行比较；
获取所述MAX 0与所述E 0中的较小值F 0；
将所述F 0和所述第一类虚拟CB的最小迭代次数限值MIN 0进行比较；
获取所述F 0和所述MIN 0中的较大值，得到所述第一类虚拟CB在所述译码器中的迭代次数L 0。
在一些实施方式中，所述第三确定单元46还配置为：
将第一类的虚拟CB在所述译码器中的迭代次数所需要的时间至第j-1类的虚拟CB在所述译码器中的迭代次数所需要的时间之和从 译码分配的所有可用译码时间中去除，得到剩余译码时间，其中，所述译码分配的所有可用译码时间是根据一个时隙内译码分配的初始所有可用周期数目确定的；
将所述剩余译码时间与剩余类虚拟CB在所述译码器中的迭代次数所需要的时间之和的比值确定为所述第j类虚拟CB的初始迭代次数E j-1。
在一些实施方式中，所述第三确定单元46还配置为：
将所述第j类虚拟CB的最大迭代次数限值MAX j-1与所述第j类虚拟CB的初始迭代次数E j-1进行比较；
获取所述MAX j-1与所述E j-1中的较小值F j-1；
将所述F j-1和所述第j类虚拟CB的最小迭代次数限值MIN j-1进行比较；
获取所述F j-1和所述MIN j-1中的较大值，得到所述第j类虚拟CB在所述译码器中的迭代次数L j-1。
在一些实施方式中，所述第一确定模块32还配置为：
对所述新传TB和所述重传TB的CB进行虚拟化处理，得到所述新传TB和重传TB的虚拟CB。
图5是根据本公开的实施例的译码器迭代次数确定装置的另一实例的框图，如图5所示，所述第一确定模块32包括：
第一虚拟化处理单元52，配置为获取当前处理时间段需要处理的新传TB，计算所述新传TB所包含的CB个数，并对所述CB个数进行虚拟化处理，得到所述新传TB的虚拟CB个数；
第二虚拟化处理单元54，配置为获取所述当前处理时间段需要处理的重传TB，计算所述重传TB需要实际处理的CB的位置和个数，并对所述CB的个数进行虚拟化处理，得到所述重传TB的虚拟CB个数。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
本公开的实施例还提供了一种存储介质，该存储介质中存储有计算机程序，该计算机程序被设置为运行时执行上述方法实施例中的步骤。
在一些实施方式中，上述存储介质可以被设置为存储用于执行以下步骤的计算机程序：
S11，确定一个时隙内译码器需处理的新传TB和重传TB的虚拟CB；
S12，对所述虚拟CB进行分类；
S13，确定每类虚拟CB在所述译码器中的迭代次数。
在一些实施方式中，上述存储介质可以包括但不限于：U盘、只读存储器(Read-ONly Memory，简称为ROM)、随机存取存储器(RaNdom Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等可以存储计算机程序的各种介质。
本公开的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述方法实施例中的步骤。
在一些实施方式中，上述电子装置还可以包括传输设备以及输入输出设备，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
在一些实施方式中，上述处理器可以被设置为通过计算机程序执行以下步骤：
S11，确定一个时隙内译码器需处理的新传TB和重传TB的虚拟CB；
S12，对所述虚拟CB进行分类；
S13，确定每类虚拟CB在所述译码器中的迭代次数。
本实施例中的具体示例可以参考上述实施例中所描述的示例，在此不再赘述。
显然，本领域的技术人员应该明白，上述的本公开的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。本公开不限制于任何特定的硬件和软件结合。
以上所述仅为本公开的示例实施例而已，并不用于限制本公开，对于本领域的技术人员来说，本公开可以有各种更改和变化。凡在本公开的原则之内所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (13)

  1. 一种译码器迭代次数确定方法，包括：
    确定一个时隙内译码器需处理的新传传输块和重传传输块的虚拟代码块；
    对所述虚拟代码块进行分类；
    确定每类虚拟代码块在所述译码器中的迭代次数。
  2. 根据权利要求1所述的方法，其中，对所述虚拟代码块进行分类包括：
    对所述虚拟代码块进行分类，得到X类虚拟代码块，并为所述X类虚拟代码块设置最小迭代次数限值和最大迭代次数限值，其中，X为大于或等于1的整数。
  3. 根据权利要求2所述的方法，其中，确定每类虚拟代码块在所述译码器中的迭代次数包括：
    根据所述最小迭代次数限值和所述最大迭代次数限值确定所述X类虚拟代码块在所述译码器中的迭代次数。
  4. 根据权利要求3所述的方法，其中，根据所述最小迭代次数限值和所述最大迭代次数限值确定所述X类虚拟代码块在所述译码器中的迭代次数包括：
    确定所有虚拟代码块的初始迭代次数E 0；
    根据所述初始迭代次数E 0、第一类虚拟代码块的最小迭代次数限值以及最大迭代次数限值确定所述第一类虚拟代码块在所述译码器中的迭代次数L 0；
    确定第j类虚拟代码块的初始迭代次数E j-1；根据第j类虚拟代码块的初始迭代次数E j-1、第j类虚拟代码块的最小迭代次数限值以及最大迭代次数限值确定所述第j类虚拟代码块在所述译码器中的迭代次数L j-1，其中，j为大于等于2且小于等于X的整数。
  5. 根据权利要求4所述的方法，其中，确定所有虚拟代码块的初始迭代次数E 0包括：
    根据所述译码器的工作频率和系统分配的译码时间确定一个时隙内译码分配的初始所有可用周期数目；
    将所述初始所有可用周期数目与所有虚拟代码块所需的译码器单次迭代对应的周期数目之和的比值确定为所有虚拟代码块的初始迭代次数E 0。
  6. 根据权利要求4所述的方法，其中，根据所述初始迭代次数E 0、所述第一类虚拟代码块的最小迭代次数限值以及最大迭代次数限值确定所述第一类虚拟代码块在所述译码器中的迭代次数L 0包括：
    将所述第一类虚拟代码块的最大迭代次数限值MAX 0与所述初始迭代次数E 0进行比较；
    获取所述MAX 0与所述E 0中的较小值F 0；
    将所述F 0和所述第一类虚拟代码块的最小迭代次数限值MIN 0进行比较；
    获取所述F 0和所述MIN 0中的较大值，得到所述第一类虚拟代码块在所述译码器中的迭代次数L 0。
  7. 根据权利要求4所述的方法，其中，确定第j类虚拟代码块的初始迭代次数E j-1包括：
    将第一类的虚拟代码块在所述译码器中的迭代次数所需要的时间至第j-1类的虚拟代码块在所述译码器中的迭代次数所需要的时间之和从译码分配的所有可用译码时间中去除，得到剩余译码时间，其中，所述译码分配的所有可用译码时间是根据一个时隙内译码分配的初始所有可用周期数目确定的；
    将所述剩余译码时间与剩余类虚拟代码块在所述译码器中的迭代次数所需要的时间之和的比值确定为所述第j类虚拟代码块的初始迭代次数E j-1。
  8. 根据权利要求4所述的方法，其中，根据第j类虚拟代码块的初始迭代次数E j-1、第j类虚拟代码块的最小迭代次数限值以及最大迭代次数限值确定所述第j类虚拟代码块在所述译码器中的迭代次数L j-1包括：
    将所述第j类虚拟代码块的最大迭代次数限值MAX j-1与所述第j类虚拟代码块的初始迭代次数E j-1进行比较；
    获取所述MAX j-1与所述E j-1中的较小值F j-1；
    将所述F j-1和所述第j类虚拟代码块的最小迭代次数限值MIN j-1进行比较；
    获取所述F j-1和所述MIN j-1中的较大值，得到所述第j类虚拟代码块在所述译码器中的迭代次数L j-1。
  9. 根据权利要求1至8中任一项所述的方法，其中，确定一个时隙内新传传输块和重传传输块的虚拟代码块包括：
    对所述新传传输块和所述重传传输块的代码块进行虚拟化处理，得到所述新传传输块和重传传输块的虚拟代码块。
  10. 根据权利要求9所述的方法，其中，对所述新传传输块和所述重传传输块的代码块进行虚拟化处理，得到所述新传传输块和重传传输块的虚拟代码块包括：
    获取当前处理时间段需要处理的新传传输块，计算所述新传传输块所包含的代码块个数，并对所述代码块个数进行虚拟化处理，得到所述新传传输块的虚拟代码块个数；
    获取所述当前处理时间段需要处理的重传传输块，计算所述重传传输块需要实际处理的代码块的位置和个数，并对所述代码块的个数进行虚拟化处理，得到所述重传传输块的虚拟代码块个数。
  11. 一种译码器迭代次数确定装置，包括：
    第一确定模块，配置为确定一个时隙内译码器需处理的新传传 输块和重传传输块的虚拟代码块；
    分类模块，配置为对所述虚拟代码块进行分类；
    第二确定模块，配置为确定每类虚拟代码块在所述译码器中的迭代次数。
  12. 一种存储介质，所述存储介质中存储有计算机程序，所述计算机程序被设置为运行时执行所述权利要求1至10中任一项所述的方法。
  13. 一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行所述权利要求1至10中任一项所述的方法。
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