WO2020237423A1

WO2020237423A1 - Laser having output silicon waveguide

Info

Publication number: WO2020237423A1
Application number: PCT/CN2019/088322
Authority: WO
Inventors: 郑婉华; 石涛; 王海玲; 孟然哲; 王明金; 彭红玲; 齐爱谊
Original assignee: 中国科学院半导体研究所
Priority date: 2019-05-24
Filing date: 2019-05-24
Publication date: 2020-12-03

Abstract

A laser having an output silicon waveguide comprises: a group III-V active structure used to form a light source of a laser, the group III-V active structure comprising a tunnel junction layer (4, 5) used to form a reverse tunneling current channel; an N-type substrate (2) provided at an upper surface of the tunnel junction layer (4, 5); a P-type layer (6, 7, 8) provided at a lower surface of the tunnel junction layer (4, 5); a quantum well active layer (9) provided at a lower surface of the P-type layer (6, 7, 8); an N-type layer (10, 11, 12) provided at a lower surface of the quantum well active layer (9); and a silicon waveguide structure (18) provided under the group III-V active structure and used to form an optical resonant cavity and a laser output waveguide together with the group III-V active structure.

Description

Silicon waveguide output laser

Technical field

The present invention relates to a core light source in the field of optical communication, in particular to a silicon material based on a tunnel junction and a III-V group hybrid integrated silicon waveguide output laser in a silicon optical interconnection system.

Background technique

In recent years, optical interconnection technology is considered to be one of the key technologies to solve the problem of memory access bandwidth and calculation speed in future supercomputers and high-performance computing, and silicon-based optoelectronic integration is considered to be the realization of high-performance computer super-nodes and chips. The most potential technical approach for optical interconnection between and on-chip. As the core device of the silicon optical interconnection system, the silicon-based integrated light source has always been a research hotspot in countries all over the world, but because silicon is an indirect band gap material, the optical gain is several orders of magnitude lower than that of III-V materials, so it is difficult to directly use Silicon makes a high-efficiency laser light source.

Currently, there are three mainstream solutions that can realize silicon-based integrated light sources:

One is a silicon-based epitaxial laser, where III-V active material or germanium material is heteroepitaxially grown on a silicon substrate. The light generated by the III-V material is coupled to the silicon waveguide by evanescent wave for output, but due to silicon and III -There is a large lattice mismatch between V group gain materials, and it becomes very difficult to grow high-quality III-V group materials on silicon substrates;

The second is a silicon-based integrated laser coupled with flip-chip welding. The manufactured III-V laser is welded to the SOI (Silicon on Insulators) waveguide through flip-chip welding. The light emitted by the III-V laser passes The end face is coupled into the silicon waveguide output. This solution requires precise alignment, the tolerance is in the order of sub-micron, and the reflection loss of the end face is also considered, which is not suitable for making multi-array lasers and mass production;

The third is the heterogeneous wafer bonding evanescent wave coupled silicon-based integrated laser. The III-V material is first bonded to the fabricated SOI waveguide, and then the III-V substrate is removed, leaving only a few microns on the SOI waveguide Thick III-V active material, and finally the laser production. Obviously, the III-V active material after the substrate is removed is only a few microns thick, which is not conducive to the subsequent process, and some bonding solutions require substrate transfer technology, which increases the complexity of the device process and the difficulty of manufacturing.

Therefore, the silicon-based integrated light source has always been a bottleneck problem in the silicon optical interconnection system.

Summary of the invention

The present invention proposes a silicon waveguide output laser based on a tunnel junction-based silicon material and III-V group hybrid integration to at least partially solve the problems of high device process complexity and high manufacturing difficulty in existing methods.

In one aspect of the present invention, a silicon waveguide output laser is provided, including:

Group III-V active structure, used to generate the light source of the laser, including: tunnel junction layer, used to form a reverse tunneling current channel; N-type substrate is a semiconductor material that uses electron migration as a current conduction mechanism, The thickness is 100 to 200 microns, and is arranged on the upper surface of the tunnel junction layer to provide reverse tunneling voltage for the tunnel junction layer; the quantum well active layer is arranged under the tunnel junction layer for Generate light gain; P-type layer, arranged between the tunnel junction layer and the quantum well active layer, used to limit the P-type carriers injected into the quantum well active layer, and limit the quantum well The light field distribution generated by the source layer and avoid the loss of the optical gain of the quantum well active layer by the tunnel junction layer; the N-type layer is arranged on the lower surface of the quantum well active layer to limit the injection The N-type carriers of the quantum well active layer and the light field distribution generated by the quantum well active layer are restricted.

And, the silicon waveguide structure is arranged under the III-V group active structure and used to form an optical resonant cavity and laser output waveguide together with the III-V group active structure.

Wherein, the III-V group active structure and the silicon waveguide structure are integrated by bonding technology.

In a further solution, the tunnel junction layer is a PN junction with electron tunneling effect formed by two layers of heavily doped semiconductor materials, including an N-type heavily doped layer and a P-type heavily doped layer, wherein the N-type heavily doped layer The doping concentration of the doped layer is 1×10 ¹⁹ -1×10 ²⁰ atoms/cm ³ , and the doping concentration of the P-type heavily doped layer is 1×10 ¹⁹ -5×10 ²⁰ atoms/cm ³ , in addition, the N-type A neutral layer can also be arranged between the heavily doped layer and the P-type heavily doped layer, and the tunnel junction in the tunnel junction layer includes a binary, ternary or quaternary compound composed of III-V elements.

In a further solution, the P-type layer includes a P-type isolation layer, a P-type confinement layer and a P-type waveguide layer.

In a further solution, the quantum well active layer is a compound semiconductor material composed of III-V elements of the periodic table, having a quantum well or quantum dot structure, and capable of generating light gain.

In a further solution, a buffer layer is also arranged between the tunnel junction layer and the N-type substrate to reduce the influence of the tunnel junction quality of the N-type substrate on the epitaxial growth. The distance of the quantum well active layer in the normal direction of the junction plane is greater than the gain wavelength of the quantum well active layer.

In a further solution, the N-type layer includes an N-type waveguide layer, an N-type confinement layer and an N-type ohmic contact layer.

The invention also provides a method for preparing a silicon waveguide output laser, including:

Preparation of III-V active structure, including:

Buffer layer, N-type heavily doped layer, P-type heavily doped layer, P-type isolation layer, P-type confinement layer, P-type waveguide layer, quantum well active layer, and N-type waveguide are epitaxially grown on an N-type substrate in sequence Layer, N-type confinement layer and N-type ohmic contact layer;

An electrical insulating layer is epitaxially on the N-type ohmic contact layer;

Photoetching the N-side electrode window and the light coupling area in the middle on the electrical insulating layer;

Depositing a layer of N-side metal on the electrical isolation layer film exposing the N-side electrode window and the optical coupling channel;

On the surface of the epitaxial wafer on which the N-side metal is deposited, the alignment marks of the metal welding, the N-side metal solder joints and the optical coupling channel in the middle are photoetched;

The N-type substrate is thinned to 100 to 200 microns, and an electrical isolation layer is deposited on the outside;

Sputtering a layer of P surface metal on the electrical isolation layer;

The prepared III-V active structure is diced and cleaved into a single III-V active structure according to the set size;

Fabrication of silicon waveguide structure includes:

On SOI (Silicon on insulators, silicon on insulators) platform, lithographically etch grating structures on silicon waveguides, including surface coupled gratings and DFB (Distributed feedback) gratings;

Perform a second photolithography to form a strip-shaped silicon waveguide;

Spin-coating a thick layer of photoresist on the fabricated silicon waveguide structure, and then lithographically develop to expose the area where the metal needs to be deposited, and the rest are covered by photoresist;

Use magnetron sputtering or thermal evaporation technology to prepare metal bonding layer;

Use a flip chip bonding machine to bond the prepared III-V group active structure and the silicon waveguide structure metal together to form a complete silicon waveguide output laser that is based on the tunnel junction-based silicon material and the III-V group hybrid integration.

In a further solution, the electrical insulating layer includes silicon dioxide, and the PECVD (Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition) method is used for epitaxial growth, and the N-side metal includes Au, Ge , Ni, Ti, Pt or a combination thereof, the P-side metal includes Au, Ge, Ni, Ti, Pt or a combination thereof, and the electrical isolation layer includes silicon dioxide.

In a further solution, the preparation process of the III-V group active structure and the preparation process of the silicon waveguide structure do not interfere with each other, and the sheets can be separately taped out.

It can be seen from the above technical solutions that the present invention proposes a silicon waveguide output laser based on a tunnel junction-based silicon material and III-V hybrid integration. Due to the introduction of the tunnel junction, the III-V active structure remains relatively A thick layer of substrate provides convenient conditions for subsequent bonding operations, reduces the difficulty of integration with the silicon waveguide structure, and provides a feasible solution for silicon-based integrated light sources.

Description of the drawings

Fig. 1 is a structural diagram of a silicon waveguide output laser integrated with a silicon material based on a tunnel junction and a III-V group hybrid integration of the present invention.

Fig. 2 is a three-dimensional schematic diagram of the laser shown in Fig. 1.

FIG. 3A is a step of forming the N-side electrode window and the middle optical coupling region by photolithography of silicon dioxide during the preparation process of the III-V active structure in the laser shown in FIG. 1.

Fig. 3B is a step of depositing N-side metal electrodes during the preparation process of the III-V active structure of the laser shown in Fig. 1.

FIG. 3C is a step of fabricating P-side electrodes on the N-type substrate during the preparation of the III-V active structure of the laser shown in FIG. 1.

4A is a step of etching the strip waveguide and grating structure during the preparation process of the silicon waveguide structure of the laser shown in FIG. 1.

4B is a step of selectively depositing metal during the preparation of the silicon waveguide structure in the laser shown in FIG. 1.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. Hereinafter, some examples will be provided to illustrate the embodiments of the present disclosure in detail. The advantages and effects of the present disclosure will be more prominent through the following content of the present disclosure. The accompanying drawings in this description are simplified and used as examples. The number, shape, and size of the components shown in the drawings can be modified according to actual conditions, and the configuration of the components may be more complicated. Other aspects of practice or application can also be carried out in the present disclosure, and various changes and adjustments can be made without departing from the spirit and scope defined in the present disclosure.

The terms "above", "above", "below" and other terms in the present disclosure, unless otherwise specified, mean that a semiconductor layer structure in the memory is located above or below the directly contacting another semiconductor layer structure , That is to say, two semiconductor layers are in direct contact when using "above" or "below" to describe. For example, "ferroelectric layer located on the channel region" means that the ferroelectric layer is located in direct contact with the channel region Upper part; the "bulk" referred to in this disclosure refers to a substrate or well material that can participate in the formation of one or more memory cells.

In order to make the objectives, technical solutions, and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

The present disclosure provides a silicon waveguide output laser. Fig. 1 is a structural diagram of a silicon waveguide output laser of the present disclosure. Fig. 2 is a three-dimensional schematic diagram of the laser shown in Fig. 1, as shown in Figs. 1 and 2, including:

The III-V group active structure is used as a light source for generating laser light, and includes: a tunnel junction layer for forming a reverse tunneling current channel; an N-type substrate 2 arranged on the upper surface of the tunnel junction layer for Provide a reverse tunneling voltage for the tunnel junction layer; a quantum well active layer 9 arranged under the tunnel junction layer for generating light gain; a P-type layer arranged between the tunnel junction layer and the Between the quantum well active layers 9, it is used to limit the P-type carriers injected into the quantum well active layer 9, limit the optical field distribution generated by the quantum well active layer 9, and avoid the tunnel junction The loss of the optical gain of the quantum well active layer 9 by the layer; the N-type layer is arranged on the lower surface of the quantum well active layer to limit the N-type carriers injected into the quantum well active layer 9, And limit the light field distribution generated by the quantum well active layer.

In the exemplary embodiment of the present disclosure, the N-type substrate 2 is a semiconductor material that uses the migration of electrons as a current conduction mechanism. In addition, due to the introduction of a tunnel junction, the III-V active structure retains a layer The thicker N-type substrate 2 has a thickness of 100 to 200 microns, which provides convenient conditions for subsequent bonding operations and reduces the difficulty of integration with the silicon waveguide structure.

In the exemplary embodiment of the present disclosure, the tunnel junction layer is a PN junction with electron tunneling effect formed by two layers of heavily doped semiconductor materials, including an N-type heavily doped layer 4 and a P-type heavily doped layer 5, The doping concentration of the N-type heavily doped layer 4 is 1×10 ¹⁹ -1×10 ²⁰ atoms/cm ³ , and the doping concentration of the P-type heavily doped layer 5 is 1×10 ¹⁹ -5×10 ²⁰ atoms/cm 3 ^3. In addition, a neutral layer can be arranged between the N-type heavily doped layer 4 and the P-type heavily doped layer 5. The tunnel junction in the tunnel junction layer includes binary, ternary or ternary elements composed of III-V elements. Quaternary compounds.

In addition, a buffer layer 3 is also arranged between the tunnel junction layer and the N-type substrate 2 to reduce the influence of the N-type substrate 2 on the quality of the tunnel junction for epitaxial growth.

In the exemplary embodiment of the present disclosure, the P-type layer includes: a P-type isolation layer 6, a P-type confinement layer 7 and a P-type waveguide layer 8.

In the exemplary embodiment of the present disclosure, the quantum well active layer 9 is a compound semiconductor material composed of III-V elements in the periodic table, having a quantum well or quantum dot structure, and capable of generating optical gain. The distance between the quantum well active layer 9 and the tunnel junction layer in the normal direction of the junction plane is greater than the gain wavelength of the quantum well active layer 9.

In the exemplary embodiment of the present disclosure, the N-type layer includes: an N-type waveguide layer 10, an N-type confinement layer 11 and an N-type ohmic contact layer 12.

The present disclosure also provides a method for preparing a silicon waveguide output laser, which respectively includes a method for preparing a III-V group active structure and a method for preparing a silicon waveguide structure.

Wherein, the preparation method of the III-V active structure includes:

On the N-type substrate 2 are epitaxially grown buffer layer 3, N-type heavily doped layer 4, P-type heavily doped layer 5, P-type isolation layer 6, P-type confinement layer 7, P-type waveguide layer 8, quantum well Active layer 9, N-type waveguide layer 10, N-type confinement layer 11 and N-type ohmic contact layer 12;

On the N-type ohmic contact layer 12, an N-side metal electrical isolation layer 13-2 is epitaxially formed. In the exemplary embodiment of the present disclosure, the N-side metal electrical isolation layer 13-2 is silicon dioxide, and the PECVD method is used for epitaxial growth;

On the N-side metal electrical isolation layer 13-2, the N-side electrode window and the light coupling region in the middle are lithographically formed. In the exemplary embodiment of the present disclosure, as shown in FIG. 3A, the implementation steps are as follows: A uniform layer of photoresist is spin-coated on the epitaxial wafer of the electrical isolation layer 13-2, and then developed by photolithography. After the development, the area not covered by the photoresist is etched by ICP (Inductively Coupled Plasma) to expose N-side electrode window and the light coupling area in the middle, and finally remove the remaining photoresist;

A layer of N-side metal 14 is deposited on the silicon dioxide film exposing the N-side electrode window and the light coupling channel. The N-side metal 14 includes Au, Ge, Ni, Ti, Pt or a combination thereof. In an example, the growth method of the N-face metal 14 is magnetron sputtering growth;

On the surface of the epitaxial wafer on which the N-side metal 14 is deposited, the alignment marks of the metal welding, the N-side metal 14 solder joints and the optical coupling channel in the middle are lithographically implemented. In an exemplary embodiment of the present disclosure, as shown in FIG. 3B, The steps include spin-coating a layer of uniform photoresist on the surface of the N-side metal 14 by magnetron sputtering, photolithography development, and wet etching of the areas not covered by the photoresist to form alignment marks and N during welding. The welding point of the surface metal 14 and the light coupling channel in the middle are exposed at the same time;

Thinning the N-type substrate 2. In the exemplary embodiment of the present disclosure, as shown in FIG. 3C, the N-type substrate 2 is ground and polished by a CMP (Chemical Mechanical Polishing) process, so that the entire epitaxial wafer is thinned to Appropriate thickness. In the exemplary embodiment of the present disclosure, the thickness is 100 to 200 microns. A layer of P-side metal electrical isolation layer 13-1 is epitaxially deposited on the thinned N-type substrate 2 and photoresist is spin-coated. The photoetched P-side electrode window is used as the injection channel of P-type current;

Magnetron sputtering a P-side metal 1 on the upper surface of the P-side metal electrical isolation layer 13-1, the P-side metal 1 comprising Au, Ge, Ni, Ti, Pt or a combination thereof;

The III-V active structure prepared by the above steps is diced and cleaved into a single III-V active structure of suitable size.

The manufacturing method of the silicon waveguide structure includes:

Photoetch the grating structure on the silicon waveguide 18, including surface coupled grating and DFB grating, etc., and then perform the second photolithography to form the strip-shaped silicon waveguide 18. In the exemplary embodiment of the present disclosure, as shown in FIG. 4A, During the second photolithography, the buried oxide layer BOX16 is directly etched, and at the same time, the metal deposited on both sides of the silicon waveguide 18 can also play a role in heat dissipation. The silicon waveguide 18 is prepared by using an SOI platform;

Metal is selectively deposited on the fabricated silicon waveguide structure. In the exemplary embodiment of the present disclosure, as shown in FIG. 4B, the implementation step is to spin-coat a thicker layer of light on the silicon waveguide structure fabricated in the above steps. The resist is then developed by photolithography to expose the area where the metal needs to be deposited, and the rest is covered by the photoresist, then magnetron sputtering or thermal evaporation of the multilayer metal bonding layer 15, and finally stripping is used to remove the The metal of the area covered by the photoresist.

Finally, use a flip chip bonding machine to bond the III-V active structure prepared in the above steps with the silicon waveguide structure metal to form a complete Si/III-V hybrid integrated silicon waveguide output laser based on the tunnel junction .

In the exemplary embodiment of the present disclosure, the preparation process of the III-V group active structure and the preparation process of the silicon waveguide structure do not interfere with each other, and can be separately taped out.

Although the present disclosure may describe many details, these should not be construed as limiting the scope of the claimed invention or the claimed invention, but as a description of the special features of a specific embodiment. Certain features described in this disclosure in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable subcombination. Furthermore, although the features above may be described as acting in certain combinations and even as stated in the scope of the initial claims, in some cases one or more features may be deleted from the required combination and the claimed protection The combination of can be for sub-combination or variation of sub-combination. Similarly, although the operations are described in a specific order in the drawings, this should not be understood as being required to perform such operations in the specific order shown or in a sequential order, or should not be understood as being required Perform all the operations shown to achieve the desired result.

The specific embodiments described above further describe the purpose, technical solutions and beneficial effects of the present disclosure in further detail. It should be understood that the above are only specific embodiments of the present disclosure and are not intended to limit the present disclosure. Within the spirit and principle of the present disclosure, any modification, equivalent replacement, improvement, etc., shall be included in the protection scope of the present disclosure.

Claims

A silicon waveguide output laser, including:

Group III-V active structure, used to generate the light source of the laser, including:

Tunnel junction layer, used to form a reverse tunneling current channel;

The N-type substrate is arranged on the upper surface of the tunnel junction layer;

The P-type layer is arranged on the lower surface of the tunnel junction layer;

The quantum well active layer is arranged on the lower surface of the P-type layer;

The N-type layer is arranged on the lower surface of the quantum well active layer;

And a silicon waveguide structure, arranged under the III-V group active structure, and used to form an optical resonant cavity and a laser output waveguide together with the III-V group active structure.
The laser according to claim 1, wherein the tunnel junction layer is a PN junction with electron tunneling effect formed by two layers of heavily doped semiconductor materials, including an N-type heavily doped layer and a P-type heavily doped layer.
4. The laser according to claim 2, wherein the tunnel junction in the tunnel junction layer in the tunnel junction layer comprises a binary, ternary or quaternary compound composed of III-V elements.
The laser according to claim 2, wherein the doping concentration of the N-type heavily doped layer is 1×10 19 -1×10 20 atoms/cm 3 , and the doping concentration of the P-type heavily doped layer is 1 ×10 19 ～5×10 20 atoms/cm 3 .
The laser according to claim 1, wherein the P-type layer includes a P-type isolation layer, a P-type confinement layer and a P-type waveguide layer.
The laser according to claim 5, wherein the distance between the quantum well active layer and the tunnel junction layer in the plane normal direction is greater than the gain wavelength of the quantum well active layer.
The laser according to claim 1, wherein said N-type layer includes an N-type waveguide layer, an N-type confinement layer and an N-type ohmic contact layer.
The laser according to claim 1, wherein the quantum well active layer is a compound semiconductor material composed of III-V elements in the periodic table, having a quantum well or quantum dot structure, and capable of generating optical gain.
The laser according to claim 1, wherein a buffer layer is disposed between the N-type substrate and the tunnel junction layer.
The laser according to claim 1, wherein the N-type substrate is a semiconductor material that uses electron migration as a current conduction mechanism.
The laser according to claim 1, wherein the III-V active structure and the silicon waveguide structure are integrated by bonding technology.
The laser according to claim 1, wherein the thickness of the N-type substrate is 100 micrometers to 200 micrometers.