WO2020224066A1 - 一种高速信号连接器、服务器系统及服务器 - Google Patents

一种高速信号连接器、服务器系统及服务器 Download PDF

Info

Publication number
WO2020224066A1
WO2020224066A1 PCT/CN2019/098534 CN2019098534W WO2020224066A1 WO 2020224066 A1 WO2020224066 A1 WO 2020224066A1 CN 2019098534 W CN2019098534 W CN 2019098534W WO 2020224066 A1 WO2020224066 A1 WO 2020224066A1
Authority
WO
WIPO (PCT)
Prior art keywords
preset
pins
speed signal
differential pair
gnd
Prior art date
Application number
PCT/CN2019/098534
Other languages
English (en)
French (fr)
Inventor
武宁
Original Assignee
苏州浪潮智能科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 苏州浪潮智能科技有限公司 filed Critical 苏州浪潮智能科技有限公司
Publication of WO2020224066A1 publication Critical patent/WO2020224066A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02—Contact members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6461—Means for preventing cross-talk
    • H01R13/6471—Means for preventing cross-talk by special arrangement of ground and signal conductors, e.g. GSGS [Ground-Signal-Ground-Signal]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R2201/00—Connectors or connections adapted for particular applications
    • H01R2201/06—Connectors or connections adapted for particular applications for computer periphery

Definitions

  • the invention relates to the technical field of servers, in particular to a high-speed signal connector, a server system and a server.
  • the entire server system will have a motherboard and multiple subsidiary daughter boards interconnection combination, as well as the cascade connection between other boards, which are basically connected directly by connectors or via connectors. Cables are interconnected. In short, there must be a connector device between each board cascade.
  • the high-frequency signal quality will be affected by factors such as the connector's own insertion loss and coupled crosstalk noise.
  • the structural size of the connector itself is relatively narrow, high-speed signals will have a greater impact of crosstalk noise at the connector, and these noise energy will aggravate the reduction in signal voltage amplitude and increase the signal rise time.
  • the signal edge jitter (Jitter) is increased, the bit error rate of the signal collection at the receiving end is increased, and the signal integrity quality is affected.
  • the purpose of the present invention is to provide a high-speed signal connector, a server system and a server to enhance the high-frequency noise suppression capability of the GND pin to differential signals, and to improve the high-speed signal quality at the high-speed signal connector during high-speed signal transmission.
  • the present invention provides a high-speed signal connector, including a preset differential pair pin, and further including:
  • a preset GND pin wherein each pair of the preset differential pair pins corresponds to two preset GND pins set on both sides, and each pair of the preset differential pair pins corresponds to two preset GND pins.
  • the pins are combined and connected to suppress the high frequency noise of the differential signal in the corresponding preset differential pair pin.
  • the ends of two preset GND pins corresponding to each pair of the preset differential pair pins are combined and connected.
  • all GND pins in the high-speed signal connector are combined and connected.
  • the present invention also provides a server system, including: a first board, a second board, and the high-speed signal connector according to any one of the above;
  • the first board and the second board are connected through the high-speed signal connector.
  • the present invention also provides a server, including: the server system described in the previous item.
  • the high-speed signal connector provided by the present invention includes a preset differential pair pin, and further includes: a preset GND pin; wherein, each pair of the preset differential pair pin corresponds to two preset pins set on both sides. Set a GND pin, and two preset GND pins corresponding to each pair of the preset differential pair pins are combined and connected to suppress the high frequency noise of the differential signal in the corresponding preset differential pair pins;
  • the present invention strengthens the high frequency noise suppression capability of the preset GND pin on the differential signal in the preset differential pair pin by combining and connecting the preset GND pins on both sides of the preset differential pair pins in the high-speed signal connector , Improve the crosstalk effect between the preset differential pair pins in the high-speed signal connector when the structure size is small, reduce the impact of crosstalk noise on the differential signal amplitude, and improve the high-speed signal transmission when passing through the high-speed signal connector. High-speed signal quality.
  • the present invention also provides a server system and server, which also have the above-mentioned beneficial effects.
  • FIG. 1 is a schematic structural diagram of a high-speed signal connector provided by an embodiment of the present invention
  • Figure 2 is a simulation model diagram of the pin part of the SAS3.0 connector in the prior art
  • Figure 3 is a waveform diagram of the frequency domain insertion loss simulation corresponding to the structure of Figure 2;
  • Figure 4 is a waveform diagram of the simulation of near-end crosstalk noise in the frequency domain corresponding to the structure of Figure 2;
  • Figure 5 is a waveform diagram of the time-domain eye diagram simulation corresponding to the structure in Figure 2;
  • FIG. 6 is a simulation model diagram of a pin part in a SAS3.0 connector provided by an embodiment of the present invention.
  • Figure 7 is a waveform diagram of the frequency domain insertion loss simulation corresponding to the structure of Figure 6;
  • Fig. 8 is a waveform diagram of the simulation of near-end crosstalk noise in the frequency domain corresponding to the structure in Fig. 6;
  • FIG. 9 is a waveform diagram of the time-domain eye diagram simulation corresponding to the structure in FIG. 6.
  • FIG. 1 is a schematic structural diagram of a high-speed signal connector provided by an embodiment of the present invention.
  • the high-speed signal connector may include: a preset differential pair pin 10, and may also include:
  • each pair of the preset differential pair pins 10 corresponds to two preset GND pins 11 set on both sides, and each pair of the preset differential pair pins 10 corresponds to two
  • the two preset GND pins 11 are combined and connected to suppress the high frequency noise of the differential signal in the corresponding preset differential pair pin 10.
  • the high-speed signal connector provided in this embodiment may be a connector capable of transmitting high-speed signals, that is, the high-speed signal wiring between the boards in the server can be interconnected and transmitted through the high-speed signal connector.
  • the preset differential pair pin 10 in this embodiment may be a differential pair pin provided with combined and connected GND pins on both sides, for example, two independently distributed GND pins on both sides of the pair of differential pair pins in FIG. The pins undergo merging and adjacent processing, and the pair of differential pair pins are used as a pair of preset differential pair pins 10.
  • the specific settings of the preset differential pair pins 10 in this embodiment can be set by the designer according to practical scenarios and user needs. If it can be implemented in the same or similar manner as the differential pair pin setting in the prior art, this embodiment does not impose any limitation on this.
  • each preset GND pin 11 in this embodiment may be a GND pin set on one side of the corresponding preset differential pair pin 10, and is connected to the other side of the preset differential pair pin 10.
  • the GND pins of each are combined and connected, that is, each preset GND pin 11 is combined and connected with the adjacent preset GND pin 11 on the other side of the adjacent preset differential pair pin 10.
  • the two independently distributed GND pins on both sides of the pair of differential pair pins in Figure 2 can be combined and adjacent, and the pair of differential pair pins can be used as a pair of preset differential pair pins 10.
  • the two GND pins serve as two preset GND pins 11 corresponding to the preset differential pair pin 10.
  • the specific setting of the preset GND pin 11 in this embodiment can be set by the designer according to practical scenarios and user needs, such as
  • the two independently distributed GND pins on both sides of the preset differential pair pin 10 set according to the prior art can be combined and adjacently processed to set the two GND pins on both sides of the preset differential pair pin 10 to two One preset GND pin 11.
  • this embodiment does not impose any limitation on this.
  • the purpose of this embodiment may be to combine and connect the preset GND pins 11 on both sides of each pair of preset differential pair pins 10, so that the preset GND pin 11 can suppress the corresponding preset differential pair pins 10
  • the high frequency noise of the differential signal improves the crosstalk shielding ability of the coupling noise between the preset differential pair pins 10.
  • the combined connection position can be set by the designer according to practical scenarios and user needs.
  • the ends of the two preset GND pins 11 corresponding to each pair of preset differential pair pins 10 can be combined and connected, as shown in Figure 6.
  • the two independently distributed GND pins on both sides of the differential pair pins in Figure 2 can be combined and connected to the ends of the corresponding board.
  • the specific connection mode of the preset GND pin 11 in the high-speed signal connector in this embodiment can be set by the designer. For example, only two presets corresponding to each pair of preset differential pair pins 10 can be set. Set GND pin 11 to be combined and connected; it is also possible to combine and connect more than two preset GND pins 11 corresponding to multiple pairs of preset differential pair pins 10 together. For example, all preset differential pairs in the high-speed signal connector can be connected together.
  • All preset GND pins 11 corresponding to pin 10 are combined and connected, so that all preset GND pins 11 are combined and connected; you can also directly combine and connect all GND pins in the high-speed signal connector to make the preset It is assumed that the GND pin 11 and other GND pins are combined and connected to reduce the workload of the designer. As shown in FIG. 6, the ends of all GND pins in the high-speed signal connector are combined and connected. As long as it is ensured that the two preset GND pins 11 corresponding to each pair of preset differential pair pins 10 in the high-speed signal connector are combined and connected, this embodiment does not impose any limitation on this.
  • the SAS3.0 connector model in the prior art shown in FIG. 2 is taken as an example, because the GND pins in FIG. The oppositions are distributed on both sides of the differential pair pins. Because the GND pins are relatively independent, the crosstalk noise between the differential pair pins cannot be shielded well; as shown in Figure 3 and Figure 4, the SAS3.0 connector model is frequency-dependent.
  • the frequency domain insertion loss waveform has a nonlinear resonance point, which will cause the problem of differential mode to common mode, resulting in a decrease in the differential signal amplitude and an increase in common mode EMI (electromagnetic interference) radiation energy; 2) Near-end crosstalk Frequency domain waveform, in the frequency range of 6GHz, the noise amplitude exceeds the required value of SAS3.0 specification; among them, Magnitude is amplitude, frequency is frequency, Retun Loss is return loss, Insertion Loss is insertion loss, and Receptacle Side is connector receiving Plug Side is the sending end of the connector, that is, the male connector.
  • SAS3.0 12Gbps Spec is the 12Gbps specification of SAS3.0 connector.
  • the time-domain eye diagram simulation analysis is carried out, as shown in Figure 5 and Figure 9.
  • the time domain simulation eye diagram jitter (jitter) is relatively large (the position in the circle in Figure 5), and after the GND pins are combined and connected, the improved time domain simulation eye diagram jitter has obvious changes. Small improvement (the position in the circle in Fig. 9), and its eye height also increases. Therefore, the transmission quality of the high-frequency signal SI (Signal Integrity) is effectively improved.
  • the embodiment of the present invention strengthens the preset GND pin 11 to the preset differential pair pin 10 by combining and connecting the preset GND pins 11 on both sides of the preset differential pair pins 10 in the high-speed signal connector.
  • the high-frequency noise suppression capability of the medium differential signal improves the crosstalk effect between the preset differential pair pins 10 in the high-speed signal connector when the structure size is small, reduces the impact of crosstalk noise on the differential signal amplitude, and improves the high speed The quality of the high-speed signal passing through the high-speed signal connector during signal transmission.
  • the embodiment of the present invention also provides a server system, including: a first board, a second board, and the high-speed signal connector provided in the previous embodiment;
  • first board and the second board are connected through a high-speed signal connector.
  • the first board and the second board may be directly connected through a high-speed signal connector, or may be connected through a cable through a high-speed signal connector, and this embodiment does not impose any limitation on this.
  • an embodiment of the present invention also provides a server, including: the server system provided in the foregoing embodiment.

Landscapes

  • Details Of Connecting Devices For Male And Female Coupling (AREA)

Abstract

一种高速信号连接器、服务器系统及服务器，该高速信号连接器包括预设差分对引脚，还包括：预设GND引脚；其中，每对所述预设差分对引脚各自对应两个设置在两旁的预设GND引脚，每对所述预设差分对引脚各自对应的两个预设GND引脚合并相连，以抑制对应的预设差分对引脚中差分信号的高频噪声；本发明通过将高速信号连接器中预设差分对引脚两旁的预设GND引脚合并相连，加强了预设GND引脚对预设差分对引脚中差分信号的高频噪声抑制能力，改善了结构尺寸空间较小时高速信号连接器中各预设差分对引脚间的串扰影响，降低了串扰杂讯对差分信号幅度的影响，提升了高速信号传输时，途经高速信号连接器处的高速信号质量。

Description

一种高速信号连接器、服务器系统及服务器
本申请要求于2019年5月8日提交至中国专利局、申请号为201910380259.6、发明名称为“一种高速信号连接器、服务器系统及服务器”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及服务器技术领域，特别涉及一种高速信号连接器、服务器系统及服务器。
背景技术
在服务器(Server)产品系统设计时，整服务器系统会有主板及多个附属子板互连组合，以及其他各板卡之间的级联，基本是以连接器(connector)直接对连或者经线缆(cable)互连，总之，各板卡级联间必然会有连接器器件存在。然而，当高速信号走线经连接器互连传输时，会因连接器本身插入损耗和耦合串扰噪声等因素影响到高频信号质量。尤其，当连接器本身结构尺寸空间相对较窄时，高速信号在连接器处会产生较大的串扰噪声影响，这些杂讯能量会加剧信号电压幅度降低，信号上升时间变长。从而，引起信号边沿抖动(Jitter)增大，使信号在接受端采集误码率提高，影响到信号完整性质量。
在目前服务器产品开发时，为改善各板卡系统级联时的高速信号质量，除提升各板卡本身信号传输电性指标外，对连接器(高速信号连接器)本身电性能也做了各方面改善提升，如连接器信号互连引脚表面处理由镀锡改为镀银方式，采用电性能更好的树胶模型材料等方式来降低信号在连接器处的传输损耗，进而提升高速信号在连接器处的信号质量。
采用上述现有方案，虽然能降低连接器本身传输损耗对高速信号的影响，但是由于采用了更好的材料及改进工艺，必然使得连接器开发成本的提升，同时，因连接器将趋向于小尺寸结构和支持更高速信号速率，如 25Gbps以上速率的方向发展，连接器内部高速信号间的串扰影响较会加剧变大，此种噪声杂讯的增大会降低通过现有方案改善提升连接器电性指标的效果。因此，如何能够提升了高速信号传输时，途经高速信号连接器处的高速信号质量，是现今急需解决的问题。
发明内容
本发明的目的是提供一种高速信号连接器、服务器系统及服务器，以加强GND引脚对差分信号的高频噪声抑制能力，提升高速信号传输时，途经高速信号连接器处的高速信号质量。
为解决上述技术问题，本发明提供一种高速信号连接器，包括预设差分对引脚，还包括：
预设GND引脚；其中，每对所述预设差分对引脚各自对应两个设置在两旁的预设GND引脚，每对所述预设差分对引脚各自对应的两个预设GND引脚合并相连，以抑制对应的预设差分对引脚中差分信号的高频噪声。
可选的，每对所述预设差分对引脚各自对应的两个预设GND引脚的末端合并相连。
可选的，全部所述预设GND引脚合并相连。
可选的，所述高速信号连接器中的全部GND引脚合并相连。
本发明还提供了一种服务器系统，包括：第一板卡、第二板卡和如上述任一项所述的高速信号连接器；
其中，所述第一板卡和所述第二板卡通过所述高速信号连接器连接。
此外，本发明还提供了一种服务器，包括：如上一项所述的服务器系统。
本发明所提供的一种高速信号连接器，包括预设差分对引脚，还包括：预设GND引脚；其中，每对所述预设差分对引脚各自对应两个设置在两旁的预设GND引脚，每对所述预设差分对引脚各自对应的两个预设GND引脚合并相连，以抑制对应的预设差分对引脚中差分信号的高频噪声；
可见，本发明通过将高速信号连接器中预设差分对引脚两旁的预设 GND引脚合并相连，加强了预设GND引脚对预设差分对引脚中差分信号的高频噪声抑制能力，改善了结构尺寸空间较小时高速信号连接器中各预设差分对引脚间的串扰影响，降低了串扰杂讯对差分信号幅度的影响，提升了高速信号传输时，途经高速信号连接器处的高速信号质量。此外，本发明还提供了一种服务器系统及服务器，同样具有上述有益效果。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据提供的附图获得其他的附图。
图1为本发明实施例所提供的一种高速信号连接器的结构示意图；
图2为现有技术中的SAS3.0连接器中引脚部分的仿真模型图；
图3为图2结构对应的频域插入损耗仿真的波形图；
图4为图2结构对应的频域近端串扰噪声仿真的波形图；
图5为图2结构对应的时域眼图仿真的波形图；
图6为本发明实施例所提供的一种SAS3.0连接器中引脚部分的仿真模型图；
图7为图6结构对应的频域插入损耗仿真的波形图；
图8为图6结构对应的频域近端串扰噪声仿真的波形图；
图9为图6结构对应的时域眼图仿真的波形图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参考图1，图1为本发明实施例所提供的一种高速信号连接器的结 构示意图，该高速信号连接器可以包括：包括预设差分对引脚10，还可以包括：
预设GND引脚11；其中，每对所述预设差分对引脚10各自对应两个设置在两旁的预设GND引脚11，每对所述预设差分对引脚10各自对应的两个预设GND引脚11合并相连，以抑制对应的预设差分对引脚10中差分信号的高频噪声。
可以理解的是，本实施例所提供的高速信号连接器可以为能够传输高速信号的连接器，即服务器中各板卡之间的高速信号走线可以经高速信号连接器互连传输。本实施例中的预设差分对引脚10可以为两旁设置有合并相连的GND引脚的差分对引脚，如可以对图2中的一对差分对引脚两旁的两个独立分布的GND引脚进行合并相邻处理，将该对差分对引脚作为一对预设差分对引脚10。
具体的，对于本实施例中的预设差分对引脚10具体设置，如高速信号连接器中预设差分对引脚10的数量和位置，可以由设计人员根据实用场景和用户需求自行设置，如可以采用与现有技术中的差分对引脚设置相同或相似的方式实现，本实施例对此不做任何限制。
需要说明的是，本实施例中的每个预设GND引脚11可以为设置在对应的预设差分对引脚10一边的一个GND引脚，且与该预设差分对引脚10另一边的GND引脚合并相连，即每个预设GND引脚11与相邻的预设差分对引脚10的另一侧相邻的预设GND引脚11合并相连。如可以对图2中的一对差分对引脚两旁的两个独立分布的GND引脚进行合并相邻处理，将该对差分对引脚作为一对预设差分对引脚10，将这两个GND引脚作为该预设差分对引脚10对应的两个预设GND引脚11。
具体的，对于本实施例中的预设GND引脚11的具体设置，如高速信号连接器中预设GND引脚11的数量和位置，可以由设计人员根据实用场景和用户需求自行设置，如可以通过对预设差分对引脚10两旁的按现有技术设置的两个独立分布的GND引脚进行合并相邻处理，将预设差分对引脚10两旁的两个GND引脚设置为两个预设GND引脚11。只要保证每对预设差分对引脚10两旁分别相邻一个预设GND引脚11，且两旁相邻的两 个预设GND引脚11合并相连，本实施例对此不做任何限制。
其中，本实施例的目的可以为通过将每对预设差分对引脚10两旁的预设GND引脚11合并相连，使预设GND引脚11可以抑制对应的预设差分对引脚10中差分信号的高频噪声，从而提升预设差分对引脚10之间的耦合噪声的串扰屏蔽能力。具体的，对于每对预设差分对引脚10对应的两个预设GND引脚11的具体合并连接方式，如每对预设差分对引脚10对应的两个预设GND引脚11的合并连接位置，可以由设计人员根据实用场景和用户需求自行设置，如可以将每对预设差分对引脚10各自对应的两个预设GND引脚11的末端合并相连，如图6所示，可以将图2中的差分对引脚两旁的两个独立分布的GND引脚的用于与对应板卡连接的末端合并相连。只要可以保证设置的每对预设差分对引脚10对应的两个预设GND引脚11可以抑制对应的预设差分对引脚10中差分信号的高频噪声，本实施例对此不做任何限制。
对应的，对于本实施例中高速信号连接器中的预设GND引脚11的具体连接方式，可以由设计人员自行设置，如可以仅将每对预设差分对引脚10对应的两个预设GND引脚11合并连接；也可以将多对预设差分对引脚10对应的两个以上的预设GND引脚11共同合并连接，如可以将高速信号连接器中全部预设差分对引脚10对应的全部预设GND引脚11合并连接，使全部预设GND引脚11合并相连；还可以直接将高速信号连接器中的全部GND引脚合并连接，使高速信号连接器中的预设GND引脚11和其他GND引脚均合并相连，减少设计人员的工作量，如图6所示，高速信号连接器中的全部GND引脚的末端合并相连。只要保证高速信号连接器中的每对预设差分对引脚10对应的两个预设GND引脚11合并相连，本实施例对此不做任何限制。
需要说明的是，为了展示本实施例所提供的高速信号连接器的优点，以图2所示的现有技术中的SAS3.0连接器模型为例，由于图2中各GND引脚是相互对立分布在差分对引脚两旁，因GND引脚相对独立，不能较好的屏蔽差分对引脚之间的串扰噪声影响；如图3和图4所示，对SAS3.0连接器模型进行频域仿真分析可以发现：1)频域插入损耗波形存在非线性 谐振点，会出现差模转共模问题，造成差分信号幅度降低，共模EMI(电磁干扰)辐射能量增强；2)近端串扰频域波形，在6GHz频率范围内，其噪声幅度超出SAS3.0规范要求值；其中，Magnitude为幅度，frequency为频率，Retun Loss为回波损耗，Insertion Loss为插入损耗，Receptacle Side为连接器接收端，即母头，Plug Side为连接器发送端，即公头，SAS3.0 12Gbps Spec为SAS3.0连接器12Gbps规范。
对应的，如图6所示，本实施例可以对图2所示的SAS3.0中全部独立分布GND引脚进行合并相连优化改进，以此加强GND引脚对各差分线相互之间耦合噪声的串扰屏蔽能力，对图6所示的改进后的仿真建模进行仿真分析，其改进后频域仿真波形如图7和图8所示，并可获得如下结论：1)频域插入损耗波形为线性变化，无谐振点存在，大幅降低差模转共模风险，提升差模能量幅度；2)频域近端串扰噪声波形幅度满足在SAS3.0规范限制范围内，其信号管控指标符合设计要求。进一步的，针对SAS3.0连接器改进前后，展开时域眼图仿真分析，如图5和图9所示，连接器改进前，因独立分布GND引脚抑制相互耦合差分对间串扰噪声能力有限，其时域仿真眼图(eye diagram)抖动(jitter)较大(图5圈中位置)，而将各GND引脚进行合并相连后，其改进后的时域仿真眼图抖动有明显的变小改善(图9圈中位置)，其眼高幅度也随之提升。因而，有效的改善了高频信号SI(Signal Integrity，信号完整性)传输质量。
本实施例中，本发明实施例通过将高速信号连接器中预设差分对引脚10两旁的预设GND引脚11合并相连，加强了预设GND引脚11对预设差分对引脚10中差分信号的高频噪声抑制能力，改善了结构尺寸空间较小时高速信号连接器中各预设差分对引脚10间的串扰影响，降低了串扰杂讯对差分信号幅度的影响，提升了高速信号传输时，途经高速信号连接器处的高速信号质量。
本发明实施例还提供了一种服务器系统，包括：第一板卡、第二板卡和如上一实施例所提供的高速信号连接器；
其中，第一板卡和第二板卡通过高速信号连接器连接。
具体的，第一板卡与第二板卡可以通过高速信号连接器直接对连，也可以通过高速信号连接器经线缆连接，本实施例对此不做任何限制。
此外，本发明实施例还提供了一种服务器，包括：如上述实施例所提供的服务器系统。
说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。对于实施例公开的服务器系统及服务器而言，由于其与实施例公开的高速信号连接器相对应，所以描述的比较简单，相关之处参见高速信号连接器部分说明即可。
还需要说明的是，在本说明书中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上对本发明所提供的一种高速信号连接器、服务器系统及服务器进行了详细介绍。本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想。应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以对本发明进行若干改进和修饰，这些改进和修饰也落入本发明权利要求的保护范围内。

Claims (6)

  1. 一种高速信号连接器，包括预设差分对引脚，其特征在于，还包括：
    预设GND引脚；其中，每对所述预设差分对引脚各自对应两个设置在两旁的预设GND引脚，每对所述预设差分对引脚各自对应的两个预设GND引脚合并相连，以抑制对应的预设差分对引脚中差分信号的高频噪声。
  2. 根据权利要求1所述的高速信号连接器，其特征在于，每对所述预设差分对引脚各自对应的两个预设GND引脚的末端合并相连。
  3. 根据权利要求1或2所述的高速信号连接器，其特征在于，全部所述预设GND引脚合并相连。
  4. 根据权利要求3所述的高速信号连接器，其特征在于，所述高速信号连接器中的全部GND引脚合并相连。
  5. 一种服务器系统，其特征在于，包括：第一板卡、第二板卡和如权利要求1至4任一项所述的高速信号连接器；
    其中，所述第一板卡和所述第二板卡通过所述高速信号连接器连接。
  6. 一种服务器，其特征在于，包括：如权利要求5所述的服务器系统。
PCT/CN2019/098534 2019-05-08 2019-07-31 一种高速信号连接器、服务器系统及服务器 WO2020224066A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910380259.6A CN110112594A (zh) 2019-05-08 2019-05-08 一种高速信号连接器、服务器系统及服务器
CN201910380259.6 2019-05-08

Publications (1)

Publication Number Publication Date
WO2020224066A1 true WO2020224066A1 (zh) 2020-11-12

Family

ID=67488834

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/098534 WO2020224066A1 (zh) 2019-05-08 2019-07-31 一种高速信号连接器、服务器系统及服务器

Country Status (2)

Country Link
CN (1) CN110112594A (zh)
WO (1) WO2020224066A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112636853B (zh) * 2020-12-25 2022-09-06 无锡市同步电子科技有限公司 一种通过差分信号模态转换分析高速通道的方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202076606U (zh) * 2011-05-03 2011-12-14 富士康(昆山)电脑接插件有限公司 电连接器
CN103560360A (zh) * 2011-04-20 2014-02-05 富士康(昆山)电脑接插件有限公司 电连接器
CN106793457A (zh) * 2016-12-15 2017-05-31 郑州云海信息技术有限公司 一种连接装置及其制作方法
US20170271806A1 (en) * 2016-03-15 2017-09-21 Aces Electronics Co., Ltd. Plug unit and receptacle unit
CN109586107A (zh) * 2017-09-29 2019-04-05 中航光电科技股份有限公司 一种连接器及其信号传输结构

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103560360A (zh) * 2011-04-20 2014-02-05 富士康(昆山)电脑接插件有限公司 电连接器
CN202076606U (zh) * 2011-05-03 2011-12-14 富士康(昆山)电脑接插件有限公司 电连接器
US20170271806A1 (en) * 2016-03-15 2017-09-21 Aces Electronics Co., Ltd. Plug unit and receptacle unit
CN106793457A (zh) * 2016-12-15 2017-05-31 郑州云海信息技术有限公司 一种连接装置及其制作方法
CN109586107A (zh) * 2017-09-29 2019-04-05 中航光电科技股份有限公司 一种连接器及其信号传输结构

Also Published As

Publication number Publication date
CN110112594A (zh) 2019-08-09

Similar Documents

Publication Publication Date Title
US6886065B2 (en) Improving signal integrity in differential signal systems
CN100438727C (zh) 印刷电路板传输线的布线结构
Lin et al. Using stepped-impedance lines for common-mode noise reduction on bended coupled transmission lines
CN104102797A (zh) 一种降低差分串扰的pcb走线设计方法
US9419679B2 (en) Cable for transmitting signal
WO2020224066A1 (zh) 一种高速信号连接器、服务器系统及服务器
US20160179733A1 (en) Two-part electrical connector
TWI419620B (zh) 印刷電路板
CN107918581A (zh) 一种针对高速信号连接器优化分析方法与系统
Wilson et al. Active crosstalk cancellation for next-generation single-ended memory interfaces
CN102264188B (zh) 印刷电路板
US20150130553A1 (en) Crosstalk reduction in signal lines by crosstalk introduction
Wang et al. Crosstalk analysis in signal integrity
US11258194B2 (en) Method for designing layout of card edge connector and server card
Mechaik An evaluation of single-ended and differential impedance in PCBs
CN105490736A (zh) 一种降低高速差分短传输线信号抖动的方法
TW201417525A (zh) 等化器
Paladhi et al. Effect of NEXT coupling in close proximity to receiver of 25Gb/s bus
Singamsetty et al. EMI Control of GDDR6 Design with Drive strength control and On-Die Termination Methods
Matsuoka et al. High signal integrity design for transmission system including high-parasitic inductance connectors
Paladhi et al. Effect and sensitivity of postcursor FFE in a 25 Gb/s high speed bus channel
Warnakulasuriyarachchi Design and simulation of a PCI Express Gen 3.0 communication channel
Kim et al. Signal Integrity Analysis of High-speed PCIe Channel with Board-to-Board Interconnect for High-Performance Server
Cocchini et al. Time-domain simulation of system interconnect using convolution and Newton-Raphson iteration methods
Packianathan et al. Signal Integrity Analysis of High Speed Interconnects in SATA Connector

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19927922

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19927922

Country of ref document: EP

Kind code of ref document: A1