WO2020192104A1 - 一种乐器的稳压过滤器 - Google Patents
一种乐器的稳压过滤器 Download PDFInfo
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- WO2020192104A1 WO2020192104A1 PCT/CN2019/113159 CN2019113159W WO2020192104A1 WO 2020192104 A1 WO2020192104 A1 WO 2020192104A1 CN 2019113159 W CN2019113159 W CN 2019113159W WO 2020192104 A1 WO2020192104 A1 WO 2020192104A1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
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- This application relates to music equipment, and more specifically to a voltage regulator filter for musical instruments.
- the cleanest power supply in the world is a 9V battery with a ripple value of about 6mv.
- the adapter usually has a ripple of about 200mv, and the ripple noise over 80mv will be very obvious.
- the existing filter is difficult to stabilize the voltage at 9V, and the ripple value is controlled to about 6mv.
- the purpose of this application is to overcome the shortcomings of the prior art and provide a voltage-stabilizing filter for musical instruments.
- a voltage-stabilizing filter for musical instruments comprising a housing, a circuit board arranged inside the housing, and input interfaces and output interfaces arranged on the housing; the circuit board carries a control circuit; and is characterized in that the The control circuit includes an anti-reverse connection circuit, a boost circuit connected to the output end of the anti-reverse connection circuit, a step-down circuit connected to the output end of the boost circuit, and a filter step-down circuit connected to the output end of the step-down circuit; the filter step-down circuit The output terminal is connected to the output interface.
- the anti-reverse connection circuit includes a MOS transistor Q3 whose model is TDM3478; the drain power terminal of the MOS transistor Q3 is connected to the negative pole, the gate is connected to the positive pole of the power terminal through a resistor R20, and the source is grounded; The gate of the MOS transistor Q3 is connected to the ground through a diode D6 and a resistor R21 in parallel; the anode of the diode D6 is grounded.
- the boost circuit includes a boost control chip U1, the model of which is XR4981; the terminal pin VISP of the boost control chip U1 is connected to the output terminal of the anti-reverse circuit, and the terminal pins VISN and AVIN pass The resistors R1 and R2 are connected in parallel to the output terminal of the anti-reverse circuit; the terminal SW of the boost control chip U1 is connected to the output terminal; the terminal MDRV of the boost control chip U1 is connected to the provided MOS tube Q2 The gate of the MOS transistor Q2 is connected; the drain of the MOS transistor Q2 is connected to the output terminal of the boost control chip U1, and the source is grounded; when the voltage of the terminal pin MDRV exceeds the set value, the MOS transistor Q2 is turned on; The terminal SDRV of the voltage control chip U1 is connected to the gate of the MOS transistor Q1 through a resistor R3; the source of the MOS transistor Q1 is connected to the output terminal of the boost control chip U1, and the drain is
- a boost inductor L1 and an inductance blade absorption circuit are connected in series between the terminals AVIN and SW of the boost control chip U1; the terminal FB is connected to the drain of the MOS transistor Q1 through a resistor R9 to The voltage is fed back to the boost control chip U1.
- a capacitor C14 is provided between the terminal pin BS and the terminal pin SW of the boost control chip U1, and is connected to the terminal pins VCC and PGOOD through the diode D5; the terminal pin VCC is grounded through the capacitor C12.
- the step-down circuit includes a step-down control chip U3, the model of which is AAP6034A; the terminal pin IN of the step-down control chip U3 is connected to the output terminal of the step-up circuit; the output of the terminal pin SW The terminal inductor L2 is connected with the filter circuit.
- the terminal SW of the step-down control chip U3 is grounded through a diode D1; the anode of the diode D1 is grounded; and the output terminal of the terminal FB is connected to feedback the output terminal voltage.
- the filter and step-down circuit includes a transistor Q5, the model of which is 2SD1804L; the base of the transistor Q5 is grounded through a capacitor C20 and connected to the collector through a resistor R23, and the collector is connected to the output terminal of the step-down circuit , The emitter is connected to the output interface.
- the output interface is provided with a self-recoverable fuse F1.
- the present application has the beneficial effect that the input voltage is stepped up and then stepped down, and then filtered and stepped down by the filter step-down circuit after step down, so that the output interface is stabilized and current.
- This application can effectively control the output interface voltage stably at 9V, and the ripple value at about 6mv, so that the interference of the electronic musical instrument from the power supply is greatly reduced, and the playing effect is better.
- Fig. 1 is an exploded view of a voltage-stabilizing filter of a musical instrument of this application
- Fig. 2 is a circuit block diagram of a voltage stabilizing filter of a musical instrument according to this application;
- Fig. 3 is a specific circuit diagram of a voltage-stabilizing filter of a musical instrument of this application.
- Fig. 4 is a specific circuit diagram of a voltage stabilizing filter of a musical instrument of the application.
- FIGS 1 to 4 are drawings of embodiments of the present application.
- a voltage-stabilizing filter as shown in Figs. 1 to 2, includes a housing 10, a circuit board 11 arranged inside the housing 10, and an input interface and an output interface 18 arranged on the housing 10.
- the circuit board 11 carries a control circuit.
- the control circuit includes an anti-reverse connection circuit 12, a boost circuit 13 connected to the output end of the anti-reverse connection circuit 12, a step-down circuit 14 connected to the output end of the boost circuit 13, and a filter step-down circuit 15 connected to the output end of the step-down circuit 14. .
- the output terminal of the filtering and step-down circuit 15 is connected to the output interface 18.
- the external input voltage is a DC voltage of 5 to 19V, which is boosted to a DC voltage of 22V by the boost circuit 13, and then stepped down to a DC voltage of 10.5V by the step-down circuit 14, and then passed through the filter step-down circuit 15 performs filtering and step-down so that the voltage drops to 9V, and finally makes the voltage of the output interface 18 9V.
- the anti-reverse connection circuit 12 includes a MOS transistor Q3, the model of which is TDM3478.
- the drain power terminal of the MOS transistor Q3 is connected to the negative electrode, the gate is connected to the positive terminal of the power terminal through a resistor R20, and the source is grounded.
- the gate of the MOS transistor Q3 is connected to the ground through the diode D6 and the resistor R21 in parallel.
- the anode of diode D6 is grounded.
- the MOS transistor Q3 of the anti-reverse connection circuit 12 functions as a switch. In the case of reverse connection, the MOS transistor Q3 is disconnected and the circuit does not conduct.
- the output end of the anti-reverse connection circuit 12 is provided with an input filter circuit 16, which is grounded through capacitors C10, C2, C3, and C4 to filter the voltage at the input end.
- the boost circuit 13 includes a boost control chip U1, the model of which is XR4981.
- the terminal pin VISP of the boost control chip U1 is connected to the output terminal of the anti-reverse circuit 12, and the terminal pins VISN and AVIN are connected in parallel with the output terminal of the anti-reverse circuit 12 through resistors R1 and R2.
- the terminal SW of the boost control chip U1 is connected to the output terminal.
- the terminal pin MDRV of the boost control chip U1 is connected to the gate of the provided MOS transistor Q2.
- the drain of the MOS transistor Q2 is connected to the output terminal of the boost control chip U1, and the source is grounded to act as a switch.
- MOS transistor Q2 When the voltage of the terminal MDRV exceeds the set value, the MOS transistor Q2 is turned on.
- the terminal SDRV of the boost control chip U1 is connected to the gate of the provided MOS transistor Q1 through a resistor R3.
- the source of the MOS transistor Q1 is connected to the output terminal of the boost control chip U1 (ie, the terminal pin SW), and the drain is connected to the next stage circuit (ie, the step-down circuit 14).
- the MOS transistor Q1 When the voltage of the terminal SDRV is at the set value, the MOS transistor Q1 is turned on.
- the models of MOS tube Q1 and MOS tube Q2 are STN4260 as switches.
- a boost inductor L1 and an inductance sword edge absorption circuit are connected in series between the terminals AVIN and SW of the boost control chip U1.
- the terminal pin FB is connected to the drain of the MOS transistor Q1 through a resistor R9 to feed back the voltage to the boost control chip U1.
- a resistor R1 and a resistor R2 are arranged between the terminals VISP and VISN of the boost control chip U1; the resistor R1 and the resistor R2 are connected in parallel. The resistance R1 and the resistance R2 are used to detect the input current.
- a capacitor C14 is provided between the terminal pin BS and the terminal pin SW of the boost control chip U1, and is connected to the terminal pins VCC and PGOOD through the diode D5.
- the terminal VCC is grounded through the capacitor C12.
- the terminal EN of the boost control chip U1 is connected to the input filter circuit 15 through a resistor R5 for detecting the input voltage.
- the boost circuit 13 boosts the filtered input voltage and boosts the input voltage of 5-19V to 22V for output.
- an output filter circuit 17 is provided between the boost circuit 13 and the buck circuit 14 for filtering the output terminal of the boost circuit.
- the filter circuit 17 includes capacitors C9, C11, and C8, and the capacitors C9, C11, and C8 are all connected to the ground.
- the step-down circuit 14 includes a step-down control chip U3, the model of which is AAP6034A.
- the terminal IN of the buck control chip U3 is connected to the output terminal of the boost circuit 13.
- the output terminal inductance L2 of the terminal pin SW is connected with the filter circuit, and has the effect of stabilizing the current at the output terminal.
- the terminal pin SW of the buck control chip U3 is grounded through a diode D1.
- the anode of the diode D1 is grounded.
- the output terminal of the terminal FB is connected to feedback the output terminal voltage.
- the terminal BS is connected to the output terminal through a capacitor C21.
- the step-down circuit 14 will be provided after the step-up circuit 13 for stepping down the boosted voltage 22V to 10. 5V, while stabilizing the current.
- the filtering and step-down circuit 15 includes a transistor Q5 whose model is 2SD1804L.
- the base of the transistor Q5 is grounded through the capacitor C20 and connected to the collector through the resistor R23, the collector is connected to the output terminal of the buck circuit 14, and the emitter is connected to the output interface 18.
- the base is connected to the input and output terminals, the resistor R23 reduces the voltage, and the capacitor C20 performs filtering, so that the base has a stable voltage, and the collector and the emitter are turned on to achieve linear voltage regulation and reduce output ripple.
- the output interface 18 is provided with a self-recovery fuse F1, so that the output interface 18 can protect against short circuit or overcurrent.
- the output end of the step-down circuit 14 can be connected to multiple filter step-down circuits 15 so that there are multiple output interfaces 18, which improves the practicability.
- the voltage of the output interface 18 is 9V, and the ripple value is about 6mv, so as to adapt to different electronic musical instruments.
- the present application boosts the input voltage and then lowers the voltage, and then filters and lowers the voltage through the filter step-down circuit after step-down, so that the output interface is stabilized and current.
- This application can effectively control the output interface voltage stably at 9V, and the ripple value at about 6mv, so that the interference of the electronic musical instrument from the power supply is greatly reduced, and the playing effect is better.
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Abstract
本申请涉及一种乐器的稳压过滤器，包括壳体，设于壳体内侧的电路板，及设于壳体上的输入接口、输出接口；所述电路板承载有控制电路；所述控制电路包括防反接电路，连接于防反接电路输出端的升压电路，连接于升压电路输出端的降压电路，及连接于降压电路输出端的滤波降压电路；所述滤波降压电路输出端与输出接口连接。本申请通过将输入电压进行升压后在降压，降压后并通过滤波降压电路进行滤波降压，使得输出接口的稳压稳流。本申请能有效的将输出接口电压稳定控制在9V，纹波值控制在6mv左右，使得电子乐器受到电源的干扰大幅的降低，弹奏效果更佳。
Description
本申请是以申请号为2019102435617、申请日为2019年3月28日的中国专利申请为基础，并主张其优先权，该申请的全部内容在此作为整体引入本申请中。
本申请涉及音乐设备，更具体地说是指一种乐器的稳压过滤器。
对于吉他手而言噪音是最不可忍受的，这世界上最干净的电源是9V电池，纹波值为6mv左右。
而适配器通常纹波在200mv左右，超过80mv的纹波噪声将会非常明显。而现有的过滤器很难将电压稳定在9V，纹波值控制6mv左右。
申请内容
本申请的目的在于克服现有技术的缺陷，提供一种乐器的稳压过滤器。
为实现上述目的，本申请采用以下技术方案：
一种乐器的稳压过滤器，包括壳体，设于壳体内侧的电路板，及设于壳体上的输入接口、输出接口；所述电路板承载有控制电路；其特征在于，所述控制电路包括防反接电路，连接于防反接电路输出端的升压电路，连接于升压电路输出端的降压电路，及连接于降压电路输出端的滤波降压电路；所述滤波降压电路输出端与输出接口连接。
其进一步技术方案为：所述防反接电路包括MOS管Q3，其型号为TDM3478；所述MOS管Q3的漏极电源端负极连接，栅极通过电阻R20与电源端正极连接，源极接地；所述MOS管Q3的栅极通过二极管D6、电阻R21并联后接地；所述二极管D6正极接地。
其进一步技术方案为：所述升压电路包括升压控制芯片U1，其型号为XR4981；所述升压控制芯片U1的端脚VISP与防反接电路的输出端连接，端脚VISN、AVIN通过电阻R1、R2并联后与防反接电路的输出端连接；所述升压控制芯片U1的端脚SW与输出端连接；所述升压控制芯片U1的端脚MDRV与设有的MOS管Q2 的栅极连接；所述MOS管Q2的漏极与升压控制芯片U1的输出端连接，源极接地；所述端脚MDRV的电压超过设定值时，MOS管Q2导通；所述升压控制芯片U1的端脚SDRV通过电阻R3与设有的MOS管Q1的栅极连接；所述MOS管Q1的源极与升压控制芯片U1的输出端连接，漏极与下一级电路连接；所述端脚SDRV的电压处于设定值时，MOS管Q1导通。
其进一步技术方案为：所述升压控制芯片U1的端脚AVIN及SW之间串联有升压电感L1、电感剑锋吸收电路；端脚FB通过电阻R9与MOS管Q1的漏极连接，以将电压反馈至升压控制芯片U1。
其进一步技术方案为：所述升压控制芯片U1的端脚BS与端脚SW之间设有电容C14，并且通过二极管D5与端脚VCC、PGOOD连接；所述端脚VCC通过电容C12接地。
其进一步技术方案为：所述降压电路包括降压控制芯片U3，其型号为AAP6034A；所述降压控制芯片U3的端脚IN与升压电路的输出端连接；所述端脚SW的输出端电感L2与滤波电路连接。
其进一步技术方案为：所述降压控制芯片U3端脚SW通过二极管D1接地；所述二极管D1的正极接地；所述端脚FB的输出端连接，以反馈输出端电压。
其进一步技术方案为：所述滤波降压电路包括三极管Q5，其型号为2SD1804L；所述三极管Q5的基极通过电容C20接地并通过电阻R23与集电极连接，集电极与降压电路输出端连接，发射极与输出接口连接。
其进一步技术方案为：所述输出接口设有自恢复保险管F1。
其进一步技术方案为：还包括输入滤波电路及输出滤波电路；其中，所述输入滤波电路设于升压电路的输入端，输出滤波电路设于降压电路的输出端；所述输入滤波电路包括电容C10、C2、C3、C4，且电容C10、C2、C3、C4均接地；所述滤波电路包括电容C9、C11、C8，且电容C9、C11、C8均接地。
本申请与现有技术相比的有益效果是：本申请通过将输入电压进行升压后在降压，降压后并通过滤波降压电路进行滤波降压，使得输出接口的稳压稳流。本申请能有效的将输出接口电压稳定控制在9V，纹波值控制在6mv左右，使得电子乐器受到电源的干扰大幅的降低，弹奏效果更佳。
下面结合附图和具体实施例对本申请作进一步描述。
图1为本申请一种乐器的稳压过滤器的分解图；
图2为本申请一种乐器的稳压过滤器的电路方框图；
图3为本申请一种乐器的稳压过滤器的具体电路图；
图4为本申请一种乐器的稳压过滤器的具体电路图。
为了更充分理解本申请的技术内容，下面结合具体实施例对本申请的技术方案进一步介绍和说明，但不局限于此。
如图1至图4本申请实施例的图纸。
一种稳压过滤器，如图1至图2所示，包括壳体10，设于壳体10内侧的电路板11，及设于壳体10上的输入接口、输出接口18。电路板11承载有控制电路。控制电路包括防反接电路12，连接于防反接电路12输出端的升压电路13，连接于升压电路13输出端的降压电路14，及连接于降压电路14输出端的滤波降压电路15。滤波降压电路15输出端与输出接口18连接。输出接口18为可以为多个，以使多个乐器能共用(本实施例中输出接口18为输出插座DC55*21mm)。
本实施例中，外部输入电压为5至19V的直流电压，经过升压电路13升压至22V的直流电压，再通过降压电路14降压至10.5V的直流电压，然后通过滤波降压电路15进行滤波和降压使得电压降到9V，最后使得输出接口18的电压为9V。
如图3所示，防反接电路12包括MOS管Q3，其型号为TDM3478。MOS管Q3的漏极电源端负极连接，栅极通过电阻R20与电源端正极连接，源极接地。MOS管Q3的栅极通过二极管D6、电阻R21并联后接地。二极管D6正极接地。防反接电路12的MOS管Q3起到开关的作用，在接反的情况下，MOS管Q3断开，电路不导通。
优选的，防反接电路12的输出端设有输入滤波电路16，通过电容C10、C2、C3、C4接地，对输入端的电压进行滤波。
如图3所示，升压电路13包括升压控制芯片U1，其型号为XR4981。升压控制芯片U1的端脚VISP与防反接电路12的输出端连接，端脚VISN、AVIN通过电阻R1 、R2并联后与防反接电路12的输出端连接。升压控制芯片U1的端脚SW与输出端连接。升压控制芯片U1的端脚MDRV与设有的MOS管Q2的栅极连接。MOS管Q2的漏极与升压控制芯片U1的输出端连接，源极接地，以作为开关作用，端脚MDRV的电压超过设定值时，MOS管Q2导通。升压控制芯片U1的端脚SDRV通过电阻R3与设有的MOS管Q1的栅极连接。MOS管Q1的源极与升压控制芯片U1的输出端连接(即端脚SW)，漏极与下一级电路连接(即降压电路14)。端脚SDRV的电压处于设定值时，MOS管Q1导通。MOS管Q1、MOS管Q2的型号均为STN4260，作为开关。
升压控制芯片U1的端脚AVIN及SW之间串联有升压电感L1、电感剑锋吸收电路。端脚FB通过电阻R9与MOS管Q1的漏极连接，以将电压反馈至升压控制芯片U1。
升压控制芯片U1的端脚VISP、VISN之间设有电阻R1、电阻R2；所述电阻R1、电阻R2并联连接。电阻R1、电阻R2用于对输入电流的检测。
升压控制芯片U1的端脚BS与端脚SW之间设有电容C14，并且通过二极管D5与端脚VCC、PGOOD连接。端脚VCC通过电容C12接地。
升压控制芯片U1的端脚EN通过电阻R5与输入滤波电路15连接，用于对输入电压的检测。
升压电路13对滤波后的输入电压进行升压，将输入的5-19V的电压升至22V输出。
优选的，升压电路13与降压电路14之间设置有输出滤波电路17，用于对升压电路输出端进行滤波。其中，滤波电路17包括电容C9、C11、C8，且电容C9、C11、C8均与地连接。
如图4所示，降压电路14包括降压控制芯片U3，其型号为AAP6034A。降压控制芯片U3的端脚IN与升压电路13的输出端连接。端脚SW的输出端电感L2与滤波电路连接，对输出端的电流具有稳流的作用。
降压控制芯片U3端脚SW通过二极管D1接地。二极管D1的正极接地。端脚FB的输出端连接，以反馈输出端电压。端脚BS通过电容C21与输出端连接。
降压电路14将设置在升压电路13之后，用于对升压后的电压22V进行降压至10. 5V，同时对电流进行稳流。
如图4所示，滤波降压电路15包括三极管Q5，其型号为2SD1804L。三极管Q5的基极通过电容C20接地并通过电阻R23与集电极连接，集电极与降压电路14输出端连接，发射极与输出接口18连接。基极与出入端连接，电阻R23降压，并且电容C20进行滤波，使得基极具有一个稳定的电压，进而使得集电极与发射极导通，以达到线性稳压及减少输出纹波。
其中，输出接口18设有自恢复保险管F1，使得输出接口18短路或过流都能起到保护的作用。
降压电路14的输出端可以与多个滤波降压电路15连接，使得输出接口18为多个，提高实用性。
输出接口18的电压为9V，纹波值为6mv左右，以适应不同的电子乐器使用。
综上所述，本申请通过将输入电压进行升压后在降压，降压后并通过滤波降压电路进行滤波降压，使得输出接口的稳压稳流。本申请能有效的将输出接口电压稳定控制在9V，纹波值控制在6mv左右，使得电子乐器受到电源的干扰大幅的降低，弹奏效果更佳。
上述仅以实施例来进一步说明本申请的技术内容，以便于读者更容易理解，但不代表本申请的实施方式仅限于此，任何依本申请所做的技术延伸或再创造，均受本申请的保护。本申请的保护范围以权利要求书为准。
发明概述
问题的解决方案
发明的有益效果
Claims (10)
- 一种乐器的稳压过滤器，包括壳体，设于壳体内侧的电路板，及设于壳体上的输入接口、输出接口；所述电路板承载有控制电路；其特征在于，所述控制电路包括防反接电路，连接于防反接电路输出端的升压电路，连接于升压电路输出端的降压电路，及连接于降压电路输出端的滤波降压电路；所述滤波降压电路输出端与输出接口连接。
- 根据权利要求1所述的一种乐器的稳压过滤器，其特征在于，所述防反接电路包括MOS管Q3，其型号为TDM3478；所述MOS管Q3的漏极电源端负极连接，栅极通过电阻R20与电源端正极连接，源极接地；所述MOS管Q3的栅极通过二极管D6、电阻R21并联后接地；所述二极管D6正极接地。
- 根据权利要求2所述的一种乐器的稳压过滤器，其特征在于，所述升压电路包括升压控制芯片U1，其型号为XR4981；所述升压控制芯片U1的端脚VISP与防反接电路的输出端连接，端脚VISN、AVIN通过电阻R1、R2并联后与防反接电路的输出端连接；所述升压控制芯片U1的端脚SW与输出端连接；所述升压控制芯片U1的端脚MDRV与设有的MOS管Q2的栅极连接；所述MOS管Q2的漏极与升压控制芯片U1的输出端连接，源极接地；所述端脚MDRV的电压超过设定值时，MOS管Q2导通；所述升压控制芯片U1的端脚SDRV通过电阻R3与设有的MOS管Q1的栅极连接；所述MOS管Q1的源极与升压控制芯片U1的输出端连接，漏极与下一级电路连接；所述端脚SDRV的电压处于设定值时，MOS管Q1导通。
- 根据权利要求3所述的一种乐器的稳压过滤器，其特征在于，所述升压控制芯片U1的端脚AVIN及SW之间串联有升压电感L1、电感剑锋吸收电路；端脚FB通过电阻R9与MOS管Q1的漏极连接，以将电压反馈至升压控制芯片U1。
- 根据权利要求4所述的一种乐器的稳压过滤器，其特征在于，所述 升压控制芯片U1的端脚BS与端脚SW之间设有电容C14，并且通过二极管D5与端脚VCC、PGOOD连接；所述端脚VCC通过电容C12接地。
- 根据权利要求5所述的一种乐器的稳压过滤器，其特征在于，所述降压电路包括降压控制芯片U3，其型号为AAP6034A；所述降压控制芯片U3的端脚IN与升压电路的输出端连接；所述端脚SW的输出端电感L2与滤波电路连接。
- 根据权利要求6所述的一种乐器的稳压过滤器，其特征在于，所述降压控制芯片U3端脚SW通过二极管D1接地；所述二极管D1的正极接地；所述端脚FB的输出端连接，以反馈输出端电压。
- 根据权利要求7所述的一种乐器的稳压过滤器，其特征在于，所述滤波降压电路包括三极管Q5，其型号为2SD1804L；所述三极管Q5的基极通过电容C20接地并通过电阻R23与集电极连接，集电极与降压电路输出端连接，发射极与输出接口连接。
- 根据权利要求8所述的一种乐器的稳压过滤器，其特征在于，所述输出接口设有自恢复保险管F1。
- 根据权利要求9所述的一种乐器的稳压过滤器，其特征在于，还包括输入滤波电路及输出滤波电路；其中，所述输入滤波电路设于升压电路的输入端，输出滤波电路设于降压电路的输出端；所述输入滤波电路包括电容C10、C2、C3、C4，且电容C10、C2、C3、C4均接地；所述滤波电路包括电容C9、C11、C8，且电容C9、C11、C8均接地。
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| JP2001333546A (ja) * | 2000-05-23 | 2001-11-30 | Hitachi Maxell Ltd | 電源装置 |
| CN102833902A (zh) * | 2011-06-14 | 2012-12-19 | 海洋王照明科技股份有限公司 | 升压型led恒流驱动电路 |
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