WO2020186605A1 - 显示面板的驱动方法 - Google Patents

显示面板的驱动方法 Download PDF

Info

Publication number
WO2020186605A1
WO2020186605A1 PCT/CN2019/085760 CN2019085760W WO2020186605A1 WO 2020186605 A1 WO2020186605 A1 WO 2020186605A1 CN 2019085760 W CN2019085760 W CN 2019085760W WO 2020186605 A1 WO2020186605 A1 WO 2020186605A1
Authority
WO
WIPO (PCT)
Prior art keywords
multiplexed signal
pulse
signal
display panel
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/085760
Other languages
English (en)
French (fr)
Inventor
郑力华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Publication of WO2020186605A1 publication Critical patent/WO2020186605A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present invention relates to the field of display technology, in particular to a driving method of a display panel.
  • CTR Ray Tube
  • liquid crystal display devices which include a liquid crystal display panel and a backlight module.
  • the working principle of the liquid crystal display panel is based on the thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate) and the color film (Color Filter (CF) liquid crystal molecules are filled between the substrates, and a driving voltage is applied to the two substrates to control the rotation direction of the liquid crystal molecules to refract the light from the backlight module to produce a picture.
  • TFT Array Substrate Thin Film Transistor Array Substrate
  • CF Color Filter
  • a data line and a scan line Gate line are respectively arranged on a pixel electrode.
  • This approach can well control the opening of the gate of each scan line and each data Online data input, however, with the increase in the resolution and resolution of the LCD panel, the number of data lines and scan lines will also increase, which will result in an increase in the area occupied by the fan-out traces of the data lines. The area increases, thereby affecting the transmittance and display effect.
  • multiplexed drive architectures have been widely used, such as 1to2, 1to3, and 1to6 De-mux drive architectures.
  • An existing display panel with a 1to6 Dex-mux drive architecture includes multiple drive units.
  • Each driving unit includes a plurality of pixels 100 arranged in a plurality of rows and 4 columns, 12 data lines 200, a plurality of scan lines 300, and a multiplexing module 400.
  • Each pixel 100 includes three sub-pixels 110 arranged in a row. The three sub-pixels 110 are a red sub-pixel r, a green sub-pixel g, and a blue sub-pixel b.
  • the sub-pixels 110 of the plurality of pixels 100 are arranged in multiple rows 12 Column, the color of the sub-pixels 110 in the same column is the same, one data line 200 corresponds to one column of sub-pixels 110, and one scan line 300 corresponds to one row of sub-pixels 110.
  • the multiplexing module 400 includes 12 thin film transistors T10 respectively corresponding to the 12 columns of sub-pixels 110, and the drains of the 12 thin film transistors T10 are respectively connected to the data lines 200 connected to the corresponding column of sub-pixels 110, and correspond to the odd-numbered columns of sub-pixels 110.
  • the source of the thin film transistor T10 is connected to the Nth data signal DN, where N is a positive integer, and the source of the thin film transistor T10 corresponding to the even-numbered column of sub-pixels 110 is connected to the N+1th data signal DN+1, the first And the gate of the thin film transistor T10 corresponding to the red sub-pixel r in the second column of pixels 100 is connected to the first multiplexed signal MUX10, and the gate of the thin film transistor T10 corresponding to the green sub-pixel g in the first and second columns of pixels 100
  • the pole is connected to the second multiplexing signal MUX20, the gate of the thin film transistor T10 corresponding to the blue sub-pixel b in the first and second columns of pixels 100 is connected to the third multiplexing signal MUX30, and the third and fourth columns of pixels
  • the gate of the thin film transistor T10 corresponding to the red sub-pixel r in 100 is connected to the fourth multiplexing signal MUX40, and the gate of the thin film transistor T10
  • the display panel When the display panel is driven, it includes a plurality of frame periods that are sequentially performed, and each frame period includes a plurality of line periods that are sequentially performed, and a plurality of scan lines 300 are high in the multiple line periods in turn, see FIG. 2.
  • the first multiplexed signal MUX10, the second multiplexed signal MUX20, the third multiplexed signal MUX30, the fourth multiplexed signal MUX40, the fifth multiplexed signal MUX50, and the sixth multiplexed signal MUX60 A high-level pulse is sequentially generated to turn on the corresponding thin film transistor T10 to transmit a data signal to the corresponding sub-pixel 110.
  • This driving method can reduce the area of the space occupied by the data line fan-out wiring to achieve a narrow frame.
  • the charging sequence of the multiple sub-pixels 110 Both: charge the pixels 100 in the 1st and 2nd columns first, and then charge the pixels 100 in the 3rd and 4th columns.
  • the display effect of the first charged pixel 100 is better than that of the latter
  • the display effect of the charged pixel 100 will eventually cause a significant brightness difference between the pixels 100 in the first and second columns and the pixels 100 in the third and fourth columns as shown in FIG. Stripes appear on the screen displayed on the display panel, which affects the display effect.
  • the object of the present invention is to provide a method for driving a display panel, which can eliminate the streak feeling of the screen displayed on the display panel and improve the display quality.
  • the object of the present invention is also a method for driving a display panel, which includes the following steps:
  • step S1 Provide display panel
  • the display panel includes a plurality of driving units arranged in sequence; each driving unit includes a plurality of sub-pixels arranged in multiple rows and 2m columns, 2m data lines, and two multiplexing modules; one column of sub-pixels is correspondingly connected to one Data line; each multiplexing module includes m switching elements, and m switching elements in each multiplexing module are connected to m multiplexing signals; in the two multiplexing modules The input ends of one m switching elements are all connected to the nth data signal, and the input ends of the m switching elements of the other of the two multiplexing modules are all connected to the n+1th data signal; two The output ends of the 2m switching elements in the multiplexing module are respectively electrically connected to the 2m data lines, m is a positive integer greater than 1, and n is a positive integer;
  • Step S2 Perform a row scan on the plurality of sub-pixels.
  • the m multiplexed signals sequentially generate a high potential pulse according to a preset sequence, and in the same row scan period,
  • the m high-potential pulses generated by the m multiplexed signals have at least two different pulse widths, and a high-potential pulse with a larger pulse width is generated after a high-potential pulse with a smaller pulse width.
  • m is 6; the control ends of the 6 switching elements in each multiplexing module are respectively connected to the first multiplexed signal, the second multiplexed signal, the third multiplexed signal, and the first multiplexed signal.
  • the first multiplexed signal, the second multiplexed signal, the third multiplexed signal, the fourth multiplexed signal, the fifth multiplexed signal, the sixth multiplexed signal sequentially generates a high-potential pulse.
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal, the second multiplexed signal, and the third multiplexed signal are equal, and the fourth multiplexed signal, the fifth multiplexed signal.
  • the pulse width of the high-potential pulse generated by the signal and the sixth multiplexed signal is equal, and the pulse width of the high-potential pulse generated by the first multiplexed signal is smaller than the high-potential pulse generated by the fourth multiplexed signal The pulse width.
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal, the second multiplexed signal, and the third multiplexed signal increase sequentially, and the fourth multiplexed signal, the fifth multiplexed signal
  • the pulse width of the high-potential pulse generated by the signal and the sixth multiplexed signal is equal, and the pulse width of the high-potential pulse generated by the third multiplexed signal is smaller than the high-potential pulse generated by the fourth multiplexed signal The pulse width.
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal, the second multiplexed signal, and the third multiplexed signal are equal, and the fourth multiplexed signal, the fifth multiplexed signal.
  • the pulse width of the high-potential pulse generated by the signal and the sixth multiplexed signal increases sequentially, and the pulse width of the high-potential pulse generated by the third multiplexed signal is smaller than that of the fourth multiplexed signal.
  • the pulse width of the potential pulse is equal, and the fourth multiplexed signal, the fifth multiplexed signal.
  • the first multiplexed signal, the second multiplexed signal, the third multiplexed signal, the fourth multiplexed signal, the fifth multiplexed signal, and the sixth multiplexed signal are generated
  • the pulse width of the high-potential pulse increases in turn.
  • control ends of the three switching elements in each multiplexing module are respectively connected to the first multiplexed signal, the second multiplexed signal, and the third multiplexed signal;
  • the first multiplexed signal, the second multiplexed signal and the third multiplexed signal sequentially generate a high potential pulse
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal, the second multiplexed signal, and the third multiplexed signal are sequentially increased.
  • control ends of the two switching elements in each multiplexing module are respectively connected to the first multiplexed signal and the second multiplexed signal;
  • the first multiplexed signal and the second multiplexed signal sequentially generate a high potential pulse, and the pulse width of the high potential pulse generated by the first multiplexed signal is smaller than that of the second multiplexed signal.
  • the pulse width of the high-potential pulse generated by the multiplexed signal is smaller than that of the second multiplexed signal.
  • the switching element is a thin film transistor
  • the control terminal of the switching element is the gate of the thin film transistor
  • the input terminal of the switching element is the source of the thin film transistor
  • the output terminal of the switching element is the drain of the thin film transistor.
  • the driving unit also includes a plurality of scan lines; a row of sub-pixels is correspondingly connected to one scan line.
  • the present invention provides a method for driving a display panel, by setting a number of multiplexed signals in each row scanning period to sequentially generate a high potential pulse in a preset sequence, and in the same row During the scanning period, the several high-potential pulses generated by the several multiplexed signals have at least two different pulse widths, and the high-potential pulses with a larger pulse width are generated after the high-potential pulses with a smaller pulse width, thereby passing
  • the pulse width of the high-potential pulse generated after being increased can improve the charging effect of the sub-pixels, eliminate the streak feeling of the picture displayed by the display panel, and improve the display quality.
  • FIG. 1 is a schematic structural diagram of a display panel of a conventional 1to6 Dex-mux drive architecture
  • FIG. 2 is a driving timing diagram of the display panel shown in FIG. 1;
  • FIG. 3 is a display effect diagram of the display panel shown in FIG. 1;
  • FIG. 5 is a first structure diagram of the display panel in the driving method of the display panel of the present invention.
  • FIG. 6 is a timing diagram of the first embodiment of the driving method of the display panel of the present invention.
  • FIG. 7 is a timing diagram of the second embodiment of the driving method of the display panel of the present invention.
  • FIG. 8 is a timing diagram of the third embodiment of the driving method of the display panel of the present invention.
  • FIG. 9 is a timing diagram of the fourth embodiment of the driving method of the display panel of the present invention.
  • FIG. 10 is a second structure diagram of the display panel in the driving method of the display panel of the present invention.
  • FIG. 11 is a timing diagram of the fifth embodiment of the driving method of the display panel of the present invention.
  • FIG. 12 is a fourth structural diagram of the display panel in the driving method of the display panel of the present invention.
  • FIG. 13 is a timing diagram of the sixth embodiment of the driving method of the display panel of the present invention.
  • a driving method of a display panel of the present invention includes the following steps:
  • Step S1 Provide a display panel
  • the display panel includes a plurality of driving units arranged in sequence; each driving unit includes a plurality of sub-pixels 10 arranged in multiple rows and 2m columns, 2m data lines 20, and two multiplexing modules 40; one column of sub-pixels 10 corresponds to a data line 20; each multiplexing module 40 includes m switching elements 41, and m switching elements 41 in each multiplexing module 40 are respectively connected to m multiplexing signals; The input ends of the m switching elements 41 of one of the two multiplexing modules 40 are all connected to the nth data signal Dn, and the input of the m switching elements 41 of the other of the two multiplexing modules 40 Both terminals are connected to the n+1th data signal Dn+1; the output terminals of the 2m switching elements 41 in the two multiplexing modules 40 are electrically connected to the 2m data lines 20, and m is greater than 1. Positive integer, n is a positive integer;
  • Step S2. Perform a row scan on the plurality of sub-pixels 10, and in each row scan period, the m multiplexed signals sequentially generate a high potential pulse according to a preset sequence, and in the same row scan period
  • the m high-potential pulses generated by the m multiplexed signals have at least two different pulse widths, and a high-potential pulse with a larger pulse width is generated after a high-potential pulse with a smaller pulse width.
  • the display panel is a liquid crystal display panel or an OLED display panel.
  • each row of sub-pixels 10 includes red sub-pixels R, green sub-pixels G, and blue sub-pixels B that are sequentially and repeatedly arranged, and the sub-pixels 10 in the same column have the same color.
  • the switching element 41 is a thin film transistor T1
  • the control terminal of the switching element 41 is the gate of the thin film transistor T1
  • the input terminal of the switching element 41 is the source of the thin film transistor T1
  • the output terminal of the switching element 41 is a thin film transistor. Drain of T1.
  • each driving unit further includes a plurality of scan lines 30; one row of sub-pixels 10 is correspondingly connected to one scan line 30, and the m-th scan line 30 outputs the m-th scan signal Gm, so as to provide information to the m-th row of sub-pixels 11
  • m is a positive integer
  • each scanning line 30 sequentially outputs scanning signals, that is, when the scanning signal of one scanning line 30 is high, the scanning signals on the remaining scanning lines 30 are all low.
  • m is 6; the control terminals of the six switching elements 41 in each multiplexing module 40 are connected to the first multiple Multiplexed signal MUX1, second multiplexed signal MUX2, third multiplexed signal MUX3, fourth multiplexed signal MUX4, fifth multiplexed signal MUX5, sixth multiplexed signal MUX6 ;
  • the first multiplexed signal MUX1, the second multiplexed signal MUX2, the third multiplexed signal MUX3, the fourth multiplexed signal MUX4, and the fifth multiplexed signal sequentially generate a high potential pulse.
  • the output terminals of the two switching elements 41 connected to the first multiplexing signal MUX1 are electrically connected to the first column and the The four columns of data lines 20 are connected to the second multiplex signal MUX2.
  • the output ends of the two switch elements 41 are electrically connected to the data lines 20 of the fifth and second columns, respectively, to be connected to the third multiplexer.
  • the output ends of the two switching elements 41 of the signal MUX3 are electrically connected to the data lines 20 of the third and sixth columns, respectively, and the output ends of the two switching elements 41 of the fourth multiplex signal MUX4 are electrically connected respectively
  • the data lines 20 in the seventh and tenth columns are connected to the output ends of the two switching elements 41 of the fifth multiplex signal MUX5, respectively, electrically connected to the data lines 20 in the eleventh and eighth columns, and connected to the
  • the output ends of the two switch elements 41 of the six multiplexed signal MUX6 are electrically connected to the data lines 20 of the 9th and 12th columns, respectively, and are electrically connected to the data lines 20 of the first column and the data of the second column.
  • the two switch elements 41 of the line 20 are located in different multiplexing modules 40, and the two switch elements 41 electrically connected to the seventh column data line 20 and electrically connected to the eighth column data line 20 are located in different multiplexers. Module 40.
  • the pulse widths of the high potential pulses generated by the first multiplexed signal MUX1, the second multiplexed signal MUX2, and the third multiplexed signal MUX3 are equal
  • the pulse widths of the high potential pulses generated by the fourth multiplex signal MUX4, the fifth multiplex signal MUX5, and the sixth multiplex signal MUX6 are equal
  • the first multiplex signal MUX1 generates
  • the pulse width of the high-potential pulse of is smaller than the pulse width of the high-potential pulse generated by the fourth multiplexing signal MUX4.
  • the first multiplexed signal MUX1, the second multiplexed signal MUX2, and the third multiplexed signal MUX3 generate high
  • the pulse width of the potential pulse is smaller than the pulse of the high potential pulse generated by the fourth multiplex signal MUX4, the fifth multiplex signal MUX5, and the sixth multiplex signal MUX6, thereby increasing the fourth multiplex signal
  • the charge time of the sub-pixel 10 corresponding to the signal MUX4, the fifth multiplexed signal MUX5, and the sixth multiplexed signal MUX6 can make up for the insufficient charge of the sub-pixel 10 after charging in the prior art, and improve the charge of the sub-pixel 10 Uniformity eliminates the streak of the picture displayed on the display panel and improves the display quality.
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal MUX1, the second multiplexed signal MUX2, and the third multiplexed signal MUX3 sequentially increase, and the The pulse widths of the high-potential pulses generated by the four-multiplexed signal MUX4, the fifth-multiplexed signal MUX5, and the sixth-multiplexed signal MUX6 are equal, and the high-potential pulses generated by the third multiplexed signal MUX3
  • the pulse width of is smaller than the pulse width of the high-potential pulse generated by the fourth multiplexing signal MUX4.
  • the pulse width of the high-potential pulse generated by the first multiplexed signal MUX1, the second multiplexed signal MUX2, and the third multiplexed signal MUX3 is less than The fourth multiplexed signal MUX4, the fifth multiplexed signal MUX5, and the sixth multiplexed signal MUX6 generate high-potential pulse pulses, and the first multiplexed signal MUX1, the second multiplexed signal
  • the pulse widths of the high-potential pulses generated by the multiplexed signal MUX2 and the third multiplexed signal MUX3 are successively increased, thereby increasing the charging time of the post-charged sub-pixel 10 and making up for the charging of the post-charged sub-pixel 10 in the prior art Insufficient, the charging uniformity of the sub-pixels 10 is improved, the streak feeling of the picture displayed by the display panel is eliminated, and the display quality is improved.
  • the first multiplexed signal MUX1, the second multiplexed signal MUX2, and the third multiplexed signal MUX3 generate high
  • the pulse widths of the potential pulses are equal
  • the pulse widths of the high potential pulses generated by the fourth multiplexed signal MUX4, the fifth multiplexed signal MUX5, and the sixth multiplexed signal MUX6 increase in turn
  • the first The pulse width of the high potential pulse generated by the three-multiplexed signal MUX3 is smaller than the pulse width of the high potential pulse generated by the fourth multiplexed signal MUX4.
  • the pulse width of the high-potential pulse generated by the first multiplexed signal MUX1, the second multiplexed signal MUX2, and the third multiplexed signal MUX3 is less than
  • the fourth multiplexed signal MUX4, the fifth multiplexed signal MUX5, and the sixth multiplexed signal MUX6 generate high-potential pulses, and the fourth multiplexed signal MUX4, the fifth multiplexed signal
  • the pulse widths of the high-potential pulses generated by the multiplexed signal MUX5 and the sixth multiplexed signal MUX6 are successively increased, thereby increasing the charging time of the post-charged sub-pixel 10 and making up for the post-charged sub-pixel 10 in the prior art
  • the insufficient charging of the sub-pixel 10 improves the charging uniformity of the sub-pixel 10, eliminates the streak feeling of the picture displayed on the display panel, and improves the display quality.
  • the first multiplexed signal MUX1, the second multiplexed signal MUX2, the third multiplexed signal MUX3, and the fourth The pulse widths of the high-potential pulses generated by the multiplexed signal MUX4, the fifth multiplexed signal MUX5, and the sixth multiplexed signal MUX6 sequentially increase.
  • the first multiplexed signal MUX1, the second multiplexed signal MUX2, the third multiplexed signal MUX3, and the fourth multiplexed signal The pulse widths of the high-potential pulses generated by the signal MUX4, the fifth multiplexed signal MUX5, and the sixth multiplexed signal MUX6 are successively increased, thereby increasing the charging time of the post-charged sub-pixels 10 and making up for the latter in the prior art.
  • the charging of the charged sub-pixel 10 is insufficient, which improves the uniformity of charging of the sub-pixel 10, eliminates the streak feeling of the picture displayed by the display panel, and improves the display quality.
  • m is 3; the control ends of the three switching elements 41 in each multiplexing module 40 are respectively connected to the first multiplexing The signal MUX1', the second multiplexed signal MUX2', and the third multiplexed signal MUX3'.
  • the first multiplexed signal MUX1', the second multiplexed signal MUX2' and the third multiplexed signal MUX3' sequentially generate a high potential pulse
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal MUX1', the second multiplexed signal MUX2', and the third multiplexed signal MUX3' sequentially increase.
  • the output ends of the two switch elements 41 connected to the first multiplexed signal MUX1' are electrically connected to the data lines 20 of the first and fourth columns, respectively, and connected to the second multiplexed signal MUX2'.
  • the output terminals of the two switching elements 41 are respectively electrically connected to the data lines 20 in the fifth and second columns, and the output terminals of the two switching elements 41 connected to the third multiplex signal MUX3' are electrically connected to the third
  • the two switching elements 41 that are electrically connected to the data line 20 of the first column and the data line 20 of the second column are located in different multiplexing modules 40.
  • the high potential generated by the first multiplexed signal MUX1', the second multiplexed signal MUX2', and the third multiplexed signal MUX3' is set
  • the pulse width of the pulse is increased sequentially, thereby increasing the charging time of the post-charged sub-pixel 10, making up for the insufficient charging of the post-charged sub-pixel 10 in the prior art, improving the charging uniformity of the sub-pixel 10, and eliminating the picture displayed on the display panel
  • the striped sense enhances the display quality.
  • m is 2; the control ends of the two switching elements 41 in each multiplexing module 40 are respectively connected to the first multiplexing Signal MUX1" and second multiplexed signal MUX2";
  • the first multiplexed signal MUX1" and the second multiplexed signal MUX2" sequentially generate a high-potential pulse, the first multiplexed signal
  • the pulse width of the high-potential pulse generated by the signal MUX1" is smaller than the pulse width of the high-potential pulse generated by the second multiplexed signal MUX2".
  • the output ends of the two switch elements 41 connected to the first multiplexed signal MUX1" are electrically connected to the data lines 20 in the first and third columns, respectively, and connected to the second multiplexed signal MUX2'
  • the output ends of the two switching elements 41 are electrically connected to the data lines 20 in the second and fourth columns, respectively.
  • the pulse widths of the high-potential pulses generated by the first multiplexed signal MUX1'' and the second multiplexed signal MUX2'' are set to increase sequentially. This increases the charging time of the post-charged sub-pixel 10, makes up for the insufficient charging of the post-charged sub-pixel 10 in the prior art, improves the charging uniformity of the sub-pixel 10, eliminates the streak feeling of the picture displayed by the display panel, and improves the display quality.
  • the present invention provides a method for driving a display panel.
  • a plurality of multiplexed signals are set to sequentially generate a high potential pulse according to a preset sequence, and scan in the same line.
  • the several high-potential pulses generated by the several multiplexed signals have at least two different pulse widths, and the high-potential pulses with larger pulse widths are generated after the high-potential pulses with smaller pulse widths, thereby increasing
  • the pulse width of the high-potential pulse generated after it is large increases the charging effect of the sub-pixels, eliminates the streak feeling of the picture displayed by the display panel, and improves the display quality.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板的驱动方法，其设置在每一个行扫描周期内，数个多路复用信号依照预设顺序依次产生一个高电位脉冲，且在同一个行扫描周期内，数个多路复用信号产生的数个高电位脉冲具有至少两种不同的脉冲宽度，且脉冲宽度大的高电位脉冲比脉冲宽度小的高电位脉冲后产生，从而通过增大后产生的高电位脉冲的脉冲宽度，提升子像素的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。

Description

显示面板的驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种显示面板的驱动方法。
 背景技术
随着显示技术的发展，液晶显示装置（Liquid Crystal Display，LCD）等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，已经逐步取代阴极射线管（Cathode Ray Tube，CRT）显示屏，被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示装置，其包括液晶显示面板及背光模组（backlight module）。液晶显示面板的工作原理是在薄膜晶体管阵列基板（Thin Film Transistor Array Substrate，TFT Array Substrate）与彩膜（Color Filter，CF）基板之间灌入液晶分子，并在两片基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
在传统的液晶显示装置的驱动架构中，一个像素电极上分别有一条数据线Data line和一条扫描线Gate line，这种做法可以很好地控制每条扫描线上栅极的打开及每条数据线上数据的输入，但是，随着液晶显示面板的解析度的增加和分辨率的增加，数据线及扫描线的条数也会增加，随之带来数据线的扇出走线所占区域的面积增加，从而影响穿透率及显示效果。为解决这一问题，多路复用的驱动架构得到了广泛的应用，例如1to2、1to3及1to6 De-mux驱动架构等，以1to6 De-mux驱动架构为例，所谓1to6 De-mux驱动架构是指采用分时复用的原理利用一个数据信号为6列像素进行充电的技术。请参阅图1，现有的一种1to6 Dex-mux驱动架构的显示面板包括多个驱动单元。每一驱动单元包括呈多行4列排布的多个像素100、12条数据线200、多条扫描线300及多路复用模块400。每一像素100包括排成一行的三个子像素110，该三个子像素110依次为红色子像素r、绿色子像素g及蓝色子像素b，多个像素100的子像素110排成多行12列，同一列子像素110的颜色相同，一条数据线200对应与一列子像素110，一条扫描线300对应与一行子像素110连接。多路复用模块400包括分别与12列子像素110对应的12个薄膜晶体管T10，12个薄膜晶体管T10的漏极分别连接对应一列子像素110所连接的数据线200，与奇数列子像素110对应的薄膜晶体管T10的源极均接入第N条数据信号DN，N为正整数，与偶数列子像素110对应的薄膜晶体管T10的源极均接入第N+1条数据信号DN+1，第1及第2列像素100中的红色子像素r对应的薄膜晶体管T10的栅极接入第一复用信号MUX10，第1及第2列像素100中的绿色子像素g对应的薄膜晶体管T10的栅极接入第二复用信号MUX20，第1及第2列像素100中的蓝色子像素b对应的薄膜晶体管T10的栅极接入第三复用信号MUX30，第3列及第4列像素100中的红色子像素r对应的薄膜晶体管T10的栅极接入第四复用信号MUX40，第3列及第4列像素100中的绿色子像素g对应的薄膜晶体管T10的栅极接入第五复用信号MUX50，第3列及第4列像素100中的蓝色子像素b对应的薄膜晶体管T10的栅极接入第六复用信号MUX60。
该显示面板进行驱动时包括依次进行的多个帧周期，每一帧周期包括多个依次进行的多个行周期，多条扫描线300依次在多个行周期中为高电平，请参阅图2，在每一个行周期内，第一复用信号MUX10、第二复用信号MUX20、第三复用信号MUX30、第四复用信号MUX40、第五复用信号MUX50及第六复用信号MUX60依次产生一高电平脉冲，以将对应的薄膜晶体管T10打开向对应的子像素110中传输数据信号。此种驱动方式能够减少数据线扇出走线所占空间的面积以实现窄边框，然而，现有技术中，在对每一个帧周期中的每一个行周期扫描时，多个子像素110的充电顺序均为：先充电第1列及第2列像素100，后充电第3列及第4列像素100，在像素充电不足及公共电压出现波动时，先被充电的像素100的显示效果要好于后被充电的像素100的显示效果，最终在实际显示时会导致如图3所示的第1列及第2列像素100与第3列及第4列像素100之间产生明显的亮度差异，进而在显示面板显示的画面上出现条纹感，影响显示的效果。
 技术问题
本发明的目的在于提供一种显示面板的驱动方法，能够消除显示面板显示的画面的条纹感，提升显示品质。
 技术解决方案
本发明的目的还在于一种显示面板的驱动方法，包括如下步骤：
步骤 S1 、提供显示面板；
所述显示面板包括依次排列的多个驱动单元；每一驱动单元包括呈多行2m列排布的多个子像素、2m条数据线、及两个多路复用模块；一列子像素对应连接一条数据线；每一多路复用模块均包括m个开关元件，每一多路复用模块中的m个开关元件分别接入m个多路复用信号；两个多路复用模块中的一个的m个开关元件的输入端均接入第n个数据信号，两个多路复用模块中的另一个的m个开关元件的输入端均接入第n+1个数据信号；两个多路复用模块中的2m个开关元件的输出端分别电性连接所述2m条数据线，m为大于1的正整数，n为正整数；
步骤S2、对所述多个子像素进行行扫描，在每一个行扫描周期内，所述m个多路复用信号依照预设顺序依次产生一个高电位脉冲，且在同一个行扫描周期内，所述m个多路复用信号产生的m个高电位脉冲具有至少两种不同的脉冲宽度，且脉冲宽度大的高电位脉冲比脉冲宽度小的高电位脉冲后产生。
其中，m为6；每一多路复用模块中的6个开关元件的控制端分别接入第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号；
在每一个行扫描周期内，第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号依次产生一个高电位脉冲。
所述第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第一多路复用信号产生的高电位脉冲的脉冲宽度小于第四多路复用信号产生的高电位脉冲的脉冲宽度。
第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度依次增大，所述第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第三多路复用信号产生的高电位脉冲的脉冲宽度小于第四多路复用信号产生的高电位脉冲的脉冲宽度。
所述第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度依次增大，所述第三多路复用信号产生的高电位脉冲的脉冲宽度小于第四多路复用信号产生的高电位脉冲的脉冲宽度。
所述第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度依次增大。
其中，m为3；每一多路复用模块中的3个开关元件的控制端分别接入第一多路复用信号、第二多路复用信号及第三多路复用信号；
在每一个行扫描周期内，第一多路复用信号、第二多路复用信号及第三多路复用信号依次产生一个高电位脉冲；
所述第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度依次增大。
其中，m为2；每一多路复用模块中的2个开关元件的控制端分别接入第一多路复用信号和第二多路复用信号；
在每一个行扫描周期内，第一多路复用信号及第二多路复用信号依次产生一个高电位脉冲，所述第一多路复用信号产生的高电位脉冲的脉冲宽度小于第二多路复用信号产生的高电位脉冲的脉冲宽度。
所述开关元件为薄膜晶体管，开关元件的控制端为薄膜晶体管的栅极，开关元件的输入端为薄膜晶体管的源极，开关元件的输出端为薄膜晶体管的漏极。
所述驱动单元还包括多条扫描线；一行子像素对应连接一条扫描线。
 有益效果
本发明的有益效果：本发明提供一种显示面板的驱动方法，通过在每一个行扫描周期内，设置数个多路复用信号依照预设顺序依次产生一个高电位脉冲，且在同一个行扫描周期内，所述数个多路复用信号产生的数个高电位脉冲具有至少两种不同的脉冲宽度，且脉冲宽度大的高电位脉冲比脉冲宽度小的高电位脉冲后产生，从而通过增大后产生的高电位脉冲的脉冲宽度，提升子像素的充电效果，消除显示面板显示的画面的条纹感，提升显示品质。
 附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的一种1to6 Dex-mux驱动架构的显示面板的结构示意图；
图2为图1所示的显示面板的驱动时序图；
图3为图1所示的显示面板的显示效果图；
图4为本发明的显示面板的驱动方法的流程图；
图5为本发明的显示面板的驱动方法中显示面板第一种结构图；
图6为本发明的显示面板的驱动方法的第一实施例的时序图；
图7为本发明的显示面板的驱动方法的第二实施例的时序图；
图8为本发明的显示面板的驱动方法的第三实施例的时序图；
图9为本发明的显示面板的驱动方法的第四实施例的时序图；
图10为本发明的显示面板的驱动方法中显示面板第二种结构图；
图11为本发明的显示面板的驱动方法的第五实施例的时序图；
图12为本发明的显示面板的驱动方法中显示面板第四种结构图；
图13为本发明的显示面板的驱动方法的第六实施例的时序图。
 本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图4，本发明一种显示面板的驱动方法，包括如下步骤：
步骤S1、提供显示面板；
所述显示面板包括依次排列的多个驱动单元；每一驱动单元包括呈多行2m列排布的多个子像素10、2m条数据线20、及两个多路复用模块40；一列子像素10对应连接一条数据线20；每一多路复用模块40均包括m个开关元件41，每一多路复用模块40中的m个开关元件41分别接入m个多路复用信号；两个多路复用模块40中的一个的m个开关元件41的输入端均接入第n个数据信号Dn，两个多路复用模块40中的另一个的m个开关元件41的输入端均接入第n+1个数据信号Dn+1；两个多路复用模块40中的2m个开关元件41的输出端分别电性连接所述2m条数据线20，m为大于1的正整数，n为正整数；
步骤S2、对所述多个子像素10进行行扫描，在每一个行扫描周期内，所述m个多路复用信号依照预设顺序依次产生一个高电位脉冲，且在同一个行扫描周期内，所述m个多路复用信号产生的m个高电位脉冲具有至少两种不同的脉冲宽度，且脉冲宽度大的高电位脉冲比脉冲宽度小的高电位脉冲后产生。
具体地，所述显示面板为液晶显示面板或OLED显示面板。
具体地，每一行子像素10均包括依次重复排列的红色子像素R、绿色子像素G及蓝色子像素B，同一列的子像素10的颜色相同。
具体地，所述开关元件41为薄膜晶体管T1，开关元件41的控制端为薄膜晶体管T1的栅极，开关元件41的输入端为薄膜晶体管T1的源极，开关元件41的输出端为薄膜晶体管T1的漏极。
进一步地，所述每一驱动单元还包括多条扫描线30；一行子像素10对应连接一条扫描线30，第m条扫描线30输出第m个扫描信号Gm，以对第m行子像素11进行扫描，m为正整数，各条扫描线30按照顺序依次输出扫描信号，也即当一条扫描线30的扫描信号为高电位时，其余扫描线30上的扫描信号均为低电位。
具体地，如图5所示，在本发明的第一至第四实施例中，m为6；每一多路复用模块40中的6个开关元件41的控制端分别接入第一多路复用信号MUX1、第二多路复用信号MUX2、第三多路复用信号MUX3、第四多路复用信号MUX4、第五多路复用信号MUX5、第六多路复用信号MUX6；
在每一个行扫描周期内，第一多路复用信号MUX1、第二多路复用信号MUX2、第三多路复用信号MUX3、第四多路复用信号MUX4、第五多路复用信号MUX5、第六多路复用信号MUX6依次产生一个高电位脉冲。
具体地，如图5所示，在本发明的第一至第四实施例中，接入第一多路复用信号MUX1的两个开关元件41的输出端分别电性连接第1列及第4列的数据线20，接入第二多路复用信号MUX2的两个开关元件41的输出端分别电性连接第5列及第2列的数据线20，接入第三多路复用信号MUX3的两个开关元件41的输出端分别电性连接第3列及第6列的数据线20，接入第四多路复用信号MUX4的两个开关元件41的输出端分别电性连接第7列及第10列的数据线20，接入第五多路复用信号MUX5的两个开关元件41的输出端分别电性连接第11列及第8列的数据线20，接入第六多路复用信号MUX6的两个开关元件41的输出端分别电性连接第9列及第12列的数据线20，且电性连接第1列数据线20及电性连接第2列数据线20的两个开关元件41位于不同的多路复用模块40，电性连接第7列数据线20及电性连接第8列数据线20的两个开关元件41位于不同的多路复用模块40。
具体地，在本发明的第一实施例中，所述第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度相等，所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲宽度相等，所述第一多路复用信号MUX1产生的高电位脉冲的脉冲宽度小于第四多路复用信号MUX4产生的高电位脉冲的脉冲宽度。
需要说明的是，如图6所示，本发明的第一实施例，通过设置第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度小于所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲，从而增加第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6对应的子像素10的充电时间，弥补现有技术中后充电的子像素10的充电不足，提升子像素10的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。
具体地，如图7所示，第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度依次增大，所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲宽度相等，所述第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度小于第四多路复用信号MUX4产生的高电位脉冲的脉冲宽度。
需要说明的是，本发明的第二实施例，通过设置第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度小于所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲，且第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度依次增大，从而增加后充电的子像素10的充电时间，弥补现有技术中后充电的子像素10的充电不足，提升子像素10的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。
具体地，如图8所示，在本发明的第三实施例中，所述第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度相等，所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲宽度依次增大，所述第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度小于第四多路复用信号MUX4产生的高电位脉冲的脉冲宽度。
需要说明的是，本发明的第三实施例，通过设置第一多路复用信号MUX1、第二多路复用信号MUX2及第三多路复用信号MUX3产生的高电位脉冲的脉冲宽度小于所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲，且所述第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲宽度依次增大，从而增加后充电的子像素10的充电时间，弥补现有技术中后充电的子像素10的充电不足，提升子像素10的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。
具体地，如图9所示，在本发明的第四实施例中，所述第一多路复用信号MUX1、第二多路复用信号MUX2、第三多路复用信号MUX3、第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲宽度依次增大。
需要说明的是，本发明的第四实施例，通过设置所述第一多路复用信号MUX1、第二多路复用信号MUX2、第三多路复用信号MUX3、第四多路复用信号MUX4、第五多路复用信号MUX5及第六多路复用信号MUX6产生的高电位脉冲的脉冲宽度依次增大，从而增加后充电的子像素10的充电时间，弥补现有技术中后充电的子像素10的充电不足，提升子像素10的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。
具体地，如图10所示，在本发明的第五实施例中，m为3；每一多路复用模块40中的3个开关元件41的控制端分别接入第一多路复用信号MUX1’、第二多路复用信号MUX2’及第三多路复用信号MUX3’。
在每一个行扫描周期内，第一多路复用信号MUX1’、第二多路复用信号MUX2’及第三多路复用信号MUX3’依次产生一个高电位脉冲；
如图11所示，所述第一多路复用信号MUX1’、第二多路复用信号MUX2’及第三多路复用信号MUX3’产生的高电位脉冲的脉冲宽度依次增大。
其中，接入第一多路复用信号MUX1’的两个开关元件41的输出端分别电性连接第1列及第4列的数据线20，接入第二多路复用信号MUX2’的两个开关元件41的输出端分别电性连接第5列及第2列的数据线20，接入第三多路复用信号MUX3’的两个开关元件41的输出端分别电性连接第3列及第6列的数据线20，且电性连接第1列数据线20及电性连接第2列数据线20的两个开关元件41位于不同的多路复用模块40。
需要说明的是，本发明的第五实施例，通过设置所述第一多路复用信号MUX1’、第二多路复用信号MUX2’、第三多路复用信号MUX3’产生的高电位脉冲的脉冲宽度依次增大，从而增加后充电的子像素10的充电时间，弥补现有技术中后充电的子像素10的充电不足，提升子像素10的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。
具体地，如图12所示，在本发明的第六实施例中，m为2；每一多路复用模块40中的2个开关元件41的控制端分别接入第一多路复用信号MUX1’’和第二多路复用信号MUX2’’；
如图13所示，在每一个行扫描周期内，第一多路复用信号MUX1’’及第二多路复用信号MUX2’’依次产生一个高电位脉冲，所述第一多路复用信号MUX1’’产生的高电位脉冲的脉冲宽度小于第二多路复用信号MUX2’’产生的高电位脉冲的脉冲宽度。
其中，接入第一多路复用信号MUX1’’的两个开关元件41的输出端分别电性连接第1列及第3列的数据线20，接入第二多路复用信号MUX2’’的两个开关元件41的输出端分别电性连接第2列及第4列的数据线20。
需要说明的是，本发明的第六实施例，通过设置所述第一多路复用信号MUX1’’、第二多路复用信号MUX2’’产生的高电位脉冲的脉冲宽度依次增大，从而增加后充电的子像素10的充电时间，弥补现有技术中后充电的子像素10的充电不足，提升子像素10的充电均一性，消除显示面板显示的画面的条纹感，提升显示品质。
综上所述，本发明提供一种显示面板的驱动方法，通过在每一个行扫描周期内，设置数个多路复用信号依照预设顺序依次产生一个高电位脉冲，且在同一个行扫描周期内，所述数个多路复用信号产生的数个高电位脉冲具有至少两种不同的脉冲宽度，且脉冲宽度大的高电位脉冲比脉冲宽度小的高电位脉冲后产生，从而通过增大后产生的高电位脉冲的脉冲宽度，提升子像素的充电效果，消除显示面板显示的画面的条纹感，提升显示品质。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种显示面板的驱动方法，包括如下步骤：
    步骤S1、提供显示面板；
    所述显示面板包括依次排列的多个驱动单元；每一驱动单元包括呈多行2m列排布的多个子像素、2m条数据线、及两个多路复用模块；一列子像素对应连接一条数据线；每一多路复用模块均包括m个开关元件，每一多路复用模块中的m个开关元件分别接入m个多路复用信号；两个多路复用模块中的一个的m个开关元件的输入端均接入第n个数据信号，两个多路复用模块中的另一个的m个开关元件的输入端均接入第n+1个数据信号；两个多路复用模块中的2m个开关元件的输出端分别电性连接所述2m条数据线，m为大于1的正整数，n为正整数；
    步骤S2、对所述多个子像素进行行扫描，在每一个行扫描周期内，所述m个多路复用信号依照预设顺序依次产生一个高电位脉冲，且在同一个行扫描周期内，所述m个多路复用信号产生的m个高电位脉冲具有至少两种不同的脉冲宽度，且脉冲宽度大的高电位脉冲比脉冲宽度小的高电位脉冲后产生。
  2. 如权利要求1所述的显示面板的驱动方法，其中，m为6；每一多路复用模块中的6个开关元件的控制端分别接入第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号；
    在每一个行扫描周期内，第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号依次产生一个高电位脉冲。
  3. 如权利要求2所述的显示面板的驱动方法，其中，所述第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第一多路复用信号产生的高电位脉冲的脉冲宽度小于第四多路复用信号产生的高电位脉冲的脉冲宽度。
  4. 如权利要求2所述的显示面板的驱动方法，其中，第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度依次增大，所述第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第三多路复用信号产生的高电位脉冲的脉冲宽度小于第四多路复用信号产生的高电位脉冲的脉冲宽度。
  5. 如权利要求2所述的显示面板的驱动方法，其中，所述第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度相等，所述第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度依次增大，所述第三多路复用信号产生的高电位脉冲的脉冲宽度小于第四多路复用信号产生的高电位脉冲的脉冲宽度。
  6. 如权利要求2所述的显示面板的驱动方法，其中，所述第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号及第六多路复用信号产生的高电位脉冲的脉冲宽度依次增大。
  7. 如权利要求1所述的显示面板的驱动方法，其中，m为3；每一多路复用模块中的3个开关元件的控制端分别接入第一多路复用信号、第二多路复用信号及第三多路复用信号；
    在每一个行扫描周期内，第一多路复用信号、第二多路复用信号及第三多路复用信号依次产生一个高电位脉冲；
    所述第一多路复用信号、第二多路复用信号及第三多路复用信号产生的高电位脉冲的脉冲宽度依次增大。
  8. 如权利要求1所述的显示面板的驱动方法，其中，m为2；每一多路复用模块中的2个开关元件的控制端分别接入第一多路复用信号和第二多路复用信号；
    在每一个行扫描周期内，第一多路复用信号及第二多路复用信号依次产生一个高电位脉冲，所述第一多路复用信号产生的高电位脉冲的脉冲宽度小于第二多路复用信号产生的高电位脉冲的脉冲宽度。
  9. 如权利要求1所述的显示面板的驱动方法，其中，所述开关元件为薄膜晶体管，开关元件的控制端为薄膜晶体管的栅极，开关元件的输入端为薄膜晶体管的源极，开关元件的输出端为薄膜晶体管的漏极。
  10. 如权利要求1所述的显示面板的驱动方法，其中，所述驱动单元还包括多条扫描线；一行子像素对应连接一条扫描线。
PCT/CN2019/085760 2019-03-18 2019-05-07 显示面板的驱动方法 Ceased WO2020186605A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910205042.1 2019-03-18
CN201910205042.1A CN109754769A (zh) 2019-03-18 2019-03-18 显示面板的驱动方法

Publications (1)

Publication Number Publication Date
WO2020186605A1 true WO2020186605A1 (zh) 2020-09-24

Family

ID=66409007

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/085760 Ceased WO2020186605A1 (zh) 2019-03-18 2019-05-07 显示面板的驱动方法

Country Status (2)

Country Link
CN (1) CN109754769A (zh)
WO (1) WO2020186605A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111028804B (zh) * 2019-12-19 2021-10-26 福建华佳彩有限公司 一种Demux驱动方法
CN110992911B (zh) * 2019-12-26 2021-06-15 华为技术有限公司 显示面板的驱动方法和显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7956554B2 (en) * 2007-09-21 2011-06-07 Exclara, Inc. System and method for regulation of solid state lighting
CN107797711A (zh) * 2016-08-31 2018-03-13 乐金显示有限公司 触摸显示装置及其操作方法
CN109036280A (zh) * 2017-06-09 2018-12-18 京东方科技集团股份有限公司 显示面板的驱动方法及驱动电路和显示装置
CN109308882A (zh) * 2018-11-28 2019-02-05 武汉华星光电技术有限公司 显示面板的驱动方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102275693B1 (ko) * 2014-12-22 2021-07-09 엘지디스플레이 주식회사 선택회로 및 이를 구비한 표시장치
CN106297708A (zh) * 2016-09-08 2017-01-04 武汉华星光电技术有限公司 一种降低液晶显示面板显示不均的方法
CN108182915A (zh) * 2017-12-28 2018-06-19 深圳市华星光电技术有限公司 多路复用型显示驱动电路
CN107993629B (zh) * 2018-01-31 2020-05-29 武汉华星光电技术有限公司 液晶显示装置的驱动方法
CN108615495B (zh) * 2018-04-27 2019-08-02 深圳市华星光电半导体显示技术有限公司 一种多路复用型驱动电路以及驱动方法、显示设备
CN109346021A (zh) * 2018-11-28 2019-02-15 武汉华星光电技术有限公司 显示面板的驱动方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7956554B2 (en) * 2007-09-21 2011-06-07 Exclara, Inc. System and method for regulation of solid state lighting
CN107797711A (zh) * 2016-08-31 2018-03-13 乐金显示有限公司 触摸显示装置及其操作方法
CN109036280A (zh) * 2017-06-09 2018-12-18 京东方科技集团股份有限公司 显示面板的驱动方法及驱动电路和显示装置
CN109308882A (zh) * 2018-11-28 2019-02-05 武汉华星光电技术有限公司 显示面板的驱动方法

Also Published As

Publication number Publication date
CN109754769A (zh) 2019-05-14

Similar Documents

Publication Publication Date Title
US10861396B2 (en) Driving method of a display panel
CN108831399B (zh) 显示驱动方法及液晶显示装置
US9224348B2 (en) Liquid crystal display
CN107993629B (zh) 液晶显示装置的驱动方法
CN101726896B (zh) 液晶显示器
US11475857B2 (en) Array substrate and display device
US8054267B2 (en) Liquid crystal display with sub-pixel zones and method for driving same
US12021088B2 (en) Array substrate, display apparatus and drive method therefor
WO2020107585A1 (zh) 显示面板的驱动方法
US20050041006A1 (en) Liquid crystal display apparatus and driving method thereof
US10861367B2 (en) Drive method for display panel
CN106531096A (zh) Rgbw四基色显示面板的驱动方法
KR20110064114A (ko) 액정표시장치
US10789894B2 (en) Drive method for display panel
CN101581864A (zh) 液晶显示面板及其像素驱动方法
KR20170076785A (ko) 어레이 기판, 액정 패널 및 액정 디스플레이 기기
WO2017088268A1 (zh) 具有数据线共享架构的阵列基板
CN105954949B (zh) 一种阵列基板及液晶面板
WO2017152462A1 (zh) 液晶显示面板驱动方法及液晶显示面板驱动系统
CN110349550A (zh) 像素驱动方法及其电路、和显示装置
CN113990251A (zh) 显示基板及其驱动方法、显示装置
US10290274B2 (en) Array substrate
US20090251403A1 (en) Liquid crystal display panel
WO2020186605A1 (zh) 显示面板的驱动方法
US10861368B2 (en) Driving method for display panel

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19920597

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19920597

Country of ref document: EP

Kind code of ref document: A1