WO2020175490A1

WO2020175490A1 - Radio access network and methods

Info

Publication number: WO2020175490A1
Application number: PCT/JP2020/007528
Authority: WO
Inventors: Kamel M. Shaheen
Original assignee: Sharp Kabushiki Kaisha; FG Innovation Company Limited
Priority date: 2019-02-27
Filing date: 2020-02-25
Publication date: 2020-09-03

Abstract

In a radio access network (24) wherein a protocol stack is split between anchor processor circuitry (40) and distributed processor circuitry (42). The anchor processor circuitry (40) is configured to perform high layer radio access network node operations (50) for a connection with a wireless terminal. The distributed processor circuitry (42) is configured to perform low layer radio access network node operations (51) for the connection with the wireless terminal (30) and to utilize the context as used by the anchor processor circuitry (40). The anchor processor circuitry (40) is configured to provide at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint. The anchor processor circuitry 40 may also provide an anchor processing circuitry tunnel second endpoint for dedicated use in lieu of the anchor processing circuitry tunnel first endpoint.

Description

Title of Invention: RADIO ACCESS NETWORK AND METHODS

Technical Field

[0001] The technology relates to wireless communications, and particularly to radio access network architecture and operation.

Background Art

[0002] A radio access network typically resides between wireless devices, such as user

equipments (UEs), mobile phones, mobile stations, or any other device having wireless termination, and a core network. Example of radio access network types includes the GRAN, GSM radio access network; the GERAN, which includes EDGE packet radio services; UTRAN, the UMTS radio access network; E-UTRAN, which includes Long- Term Evolution; and g-UTRAN, the New Radio (NR).

[0003] A radio access network may comprise one or more access nodes, such as base station nodes, which facilitate wireless communication or otherwise provides an interface between a wireless terminal and a telecommunications system. A non-limiting example of a base station can include, depending on radio access technology type, a Node B (“NB”), an enhanced Node B (“eNB”), a home eNB (“HeNB”), a gNB (for a New Radio [“NR”] technology system), or some other similar terminology.

[0004] The 3rd Generation Partnership Project (“3GPP”) is a group that, e.g., develops col laboration agreements such as 3GPP standards that aim to define globally applicable technical specifications and technical reports for wireless communication systems. Various 3GPP documents may describe certain aspects of radio access networks.

Overall architecture for a fifth generation system, e.g., the 5G System, also called “NR” or“New Radio”, as well as“NG” or“Next Generation”, is shown in Fig. 1, and is also described in 3GPP TS 38.300. The 5G NR network is comprised of NG RAN (Next Generation Radio Access Network) and 5GC (5G Core Network). As shown, NGRAN is comprised of gNBs (e.g., 5G Base stations) and ng-eNBs (i.e. LTE base stations). An Xn interface exists between gNB-gNB, between (gNB)-(ng-eNB), and between (ng-eNB)-(ng-eNB). The Xn is the network interface between NG-RAN nodes. Xn-U stands for Xn User Plane interface and Xn-C stands for Xn Control Plane interface. ANG interface exists between 5GC and the base stations (i.e. gNB & ng- eNB). A gNB node provides NR user plane and control plane protocol terminations towards the UE, and is connected via the NG interface to the 5GC. The 5G NR (New Radio) gNB is connected to AMF (Access and Mobility Management Function) and UPF (User Plane Function) in 5GC (5G Core Network). The protocol layers are mapped into three units: RRH (Remote Radio Head), DU (Distributed Unit) and CU WO 2020/175490 PCT/JP2020/007528

(Central Unit) as shown in Fig. 2. Fig. 2 also shows the user plane (UP) protocol stack for New Radio and the control plane (CP) protocol stack for New Radio.

[0005] In contrast to classical network architecture, Network Functions Virtualizations, ab breviated as NFV, aims to consolidate many network equipment types onto industry standard high volume servers, switches and storage, which could be located in Dat acenters, Network Nodes, and in the end user premises, as illustrated in Fig. 3. NFV involves the implementation of network functions in software that can run on a range of industry standard server hardware, and that can be moved to, or instantiated in, various locations in the network as required, without the need for installation of new equipment. See, e.g.,“Network Functions Virtualizations-Introductory White Paper” (PDF). ETSI. 22 October 2012. Retrieved 20 June 2013. Standard terminology def initions and NVF use cases that act as references for vendors and operators have been published as announced in Mulligan, Ultan.“ETSI Publishes First Specifications for Network Functions Virtualizations” Retrieved 5 December 2013. Fig. 3 particularly shows that radio access network nodes are one of the network elements that may be included in a NFV approach.

[0006] Currently, 3GPP is working on defining new generation networks that utilize

“Network Function Virtualization” or NFV, such as NFV key elements and key re quirements for a fifth generation system, e.g., the 5G System, also called“NR” or “New Radio”, as well as“NG” or“Next Generation”. For example, 3GPP TS 38.913 states that RAN architecture shall allow deployments using Network Function Virtu alization; 3GPP TS 38.801 states that NR shall allow Centralized Unit (CU) de ployment with Network Function virtualization (NFV)’ and, 3GPP TS 38.401 defines a Network Function as "a logical node within a network infrastructure that has well- defined external interfaces and well-defined functional behavior."

[0007] As currently envisioned, Network Function Virtualization (NFV) allows flexibility, such as

flexibility in time and location. In other words, Network Function Virtualization (NFV) allows for assignment of network functions (e.g., logical nodes) dynamically to hardware resources:

• at the most appropriate places,

• of a currently desirable amount,

• as and when needed.

[0008] Network Function Virtualization (NFV) allows flexibility in using hardware

resources, and results in capacity/pooling gains, compared to static allocation of hardware resources to logical nodes. For example, using Network Function Virtu alization (NFV) the same hardware resource can be assigned to several logical nodes at the same time, instead of a single logical node. For a process executed at a node, a certain single process, e.g. an instance of a New Radio Packet Data Convergence Protocol (NR PDCP) entity, can belong to one, and only one, logical RAN node.

However, as soon that single instance of the protocol entity is released (e.g., the NR PDCP protocol entity is released), it can be allocated anew to another logical RAN node. Such a pool of RAN UP protocol entities may be realized in a single physical hardware entity, a central UP entity, and may follow key requirements for 5G system for Network Function Virtualization (NFV).

[0009] For NG-RAN (including all dual- and multi-connectivity scenarios), such a central UP entity would provide UP interface termination points (i.e. NG-U, Xn-U and Fl-U), provide resources for instantiating protocol entities (e.g. GTP-U, SDAP, PDCP), and would provide access to these resources via a control interface towards a logical CP node. The control interface would be the El interface (CP only) in case of gNB-CU. If the gNB-CU is implemented as a single logical node (i.e., no CP-UP split is deployed), then such interface would be internal to the gNB-CU. A possible depiction of CU-UP function virtualization for 5GS and NG-RAN consisting of gNBs is shown in Fig. 4. Fig. 4 shows a Network Function Virtualization (NFV) scheme for 5G New Radio, wherein a shared central unit/user plane entity, CU-UP, is connected across an El interface to plural control plane units, CU-CP_gNB·

[0010] A virtualization such as the type shown in Fig. 4 may be utilized in both mobility and

multi-connectivity scenarios.

For handover and for resumption in a new RAN node: core network internal signalling can be skipped;

• For dual- and multi-connectivity, if the (SDAP/) PDCP entity for a DRB is moved between Master and

Secondary node:

o For 5GS, only a single NG-U tunnel is necessary, as the split towards 2 SDAP entities can be regarded as a UP node internal matter;

o Signalling towards the CN is not necessary at all (this implies that also CN internal signalling can be skipped);

o Any kind of QoS flow or DRB offload between involved RAN nodes would be completely unnoticed, i.e. neither CP- or UP-related changes on the NG interface configuration would be necessary.

[0011] In order to support the above:

For mobility—

• The source node (e.g., CU-CP) needs to inform the target node (e.g., CU-CP) about the possibility of keeping the RAN-CN tunnel and avoid data forwarding. This can be done for example by adding in the handover request message a new optional IE that includes the existing DLTEIDs.

• The target node (e.g., CU-CP) needs to inform the source node (e.g., CU-CP) about the NG-U tunnels that have been successfully kept. This can be done for example by adding in the handover response message a new optional IE that includes the DLTEIDs that have been successfully kept. This is needed for avoiding data forwarding.

• If the target node is split into a CU-CP and a CU-UP, then the corresponding information needs to be added also on the El interface in the bearer context setup request / response messages.

• The target node needs to inform the core network (MME or AMF) that the DL TEIDs have been kept during the handover. This can be done by adding in the path switch request message a new optional IE that informs the AMF on whether the DL TEID tunnel is unchanged. This is needed for avoiding signalling in the core network.

For EN-DC -

• The node that initiates the change of“ownership” of the higher layer UP resources would need to provide a reference to the HL UP resource. Best would be to provide the GTP-U TEID (plus IP address) of the Sl-U termination at the E-UTRAN. This needs to be provided in the respective X2AP procedures;

• This requires certain topology knowledge of the underlying UP resources from the initiating nodes.

While this is already assumed on the RAN-CN UP interface (e.g. the MME knows when to change S-GW in case of inter-RAN node mobility), such knowledge can be also assumed within the E-UTRAN as well;

• The initiating node can still provide suggestions, for which E-RAB data forwarding is suggested. If the peer node is not able to access the offered UP resources, it would behave as if such central UP entity would not exist.

On El, signalling is needed to allow provision of the reference to the offered UP resource. For MR-DC with 5GC -

• With a shared, central UP entity, it is possible to hide MR-DC bearer change / DRB & QoS flow mobility (“offload” related activities from the 5GC

• The QoS flow split between the SDAP entities, which is provided by the UPF in the nominal split, would have to be performed by the central UP entity.

• As long as the interface towards the 5GC is handled as if single NG-U connectivity per PDU Session is configured, there is no effect on already agreed interface principles. The only thing that would need to be added to standard is a description of stage 2 level of this option.

• As shown for EN-DC, even if El is not deployed (as, for now, for an ng-eNB), assuming UP resources that are shared among ng-eNBs and gNBs, such approach is certainly standard compliant.

• The Split of QoS flows would not only need to be communicated between the SN and the MN (this is already foreseen, in principle), but also via El , if deployed. However, if we assume that each logical NG-RAN node configures its SDAP entity, the central UP entity would receive such information anyhow.

• Similar to EN-DC, the NG-U GTP-U TEID and the PDU Session ID can serve as the context reference on Xn and El interfaces.

[0012] However, the foregoing introduces layers and layers of signaling which will ul timately add the delay in session establishment, re-establishment, resume, and ON- OFF operations.

[0013] What is needed are methods, apparatus, and/or techniques to expedite and/or simplify access to a virtualized radio access network.

[0014] In one example, a radio access network comprising: anchor processor circuitry

configured to perform high layer radio access network node operations; distributed processor circuitry configured to perform low layer radio access network node op erations; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with a wireless terminal; wherein the anchor processor circuitry is configured to provide at least one of an architecture in dication information element and an anchor processor circuitry tunnel first endpoint, wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; and wherein the transceiver circuitry is configured to transmit the at least one of the architecture indication information element and the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal.

[0015] In one example, a method in a radio access network comprising: providing anchor processor circuitry configured to perform high layer radio access network node op erations; providing distributed processor circuitry configured to perform low layer radio access network node operations; using the anchor processor circuitry to provide at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint, wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; using transceiver circuitry associated with the distributed processor circuitry to transmit at least one of the architecture indication in formation element and the anchor processor circuitry tunnel first endpoint over a radio interface to a wireless terminal.

[0016] In one example, a wireless terminal which communicates over a radio interface with a radio access network, the wireless terminal comprising: receiver circuitry configured to receive over the radio interface at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint; wherein the ar chitecture indication information element indicates that the radio access network is a virtualized radio access network comprising an anchor processor circuitry and dis tributed processor circuitry, the anchor processor circuitry configured to perform high layer radio access network node operations and the distributed processor circuitry configured to perform low layer radio access network node operations; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; processor circuitry configured to generate a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint; transmitter circuitry configured to transmit the message over the radio interface.

[0017] In one example, a method in a wireless terminal which communicates over a radio interface with a radio access network, the wireless terminal comprising: using receiver circuitry to receive over the radio interface at least one of an architecture indication in formation element and an anchor processor circuitry tunnel first endpoint; wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising an anchor processor circuitry and dis tributed processor circuitry, the anchor processor circuitry configured to perform high layer radio access network node operations and the distributed processor circuitry configured to perform low layer radio access network node operations; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; using processor circuitry to generate a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint; transmitting the message over the radio interface.

[0018] In one example, a radio access network comprising: anchor processor circuitry

configured to perform high layer radio access network node operations; distributed processor circuitry configured to perform low layer radio access network node op erations; a wireless terminal; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the anchor processor circuitry is configured to provide an architecture indication information element which indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; wherein the transceiver circuitry is configured to broadcast the architecture indication information element as system information over the radio interface to the wireless terminal; and wherein the wireless terminal is configured to receive the system information including the architecture indication in formation element and to use the architecture indication information element to com municate with the anchor processor circuitry.

[0019] In one example, a radio access network comprising: anchor processor circuitry

configured to perform high layer radio access network node operations; distributed processor circuitry configured to perform low layer radio access network node op erations; a wireless terminal; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the anchor processor circuitry is configured to provide an anchor processor circuitry tunnel first endpoint, the anchor processor circuitry tunnel first endpoint being an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; and wherein the transceiver circuitry is configured to transmit the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal; and wherein the wireless terminal is configured to receive and use the anchor processor circuitry tunnel first endpoint for communicating with the anchor processor circuitry.

[0020] In one example, a radio access network comprising: anchor processor circuitry

configured to perform high layer radio access network node operations; distributed processor circuitry configured to perform low layer radio access network node op erations; a wireless terminal; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the wireless terminal is configured, when executing a prede termined procedure or when requested by the radio access network: to generate and to transmit, to the transceiver circuitry associated with the distributed processor circuitry, a capability indication which informs the radio access network that the wireless terminal is configured to communicate with the anchor processor circuitry through a pipe which connects the anchor processor circuitry and the distributed processor circuitry through a packet network; and to perform further communications with the anchor processor circuitry in accordance with signaling based on the capability in dication received from the anchor processor circuitry.

Brief Description of Drawings

[0021] The foregoing and other objects, features, and advantages of the technology

disclosed herein will be apparent from the following more particular description of preferred embodiments as illustrated in the accompanying drawings in which reference characters refer to the same parts throughout the various views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the technology disclosed herein.

[fig.l]Fig. 1 is a diagrammatic view of overall architecture for a 5G New Radio system.

[fig.2]Fig. 2 is a diagrammatic view showing gNB interface types for the 5G New Radio system of Fig. 1.

[fig.3]Fig. 3 is a diagrammatic view showing a migration from a classical network appliance approach to a network virtualization approach.

[fig.4]Fig. 4 is a schematic view of an example Network Function Virtualization (NFV) scheme for 5G New Radio.

[fig.5]Fig. 5 is a schematic view of an example embodiment of a communications system including a packetized virtual radio access network.

[fig.6]Fig. 6 is a diagrammatic view showing how protocols handled by the radio access network of Fig. 5 are split into high layer protocols and low layer protocols. [fig.7]Fig. 7 is an enlarged schematic view of distributed processor circuitry of Fig. 5 which additionally shows a MAC controller.

[fig.8]Fig. 8 is a diagrammatic view showing handover of a wireless terminal between various distributed processor circuitry sites of Fig. 5.

[fig.9]Fig. 9 is a schematic view of an example embodiment of a communications system including a packetized virtual radio access network and comprising plural anchor processor circuitry servers.

[fig.lO]Fig. 10 is a schematic view of an example embodiment of a communications system including a packetized virtual radio access network and showing further system components.

[fig.HA]Fig. 11A is a diagrammatic views showing superimposed content of a packet stream in a pipe between an anchor processor circuitry a distributed processor circuitry (DU) through a packet network, Fig. 11 A showing bandwidth for a particular wireless terminal before being allocated an enhanced tunnel endpoint.

[fig.1 lB]Fig. 1 IB is a diagrammatic views showing superimposed content of a packet stream in a pipe between an anchor processor circuitry a distributed processor circuitry (DU) through a packet network, Fig. 1 IB showing bandwidth for a particular wireless terminal after being allocated an enhanced tunnel endpoint.

[fig.l2]Fig. 12 is a diagrammatic view showing acts or steps performed in an attach procedure wherein a default tunnel endpoint at an anchor processor circuitry is replace with a dedicated tunnel endpoint at the anchor processor circuitry.

[fig.l3]Fig. 13 is a diagrammatic view depicting and contrasting a pipe at a beginning of the attach procedure of Fig. 12 and at the end of the attach procedure of Fig. 12. [fig.l4]Fig. 14 is a flowchart showing example, basic, representative acts or steps which may be performed by a radio access network node including anchor processor circuitry and distributed processor circuitry (DU) according to an example embodiment and mode of the technology disclosed herein.

[fig.l5]Fig. 15 is a flowchart showing example, basic, representative acts or steps which may be performed by a wireless terminal in conjunction with a radio access network comprising a radio access network node including anchor processor circuitry and distributed processor circuitry (DU) according to an example embodiment and mode of the technology disclosed herein.

[fig.16]Fig. 16 is a diagrammatic view showing example elements comprising electronic machinery which may comprise a wireless terminal, a radio access node, and a core network node according to an example embodiment and mode.

Description of Embodiments

[0022] In one of its example aspects the technology disclosed herein concerns a radio access network comprising anchor processor circuitry, distributed processor circuitry, and a wireless terminal wireless terminal. The anchor processor circuitry is configured to perform high layer radio access network node operations. The distributed processor circuitry is configured to perform low layer radio access network node operations. The transceiver circuitry is associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal. The anchor processor circuitry is configured to provide an architecture indication in formation element which indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry. The transceiver circuitry is configured to broadcast the architecture in dication information element as system information over the radio interface to the wireless terminal. The wireless terminal is configured to receive the system in formation including the architecture indication information element and to use the ar chitecture indication information element to communicate with the anchor processor circuitry. Methods of operating such network and components thereof are also provided.

[0023] In another of its example aspects the technology disclosed herein concerns a radio access network comprising anchor processor circuitry, distributed processor circuitry, and a wireless terminal. The anchor processor circuitry is configured to perform high layer radio access network node operations. The distributed processor circuitry is configured to perform low layer radio access network node operations. The transceiver circuitry is associated with the distributed processor circuitry and configured to com municate over a radio interface with the wireless terminal. The anchor processor circuitry is configured to provide an anchor processor circuitry tunnel first endpoint, the anchor processor circuitry tunnel first endpoint being an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry The transceiver circuitry is configured to transmit the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal. The wireless terminal is configured to receive and use the anchor processor circuitry tunnel first endpoint for communicating with the anchor processor circuitry. In an example implementation, the anchor processor circuitry is further configured: to receive a communication from the wireless terminal; in conjunction with the communication received from the wireless terminal, to provide an anchor processing circuitry tunnel second endpoint; and to establish dedicated com munication with the wireless terminal using the anchor processing circuitry tunnel second endpoint in lieu of the anchor processing circuitry tunnel first endpoint.

Methods of operating such network and components thereof are also provided.

[0024] In another of its example aspects the technology disclosed herein concerns a radio access network comprising anchor processor circuitry, distributed processor circuitry, and a wireless terminal. The anchor processor circuitry is configured to perform high layer radio access network node operations. The distributed processor circuitry is configured to perform low layer radio access network node operations. The transceiver circuitry is associated with the distributed processor circuitry and configured to com municate over a radio interface with the wireless terminal. The wireless terminal is configured, when executing a predetermined procedure or when requested by the radio access network, to generate and to transmit, to the transceiver circuitry associated with the distributed processor circuitry, a capability indication which informs the radio access network that the wireless terminal is configured to communicate with the anchor processor circuitry through a pipe which connects the anchor processor circuitry and the distributed processor circuitry through a packet network; and to perform further communications with the anchor processor circuitry in accordance with signaling based on the capability indication received from the anchor processor circuitry. Methods of operating such network and components thereof are also provided.

[0025] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, interfaces, techniques, etc. in order to provide a thorough understanding of the technology disclosed herein. However, it will be apparent to those skilled in the art that the technology disclosed herein may be practiced in other embodiments that depart from these specific details. That is, those skilled in the art will be able to devise various arrangements which, although not ex plicitly described or shown herein, embody the principles of the technology disclosed herein and are included within its spirit and scope. In some instances, detailed de scriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the technology disclosed herein with unnecessary detail. All statements herein reciting principles, aspects, and embodiments of the technology disclosed herein, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.

[0026] Thus, for example, it will be appreciated by those skilled in the art that block

diagrams herein can represent conceptual views of illustrative circuitry or other functional units embodying the principles of the technology. Similarly, it will be ap preciated that any flow charts, state transition diagrams, pseudo code, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

[0027] As used herein, the term“core network” can refer to a device, group of devices, or sub-system in a telecommunication network that provides services to users of the telecommunications network. Examples of services provided by a core network include aggregation, authentication, call switching, service invocation, gateways to other networks, etc.

[0028] As used herein, the term“wireless terminal” can refer to any electronic device used to communicate voice and/or data via a telecommunications system, such as (but not limited to) a cellular network. Other terminology used to refer to wireless terminals and non-limiting examples of such devices can include user equipment terminal, UE, mobile station, mobile device, access terminal, subscriber station, mobile terminal, remote station, user terminal, terminal, subscriber unit, cellular phones, smart phones, personal digital assistants (“PDAs”), laptop computers, tablets, netbooks, e-readers, wireless modems, etc.

[0029] As used herein, the term“access node”,“node”, or“base station” can refer to any device or group of devices that facilitates wireless communication or otherwise provides an interface between a wireless terminal and a telecommunications system. A non-limiting example of a base station can include, in the 3GPP specification, a Node B (“NB”), an enhanced Node B (“eNB”), a home eNB (“HeNB”), a gNB (for a New Radio [“NR”] technology system), or some other similar terminology.

[0030] As used herein, the term“telecommunication system” or“communications system” can refer to any network of devices used to transmit information. A non-limiting example of a telecommunication system is a cellular network or other wireless commu nication system.

[0031] As used herein, the term“cellular network” or“cellular radio access network” can refer to a network distributed over cells, each cell served by at least one fixed- location transceiver, such as a base station. A“cell” may be any communication channel that is specified by standardization or regulatory bodies to be used for International Mobile Telecommunications- Advanced (“IMTAdvanced”). All or a subset of the cell may be adopted by 3GPP as licensed bands (e.g., frequency band) to be used for commu nication between a base station, such as a Node B, and a UE terminal. A cellular network using licensed frequency bands can include configured cells. Configured cells can include cells of which a UE terminal is aware and in which it is allowed by a base station to transmit or receive information. Examples of cellular radio access networks include E-UTRAN, and any successors thereof (e.g., NUTRAN).

[0032] Fig. 5 illustrates a telecommunication network 20 which comprises core network 22 and radio access network 24. For sake of non-limiting, example illustration, the core network 22 is illustrated as being a 5G core network, and thus the radio access network 24 is shown as connected to core network 22 over an interface labeled as the NG interface. Although the radio access network 24 is illustrated as using some ter- minology and functionality of a New Generation (NG) radio access network, as described further herein the radio access network 24 differs from the radio access network of Fig. 1, for example, in being a packetized virtual radio access network, PVRAN. The fact that the core network 22 and radio access network 24 are described somewhat in 5G terms does not limit the networks to being 5G networks, as the structure and operation of radio access network 24 as described herein have appli cability to other networks as well.

[0033] As understood by those skilled in the art, when the core network 22 is a 5G core network, the 5G core network 22 performs various core network functions, such as an access and mobility management function (AMF); session management function; user plane function (UPF); policy control function (PCF); authentication server function (AUSF); unified data management (UDM) function; application function (AP);

network exposure function (NEF); NF repository function (FRF); and network slice selection function (NSSF). As representative ones of these functions, user plane function (UPF) 26 and access and mobility management function (AMF) 28 are il lustrated in Fig. 5.

[0034] The radio access network 24 serves one or more wireless terminals 30 which com municate over an air or radio interface 31 with radio access network 24, only one such wireless terminal 30 being shown in Fig. 5 for simplicity. Generally speaking, a wireless terminal 30 may comprise a transceiver 32 and processor circuitry 34 which executes one or more programs or code in an operating system and one or more ap plication programs, which may be stored in non-transient memory 36. The wireless terminal 30 may also include user interface 38.

[0035] Fig. 5 further shows that packetized virtual radio access network 24 comprises

anchor processor circuitry 40 and distributed processor circuitry 42. The distributed processor circuitry 42 is associated with, e.g., may comprise or be connected to, transceiver circuitry 44. Fig. 5 shows anchor processor circuitry 40 as being connected through packet network 48 by pipes or channels 46 to two distributed processor circuits, particularly to distributed processor circuitry 42 and distributed processor circuitry 42₂, although any number of distributed processor circuits 42 may be connected to anchor processor circuitry 40. The distributed processor circuits 42, each having associated transceiver circuitry 44, are preferably located at different geo graphical sites, in a manner such as of conventional base station nodes. As such, the distributed processor circuits 42 and 42₂ are also referred to distributed processor circuitry sites. Plural distributed processor circuitry sites may comprise the overall dis tributed processor circuitry 42.

[0036] The elements of radio access network 24 as described above may also be known by other names. For example, the anchor processor circuitry 40 may be referred to as an “anchor central unit”, or“anchor CU”, for example. The distributed processor circuitry 42, since it may comprise the transceiver circuitry 44, may be referred to as a “radio/DU” or“radio/distributed unit”. The transceiver circuitry 44 may be referred to as a“radio part”, or“radio head”, for example. The transceiver circuitry 44 may comprise both transmitter circuitry and receiver circuitry, and typically includes antenna(e). For its transmitter circuitry the transceiver circuitry 44 may include, e.g., amplifier(s), modulation circuitry and other conventional transmission equipment. For its receiver circuitry the transceiver circuitry 44 may comprise, e.g., amplifiers, de modulation circuitry, and other conventional receiver equipment.

[0037] The anchor processor circuitry 40 is configured to perform high layer radio access network node operations for a connection with a wireless terminal. As such, Fig. 5 shows anchor processor circuitry 40 as executing certain high layer protocols 50. In addition, the anchor processor circuitry 40 is configured to generate and maintain a context for the connection with the wireless terminal. Fig. 5 thus shows anchor processor circuitry 40 as comprising context memory 51. The anchor processor circuitry 40 may further comprise tunnel end point controller 53; architecture in dication information element (IE) generator 54; and system information generator 55.

[0038] In contrast to anchor processor circuitry 40, the distributed processor circuitry 42 is configured to perform low layer radio access network node operations for the connection with the wireless terminal. Fig. 5 accordingly shows distributed processor circuitry 42 as executing lower layer protocols 52. In addition, distributed processor circuitry 42 comprises context memory 57.

[0039] The distributed processor circuitry 42 may comprise one or more distributed

processor circuitry sites such as sites 42i and 42₂ The distributed processor circuitry 42 is connected to anchor processor circuitry 40 through packet network 48. The packet network 48 may comprise, for example, an Internet Protocol (IP) packet network, although other types of packet networks are also possible. For a given connection with a wireless terminal, the anchor processor circuitry 40 is configured to provide a first endpoint TEID_A for a tunnel 60 through which the connection is carried over packet network 48 to the distributed processor circuitry 42, and the distributed processor circuitry 42 is configured to provide a second endpoint for tunnel 60. The second endpoint for the tunnel 60 at the distributed processor circuitry 42 depends on the particular distributed processor circuitry site to which the tunnel 60 is connected. For example, when the tunnel 60 is connected to distributed processor circuitry site 421, the second endpoint of tunnel 60 is labeled as TEID-i.

[0040] As understood from Fig. 5, the transceiver circuitry 44 may comprise plural

transceivers, such as transceiver circuitry 44i and transceiver circuitry 44₂, any possibly other transceiver circuits as well, located at different sites. Similarly, the dis- tributed processor circuitry 42 may comprise plural distributed processor circuitry sites such as the sites 421 and 42₂ shown in Fig. 5, or even a greater number of plural sites as indicated by sites 42_u 42₂, and 42₃ shown in Fig. 6 and Fig. 10.

[0041] For each connection handled by the radio access network, a“context”, sometimes referred to as a“UE context”, is generated and maintained. As used herein,“context” or“UE context” may include such items of information such as an identification of the wireless terminal involved in the connection; encryption keys for the wireless terminal; parameters associated with each of the protocol layers; and other information (such as whether the wireless terminal is moving, measurement activity by the wireless terminal, etc.). The context for a UE connection may be spread throughout a system, e.g., to different elements which support or are involved in the UE connection. For example, for a given UE context there may be contexts in an IMS application server, Core network elements, and various RAN elements, for example. Therefore, the UE connection may be viewed as having plural“contexts”, e.g., a different portion of the overall UE context perhaps being stored at variously throughout the system. The contexts are generated when the UE powers up and performs registration (e.g., attach procedures). These contexts may have variations in terms of attributes and IE depending on the functionality of the node. The contexts may be stored, maintained, and used by radio resource management (RRM) functionality, which may comprise or be included in Controlling Software or the Operation System.

[0042] In an example embodiment and mode, the radio resource management (RRM) func tionality is split between anchor processor circuitry 40 and distributed processor circuitry 42. Fig. 5 therefore shows that anchor processor circuitry 40 comprises anchor radio resource management (RRM) controller 58 and that distributed processor circuitry 42 comprises distributed radio resource management (RRM) controller 59. As such, the distributed processor circuitry 42 includes at least some of the radio resource management (RRM) functionality. The anchor radio resource management (RRM) controller 58 manages and stores certain context content in context memory 51, the distributed radio resource management (RRM) controller 59 manages and stores certain context content in context memory 57. The context stored in context memory 57 of distributed processor circuitry of a distributed processor circuitry site 42 includes information pertaining to admission control, including resource allocation and tracking for all UEs within the coverage area of the particular distributed processor circuitry site. The context stored in context memory 51 of anchor processor circuitry 40 includes information pertaining to IP connectivity contexts, Identifications, TEIDs, security keys, and mobility-related contexts.

Fig. 6 provides further illustration of how protocols handled by the radio access network 24 are split into high layer protocols and low layer protocols, and does so in contrast to the conventional 5G gNodeB protocol stack. A portion of Fig. 6 to the left of the developmental progression arrow shows that the conventional 5G unified gNodeB handles a protocol stack comprising, from lowest to highest protocol layer: physical layer (PHY) and medium access control (MAC) protocols; radio link control (RLC) protocol; Radio Packet Data Convergence (PDCP) protocol; and Service Data Adaptation Protocol (SDAP) protocol. The portion of Fig. 6 to the right of the devel opmental progression arrow shows the radio access network 24 of the technology disclosed herein, featuring the anchor processor circuitry 40, also known as the anchor CU, and three distributed processor circuitry sites 42i, 42₂, and 42₃. Although three sites 42 are shown, the split of the protocols of Fig. 6 applies to any number of sites, e.g., one or more sites. The high layer protocols 50 of the anchor processor circuitry 40 are shown in Fig. 6 as comprising the Radio Packet Data Convergence (PDCP) protocol and the Service Data Adaptation Protocol (SDAP), whereas the lower layer protocols 52 of the distributed processor circuitry 42 is shown as comprising the physical layer and medium access control (MAC) protocols and the radio link control (RLC) protocols. Thus, the high layer radio access network node operations comprise a Service Data Adaptation Protocol (SDAP) operation and a Packet Data Convergence Protocol (PDCP) operation; whereas the low layer radio access network node op erations comprise a radio link control (RLC) operation and a medium access control (MAC) operation.

[0043] As indicated above, the low layer radio access network node operations comprise a medium access control (MAC) operation. At the distributed processor circuitry 42 the medium access control (MAC) operation is executed by a MAC controller or MAC entity, such as MAC controller 64 shown in the representative distributed processor circuitry cite 42i of Fig. 7. Advantageously, the MAC protocol, and MAC controller 64 in particular, handles at least some of the radio resource management (RRM) func tionality required for a connection between the wireless terminal and the radio access network. Fig. 7 thus shows that the distributed radio resource management (RRM) controller distributed radio resource management (RRM) controller 59 for distributed processor circuitry 42i may be included in or comprise the MAC controller 64.

[0044] In an example embodiment and mode, all RRC messages may be terminated at the MAC layer, and hence become MAC Control Functions. For example, in an example embodiment and mode, the MAC controller 64 is configured to handle the data radio bearers, DRBs, and signaling radio bearers, SRBs, for the connection. This means that, for such example embodiment and mode, preferably the MAC controller 64 allocates, modifies, and releases all data radio bearers, DRBs, and signaling radio bearers, SRBs, for the connection.

[0045] In addition, in an example embodiment and mode, some or all security /encryption functions may or may not (for support of backward compatibility UEs and operations) be moved from the Radio Packet Data Convergence (PDCP) layer to the MAC layer, e.g., some keys are negotiated by MAC controller 64. Performing the security functions at the MAC layer allows for faster key exchanges and session establishment and release, hence enhancing the network performance and mobility. Keeping the same context (at the CU or the PDCP) after handover from one distributed processor circuitry site to another, means that the same encryption keys may be utilized before, during, and after the handover as before the handover process is initiated, which eliminates the need for the establishment/release or the reconfiguration of the PDCP entity including further security negotiations, and thus conserves processing resources and expedites the handover. As used herein, keeping a“same context” in a handover operation means at least one and preferably both of the following: (1) that the context maintained by anchor radio resource management (RRM) controller 58 for the anchor processor circuitry 40 remains mostly the same (especially the encryption functionality and Key assignments for CP and UP traffic is maintained in the CU/PDCP) after the handover as before the handover. There is some small changes expected in the context information at the Anchor CU unit, including the contexts related to the new con nections established with the New/target DU) as used by the anchor processor circuitry 40 for the involved connection after the handover; and (2) that the PDCP/CU related context information as used by the distributed processor circuitry 42 for the connection involving the wireless terminal does not change when the wireless terminal is handed over from one distributed processor circuitry site to another distributed processor circuitry site.

[0046] Example, representative, basic acts or steps involved in an authentication and reg istration procedure between a wireless terminal and the radio access network of Fig. 5 according to an example embodiment and mode are described in United States Pro visional Patent Application 62/738,388, filed September 28, 2018, entitled“RADIO ACCESS NETWORK and methods for expedited network access”, which is in corporated herein by reference in its entirety. As a result of the authentication and reg istration procedure, the wireless terminal 30 may be provided by distributed processor circuitry 42 with the UE context, as well as the endpoints for tunnel 60, e.g., both TEID_A = UE-1 CU TEID and TEID, = UE-1 DU TEID, and the encryption keys e.g., the encryption key for distributed processor circuitry 42 (DU-keys) and the encryption key for anchor processor circuitry 40 (CU-keys).

[0047] United States Provisional Patent Application 62/738,388 also shows and describes handover of a wireless terminal between various distributed processor circuitry sites, such as the sites of Fig. 6Fig. 8 shows by arrow 66i a first handover of wireless terminal 30, e.g., UE 1, from distributed processor circuitry 42 to distributed processor circuitry 42₂, and by arrow 66₂a second handover of wireless terminal 30 from dis tributed processor circuitry 42₂ to distributed processor circuitry 42₃. Usage of the term “handover” herein should be understood to encompass and/or include a“handoff’ to the extent, if any, that the terms have any different meaning. The plural distributed processor circuitry sites 42 are configured so that, upon a handover of the connection with the wireless terminal from a first distributed processor circuitry site to a second distributed processor circuitry site, the same context may be utilized for the connection involving the wireless terminal. In other words, the second distributed processor circuitry site after the handover uses a same context for the connection as was used by the first distributed processor circuitry site before the handover. Moreover, the anchor processor circuitry 40 may use the same context for the connection after the handover as it used before the handover.

[0048] United States Provisional Patent Application 62/738,388 explains, e.g., that since the same UE context 72i is essentially handed over between the different distributed processor circuitry sites as the connection involving wireless terminal 30 is handed over, the contents of the UE context 72i need not be re-negotiated, thus eliminating considerable signaling between the anchor processor circuitry 40 and the handed- over-to distributed processor circuitry site. The UE context 72i includes many elements of information, none of which thus need to be changed or re-negotiated. Among the elements of the UE context 72i is encryption information, e.g., encryption keys, such as the encryption or security keys CU-Keys and DU-keys. Moreover, the UE context 72_A for the connection involving wireless terminal 30, as initially set up for the connection, can be maintained at anchor processor circuitry 40 regardless of subsequent handover.

[0049] There may be several different variation of handover procedures. For example, in Network-based handover the anchor processor circuitry 40 triggers the handover and determine the target distributed processor circuitry site 42. In such case, the anchor processor circuitry 40 may install the same context, e.g., context 72i, in the new dis tributed processor circuitry site and establish the TEID for the new distributed processor circuitry site, and then communicate that back to the wireless terminal in a handover command. In another embodiment of handover procedure, a first distributed processor circuitry site may trigger the handover and may determine the target or second distributed processor circuitry site, after which the same context, e.g., context 72i, may be installed in the target distributed processor circuitry site either directly via a direct interface (e.g., Xn interface) or indirectly through the anchor processor circuitry 40. Either way a new TEID is established at the new or second distributed processor circuitry site and a new tunnel with the anchor processor circuitry 40 is es tablished. Related information will be communicated to the wireless terminal so that the wireless terminal can perform the handover to the target distributed processor circuitry site). In yet another embodiment of handover procedure, the wireless terminal may trigger the handover and the wireless terminal may determine the target dis tributed processor circuitry site for the handover. In this third embodiment the wireless terminal UE may also communicate information to the source distributed processor circuitry site to perform the Tunnel establishment before the actual handover (e.g., in make before break fashion), or the wireless terminal may initiate the handover to the target distributed processor circuitry site, with the result that the new or target dis tributed processor circuitry site may retrieve the context from the source distributed processor circuitry site either directly (e.g., through the Xn interface( or indirectly through the anchor processor circuitry 40. In either case the wireless terminal may provide the identification of the source distributed processor circuitry site and/or the identification of the anchor processor circuitry 40. The target distributed processor circuitry site may then request the contexts using these identifications. The target dis tributed processor circuitry site may also establish the TEID for the tunnel with the CU.

[0050] It should thus be apparent that shifting of many radio access network functions from high protocol layers to low protocol layers, e.g., the protocol layers handled by the dis tributed processor circuitry 42, in the manner of the technology disclosed herein, fa cilitates faster establishment and tear-down of connections and faster handover.

[0051] According to another example embodiment and mode illustrated in Fig. 9, the anchor processor circuitry 40 may comprise plural anchor processor circuitry servers, such as plural anchor processor circuitry server 40 through 40₃, also illustrated and known as CU1 through CU3. The plural anchor processor circuitry servers are connected through packet network 48 to the plural distributed processor circuitry sites 42 - 42₁₀ comprising the distributed processor circuitry 42. As such each of the plural anchor processor circuitry servers 40 is connected by the packet network 48 to one or more of the plural distributed processor circuitry sites 42 _ 42₁₀.

[0052] One non-limiting example advantage of the packetized virtual radio access network 40 of Fig. 9 is that an initial anchor processor circuitry server involved in initial setup of the connection is configured to maintain the context for the connection with the wireless terminal regardless of to which of the plural distributed processor circuitry sites the connection is handed over. For example, suppose in the Fig. 9 scenario that a connection is initially setup between anchor processor circuitry 40 and wireless terminal UE1 through distributed processor circuitry site 42i. The connection between anchor processor circuitry 40 and wireless terminal UE1 through distributed processor circuitry site 42 involves UE context 72i. Fig. 9 also shows that another connection is setup between anchor processor circuitry 40₂ and wireless terminal UE14 through dis- tributed processor circuitry site 42₅ After setup of the initial connection involving wireless terminal UE1, further suppose that wireless terminal UE1 is involved in a handover and is handed over to distributed processor circuitry site 42_₅, as shown by arrow 66₉. Despite the handover of wireless terminal UE1 to a distributed processor circuitry site such as distributed processor circuitry site 42₅ that is handling a connection routed to another anchor processor circuitry server 40₂, e.g., the connection involving wireless terminal UE14, after the handover the connection involving wireless terminal UE1 is still with anchor processor circuitry server 40 and the same UE context 72i for the wireless terminal UE1 can be utilized while the connection is routed through and served by distributed processor circuitry site 42₅. Fig. 9 thus il lustrates the distributed processor circuitry sites 42 - 42-₁₀ - are flexibly associated with the plural anchor processor circuitry servers 40, with the result that an initial anchor processor circuitry server involved in initial setup of the connection maintains the context for the connection regardless of to which distributed processor circuitry site the connection is handed over. Thus, the wireless terminal, as it moves between dis tributed processor circuitry sites 42, does not need to change between plural anchor processor circuitry servers 40 as long as the wireless terminal remains in the same packetized virtual radio access network. Viewed another way, a migrating wireless terminal is not obligated to change to another plural anchor processor circuitry server in view of the particular distributed processor circuitry site to which it has been handed over. In other words, a particular distributed processor circuitry site is required to utilize a particular plural anchor processor circuitry server This assures continuity of delivery.

[0053] As a corollary of the foregoing, a particular distributed processor circuitry site may use one anchor processor circuitry server for a first connection, e.g., with UE1, and another plural anchor processor circuitry server for a second connection, e.g., with UE14.

[0054] As described herein, pipes 46 are packet connections, e.g., IP connections, which are used to connect the various processor circuitries to the packet network 48. In view of advantages of the technology disclosed herein such as, for example, the reusability of contexts, the bandwidth required for a particular connection may be less than for a con ventional radio access network. Preferably the pipes 46 have large bandwidth for the sake of accommodate numerous connections, e.g., connections involving plural wireless terminals, perhaps with some of the wireless terminals being involved in plural connections. In view of the large bandwidth, the pipes 46 may be referred to herein and illustrated as“fat pipes”. The concept of a FAT PIPE may be implemented between the anchor processor circuitry 40 and all distributed processor circuitry sites 42 where the wireless terminal does not have to initiate or reconfigure all the layering (e.g., MAC, RLC, PDCP, SDAP) for individual pipes or bearers that it needs to establish connectivity within the radio access network.

[0055] Aspects of the technology disclosed herein concerning a pipe 46 are now described in more detail with reference to Fig. 10. Fig. 10 illustrates the anchor processor circuitry 40, one of the distributed processor circuitry units (DU) 42, and the wireless terminal 30 of Fig. 5, but in more detail.

[0056] As shown in Fig. 10, anchor processor circuitry 40 comprises one or more processors 70, e.g., processor circuitry, which in turn may at least partially comprise or constitute elements and functionalities shown in Fig. 5, such high layer protocols 50, context memory 51, tunnel endpoint (TE) controller 53, architecture indication information element generator 54, system information generator 55, and anchor radio resource management (RRM) controller 58. In addition, the 70 may at least partially comprise or constitute interface(s) 72 to packet network 48.

[0057] As shown in Fig. 10, distributed processor circuitry (DU) 42 comprises DU

transceiver circuitry 44 and DU processor circuitry, e.g., DU processor(s) 74. The DU transceiver circuitry 44 comprises DU transmitter circuitry 76 and DU receiver circuitry 78. The DU processor(s) 74 may comprise or constitute all or part of various DU functionalities and/or components illustrated in Fig. 5, such as low layer protocols 52, context memory 57, DU resource management (RRM) controller 59, as well as interface(s) 80 to packet network 48 and DU frame/message handler/generator 82.

[0058] As shown in Fig. 10, wireless terminal 30 comprises terminal transceiver circuitry 32 and terminal processor circuitry 34. The terminal transceiver circuitry 32 comprises terminal transmitter circuitry 84 and terminal receiver circuitry 86. The terminal processor circuitry 34 may comprise or constitute all or part of various terminal func tionalities and/or components illustrated in Fig. 5, such as memory 36, as well as terminal frame/message handler/generator 88 and procedure(s) controller 89. The procedure(s) controller 89 may perform one or more procedure(s) which involve com munications recognized or classified by anchor processor circuitry 40 as being “qualified” communications, such as an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[0059] Any reference to a“resource” herein means“radio resource” unless otherwise clear from the context that another meaning is intended, for example, a pipe resource. In general, as used herein a radio resource (“resource”) is a time-frequency unit that can carry information across a radio interface, e.g., either signal information or data in formation. An example of a radio resource may occur in the context of a“frame” of in formation that is typically formatted and prepared, e.g., by a node. In Long Term Evolution (LTE) a frame, which may have both downlink portion(s) and uplink portion(s), is communicated between the base station and the wireless terminal. Each LTE frame may comprise plural subframes. For example, in the time domain, a 10 ms frame consists of ten one millisecond subframes. An LTE subframe is divided into two slots (so that there are thus 20 slots in a frame). The transmitted signal in each slot is described by a resource grid comprised of resource elements (RE). Each column of the two dimensional grid represents a symbol (e.g., an OFDM symbol on downlink (DL) from node to wireless terminal; an SC-FDMA symbol in an uplink (UL) frame from wireless terminal to node). Each row of the grid represents a subcarrier. A resource element (RE) is the smallest time-frequency unit for downlink transmission in the subframe. That is, one symbol on one sub-carrier in the sub-frame comprises a resource element (RE) which is uniquely defined by an index pair(k,l) in a slot (where k and 1 are the indices in the frequency and time domain, respectively). In other words, one symbol on one sub-carrier is a resource element (RE). Each symbol comprises a number of sub-carriers in the frequency domain, depending on the channel bandwidth and configuration. The smallest time-frequency resource supported by the standard today is a set of plural subcarriers and plural symbols (e.g., plural resource elements (RE)) and is called a resource block (RB). A resource block may comprise, for example, 84 resource elements, i.e., 12 subcarriers and 7 symbols, in case of normal cyclic prefix. Such a“frame” may be communicated over the radio interface 31 and be handled at the distributed processor circuitry (DU) 42 by DU frame/message handler/ generator 82 and at the wireless terminal 30 by terminal frame/message handler/ generator 88.

[0060] The DU transceiver circuitry 44 and terminal transceiver circuitry 32 transmit and receive frames or other information communicated over radio interface 31 between distributed processor circuitry (DU) 42 and wireless terminal 30. The terminal transceiver circuitry 32 and DU transceiver circuitry 44 each include antenna(e) for the wireless transmission. The transmitter circuitry 77 and terminal transmitter circuitry 84 include, e.g., amplifier(s), modulation circuitry and other conventional transmission equipment. The DU receiver circuitry 78 and terminal receiver circuitry 86 comprise, e.g., amplifiers, demodulation circuitry, and other conventional receiver equipment.

[0061] As understood from the foregoing, the anchor processor circuitry 40 performs high layer radio access network node operations, e.g., high layer protocols 50, and the dis tributed processor circuitry 40 performs low layer radio access network node op erations, e.g., low layer protocols 52. The distributed processor circuitry (DU) 42 comprises or has transceiver circuitry 44 associated therewith for the purpose of com municating with the wireless terminal 30 over the radio interface 31.

[0062] In one of the example aspects of the technology disclosed herein, the anchor

processor circuitry 40 is also configured to provide information, e.g., to wireless terminal 30, regarding the nature of the architecture and capabilities supported by anchor processor circuitry 40, including configuration and capabilities of the pipe 46 that connects anchor processor circuitry 40 and distributed processor circuitry (DU) 42.

[0063] The pipe 46 comprises or provides persistent connections between anchor processor circuitry 40 and distributed processor circuitry 42 through data packet network 48 on which packets of plural connections for plural respective wireless terminals are carried. Fig. 11 shows in simplified diagrammatic form an example pipe 46 superimposed with a time snapshot stream of packets 90 which may be transmitted between anchor processor circuitry 40 and distributed processor circuitry (DU) 42 over the pipe 46.

[0064] As shown in Fig. 11, in accordance with one example aspect of the technology

disclosed herein, pipe 46 may comprise plural tunnels 60, including default tunnel 60_D and, when allocated, other tunnels 60_AI - 60_Aj. At anchor processor circuitry 40 each tunnel 60 is associated with a tunnel endpoint identifier CU-TEID. For example, default tunnel 60_D is associated with CU-TEID_Dat anchor processor circuitry interface(s) 72, allocated tunnel 60_AI is associated with CU-TEID_AI, and so forth. The packet stream 90 shown in Fig. 11 is depicted to represent example content of pipe 46 and is shown extended along a time axis. Respective portions, e.g., segments, groups of packets, or blocks, of the packet stream 90 may be associated with respective ones of the tunnels 60. Although the transmission of the packet stream 90 is shown to be linear along the time axis, it should be understood that contents of differing tunnels of packets comprising the packet stream 90 may be received at respective tunnel endpoints, e.g., packets belonging to a portion of packet stream 90 associated with default tunnel 60_D emanate from or arrive at tunnel endpoint CU-TEID_d; packets belonging to a portion of packet stream 90 associated with default tunnel 60 , _A emanate from or arrive at tunnel endpoint CU-TEID_1A; and so forth. Moreover, it should be un derstood that a transmission pattern such as that shown as packet stream 90 in Fig. 11 is repeated over time, with packets for the different tunnels being multiplexed in same or similar fashion for repeated frames depending on traffic, with similar tunnel structure being provided for each time frame but subsequent packets for each connection of the tunnel being carried at subsequent times.

[0065] When wireless terminal 30 is first served by anchor processor circuitry 40, the anchor processor circuitry 40 and distributed processor circuitry (DU) 42 establish tunnel transmission parameters that generally persist for the wireless terminal 30 at least as long as the wireless terminal 30 remains served by anchor processor circuitry 40. The tunnel transmission parameters include, among other parameters, the tunnel endpoints to be used for communications between the anchor processor circuitry 40 and the wireless terminal 30, e.g., tunnel endpoints at both the anchor processor circuitry 40 and the distributed processor circuitry (DU) 42. As used herein, the fact that the tunnel transmission parameters“generally” persist takes into consideration the fact that a tunnel transmission parameter originally assigned for a transmission between the anchor processor circuitry 40 and distributed processor circuitry (DU) 42 for a particular wireless terminal may be at least temporarily modified, re-assigned, or re allocated, e.g., for use of a differently allocated tunnel, and may further may revert back to the originally assigned tunnel transmission parameters when appropriate.

Whether subject to re-assignment or modification of tunnel transmission parameters or not, as one of its example aspects the technology disclosed herein relieves the anchor processor circuitry 40 and distributed processor circuitry (DU) 42 from having to establish new communication channels through pipe 46 for subsequent transmissions between a wireless terminal and an anchor processor circuitry 40 already serving same. As such, the pipe 46 is configured and managed to provide a persistent connection to facilitate transmission of packets through packet network 48 between the anchor processor circuitry 40 and the distributed processor circuitry 42 so that a further connection need not be established for another transmission, e.g., of signaling and/or data, between the wireless terminal 30 and the anchor processor circuitry 40.

Moreover, the pipe 46 may be configured or managed to provide such persistent connection for plural, and preferably each, wireless terminal served by anchor processor circuitry 40.

[0066] In accordance with one example aspect of the technology disclosed herein, the

anchor processor circuitry 40 provides at least one of an architecture indication in formation element and an anchor processor circuitry first tunnel endpoint for commu nication with a wireless terminal served by anchor processor circuitry 40. The ar chitecture indication information element may be generated by architecture indication information element generator 54, or received from a core network and relayed by anchor processor circuitry 40 to distributed processor circuitry (DU) 42. The ar chitecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the dis tributed processor circuitry, a radio access network of the type described herein wherein a persistent connection for a wireless terminal is established though pipe 46. The architecture indication information element may also comprise or be known as a fat pipe indication information element.

[0067] The anchor processing circuitry first endpoint may be generated or ascertained by tunnel endpoint (TE) controller 53, and is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in pipe 46 over packet network 48 between the anchor processor circuitry 40 and the distributed processor circuitry 42. The distributed processor circuitry (DU) 42 provides its own endpoint for the tunnel. [0068] As mentioned above, the anchor processor circuitry 40 provides at least one of an ar chitecture indication information element and an anchor processor circuitry first tunnel endpoint for communication to a wireless terminal served by anchor processor circuitry 40. It should be understood that anchor processor circuitry may be and preferably is configured to provide both of the architecture indication information element and the anchor processor circuitry first tunnel endpoint for use by a wireless terminal.

[0069] In some situations the anchor processor circuitry may prepare one or both of the ar chitecture indication information element and the anchor processing circuitry first endpoint for broadcast by the DU transceiver circuitry 44 of distributed processor circuitry (DU) 42 over the radio interface 31 to the wireless terminal 30. In particular, one or both of the architecture indication information element and the anchor processing circuitry first endpoint may be generated or prepared for broadcast as system information. For example, one or both of the architecture indication in formation element and the anchor processing circuitry first endpoint may be included by anchor processor circuitry 40 in a master information block (MIB) or system in formation block 1 (such as SIB1, for example). The system information generator 55 of anchor processor circuitry 40, shown in Fig. 10, may generate the system in formation to include one or both of the architecture indication information element and the anchor processing circuitry first endpoint.

[0070] In most situations, the anchor processor circuitry 40 will use a tunnel such as default tunnel 60_D for communications, e.g., signaling and small amounts of data, with a wireless terminal (see Fig. 11). As such, the anchor processor circuitry 40 associates the default tunnel endpoint, e.g., CU-TEID_d, for the communications with the wireless terminal. As used herein, such default tunnel endpoint may also be referred to as the anchor processing circuitry first endpoint. The default tunnel 60_D, and thus the default/ first tunnel endpoint CU-TEID_d, is typically utilized on a shared basis with many wireless terminals, e.g., most of the wireless terminals served by anchor processor circuitry 40 through distributed processor circuitry (DU) 42.

[0071] As another example aspect of the technology disclosed herein, when desirable the anchor processor circuitry 40 is configured to provide another tunnel endpoint— an anchor processor circuitry tunnel second endpoint at the anchor processor circuitry.

The anchor processor circuitry tunnel second endpoint is associated with another tunnel of pipe 46, e.g., one of the allocated tunnels 60A1 - 60Aj. For example, Fig. 11 shows example anchor processor circuitry tunnel second endpoints CU-TEID_AI, CU- TEID_AI^ UU-TEID_AJ_, associated with the allocated tunnels 60A1 - 60Aj. Preferably, a processor circuitry second endpoint is used by and reserved for a“qualified” commu nication involving the wireless terminal. [0072] When a wireless terminal is permitted or accorded use of the anchor processor circuitry tunnel second endpoint, and thus one of the allocated tunnels 60A1 - 60Aj instead of the default tunnel, the wireless terminal is provided with dedicated signaling and data transmission through the allocated tunnel, and thus is provided enhanced service relative to the default tunnel endpoint and the default tunnel 60_D. For example, Fig. 1 IB shows the simplified depiction of a packet stream 90 in similar manner as in Fig. 11 A. At a time shown in Fig. 11 A, a particular wireless terminal 30 may be accorded bandwidth represented by a packet or block marked with an asterisk (“*”) in default tunnel 60_D default tunnel 60_D. However, after the wireless terminal 30 has been allocated to anchor processing circuitry tunnel second endpoint CU-TEID_A2, the wireless terminal 30 is accorded use of tunnel 60A_! and thus provided with additional bandwidth as shown by more packets or blocks marked with an asterisk. The number of such additional packets or blocks shown is merely representative of the fact that a greater number of pipe resources are provided for the qualified communication with the wireless terminal 30. Thus, an anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe 46 to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint, e.g., relative to the default tunnel endpoint.

[0073] In an example embodiment and mode, anchor processor circuitry 40 may include enhanced service qualification logic 92. Fig. 10 shows enhanced service qualification logic 92 as being included in tunnel endpoint (TE) controller 53, but enhanced service qualification logic 92 may instead comprise or be executed by other portions of CU processors 70. The anchor processor circuitry 40 may evaluate, determine, and/or qualify a communication as a“qualified” communication by any of several alternative or cumulative criteria.

[0074] For example, a communication may be determined to be a qualified communication by enhanced service qualification logic 92 when the communication comprises or is as sociated with a particular procedure performed by anchor processor circuitry 40, e.g., a procedure performed between anchor processor circuitry 40 and wireless terminal 30. For example, the particular procedure that may be adjudged as including a qualified communication, and thus enabling the qualified communication to be allocated an anchor processing circuitry tunnel second endpoint, may be one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[0075] As other examples, a communication may be determined to be a qualified commu nication when the communication comprises or is associated with a session comprising data transmission. The enhanced service qualification logic 92 may assess whether a particularly session is to be classified as a qualified communication depending on one or more factors such as equaling or exceeding one or more of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[0076] At some times a wireless terminal 30 may participated in a non-qualified commu nication with anchor processor circuitry 40, and thus be afforded merely the anchor processing circuitry first endpoint, e.g., CU-TEID_d, associated with default tunnel 60_D, in the manner shown by the asterisk block of the packet stream 90 of Fig. 11 A. While the wireless terminal 30 is associated with the anchor processing circuitry first endpoint, all communications between wireless terminal 30 and anchor processor circuitry 40 involve the anchor processing circuitry tunnel first endpoint. However, if the wireless terminal 30 subsequently engages in a qualified communication, the wireless terminal 30 may be accorded an anchor processing circuitry tunnel second endpoint, such as CU-TEID_AI in Fig. 11, and use of tunnel 60_AI, as shown by the asterisk blocks of the packet stream 90 of Fig. 11 A. While the wireless terminal 30 is associated with the anchor processing circuitry tunnel second endpoint, all commu nications between wireless terminal 30 and anchor processor circuitry 40 involve the anchor processing circuitry tunnel second endpoint. But should it be subsequently de termined that the wireless terminal 30 no longer performs a qualified communication, e.g., should the wireless terminal 30 lose its qualified communication status, the anchor processor circuitry 40 may switch the wireless terminal 30 back to the anchor processing circuitry first endpoint for subsequent utilization. Thus, the anchor processor circuitry may switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication is a qualified commu nication, e.g., whether the communication comprises a data session.

[0077] Fig. 12 shows an example scenario in which anchor processor circuitry 40 provides one of an architecture indication information element and an anchor processing circuitry first endpoint, and then upon determination of existence or request for a qualified communication with wireless terminal 30, provides an anchor processing circuitry tunnel second endpoint to provide wireless terminal 30 with enhanced access to anchor processor circuitry 40. The example scenario shown in Fig. 12 is of a vir tualized radio access network attach procedure. It should be understood that other types of procedures, such as those mentioned above, could be illustrated and described in similar manner as in Fig. 12. Fig. 12 shows that a version of pipe 46, known as FAT PIPE, exists, e.g., over wiring or cable, between anchor processor circuitry 40 and dis tributed processor circuitry (DU) 42.

[0078] After anchor processor circuitry 40 provides or generates the architecture indication information element and the anchor processing circuitry first endpoint, e.g., CU-TEID_D , as act 12-1 the DU transceiver circuitry 44 of distributed processor circuitry (DU) 42 transmits one or both of the architecture indication information element and the anchor processing circuitry first endpoint over radio interface 31 to wireless terminal 30. The anchor processing circuitry first tunnel endpoint may also be known herein as the default tunnel endpoint, or the signaling tunnel endpoint, and may be abbreviated as CU-TEID_! or CU-TEID_d. as explained above, in a non-limiting example embodiment and mode, one or both of the architecture indication information element and the anchor processing circuitry first endpoint may be broadcast as system information, e.g., in MIB or SIB1, for example.

[0079] Act 12-2 shows that wireless terminal 30 powers up. Thereafter as act 12-3 wireless terminal 30 scans for information transmitted by distributed processor circuitry (DU) 42, such as system information, e.g., MIB or SIBs. As act 12-4, after obtaining/ receiving the information provided by distributed processor circuitry (DU) 42, including the system information, wireless terminal 30 determines or ascertains, from the received information, one or both of the architecture of the radio access network and the anchor processing circuitry tunnel first endpoint. For example, as act 12-4, the wireless terminal 30 may obtain the architecture indication information element from the system information. The architecture indication information element may be, for example, a value or code that corresponds to the architecture of the radio access network. For example, a first code or value for the architecture indication information element may indicate a conventional, e.g., non-virtualized, radio access network structure, while a second code or value for the architecture indication information element may indicate a virtualized, radio access network structure in which a persistent pipe connection is maintained for the wireless terminal 30 through packet network 48 between anchor processor circuitry 40 and distributed processor circuitry (DU) 42.

Such codes or values indicative of architecture may be stored at wireless terminal 30, e.g., the wireless terminal 30 may be preconfigured at the factory with such values or codes or such values and codes may be downloaded into memory by the radio access network.

[0080] It is assumed in subsequent discussion of Fig. 12 that the wireless terminal 30 as certains that the radio access network is a virtualized RAN of type shown in Fig. 10, for example. Act 12-5 comprises the wireless terminal 30 determining the anchor processing circuitry tunnel first endpoint from the information received from dis tributed processor circuitry (DU) 42, e.g., CU-TEID_d.

[0081] Act 12-6 shows that, at a subsequent time, wireless terminal 30 may initiate a

procedure, such as an attach procedure. In conjunction with the attach procedure, as act 12-7 wireless terminal 30 sends a dedicated message such as a RRC connection request establishment message to distributed processor circuitry (DU) 42. The message of act 12-7 may include an architecture compatibility indication information element, also known as a fat pipe compatibility information element or as a UE capability in formation element. Such architecture compatibility indication information element or fat pipe compatibility information element serves to indicate or confirm to the radio access network that this particular wireless terminal 30 is able to function with the vir tualized radio access network and the fat pipe 46 configured as described herein. The architecture compatibility indication information element or fat pipe compatibility in formation element may be generated by architecture compatibility indication in formation element generator 94. The architecture compatibility indication information element generator 94 may comprise or be constituted, at least in part, by terminal processor circuitry 34, e.g., by procedure(s) controller 89. The architecture com patibility indication information element may comprise or include a value or code which is representative to the architecture and which is mapped to a definition or further description stored in memory of anchor processor circuitry 40 and wireless terminal 30.

[0082] Act 12-8 comprises distributed processor circuitry (DU) 42 relaying the message of act 12-7 through packet network 48 over pipe 46, to the anchor processing circuitry tunnel first endpoint obtained at act 12-5. The relayed message preferably includes the architecture compatibility indication information element.

[0083] Upon receipt of the message of act 12-8, as act 12-9 the anchor processor circuitry 40 initiates its execution of the attach procedure. As part of the attach procedure, or any other comparable procedure or communications request, as act 12-10 the anchor processor circuitry 40 checks to determine whether the procedure, or a communication comprising the procedure or independent of a procedure, is classified as a“qualified” communication. As explained previously, some procedures may automatically be considered as involving a“qualified” communication, but other procedures and/or communications may have to be evaluated based on certain characteristics, such as a session involving data transmission, which may be evaluated in terms of priority, bandwidth, or quality of service.

[0084] For the particular situation shown in Fig. 12, it is assume that the procedure warrants classification as a“qualified” communication. Accordingly, as act 12-11 the anchor processor circuitry 40 accords an anchor processing circuitry tunnel second endpoint for the wireless terminal 30, e.g., an allocated endpoint such as one of the CU-TEID_A endpoints shown in Fig. 11, for example. As a result of such allocation of a dedicated tunnel endpoint, as act 12-12 the anchor processor circuitry 40 sends a dedicated message which includes the newly allocated CU-TEID_A endpoint. The dedicated message of act 12-12 may include signaling and data. As act 12-13 the message of act 12-12 is relayed by distributed processor circuitry (DU) 42 over radio interface to wireless terminal 30. In the context of the example attach procedure, the message of act 12-13 may be a RRC connection request complete message, for example. Upon receipt of the message of act 12-13, the communications between wireless terminal 30 and anchor processor circuitry 40 may be carried in expeditious manner over an allocated tunnel 60A to one of the second anchor processing circuitry tunnel second endpoints CU-TEID_Ax, rather than over the default tunnel 60_D to CU-TEID_d.

[0085] Fig. 13 shows a portion of Fig. 12, and in particular contrasts the pipe at a beginning of the attach procedure of Fig. 12 and at the end of the attach procedure of Fig. 12. Fig. 13 shows the tunnel endpoints before and as a result of the attachment procedure.

[0086] It should be understood that, in lieu of the attach procedure of act 12-6, another one of the above-listed procedures may instead be performed. In such case, a message of such other procedure may include the architecture compatibility indication information element or fat pipe compatibility information element that serves to indicate or confirm to the radio access network that this particular wireless terminal 30 is able to function with the virtualized radio access network and the fat pipe 46 configured as described herein.

[0087] In conjunction with Fig. 12 it was previously mentioned that message of act 12-7 may include an architecture compatibility indication information element, also known as a fat pipe compatibility information element or as a UE capability information element. As explained above, such architecture compatibility indication information element or fat pipe compatibility information element serves to indicate or confirm to the radio access network that this particular wireless terminal 30 is able to function with the virtualized radio access network and the fat pipe 46 configured as described herein. Whereas in the context of the scenario of Fig. 12 the architecture compatibility indication information element is sent in conjunction with an attach procedure, it should be understood that the user equipment (UE) 30 may send such architecture compatibility indication information element on other occasions. An example of such an occasion is a request from the network, such as a request that the user equipment (UE) 30 send an indication of its UE capability to the network.

[0088]

An example of the architecture compatibility indication information element, also known as a fat pipe compatibility information element or as a UE capability information element, is shown below:

A ccessStratumRelease

The IE AccessStratumRelease indicates the release supported by the UE.

AccessStratumRelease information element

- ASN1 START

- TAG-ACCESSSTRATUMRELEASE-START

AccessStratumRelease ::= ENUMERATED {

rell5, spare7, spare6, spare5, spare4, spare3, spare2, sparel, ... }

- TAG-ACCESSSTRATUMRELEASE-STOP

- ASN1STOP

BandCom bin ationList

Architecture -Parameters

The IE UE-FATPIPE-Capability is used to convey the FAT PIPE Architecture UE Radio Access Capability

Parameters, see TS 38.306 [26].

UE-FATPIPE-Capability information element

- ASN1 START

- TAG-UE-NR-CAP ABILITY-START

UE-FATPIPE-Capability ::= SEQUENCE {

UE-FATPIPE-Capability UE-FATPIPE-Capability,

[0089] Fig. 14 shows example, basic, representative acts or steps which may be performed by a radio access network node including anchor processor circuitry 40 and distributed processor circuitry (DU) 42 according to an example embodiment and mode of the technology disclosed herein. Act 14-1 comprises providing at least one of an ar chitecture indication information element and an anchor processor circuitry tunnel first endpoint. Act 14-2 comprises transmitting at least one of the architecture indication in formation element and the anchor processor circuitry tunnel first endpoint over a radio interface to a wireless terminal. Act 14-3 and act 14-4 are optional acts, depending upon extent of implementation of example aspects of the technology disclosed herein. Act 14-3 comprises determining whether a communication involving the wireless terminal is a qualified communication. Act 14-4 comprises providing an anchor processor circuitry tunnel second endpoint at the anchor processor circuitry to be used for a qualified communication involving the wireless terminal.

[0090] Fig. 15 shows example, basic, representative acts or steps which may be performed by a wireless terminal 30 in conjunction with a radio access network comprising a radio access network node including anchor processor circuitry 40 and distributed processor circuitry (DU) 42 according to an example embodiment and mode of the technology disclosed herein. Act 15-1 comprises receiving over the radio interface at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint. Act 15-2 comprises generating a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint. Act 15-3 is an optional act, depending upon extent of implementation of example aspects of the technology disclosed herein. Act 15-3 comprises receiving an anchor processor circuitry tunnel second endpoint to be used for a qualified communication with the anchor processor circuitry.

[0091] The radio access network 24 fully implements a packet model rather than the

dedicated Circuit model where individual SRBs and DRBs are established for in dividual UEs and for particular services. Moreover, the MAC protocol layer, e.g.,

MAC controller 64, at the distributed processor circuitry site 42 may be able to receive data from wireless terminals over the air and multiplex these data packets and forward them to anchor processor circuitry 40 without any impact or degradations. The anchor processor circuitry 40 may be able to process these packets and forward them to the appropriate destination depending on their headers rather than its PIPE ID.

[0092] In the prior art, all RRC messages have to go through all layers of the protocol stack of the gNB shown in Fig. 6. This involves a separate instance in the UE for each layer of the protocol stack. Whenever a UE establishes or re-establishes a connection, e.g., at a handover, the instance for each layer must be established or re-established. Repeated establishment and re-establishment of the instances for each protocol layer on occasion of a handover, for example, utilizes considerable signaling, processing power, and time. As one of its advantages the technology disclosed herein addresses the signaling, processing power, and time concerns by separating the protocol stack so that only certain high layer protocols are executed at the anchor processor circuitry 40, and certain low layer protocols are moved to and executed at the distributed processor circuitry 42, at the distributed processor circuitry sites. In particular, at least some functionality of the Radio Resource Management (RRM) is moved to the radio unit, e.g., to distributed processor circuitry 42. When a channel is needed, the channel can be obtained at the distributed processor circuitry 42 rather than having to request the channel from the anchor processor circuitry 40. Moreover, the channel from the Dis tributed Unit (DU) 42 to the anchor processor circuitry 40 is persistent through the pipe 46. The technology disclosed herein achieves the desired connectivity, and sets up and flows in a faster way.

[0093] Some aspects of telephone technology years ago migrated from a circuit switched philosophy, involving dedicated wires or connections, to a packet switched philosophy, in which packets could take any route between source and destination. In a similar migratory manner, the Network Function Virtualization (NFV) radio access network of the technology disclosed herein flexibly routes packets transmitted through the radio access network between a wireless terminal and anchor processor circuitry without requiring a dedicated or unchangeable path for the packets, as illustrated, for example, by Fig. 9. The technology disclosed herein thus shows how the FAT PIPE concept may be introduced into traditional LTE and current 5G NR RAN sub-systems/Architecture, describing, e.g., signaling procedures in order for the network to indicate the support of the architecture and for the UE to indicate its capability and support of the new ar chitecture procedures and signaling.

[0094] As described herein, the Radio Access Network (RAN) may indicate the FAT PIPE Architecture in the SIB or MIB Broadcasts/Unicast. The RAN may also provide the IE regarding the TEID of the serving CU through the SIBs/MIBs or through Dedicated signaling during the attachment procedure. The RAN may also use separate CU TEIDs for different purposes. For example One CU TEID for attachment procedures, Random Access Procedures, Location/Routing Area Updates, and/or any other signaling procedures. Other CU TEIDs can be added, modified, and/or released during normal operations. In the Attach procedures, the RAN (and/or the Core Network) may assign a different CU TEID for the UE dedicated signaling using Dedicated RRC messages. During the initial system access, and/or cell selection/reselection, the UE may use the default CU TEID provided using SIBs/MIBs. During HO/mobility the default CU TEID can be communicated to the UE using Dedicated RRC message such as HO command or prepare for HO

The technology disclosed herein advantageously reduces signaling and expedites session establishment, re-establishment, resume, and ON-OFF operations. Moreover, the technology disclosed herein is integrated into practical application as an im provement in the communication arts by facilitating communication of network ar chitecture information to the wireless terminal, and wireless terminal capability in formation to the network, so that a pipe as described herein can be advantageously utilized. The technology disclosed herein is integrated into practical application as an improvement in the communication arts by providing mechanism for dedicated WO 2020/175490 PCT/JP2020/007528 signaling and data between the anchor processor circuitry and wireless terminal in view, e.g., of a tunnel endpoint assignment scheme executed by the anchor processor circuitry.

)951 ^J Among its various embodiments and modes, the technology disclosed herein includes one or more of the following features and/or benefits, which may be achieved either alone or in combination:

• Use of a single FAT IP PIPE to connect DU and CU, e.g., to connect anchor processor circuitry 40 and distributed processor circuitry 42, for all DRBs and SRBs traffic

• Packets being multiplexed over the FAT IP PIPE may use a new header to identify the UE, Session ID, and QoS.

• Radio Resource Management (RRM) functionality is split between DU and CU.

• Admission control and physical radio resource and bandwidth managements/allocations for SRBs and DRBs, and local (Intra) mobility are allocated at the DU, e.g., at the distributed processor circuitry 42.

• Inter-Node mobility is controlled by the CU

• All Radio Resource Management messaging (e.g., Radio establishment, re-establishment, release, resume, reconfigurations, etc.) is done at the DU level.

• No configuration/re-configurations of MAC, RLC, PDCP, SDAP are required while the wireless terminal remains within the RAN Virtual IP network.

• Radio Resources allocations (Grants, Semi-Persistence SPS, or Persistence) and release are managed at the MAC level, e.g., by MAC controller 64 at the distributed processor circuitry 42.

• A session is anchored at the CU, e.g., at anchor processor circuitry 40, while the wireless terminal is roaming within the same RAN Virtual IP network, where the DU uses the TEIDs of the CU to forward SRB/DRB packets to the appropriate CU. • End-to-End Security keys may be established between the CU and wireless terminal and the security keys last for the duration of the session while the wireless terminal is connected to the CU.

• Local Security Keys may be established over the air between the wireless terminal UE and the distributed processor circuitry 42, e.g., the DU.

• Inter-node mobility between CUs belonging to different RAN Virtual IP network.

• A backward compatible mode with 5G and LTE is achieved using IP tunneling of RRC messaging, Protocol primitives, and configurations information of 5G and/or LTE message formats.

• Broadcasting of the default/ signaling CU-TEID on MIB or SIB

• Broadcasting of the Network Architecture (FAT PIPE) on SIB/MIB

• The ability of the network to offload the UE INTO DEDICATED CU-TEIDS FOR

SIGNALLING AND Data.

• The ability of the UE to indicate its FAT PIPE capabilities during attached or based on network request

[0096]

Network Function Virtualization (NFV) may be further described by one or more of the following (all of which are incorporated herein by reference in their entirety):

• RP-181932,“Work Item on Support for Virtualized RAN in NR”, 3GPP TSG RAN

Meeting #81, Gold Coast, Australia, 10-13 September 2018.

• 3GPP TR 38.913 V15.0.0 (2018-06),“Study on scenarios and requirements for next

generation access technologies”, 3rd Generation Partnership Project; Technical

Specification Group Radio Access Network; Study on Scenarios and Requirements for

Next Generation Access Technologies; (Release 15).

• 3GPP TR 38.801 V14.0.0 (2017-03); 3rd Generation Partnership Project; Technical

Specification Group Radio Access Network; Study on new radio access technology:

Radio access architecture and interfaces (Release 14); Study on new radio access technology: Radio access architecture and interfaces.

[0097] Certain units and functionalities of radio access network 24 may be implemented by electronic machinery. For example, electronic machinery may refer to the processor circuitry described herein, such as anchor processor circuitry 40 and distributed processor circuitry 42. Moreover, the term“processor circuitry” is not limited to mean one processor, but may include plural processors, with the plural processors operating at one or more sites. Moreover, as used herein the term“server”, as in plural anchor processor circuitry servers 40_. i s not confined to one server unit, but may encompasses plural servers and/or other electronic equipment, and may be co-located at one site or distributed to different sites. With these understandings, Fig. 16 shows an example of electronic machinery, e.g., processor circuitry, as comprising one or more processors 190, program instruction memory 192; other memory 194 (e.g., RAM, cache, etc.); input/output interfaces 196 and 197, peripheral interfaces 198; support circuits 199; and busses 200 for communication between the aforementioned units. The processor(s) 190 may comprise the processor circuitries described herein, for example, the anchor processor circuitry 40 and distributed processor circuitry 42 distributed processor circuitry 42.

[0098] The memory 194, or computer-readable medium, may be one or more of readily available memory such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, flash memory or any other form of digital storage, local or remote, and is preferably of non-volatile nature, as and such may comprise memory 60 shown in Fig. 5. The support circuits 199 are coupled to the processors 190 for supporting the processor in a conventional manner. These circuits include cache, power supplies, clock circuits, input/output circuitry and subsystems, and the like.

[0099] Although the processes and methods of the disclosed embodiments may be discussed as being implemented as a software routine, some of the method steps that are disclosed therein may be performed in hardware as well as by a processor running software. As such, the embodiments may be implemented in software as executed upon a computer system, in hardware as an application specific integrated circuit or other type of hardware implementation, or a combination of software and hardware. The software routines of the disclosed embodiments are capable of being executed on any computer operating system, and is capable of being performed using any CPU ar chitecture.

[0100] The functions of the various elements including functional blocks, including but not limited to those labeled or described as“computer”,“processor” or“controller”, may be provided through the use of hardware such as circuit hardware and/or hardware capable of executing software in the form of coded instructions stored on computer readable medium. Thus, such functions and illustrated functional blocks are to be un derstood as being either hardware-implemented and/or computer-implemented, and thus machine-implemented.

[0101] In terms of hardware implementation, the functional blocks may include or

encompass, without limitation, digital signal processor (DSP) hardware, reduced in struction set processor, hardware (e.g., digital or analog) circuitry including but not limited to application specific integrated circuit(s) [ASIC], and/or field programmable gate array(s) (FPGA(s)), and (where appropriate) state machines capable of performing such functions.

[0102] In terms of computer implementation, a computer is generally understood to

comprise one or more processors or one or more controllers, and the terms computer and processor and controller may be employed interchangeably herein. When provided by a computer or processor or controller, the functions may be provided by a single dedicated computer or processor or controller, by a single shared computer or processor or controller, or by a plurality of individual computers or processors or con trollers, some of which may be shared or distributed. Moreover, use of the term “processor” or“controller” may also be construed to refer to other hardware capable of performing such functions and/or executing software, such as the example hardware recited above.

[0103] Nodes that communicate using the air interface also have suitable radio commu nications circuitry. Moreover, the technology disclosed herein may additionally be considered to be embodied entirely within any form of computer-readable memory, such as solid-state memory, magnetic disk, or optical disk containing an appropriate set of computer instructions that would cause a processor to carry out the techniques described herein.

[0104] Moreover, each functional block or various features of the wireless terminal 30 and radio access network 24 used in each of the aforementioned embodiments may be im plemented or executed by circuitry, which is typically an integrated circuit or a plurality of integrated circuits. The circuitry designed to execute the functions described in the present specification may comprise a general-purpose processor, a digital signal processor (DSP), an application specific or general application integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gates or transistor logic, or a discrete hardware component, or a com bination thereof. The general-purpose processor may be a microprocessor, or alter natively, the processor may be a conventional processor, a controller, a microcontroller or a state machine. The general-purpose processor or each circuit described above may be configured by a digital circuit or may be configured by an analogue circuit. Further, when a technology of making into an integrated circuit superseding integrated circuits at the present time appears due to advancement of a semiconductor technology, the in tegrated circuit by this technology is also able to be used.

[0105] The technology disclosed herein thus comprises and compasses the following non- exhaustive example embodiments and modes:

Example Embodiment 1: A radio access network comprising: anchor processor circuitry configured to perform high layer radio access network node operations; dis tributed processor circuitry configured to perform low layer radio access network node operations; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with a wireless terminal; wherein the anchor processor circuitry is configured to provide at least one of an architecture in dication information element and an anchor processor circuitry tunnel first endpoint, wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; and wherein the transceiver circuitry is configured to transmit the at least one of the architecture indication information element and the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal.

[0106] Example Embodiment 2: The radio access network of Example Embodiment 1,

wherein the architecture indication information element comprises a fat pipe indication information element.

[0107] Example Embodiment 3: The radio access network of Example Embodiment 1, wherein the pipe comprises a persistent connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the distributed processor circuitry so that a further connection need not be established for another transmission between the wireless terminal and the anchor processor circuitry.

[0108] Example Embodiment 4: The radio access network of Example Embodiment 1, wherein the anchor processor circuitry is configured to provide both of the architecture indication information element and the anchor processor circuitry tunnel first endpoint.

[0109] Example Embodiment 5: The radio access network of Example Embodiment 1, wherein the distributed processor circuitry is configured to provide a processor circuitry endpoint for the tunnel.

[0110] Example Embodiment 6: The radio access network of Example Embodiment 1, wherein the anchor processor circuitry is configured to provide the architecture in dication information element for broadcast by the transceiver circuitry as system in formation (in a system information block (SIB)).

[0111] Example Embodiment 7: The radio access network of Example Embodiment 1, wherein the anchor processor circuitry is configured to provide the anchor processor circuitry tunnel first endpoint for broadcast by the transceiver circuitry as system in formation.

[0112] Example Embodiment 8: The radio access network of Example Embodiment 1, wherein the anchor processor circuitry is configured to provide an anchor processor circuitry tunnel second endpoint at the anchor processor circuitry to be used for a qualified communication involving the wireless terminal.

[0113] Example Embodiment 9: The radio access network of Example Embodiment 8, wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[0114] Example Embodiment 10: The radio access network of Example Embodiment 9, wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[0115] Example Embodiment 11: The radio access network of Example Embodiment 8, wherein the anchor processor circuitry is configured to provide the anchor processor circuitry tunnel second endpoint to be used in lieu of the anchor processing circuitry first endpoint for the qualified communication involving the wireless terminal.

[0116] Example Embodiment 12: The radio access network of Example Embodiment 8, wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[0117] Example Embodiment 13: The radio access network of Example Embodiment 8, wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[0118] Example Embodiment 14: The radio access network of Example Embodiment 8, wherein the anchor processor circuitry is configured to provide the anchor processing circuitry tunnel second endpoint for transmission to the wireless terminal by the transceiver circuitry in a message dedicated to the wireless terminal

Example Embodiment 15: The radio access network of Example Embodiment 8, wherein the anchor processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on qualification of the communication.

[0119] Example Embodiment 16: The radio access network of Example Embodiment 8, wherein the anchor processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[0120] Example Embodiment 17: The radio access network of Example Embodiment 8, wherein anchor processor circuitry is configured to determine whether a commu nication involving the wireless terminal is the qualified communication.

[0121] Example Embodiment 18: The radio access network of Example Embodiment 17, wherein the qualified communication comprises a session comprising data

transmission.

[0122] Example Embodiment 19: The radio access network of Example Embodiment 18, wherein the qualified communication comprises a message of an attachment procedure.

[0123] Example Embodiment 20: The radio access network of Example Embodiment 18, wherein the qualified communication comprises a message of a handover procedure.

[0124] Example Embodiment 21: The radio access network of Example Embodiment 18, wherein the qualified communication comprises a message of an area update procedure.

[0125] Example Embodiment 22: The radio access network of Example Embodiment 18, wherein the qualified communication has at least one of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[0126] Example Embodiment 23: The radio access network of Example Embodiment 1, wherein: the high layer radio access network node operations comprise: a Service Data Adaptation Protocol (SDAP) operation; and a Packet Data Convergence Protocol (PDCP) operation; the low layer radio access network node operations comprise: a radio link control (RLC) operation; and a medium access control (MAC) operation.

[0127] Example Embodiment 24: A method in a radio access network comprising: providing anchor processor circuitry configured to perform high layer radio access network node operations; providing distributed processor circuitry configured to perform low layer radio access network node operations; using the anchor processor circuitry to provide at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint, wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; using transceiver circuitry associated with the distributed processor circuitry to transmit at least one of the architecture indication in formation element and the anchor processor circuitry tunnel first endpoint over a radio interface to a wireless terminal.

[0128] Example Embodiment 25: The method of Example Embodiment 24, wherein the ar chitecture indication information element comprises a fat pipe indication information element.

[0129] Example Embodiment 26: The method of Example Embodiment 24, wherein the pipe comprises a persistent connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the distributed processor circuitry so that a further connection need not be established for another transmission between the wireless terminal and the anchor processor circuitry.

[0130] Example Embodiment 27 : The method of Example Embodiment 24, further

comprising using the processor circuitry to provide both of the architecture indication information element and the anchor processor circuitry tunnel first endpoint.

[0131] Example Embodiment 28: The method of Example Embodiment 24, further

comprising using the distributed processor circuitry to provide a processor circuitry endpoint for the tunnel.

[0132] Example Embodiment 29: The method of Example Embodiment 24, further

comprising transceiver circuitry broadcasting the architecture indication information element as system information.

[0133] Example Embodiment 30: The method of Example Embodiment 24, further

comprising the transceiver circuitry broadcasting the anchor processor circuitry as system information. [0134] Example Embodiment 31 : The method of Example Embodiment 24, further comprising using the anchor processor circuitry to provide an anchor processor circuitry tunnel second endpoint at the anchor processor circuitry to be used for a qualified communication involving the wireless terminal.

[0135] Example Embodiment 32: The method of Example Embodiment 24, wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[0136] Example Embodiment 33: The method of Example Embodiment 32, wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[0137] Example Embodiment 34: The method of Example Embodiment 24, using the anchor processor circuitry to provide the anchor processor circuitry tunnel second endpoint to be used in lieu of the anchor processing circuitry first endpoint for the qualified com munication involving the wireless terminal.

[0138] Example Embodiment 35: The method of Example Embodiment 24, wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[0139] Example Embodiment 36: The method of Example Embodiment 24, wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[0140] Example Embodiment 37: The method of Example Embodiment 24, further

comprising the wireless terminal providing the anchor processing circuitry tunnel second endpoint in a message dedicated to the wireless terminal

Example Embodiment 38: The method of Example Embodiment 24, further comprising the anchor processor circuitry switching between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on qualification of the commu nication.

[0141] Example Embodiment 39: The method of Example Embodiment 24, wherein the anchor processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[0142] Example Embodiment 40: The method of Example Embodiment 24, further

comprising the anchor processor circuitry making a determination whether a commu nication involving the wireless terminal is the qualified communication. [0143] Example Embodiment 41: The method of Example Embodiment 40, wherein the qualified communication comprises a session comprising data transmission.

[0144] Example Embodiment 42: The method of Example Embodiment 40, wherein the qualified communication comprises a message of an attachment procedure.

[0145] Example Embodiment 43: The method of Example Embodiment 40, wherein the qualified communication comprises a message of a handover procedure.

[0146] Example Embodiment 44: The method of Example Embodiment 40, wherein the qualified communication comprises a message of an area update procedure.

[0147] Example Embodiment 45: The method of Example Embodiment 40, wherein the qualified communication has at least one of a predetermined bandwidth, a prede termined quality of service, and a predetermined priority.

[0148] Example Embodiment 46: The method of Example Embodiment 24, wherein: the high layer radio access network node operations comprise: a Service Data Adaptation Protocol (SDAP) operation; and a Packet Data Convergence Protocol (PDCP) operation; the low layer radio access network node operations comprise: a radio link control (RLC) operation; and a medium access control (MAC) operation.

[0149] Example Embodiment 47: A wireless terminal which communicates over a radio interface with a radio access network, the wireless terminal comprising: receiver circuitry configured to receive over the radio interface at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint; wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising an anchor processor circuitry and distributed processor circuitry, the anchor processor circuitry configured to perform high layer radio access network node operations and the distributed processor circuitry configured to perform low layer radio access network node operations; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; processor circuitry configured to generate a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint; transmitter circuitry configured to transmit the message over the radio interface.

[0150] Example Embodiment 48: The wireless terminal of Example Embodiment 47,

[0151] Example Embodiment 49: The wireless terminal of Example Embodiment 47,

wherein the pipe comprises a persistent connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the distributed processor circuitry so that a further connection need not be established for another transmission between the wireless terminal and the anchor processor circuitry.

[0152] Example Embodiment 50: The wireless terminal of Example Embodiment 47,

wherein the receiver circuitry is configured to receive over the radio interface both the architecture indication information element and the anchor processor circuitry tunnel first endpoint.

[0153] Example Embodiment 51 : The wireless terminal of Example Embodiment 47,

wherein the receiver circuitry is configured to receive the architecture indication in formation element as broadcasted system information from the radio access network.

[0154] Example Embodiment 52: The wireless terminal of Example Embodiment 47,

wherein the receiver circuitry is configured to receive the anchor processor circuitry tunnel first endpoint as broadcasted system information from the radio access network.

[0155] Example Embodiment 53: The wireless terminal of Example Embodiment 47,

wherein in response to the communication the receiver circuitry is configured to receive an anchor processor circuitry tunnel second endpoint to be used for a qualified communication with the anchor processor circuitry.

[0156] Example Embodiment 54: The wireless terminal of Example Embodiment 53,

wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[0157] Example Embodiment 55: The wireless terminal of Example Embodiment 54,

wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[0158] Example Embodiment 56: The wireless terminal of Example Embodiment 53,

wherein processor circuitry is configured to use the anchor processor circuitry tunnel second endpoint in lieu of the anchor processing circuitry first endpoint for the qualified communication.

[0159] Example Embodiment 57: The wireless terminal of Example Embodiment 53,

wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[0160] Example Embodiment 58: The wireless terminal of Example Embodiment 53,

wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[0161] Example Embodiment 59: The wireless terminal of Example Embodiment 53,

wherein the receiver circuitry is configured to receive the anchor processing circuitry tunnel second endpoint over the radio interface in a message dedicated to the wireless terminal

Example Embodiment 60: The wireless terminal of Example Embodiment 53, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for commu nications with the anchor processor circuitry depending on qualification of the commu nication.

[0162] Example Embodiment 61: The wireless terminal of Example Embodiment 53,

wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[0163] Example Embodiment 62: The wireless terminal of Example Embodiment 53,

wherein the qualified communication comprises a session comprising data

transmission.

[0164] Example Embodiment 63: The wireless terminal of Example Embodiment 62,

wherein the qualified communication comprises a message of an attachment procedure.

[0165] Example Embodiment 64: The wireless terminal of Example Embodiment 62,

wherein the qualified communication comprises a message of a handover procedure.

[0166] Example Embodiment 65: The wireless terminal of Example Embodiment 62,

wherein the qualified communication comprises a message of an area update procedure.

[0167] Example Embodiment 66: The wireless terminal of Example Embodiment 62,

wherein the qualified communication has at least one of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[0168] Example Embodiment 67: The wireless terminal of Example Embodiment 47,

wherein: the high layer radio access network node operations comprise: a Service Data Adaptation Protocol (SDAP) operation; and a Packet Data Convergence Protocol (PDCP) operation; the low layer radio access network node operations comprise: a radio link control (RLC) operation; and a medium access control (MAC) operation.

[0169] Example Embodiment 68: A method in a wireless terminal which communicates over a radio interface with a radio access network, the wireless terminal comprising: using receiver circuitry to receive over the radio interface at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint; wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising an anchor processor circuitry and distributed processor circuitry, the anchor processor circuitry configured to perform high layer radio access network node operations and the distributed processor circuitry configured to perform low layer radio access network node operations; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; using processor circuitry to generate a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint; transmitting the message over the radio interface.

[0170] Example Embodiment 69: The method of Example Embodiment 68, wherein the ar chitecture indication information element comprises a fat pipe indication information element.

[0171] Example Embodiment 70: The method of Example Embodiment 68, wherein the pipe comprises a persistent connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the distributed processor circuitry so that a further connection need not be established for another transmission between the wireless terminal and the anchor processor circuitry.

[0172] Example Embodiment 71 : The method of Example Embodiment 68, further

comprising using the receiver circuitry to receive over the radio interface both the ar chitecture indication information element and the anchor processor circuitry tunnel first endpoint.

[0173] Example Embodiment 72: The method of Example Embodiment 68, further

comprising using the receiver circuitry to receive the architecture indication in formation element as broadcasted system information from the radio access network.

[0174] Example Embodiment 73: The method of Example Embodiment 68, further

comprising using the receiver circuitry to receive the anchor processor circuitry tunnel first endpoint as broadcasted system information from the radio access network.

[0175] Example Embodiment 74: The method of Example Embodiment 68, further

comprising, in response to the communication, receiving an anchor processor circuitry tunnel second endpoint to be used for a qualified communication with the anchor processor circuitry.

[0176] Example Embodiment 75: The method of Example Embodiment 74, wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[0177] Example Embodiment 76: The method of Example Embodiment 75, wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[0178] Example Embodiment 77 : The method of Example Embodiment 74, further comprising the processor circuitry using the anchor processor circuitry tunnel second endpoint in lieu of the anchor processing circuitry first endpoint for the qualified com munication.

[0179] Example Embodiment 78: The method of Example Embodiment 74, wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[0180] Example Embodiment 79: The method of Example Embodiment 74, wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[0181] Example Embodiment 80: The method of Example Embodiment 74, further

comprising receiving the anchor processing circuitry tunnel second endpoint over the radio interface in a message dedicated to the wireless terminal

Example Embodiment 81: The method of Example Embodiment 74, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for commu nications with the anchor processor circuitry depending on qualification of the commu nication.

[0182] Example Embodiment 82: The method of Example Embodiment 74, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for commu nications with the wireless terminal depending on whether the communication comprises a data session.

[0183] Example Embodiment 83: The method of Example Embodiment 74, wherein the qualified communication comprises a session comprising data transmission.

[0184] Example Embodiment 84: The method of Example Embodiment 83, wherein the qualified communication comprises a message of an attachment procedure.

[0185] Example Embodiment 85: The method of Example Embodiment 83, wherein the qualified communication comprises a message of a handover procedure.

[0186] Example Embodiment 86: The method of Example Embodiment 83, wherein the qualified communication comprises a message of an area update procedure.

[0187] Example Embodiment 87: The method of Example Embodiment 83, wherein the qualified communication has at least one of a predetermined bandwidth, a prede termined quality of service, and a predetermined priority.

[0188] Example Embodiment 88: The method of Example Embodiment 68, wherein: the high layer radio access network node operations comprise: a Service Data Adaptation Protocol (SDAP) operation; and a Packet Data Convergence Protocol (PDCP) operation; the low layer radio access network node operations comprise: a radio link control (RLC) operation; and a medium access control (MAC) operation.

[0189] Example Embodiment 89: A radio access network comprising: anchor processor circuitry configured to perform high layer radio access network node operations; dis tributed processor circuitry configured to perform low layer radio access network node operations; a wireless terminal; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the anchor processor circuitry is configured to provide an architecture indication information element which indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; wherein the transceiver circuitry is configured to broadcast the architecture indication information element as system information over the radio interface to the wireless terminal; and wherein the wireless terminal is configured to receive the system information including the architecture indication in formation element and to use the architecture indication information element to com municate with the anchor processor circuitry.

[0190] Example Embodiment 90: A radio access network comprising: anchor processor circuitry configured to perform high layer radio access network node operations; dis tributed processor circuitry configured to perform low layer radio access network node operations; a wireless terminal; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the anchor processor circuitry is configured to provide an anchor processor circuitry tunnel first endpoint, the anchor processor circuitry tunnel first endpoint being an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; and wherein the transceiver circuitry is configured to transmit the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal; and wherein the wireless terminal is configured to receive and use the anchor processor circuitry tunnel first endpoint for communicating with the anchor processor circuitry.

[0191] Example Embodiment 91: The radio access network of Example Embodiment 90, wherein the processor circuitry is further configured: to receive a communication from the wireless terminal; in conjunction with the communication received from the wireless terminal, to provide an anchor processing circuitry tunnel second endpoint; and to establish dedicated communication with the wireless terminal using the anchor processing circuitry tunnel second endpoint in lieu of the anchor processing circuitry tunnel first endpoint.

[0192] Example Embodiment 92: A radio access network comprising: anchor processor circuitry configured to perform high layer radio access network node operations; dis tributed processor circuitry configured to perform low layer radio access network node operations; a wireless terminal; transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the wireless terminal is configured, when executing a prede termined procedure or when requested by the radio access network: to generate and to transmit, to the transceiver circuitry associated with the distributed processor circuitry, a capability indication which informs the radio access network that the wireless terminal is configured to communicate with the anchor processor circuitry through a pipe which connects the anchor processor circuitry and the distributed processor circuitry through a packet network; and to perform further communications with the anchor processor circuitry in accordance with signaling based on the capability in dication received from the anchor processor circuitry.

[0193] It will be appreciated that the technology disclosed herein is directed to solving radio communications-centric issues and is necessarily rooted in computer technology and overcomes problems specifically arising in radio communications. Moreover, the technology disclosed herein improves basic function of a radio access network, e.g., enabling faster and simplified access to the network and expedited, simplified handover operations.

[0194] Although the description above contains many specificities, these should not be construed as limiting the scope of the technology disclosed herein but as merely providing illustrations of some of the presently preferred embodiments of the technology disclosed herein. Thus the scope of the technology disclosed herein should be determined by the appended claims and their legal equivalents. Therefore, it will be appreciated that the scope of the technology disclosed herein fully encompasses other embodiments which may become obvious to those skilled in the art, and that the scope of the technology disclosed herein is accordingly to be limited by nothing other than the appended claims, in which reference to an element in the singular is not intended to mean "one and only one" unless explicitly so stated, but rather "one or more." The above-described embodiments could be combined with one another. All structural, chemical, and functional equivalents to the elements of the above-described preferred embodiment that are known to those of ordinary skill in the art are expressly in corporated herein by reference and are intended to be encompassed by the present claims. Moreover, it is not necessary for a device or method to address each and every problem sought to be solved by the technology disclosed herein, for it to be en compassed by the present claims. Furthermore, no element, component, or method step in the present disclosure is intended to be dedicated to the public regardless of whether the element, component, or method step is explicitly recited in the claims. [0195] <Cross Reference>

This Nonprovisional application claims priority under 35 U.S.C. § 119 on provisional Application No. 62,811,375 on February 27 2019, the entire contents of which are hereby incorporated by reference.

[0196] What is claimed is:

Claims

[Claim 1] A radio access network comprising:

anchor processor circuitry configured to perform high layer radio access network node operations;

distributed processor circuitry configured to perform low layer radio access network node operations;

transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with a wireless terminal;

wherein the anchor processor circuitry is configured to provide at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint, wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the dis tributed processor circuitry; and

wherein the transceiver circuitry is configured to transmit the at least one of the architecture indication information element and the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal.

[Claim 2] The radio access network of claim 1, wherein the architecture in

dication information element comprises a fat pipe indication in formation element.

[Claim 3] The radio access network of claim 1, wherein the pipe comprises a persistent connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the dis tributed processor circuitry so that a further connection need not be es tablished for another transmission between the wireless terminal and the anchor processor circuitry.

[Claim 4] The radio access network of claim 1, wherein the anchor processor circuitry is configured to provide both of the architecture indication in formation element and the anchor processor circuitry tunnel first endpoint.

[Claim 5] The radio access network of claim 1, wherein the distributed processor circuitry is configured to provide a processor circuitry endpoint for the tunnel.

[Claim 6] The radio access network of claim 1, wherein the anchor processor circuitry is configured to provide the architecture indication in formation element for broadcast by the transceiver circuitry as system information (in a system information block (SIB)).

[Claim 7] The radio access network of claim 1, wherein the anchor processor circuitry is configured to provide the anchor processor circuitry tunnel first endpoint for broadcast by the transceiver circuitry as system in formation.

[Claim 8] The radio access network of claim 1, wherein the anchor processor circuitry is configured to provide an anchor processor circuitry tunnel second endpoint at the anchor processor circuitry to be used for a qualified communication involving the wireless terminal.

[Claim 9] The radio access network of claim 8, wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[Claim 10] The radio access network of claim 9, wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[Claim 11] The radio access network of claim 8, wherein the anchor processor circuitry is configured to provide the anchor processor circuitry tunnel second endpoint to be used in lieu of the anchor processing circuitry first endpoint for the qualified communication involving the wireless terminal.

[Claim 12] The radio access network of claim 8, wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[Claim 13] The radio access network of claim 8, wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[Claim 14] The radio access network of claim 8, wherein the anchor processor circuitry is configured to provide the anchor processing circuitry tunnel second endpoint for transmission to the wireless terminal by the

transceiver circuitry in a message dedicated to the wireless terminal.

[Claim 15] The radio access network of claim 8, wherein the anchor processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on qualification of the communication.

[Claim 16] The radio access network of claim 8, wherein the anchor processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[Claim 17] The radio access network of claim 8, wherein anchor processor

circuitry is configured to determine whether a communication involving the wireless terminal is the qualified communication.

[Claim 18] The radio access network of claim 17, wherein the qualified commu nication comprises a session comprising data transmission.

[Claim 19] The radio access network of claim 18, wherein the qualified commu nication comprises a message of an attachment procedure.

[Claim 20] The radio access network of claim 18, wherein the qualified commu nication comprises a message of a handover procedure.

[Claim 21] The radio access network of claim 18, wherein the qualified commu nication comprises a message of an area update procedure.

[Claim 22] The radio access network of claim 18, wherein the qualified commu nication has at least one of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[Claim 23] The radio access network of claim 1, wherein:

the high layer radio access network node operations comprise:

a Service Data Adaptation Protocol (SDAP) operation; and

a Packet Data Convergence Protocol (PDCP) operation;

the low layer radio access network node operations comprise:

a radio link control (RLC) operation; and

a medium access control (MAC) operation.

[Claim 24] A method in a radio access network comprising:

providing anchor processor circuitry configured to perform high layer radio access network node operations;

providing distributed processor circuitry configured to perform low layer radio access network node operations; using the anchor processor circuitry to provide at least one of an ar chitecture indication information element and an anchor processor circuitry tunnel first endpoint, wherein

the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; and the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the dis tributed processor circuitry;

using transceiver circuitry associated with the distributed processor circuitry to transmit at least one of the architecture indication in formation element and the anchor processor circuitry tunnel first endpoint over a radio interface to a wireless terminal.

[Claim 25] The method of claim 24, wherein the architecture indication in

formation element comprises a fat pipe indication information element.

[Claim 26] The method of claim 24, wherein the pipe comprises a persistent

connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the distributed processor circuitry so that a further connection need not be established for another transmission between the wireless terminal and the anchor processor circuitry.

[Claim 27] The method of claim 24, further comprising using the processor

circuitry to provide both of the architecture indication information element and the anchor processor circuitry tunnel first endpoint.

[Claim 28] The method of claim 24, further comprising using the distributed

processor circuitry to provide a processor circuitry endpoint for the tunnel.

[Claim 29] The method of claim 24, further comprising transceiver circuitry

broadcasting the architecture indication information element as system information.

[Claim 30] The method of claim 24, further comprising the transceiver circuitry broadcasting the anchor processor circuitry as system information.

[Claim 31] The method of claim 24, further comprising using the anchor processor circuitry to provide an anchor processor circuitry tunnel second endpoint at the anchor processor circuitry to be used for a qualified communication involving the wireless terminal.

[Claim 32] The method of claim 24, wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[Claim 33] The method of claim 32, wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[Claim 34] The method of claim 24, using the anchor processor circuitry to provide the anchor processor circuitry tunnel second endpoint to be used in lieu of the anchor processing circuitry first endpoint for the qualified com munication involving the wireless terminal.

[Claim 35] The method of claim 24, wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[Claim 36] The method of claim 24, wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[Claim 37] The method of claim 24, further comprising the wireless terminal

providing the anchor processing circuitry tunnel second endpoint in a message dedicated to the wireless terminal.

[Claim 38] The method of claim 24, further comprising the anchor processor

circuitry switching between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on qualification of the communication.

[Claim 39] The method of claim 24, wherein the anchor processor circuitry is

configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[Claim 40] The method of claim 24, further comprising the anchor processor

circuitry making a determination whether a communication involving the wireless terminal is the qualified communication.

[Claim 41] The method of claim 40, wherein the qualified communication

comprises a session comprising data transmission.

[Claim 42] The method of claim 40, wherein the qualified communication comprises a message of an attachment procedure.

[Claim 43] The method of claim 40, wherein the qualified communication

comprises a message of a handover procedure.

[Claim 44] The method of claim 40, wherein the qualified communication

comprises a message of an area update procedure.

[Claim 45] The method of claim 40, wherein the qualified communication has at least one of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[Claim 46] The method of claim 24, wherein:

the high layer radio access network node operations comprise:

a Service Data Adaptation Protocol (SDAP) operation; and

a Packet Data Convergence Protocol (PDCP) operation;

the low layer radio access network node operations comprise:

a radio link control (RLC) operation; and

a medium access control (MAC) operation.

[Claim 47] A wireless terminal which communicates over a radio interface with a radio access network, the wireless terminal comprising:

receiver circuitry configured to receive over the radio interface at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint; wherein the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising an anchor processor circuitry and distributed processor circuitry, the anchor processor circuitry configured to perform high layer radio access network node operations and the distributed processor circuitry configured to perform low layer radio access network node operations; and

the anchor processor circuitry tunnel first endpoint is an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the dis tributed processor circuitry;

processor circuitry configured to generate a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint;

transmitter circuitry configured to transmit the message over the radio interface.

[Claim 48] The wireless terminal of claim 47, wherein the architecture indication information element comprises a fat pipe indication information

element.

[Claim 49] The wireless terminal of claim 47, wherein the pipe comprises a

persistent connection to facilitate transmission of packets through the packet network between the anchor processor circuitry and the dis tributed processor circuitry so that a further connection need not be es tablished for another transmission between the wireless terminal and the anchor processor circuitry.

[Claim 50] The wireless terminal of claim 47, wherein the receiver circuitry is configured to receive over the radio interface both the architecture in dication information element and the anchor processor circuitry tunnel first endpoint.

[Claim 51] The wireless terminal of claim 47, wherein the receiver circuitry is configured to receive the architecture indication information element as broadcasted system information from the radio access network.

[Claim 52] The wireless terminal of claim 47, wherein the receiver circuitry is configured to receive the anchor processor circuitry tunnel first endpoint as broadcasted system information from the radio access network.

[Claim 53] The wireless terminal of claim 47, wherein in response to the commu nication the receiver circuitry is configured to receive an anchor processor circuitry tunnel second endpoint to be used for a qualified communication with the anchor processor circuitry.

[Claim 54] The wireless terminal of claim 53, wherein the anchor processing

circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[Claim 55] The wireless terminal of claim 54, wherein the particular procedure as sociated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[Claim 56] The wireless terminal of claim 53, wherein processor circuitry is

configured to use the anchor processor circuitry tunnel second endpoint in lieu of the anchor processing circuitry first endpoint for the qualified communication.

[Claim 57] The wireless terminal of claim 53, wherein the anchor processor

circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor

processing circuitry first endpoint.

[Claim 58] The wireless terminal of claim 53, wherein the anchor processor

circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[Claim 59] The wireless terminal of claim 53, wherein the receiver circuitry is configured to receive the anchor processing circuitry tunnel second endpoint over the radio interface in a message dedicated to the wireless terminal.

[Claim 60] The wireless terminal of claim 53, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the anchor processor circuitry depending on qual ification of the communication.

[Claim 61] The wireless terminal of claim 53, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[Claim 62] The wireless terminal of claim 53, wherein the qualified commu

nication comprises a session comprising data transmission.

[Claim 63] The wireless terminal of claim 62, wherein the qualified commu

nication comprises a message of an attachment procedure.

[Claim 64] The wireless terminal of claim 62, wherein the qualified commu

nication comprises a message of a handover procedure.

[Claim 65] The wireless terminal of claim 62, wherein the qualified commu

nication comprises a message of an area update procedure.

[Claim 66] The wireless terminal of claim 62, wherein the qualified commu

nication has at least one of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[Claim 67] The wireless terminal of claim 47, wherein:

the high layer radio access network node operations comprise:

a Service Data Adaptation Protocol (SDAP) operation; and

a Packet Data Convergence Protocol (PDCP) operation;

the low layer radio access network node operations comprise:

a radio link control (RLC) operation; and

a medium access control (MAC) operation.

[Claim 68] A method in a wireless terminal which communicates over a radio interface with a radio access network, the wireless terminal comprising:

using receiver circuitry to receive over the radio interface at least one of an architecture indication information element and an anchor processor circuitry tunnel first endpoint; wherein

the architecture indication information element indicates that the radio access network is a virtualized radio access network comprising an anchor processor circuitry and distributed processor circuitry, the anchor processor circuitry configured to perform high layer radio access network node operations and the distributed processor circuitry configured to perform low layer radio access network node operations; and

using processor circuitry to generate a message for transmission over the radio interface to the anchor processor circuitry at the anchor processing circuitry first endpoint;

transmitting the message over the radio interface.

[Claim 69] The method of claim 68, wherein the architecture indication in

formation element comprises a fat pipe indication information element.

[Claim 70] The method of claim 68, wherein the pipe comprises a persistent

[Claim 71] The method of claim 68, further comprising using the receiver circuitry to receive over the radio interface both the architecture indication in formation element and the anchor processor circuitry tunnel first endpoint.

[Claim 72] The method of claim 68, further comprising using the receiver circuitry to receive the architecture indication information element as broadcasted system information from the radio access network.

[Claim 73] The method of claim 68, further comprising using the receiver circuitry to receive the anchor processor circuitry tunnel first endpoint as broadcasted system information from the radio access network.

[Claim 74] The method of claim 68, further comprising, in response to the commu nication, receiving an anchor processor circuitry tunnel second endpoint to be used for a qualified communication with the anchor processor circuitry.

[Claim 75] The method of claim 74, wherein the anchor processing circuitry tunnel second endpoint is associated with a particular procedure performed by the anchor processor circuitry.

[Claim 76] The method of claim 75, wherein the particular procedure associated with the anchor processing circuitry tunnel second endpoint is one of an attach procedure, a random access procedure, a location area update procedure, a routing area update procedure, and a handover procedure.

[Claim 77] The method of claim 75, further comprising the processor circuitry using the anchor processor circuitry tunnel second endpoint in lieu of the anchor processing circuitry first endpoint for the qualified commu nication.

[Claim 78] The method of claim 74, wherein the anchor processor circuitry tunnel second endpoint provides the wireless terminal with expedited transmission through the pipe to the anchor processor circuitry for the qualified communication relative to the anchor processing circuitry first endpoint.

[Claim 79] The method of claim 74, wherein the anchor processor circuitry tunnel second endpoint is a dedicated anchor processor circuitry endpoint for the wireless terminal.

[Claim 80] The method of claim 74, further comprising receiving the anchor

processing circuitry tunnel second endpoint over the radio interface in a message dedicated to the wireless terminal.

[Claim 81] The method of claim 74, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the anchor processor circuitry depending on qualification of the communication.

[Claim 82] The method of claim 74, wherein the processor circuitry is configured to switch between the anchor processing circuitry first endpoint and the anchor processing circuitry tunnel second endpoint for communications with the wireless terminal depending on whether the communication comprises a data session.

[Claim 83] The method of claim 74, wherein the qualified communication

comprises a session comprising data transmission.

[Claim 84] The method of claim 83, wherein the qualified communication

comprises a message of an attachment procedure.

[Claim 85] The method of claim 83, wherein the qualified communication

comprises a message of a handover procedure.

[Claim 86] The method of claim 83, wherein the qualified communication

comprises a message of an area update procedure.

[Claim 87] The method of claim 83, wherein the qualified communication has at least one of a predetermined bandwidth, a predetermined quality of service, and a predetermined priority.

[Claim 88] The method of claim 68, wherein:

the high layer radio access network node operations comprise:

a Service Data Adaptation Protocol (SDAP) operation; and

a Packet Data Convergence Protocol (PDCP) operation;

the low layer radio access network node operations comprise:

a radio link control (RLC) operation; and

a medium access control (MAC) operation.

[Claim 89] A radio access network comprising:

a wireless terminal;

transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal;

wherein the anchor processor circuitry is configured to provide an ar chitecture indication information element which indicates that the radio access network is a virtualized radio access network comprising the anchor processor circuitry and the distributed processor circuitry; wherein the transceiver circuitry is configured to broadcast the ar chitecture indication information element as system information over the radio interface to the wireless terminal; and

wherein the wireless terminal is configured to receive the system in formation including the architecture indication information element and to use the architecture indication information element to communicate with the anchor processor circuitry.

[Claim 90] A radio access network comprising:

a wireless terminal;

wherein the anchor processor circuitry is configured to provide an anchor processor circuitry tunnel first endpoint, the anchor processor circuitry tunnel first endpoint being an endpoint at the anchor processor circuitry for a tunnel through which at least signaling involving the wireless terminal is at least initially carried in a pipe over a packet network between the anchor processor circuitry and the distributed processor circuitry; and

wherein the transceiver circuitry is configured to transmit the anchor processor circuitry tunnel first endpoint over the radio interface to the wireless terminal; and

wherein the wireless terminal is configured to receive and use the anchor processor circuitry tunnel first endpoint for communicating with the anchor processor circuitry.

[Claim 91] The radio access network of claim 90, wherein the processor circuitry is further configured:

to receive a communication from the wireless terminal;

in conjunction with the communication received from the wireless terminal, to provide an anchor processing circuitry tunnel second endpoint; and

to establish dedicated communication with the wireless terminal using the anchor processing circuitry tunnel second endpoint in lieu of the anchor processing circuitry tunnel first endpoint.

[Claim 92] A radio access network comprising:

a wireless terminal;

transceiver circuitry associated with the distributed processor circuitry and configured to communicate over a radio interface with the wireless terminal; wherein the wireless terminal is configured, when executing a prede termined procedure or when requested by the radio access network: to generate and to transmit, to the transceiver circuitry associated with the distributed processor circuitry, a capability indication which informs the radio access network that the wireless terminal is configured to communicate with the anchor processor circuitry through a pipe which connects the anchor processor circuitry and the distributed processor circuitry through a packet network; and

to perform further communications with the anchor processor circuitry in accordance with signaling based on the capability indication received from the anchor processor circuitry.