WO2020173067A1 - 适用于柔性直流的无源阻抗适配器参数设计方法及装置 - Google Patents

适用于柔性直流的无源阻抗适配器参数设计方法及装置 Download PDF

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WO2020173067A1
WO2020173067A1 PCT/CN2019/103748 CN2019103748W WO2020173067A1 WO 2020173067 A1 WO2020173067 A1 WO 2020173067A1 CN 2019103748 W CN2019103748 W CN 2019103748W WO 2020173067 A1 WO2020173067 A1 WO 2020173067A1
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adapter
value
main
impedance
flexible
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PCT/CN2019/103748
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English (en)
French (fr)
Inventor
邹常跃
饶宏
赵晓斌
许树楷
李岩
陈俊
辛清明
李巍巍
杨双飞
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南方电网科学研究院有限责任公司
中国南方电网有限责任公司
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Priority to EP19916647.1A priority Critical patent/EP3780312B8/en
Publication of WO2020173067A1 publication Critical patent/WO2020173067A1/zh
Priority to US17/460,151 priority patent/US20210391746A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
    • H02J13/00002—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network characterised by monitoring
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/126—Arrangements for reducing harmonics from ac input or output using passive filters
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/26—Pc applications
    • G05B2219/2639—Energy management, use maximum of cheap power, keep peak load low
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • H02J2003/365—Reducing harmonics or oscillations in HVDC
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

Definitions

  • the invention relates to the technical field of flexible direct current system optimization, in particular to a parameter design method and device of a passive impedance adaptor suitable for flexible direct current.
  • Flexible DC transmission is a new generation of DC transmission technology based on voltage source converters. It has significant advantages in terms of new energy consumption, economy, flexibility and reliability, and has developed rapidly in recent years. However, with the continuous increase of flexible DC transmission capacity and the large-scale application of high-power power electronic equipment in the grid, flexible DC transmission has the risk of high-frequency resonance when connected to the grid, which affects the safety and stability of the grid and the safety of power equipment.
  • harmonic resonance suppression solutions limiting the grid impedance, optimizing the flexible DC impedance, and adding auxiliary equipment.
  • the impedance of the grid is related to factors such as operation mode, load, power flow, and its impedance amplitude and phase may vary widely. Because the operation mode arrangement is related to multiple factors, and AC failures such as lightning strikes may also occur It is difficult to implement a long-term solution that leads to forced changes in the operation mode and restricts the operation mode to avoid harmonic resonance.
  • the embodiment of the present invention provides a passive impedance adapter parameter design method suitable for flexible direct current, which can realize the parameter design of the passive impedance adapter, so as to realize the positive impedance characteristic in the full frequency band of interest and completely eliminate the risk of harmonic resonance.
  • the first embodiment of the present invention provides a parameter design method of a passive impedance adapter suitable for flexible direct current.
  • the passive impedance adapter includes a main capacitor, a main resistor, and a branch inductance; the main capacitor is connected in series with the main resistor; The branch inductance is connected in parallel with both ends of the main resistor;
  • the parameter design method includes the following steps:
  • min[X(f)-X adapter (f)]>k does not hold, increase the value of the main capacitor, and perform steps S2-S4 until the value of the main capacitor is less than the value of the main capacitor
  • min[X(f)-X adapter (f)]>k is established; output the values of the main capacitance, branch inductance and main resistance at this time as the available parameters and store them in the available parameter set;
  • min[X(f)-X adapter (f)]>k is still not established, reduce the value of k, and perform step S4;
  • the estimation of the upper limit of the main capacitance in the passive impedance adapter is specifically estimated according to the following formula:
  • S C is the short-circuit capacity of the converter station access point
  • U is the rated voltage of the converter station access point
  • ⁇ 0 is the fundamental angular frequency
  • a is the voltage fluctuation value allowed in the standard.
  • the upper limit value of the main capacitor is set according to the short-circuit capacity of the access point of the converter station, the rated voltage of the access point of the converter station and the fundamental wave angular frequency.
  • the adapter parameter curve is shown in the following formula:
  • X adapter (f) is the impedance amplitude of the passive impedance adapter.
  • step S5 further includes: reducing the value of the main capacitor, and performing steps S2-S4 until the value of the main capacitor is the smallest within the range of the main capacitor value; and the corresponding main capacitor, The values of branch inductance and main resistance are added to the available parameter group.
  • the second embodiment of the present invention correspondingly provides a passive impedance adapter parameter design device suitable for flexible direct current, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, When the processor executes the computer program, the parameter design method of the passive impedance adapter suitable for flexible direct current as described in the first embodiment of the present invention is realized.
  • the third embodiment of the present invention correspondingly provides a computer-readable storage medium, wherein the computer-readable storage medium includes a stored computer program, wherein the computer-readable storage medium is controlled when the computer program is running
  • the device where it is located executes the parameter design method of a passive impedance adapter suitable for flexible DC as described in the first embodiment of the present invention.
  • the parameter design method of a passive impedance adapter suitable for flexible direct current provided by the embodiment of the present invention has the following beneficial effects:
  • FIG. 1 is a schematic structural diagram of a passive impedance adapter provided by an embodiment of the present invention.
  • FIG. 2 is a schematic flowchart of a parameter design method of a passive impedance adapter suitable for flexible direct current provided by an embodiment of the present invention.
  • Fig. 3 is a schematic diagram of the principle of an impedance adapter provided by a specific embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the curves of feedforward with filtering and feedforward without filtering according to a specific embodiment of the present invention.
  • Fig. 5 is a schematic diagram of X(f) and X adapter (f) when the main resistance is 300 ⁇ and 350 ⁇ provided by a specific embodiment of the present invention.
  • Fig. 6 is a schematic diagram of X(f) and Xadapter(f) when the reactive power provided by a specific embodiment of the present invention is 100Mvar, 80Mvar, and 60Mvar.
  • FIG. 7 is a schematic diagram of the principle of an impedance adapter provided by another embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a passive impedance adapter provided by an embodiment of the present invention, including: a main capacitor, a main resistor, and a branch inductance; the main capacitor is connected in series with the main resistance; the branch inductance is connected in parallel at both ends of the main resistance ;
  • FIG. 2 is a schematic flowchart of a parameter design method of a passive impedance adapter suitable for flexible DC according to an embodiment of the present invention.
  • the parameter design method includes the following steps:
  • min[X(f)-X adapter (f)]>k does not hold, increase the value of the main capacitor and perform steps S2-S4 until the value of the main capacitor is less than the upper limit of the main capacitor value, min [X(f)-X adapter (f)]>k is established; output the values of main capacitor, branch inductance and main resistance at this time as available parameters and store them in the available parameter set; if the value of main capacitor is the range of the main capacitor value When the maximum value is within, min[X(f)-X adapter (f)]>k is still not established, reduce the size of k, and go to step S4;
  • the estimation of the size of the main capacitor in the passive impedance adapter is specifically estimated according to the following formula:
  • S C is the short-circuit capacity of the converter station access point
  • U is the rated voltage of the converter station access point
  • ⁇ 0 is the fundamental angular frequency
  • a is the voltage fluctuation value allowed in the standard.
  • the size of the main capacitor is set according to the short-circuit capacity of the access point of the converter station, the rated voltage of the access point of the converter station and the value of the fundamental angle frequency.
  • ⁇ 0 is numerically equal to 50*2 ⁇ or 60*2 ⁇ .
  • a% is selected from 1% to 2%, and the selection basis is: "For the switching of a single group of reactive components, the steady-state AC bus voltage change rate should not exceed 1% to 2% of the rated voltage" specified by DL5223 , If there are other special regulations in the power grid, follow the corresponding regulations.
  • the estimated value of the main resistance is selected to be less than min(X(f)).
  • Estimated value of branch inductance, branch inductance can be selected to be about 0.1% of the main capacitance.
  • the estimated value of the branch capacitance, and the branch inductance resonate at the fundamental frequency of the grid.
  • the branch capacitor If the value of the branch capacitor is too large, the cost of the branch capacitor is extremely high, which is higher than the cost saved by eliminating the loss of the main resistor R, and the branch capacitor can be omitted.
  • X adapter (f) is the impedance amplitude of the impedance adapter.
  • step S5 further includes: reducing the value of the main capacitor, and performing steps S2-S4 until the value of the main capacitor is the smallest within the range of the main capacitor value; and the corresponding main capacitor and branch inductance And the value of the main resistance are added to the available parameter group.
  • Z grid is the impedance of the AC power grid. Its amplitude varies between (0, + ⁇ ), and the phase angle is (-90°, +90°). ), the real part is always positive.
  • Z 1 is the MMC flexible DC AC impedance, and Z 2 is the passive impedance adapter. If the real part of the converter station impedance is always positive after Z 1 and Z 2 are connected in parallel, there is no condition for harmonic resonance in the system.
  • k ⁇ 0 is preset.
  • the larger the k the higher the design requirements and the larger the stability margin.
  • the low-frequency X adapter (f) becomes larger, and the high-frequency X adapter (f) becomes smaller. Considering this characteristic, there is an optimal main resistance value under a specific main capacitor value.
  • the flexible DC AC equivalent inductance L is 202 mH
  • the control link delay is 600 ⁇ s
  • the PI controller parameter is 50,500.
  • the four converter valves are connected in parallel on the AC side.
  • the passive impedance adapter parameters designed by a passive impedance adapter parameter design method suitable for flexible direct current provided by an embodiment of the present invention can make the impedance always have a positive value. In any AC grid, high-frequency harmonic resonance will not occur.
  • the passive impedance adapter includes a main capacitor, a main resistor, a branch inductance, and a branch capacitor; the main capacitor is connected in series with the main resistance; the branch inductance and the branch are connected in series. The capacitors are connected in series to obtain a series branch, and the series branch is connected in parallel at both ends of the main resistor.
  • the method and device for designing parameters of a passive impedance adapter suitable for flexible direct current provided by the embodiments of the present invention have the following beneficial effects:
  • Another embodiment of the present invention correspondingly provides a passive impedance adapter parameter design device suitable for flexible direct current, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, When the processor executes the computer program, the parameter design method of the passive impedance adapter suitable for flexible direct current as described in the first embodiment of the present invention is realized.
  • the passive impedance adapter parameter design device suitable for flexible DC can be computing devices such as desktop computers, notebooks, palmtops, and cloud servers.
  • the passive impedance adapter parameter design device suitable for flexible direct current may include, but is not limited to, a processor and a memory.
  • Another embodiment of the present invention correspondingly provides a computer-readable storage medium, wherein the computer-readable storage medium includes a stored computer program, wherein the computer-readable storage medium is controlled while the computer program is running
  • the device where the medium is located executes the parameter design method of a passive impedance adapter suitable for flexible DC as described in the first embodiment of the present invention.
  • the so-called processor can be a central processing unit (Central ProCessing Unit, CPU), other general-purpose processors, digital signal processors (Digital Signal ProCessor, DSP), application-specific integrated circuits (AppliCation SpeCifiC Integrated CirCuit, ASIC), on-site Field-Programmable Gate Array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.
  • the general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.
  • the processor is the control center of the passive impedance adapter parameter design device suitable for flexible direct current, using various interfaces and The circuit is connected to the various parts of the entire parameter design device of the passive impedance adapter suitable for flexible DC.
  • the memory may be used to store the computer program and/or module, and the processor implements the application by running or executing the computer program and/or module stored in the memory, and calling data stored in the memory.
  • Various functions of the passive impedance adapter parameter design device for flexible DC may mainly include a storage program area and a storage data area, where the storage program area may store an operating system, an application program required by at least one function (such as a sound playback function, an image playback function, etc.); the storage data area may store Data (such as audio data, phone book, etc.) created based on the use of mobile phones.
  • the memory can include high-speed random access memory, and can also include non-volatile memory, such as hard disks, memory, plug-in hard disks, Smart Media Card (SMC), and Secure Digital (SD) cards.
  • non-volatile memory such as hard disks, memory, plug-in hard disks, Smart Media Card (SMC), and Secure Digital (SD) cards.
  • Flash Card at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.
  • the integrated module/unit of the passive impedance adapter parameter design device suitable for flexible DC is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium .
  • the present invention implements all or part of the processes in the above-mentioned embodiments and methods, and can also be completed by instructing relevant hardware through a computer program.
  • the computer program can be stored in a computer-readable storage medium. When the program is executed by the processor, the steps of the foregoing method embodiments can be implemented.
  • the computer program includes computer program code, and the computer program code may be in the form of source code, object code, executable file, or some intermediate forms.
  • the computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory) , Random Access Memory (RAM, Random ACCess Memory), electrical carrier signal, telecommunications signal, and software distribution media, etc.
  • the device embodiments described above are only illustrative, and the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physically separate. Units can be located in one place or distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • the connection relationship between the modules indicates that they have a communication connection, which can be specifically implemented as one or more communication buses or signal lines. Those of ordinary skill in the art can understand and implement it without creative work.

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Abstract

一种适用于柔性直流的无源阻抗适配器参数设计方法，包括如下步骤：S1、获取柔性直流阻抗，根据柔性直流阻抗得到柔性直流阻抗曲线X(f)；S2、预估无源阻抗适配器中主电容值的上限值；S3、计算适配器参数曲线X adapter(f)；S4、确定主电容的值，改变主电阻的大小，直至min[X(f)-X adapter(f)]最大；判断min[X(f)-X adapter(f)]>k是否成立；S5、若min[X(f)-X adapter(f)]>k不成立，增大主电容的值，执行S2-S4，直至主电容的值在主电容值的范围内时，min[X(f)-X adapter(f)]>k成立，将参数存入可用参数集；S6、减小主电容的值，将min[X(f)-X adapter(f)]>k成立时的参数存入可用参数集；S7、从可用参数集中选取可用参数。该方法能够实现无源阻抗适配器参数设计，以使在关注的全频段内实现正阻抗特性，完全消除谐波谐振风险。

Description

适用于柔性直流的无源阻抗适配器参数设计方法及装置 技术领域
本发明涉及柔性直流系统优化技术领域，尤其涉及一种适用于柔性直流的无源阻抗适配器参数设计方法及装置。
背景技术
我国水能资源主要集中在西南地区，东部地区用电负荷相对集中。实施远距离、大容量“西电东送”是我国优化资源配置、解决能源与电力负荷逆向分布的客观要求，也是将西部欠发达地区的资源优势变为经济优势，促进东西部地区经济共同发展的重要措施。直流输电采用电力电子变换技术，将送端的清洁水电转换为高压直流电通过远距离架空线路输送至受端负荷中心，输电效率高、节省成本与输电走廊，已成为“西电东送”的主要方式。
柔性直流输电是基于电压源型换流器的新一代直流输电技术，在新能源消纳、经济性、灵活性和可靠性等方面具有显著优势，近年来得到了飞速发展。但是，随着柔性直流输电容量的不断增加、大功率电力电子设备在电网中的规模化应用，柔性直流输电存在与接入电网产生高频谐振的风险，影响电网安全稳定与电力设备安全。
目前，存在三类谐波谐振抑制方案：限制电网阻抗、优化柔性直流阻抗、增加辅助设备。
(1)现有技术中，电网阻抗与运行方式、负载、潮流等因素有关，其阻抗幅值、相位均可能大范围变化，因运行方式安排与多个因素有关、且雷击等交流故障也可能导致运行方式的强迫变化，限制运行方式避免谐波谐振的方案很难作为长期方案执行。
(2)增加辅助设备会带来额外的成本，且目前未见公开的辅助设备设计方 法。
(3)通过优化控制策略，能在一定程度上减小谐波谐振风险，目前已公开的分析表明：相比直接前馈、前馈回路中增加低通滤波器有利于降低谐振风险。尽管如此，在长控制链路延时特征下，增加低通滤波器并不能完全规避高频谐振风险。
发明内容
本发明实施例提供一种适用于柔性直流的无源阻抗适配器参数设计方法，能够实现无源阻抗适配器参数设计，以使在关注的全频段内实现正阻抗特性，完全消除谐波谐振风险。
本发明实施例一提供一种适用于柔性直流的无源阻抗适配器参数设计方法，所述无源阻抗适配器包括主电容、主电阻和支路电感；所述主电容与所述主电阻串联；所述支路电感并联在所述主电阻两端；
所述参数设计方法包括如下步骤：
S1、获取柔性直流阻抗，根据所述柔性直流阻抗得到柔性直流阻抗曲线X(f)；
S2、预估所述无源阻抗适配器中主电容值的上限值；
S3、计算与所述主电容、支路电感和无源阻抗适配器中的主电阻相关的适配器参数曲线X adapter(f)；
S4、在所述主电容值的范围内确定所述主电容的值，改变所述主电阻的大小，直至min[X(f)-X adapter(f)]最大；判断此时min[X(f)-X adapter(f)]>k是否成立；其中，k是预设的阈值；
S5、若min[X(f)-X adapter(f)]>k不成立，增大所述主电容的值，执行步骤S2-S4，直至满足所述主电容的值小于所述主电容值的上限值时，min[X(f)-X adapter(f)]>k成立；输出此时所述主电容、支路电感和主电阻的值作为可用参数存入可用参数 集中；若所述主电容的值为所述主电容值的范围内的最大值时，min[X(f)-X adapter(f)]>k仍未成立，减小k的大小，执行步骤S4；
S6、若min[X(f)-X adapter(f)]>k成立，减小主电容C，直至不再满足min[X(f)-X adapter(f)]>k，输出减小主电容C过程中的所述主电容、支路电感和主电阻的值作为可用参数存入可用参数集中；
S7、从所述可用参数集中选取所述可用参数。
作为上述方案的改进，所述柔性直流阻抗曲线如下式所示：
Figure PCTCN2019103748-appb-000001
式中，|Z 1(f)|为柔性直流在频率点f下的阻抗幅值，Re(Z 1(f))为柔性直流阻抗在频率点f下的实部。
作为上述方案的改进，所述预估所述无源阻抗适配器中主电容的上限值，具体为，根据如下式进行预估：
Figure PCTCN2019103748-appb-000002
式中，S C为换流站接入点短路容量；U为换流站接入点额定电压；ω 0为基波角频率；a为标准中允许的电压波动值。
根据所述换流站接入点短路容量、换流站接入点额定电压和基波角频率的值设置主电容的上限值。
作为上述方案的改进，所述适配器参数曲线如下式所示：
Figure PCTCN2019103748-appb-000003
式中，X adapter(f)为无源阻抗适配器的阻抗幅值。
作为上述方案的改进，步骤S5还包括：降低所述主电容的值，执行步骤S2-S4，直至在所述主电容值的范围内，所述主电容的值最小；将对应的主电容、支路电感和主电阻的值加入所述可用参数组。
本发明实施例二对应提供了一种适用于柔性直流的无源阻抗适配器参数设计装置，包括：处理器、存储器以及存储在所述存储器中且被配置为由所述处理器执行的计算机程序，所述处理器执行所述计算机程序时实现如本发明实施例一所述的适用于柔性直流的无源阻抗适配器参数设计方法。
本发明实施例三对应提供了一种计算机可读存储介质，其特征在于，所述计算机可读存储介质包括存储的计算机程序，其中，在所述计算机程序运行时控制所述计算机可读存储介质所在设备执行如本发明实施例一所述的适用于柔性直流的无源阻抗适配器参数设计方法。
本发明实施例提供的一种适用于柔性直流的无源阻抗适配器参数设计方法与现有技术相比，具有如下有益效果：
通过预估主电容值的范围，并在主电容值的范围中优化主电容的值，直至X Z1(f)-X adapter(f)大于预设的阈值k在全频段成立，实现在关注的全频段内实现正阻抗特性，完全消除谐波谐振风险；避免了柔性直流输电系统与送端电网或受端电网阻抗匹配失当时产生高频谐振，从而保证电力系统安全稳定运行；通过调整k的值改变设计标准，以获得多种符合要求的可用参数，提高系统运行稳定性、抑制低频振荡。
附图说明
图1是本发明一实施例提供的一种无源阻抗适配器的结构示意图。
图2是本发明一实施例提供的一种适用于柔性直流的无源阻抗适配器参数设计方法的流程示意图。
图3是本发明一个具体的实施例提供的阻抗适配器原理示意图。
图4是本发明一个具体的实施例提供的前馈带滤波与前馈不带滤波的曲线示意图。
图5是本发明一个具体的实施例提供的主电阻为300Ω和350Ω时X(f)、X adapter(f)示意图。
图6是本发明一个具体的实施例提供的无功分别为100Mvar、80Mvar、60Mvar时X(f)、Xadapter(f)示意图。
图7是本发明另一实施例提供的阻抗适配器原理示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
参见图1，是本发明一实施例提供的一种无源阻抗适配器的结构示意图，包括：主电容、主电阻和支路电感；主电容与主电阻串联；支路电感并联在主电阻两端；
参见图2，是本发明一实施例提供的一种适用于柔性直流的无源阻抗适配器参数设计方法的流程示意图，参数设计方法包括如下步骤：
S1、获取柔性直流阻抗，根据柔性直流阻抗得到柔性直流阻抗曲线X(f)；
S2、预估无源阻抗适配器中主电容值的上限值；
S3、计算与主电容、支路电感和无源阻抗适配器中的主电阻相关的适配器参数曲线X adapter(f)；
S4、在主电容值的范围内确定主电容的值，改变主电阻的大小，直至min[X(f)-X adapter(f)]最大；判断此时min[X(f)-X adapter(f)]>k是否成立；其中，k是预设的阈 值；
S5、若min[X(f)-X adapter(f)]>k不成立，增大主电容的值，执行步骤S2-S4，直至满足主电容的值小于主电容值的上限值时，min[X(f)-X adapter(f)]>k成立；输出此时主电容、支路电感和主电阻的值作为可用参数存入可用参数集中；若主电容的值为主电容值的范围内的最大值时，min[X(f)-X adapter(f)]>k仍未成立，减小k的大小，执行步骤S4；
S6、若min[X(f)-X adapter(f)]>k成立，减小主电容C，直至不再满足min[X(f)-X adapter(f)]>k，输出减小主电容C过程中的主电容、支路电感和主电阻的值作为可用参数存入可用参数集中；
S7、从可用参数集中选取可用参数。
进一步的，所述柔性直流阻抗曲线如下式所示：
Figure PCTCN2019103748-appb-000004
式中，|Z 1(f)|为柔性直流在频率点f下的阻抗幅值，Re(Z 1(f))为柔性直流阻抗在频率点f下的实部。
进一步的，所述预估所述无源阻抗适配器中主电容的大小，具体为，根据如下式进行预估：
Figure PCTCN2019103748-appb-000005
式中，S C为换流站接入点短路容量；U为换流站接入点额定电压；ω 0为基波角频率；a为标准中允许的电压波动值。
根据所述换流站接入点短路容量、换流站接入点额定电压和基波角频率的值设置主电容的大小。
优选的，ω 0数值上等于50*2π或60*2π。
优选的，a％选取为1％～2％，选取依据为：DL5223规定的“对单组无功元件的投切，稳态交流母线电压变化率不应超过额定电压的1％～2％”，若所在电网有其他特殊规定，按照相应规定执行。
主电阻预估值，选取为小于min(X(f))。
支路电感预估值，支路电感感抗可选择为主电容容抗的0.1％左右。支路电容预估值，与支路电感在电网基频谐振。
若支路电容容值过大导致支路电容容值成本极高，高于消除主电阻R损耗节省的成本，可省去支路电容。
进一步的，所述适配器参数曲线如下式所示：
Figure PCTCN2019103748-appb-000006
式中，X adapter(f)为阻抗适配器阻抗幅值。
进一步的，步骤S5还包括：降低所述主电容的值，执行步骤S2-S4，直至在所述主电容值的范围内，所述主电容的值最小；将对应的主电容、支路电感和主电阻的值加入所述可用参数组。
参见图3，是本发明一实施例提供的阻抗适配器原理示意图，图中Z grid为交流电网阻抗，其幅值在(0,+∞)间变化，相角在(-90°，+90°)间变化，实部始终为正。Z 1为MMC柔性直流交流阻抗，Z 2为无源阻抗适配器，若Z 1、Z 2并联后换流站阻抗实部始终为正，则系统不存在发生谐波谐振的条件。
为满足Z 2并联后换流站阻抗实部始终为正，则预设k≥0，k越大，设计要求越高，稳定裕度越大。主电阻的值变大，则低频段X adapter(f)变大，高频段X adapter(f)变小。考虑该特性，则有在特定的主电容的值下存在最优的主电阻的值。
在一个具体的实施例中，假设柔性直流交流等效电感L为202mH，控制链路延时为600μs，PI控制器参数为50，500。四个换流阀在交流侧并联。
(1)获得柔性直流阻抗特性。这里仅考虑电流内环与前馈控制的影响，带前馈与不带前馈系统阻抗传递函数分别为：
Figure PCTCN2019103748-appb-000007
为使图形直观，X(f)大于100000的部分，统一修改为100000，前馈带滤波与前馈不带滤波的曲线如图4所示。
(2)假设所在交流电网短路容量为10GVA，引起电压波动1％对应无功功率Q＝100Mvar，根据公式计算得主电容C＝1.155μF。
(3)选择支路电感L 1＝300mH，支路电容C 1＝33.774μF。
(4)由于X(f)最小值为396，选择主电阻R＝350Ω。根据公式获得X adapter(f)曲线，设置k＝0，绘制R为300Ω和350Ω时X(f)、X adapter(f)示意图，如图5所示。从图5中可以看出，X(f)-X adapter(f)>0始终成立。因此上述两组参数可行。
(5)尝试减小主电容的容量至80Mvar或60Mvar，选择主电阻R＝350Ω，支路电感L 1、支路电容C 1保持不变。由图6中可得，当无功功率选择为60Mvar时，左侧边界和下侧边界X(f)、X adapter(f)均有重叠区，无法通过优化主电阻R使X(f)-X adapter(f)>0在全频段成立，因此优化中止，选择主电容容量为80Mvar。
(6)由(5)获得一组可用参数：无功功率80Mvar，C＝0.924μF；R＝350Ω；L 1＝300mH；C 1＝33.774μF。
由以上分析可知，在该具体的实施例中，通过本发明一实施例提供的一种适用于柔性直流的无源阻抗适配器参数设计方法设计得到的无缘阻抗适配器参数，能够使得阻抗始终具有正实部，在任意交流电网下均不会发生高频谐波谐振。
参见图7，是本发明另一实施例提供的阻抗适配器原理示意图，无源阻抗适配器包括主电容、主电阻、支路电感和支路电容；主电容与主电阻串联；支路电感与支路电容串联得到串联支路，串联支路并联在主电阻两端。
本发明实施例提供的一种适用于柔性直流的无源阻抗适配器参数设计方法及装置与现有技术相比，具有如下有益效果：
通过预估主电容值的范围，并在主电容值的范围中优化主电容的值，直至X Z1(f)-X adapter(f)大于预设的阈值k在全频段成立，实现在关注的全频段内实现正阻抗特性，完全消除谐波谐振风险；避免了柔性直流输电系统与送端电网或受端电网阻抗匹配失当时产生高频谐振，从而保证电力系统安全稳定运行；通过调整k的值改变设计标准，以获得多种符合要求的可用参数，提高系统运行稳定性、抑制低频振荡。
本发明另一实施例对应提供了一种适用于柔性直流的无源阻抗适配器参数设计装置，包括处理器、存储器以及存储在所述存储器中且被配置为由所述处理器执行的计算机程序，所述处理器执行所述计算机程序时实现如本发明实施例一所述的适用于柔性直流的无源阻抗适配器参数设计方法。所述适用于柔性直流的无源阻抗适配器参数设计装置可以是桌上型计算机、笔记本、掌上电脑及云端服务器等计算设备。所述适用于柔性直流的无源阻抗适配器参数设计装置可包括，但不仅限于，处理器、存储器。
本发明另一实施例对应提供了一种计算机可读存储介质，其特征在于，所述计算机可读存储介质包括存储的计算机程序，其中，在所述计算机程序运行时控制所述计算机可读存储介质所在设备执行如本发明实施例一所述的适用于柔性直流的无源阻抗适配器参数设计方法。
所称处理器可以是中央处理单元(Central ProCessing Unit，CPU)，还可以是其他通用处理器、数字信号处理器(Digital Signal ProCessor，DSP)、专用集成电 路(AppliCation SpeCifiC Integrated CirCuit，ASIC)、现场可编程门阵列(Field-Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等，所述处理器是所述适用于柔性直流的无源阻抗适配器参数设计装置的控制中心，利用各种接口和线路连接整个适用于柔性直流的无源阻抗适配器参数设计装置的各个部分。
所述存储器可用于存储所述计算机程序和/或模块，所述处理器通过运行或执行存储在所述存储器内的计算机程序和/或模块，以及调用存储在存储器内的数据，实现所述适用于柔性直流的无源阻抗适配器参数设计装置的各种功能。所述存储器可主要包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需的应用程序(比如声音播放功能、图像播放功能等)等；存储数据区可存储根据手机的使用所创建的数据(比如音频数据、电话本等)等。此外，存储器可以包括高速随机存取存储器，还可以包括非易失性存储器，例如硬盘、内存、插接式硬盘，智能存储卡(Smart Media Card,SMC)，安全数字(SeCure Digital,SD)卡，闪存卡(Flash Card)、至少一个磁盘存储器件、闪存器件、或其他易失性固态存储器件。
其中，所述适用于柔性直流的无源阻抗适配器参数设计装置集成的模块/单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实现上述实施例方法中的全部或部分流程，也可以通过计算机程序来指令相关的硬件来完成，所述的计算机程序可存储于一计算机可读存储介质中，该计算机程序在被处理器执行时，可实现上述各个方法实施例的步骤。其中，所述计算机程序包括计算机程序代码，所述计算机程序代码可以为源代码形式、对象代码形式、可执行文件或某些中间形式等。所述计算机可读介质可以包括：能够携带所述计算机程序代码的任何实体或装置、记录介质、U盘、移动硬盘、磁碟、光盘、计算机存储器、只读存储 器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random ACCess Memory)、电载波信号、电信信号以及软件分发介质等。
需说明的是，以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。另外，本发明提供的装置实施例附图中，模块之间的连接关系表示它们之间具有通信连接，具体可以实现为一条或多条通信总线或信号线。本领域普通技术人员在不付出创造性劳动的情况下，即可以理解并实施。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也视为本发明的保护范围。

Claims (7)

  1. 一种适用于柔性直流的无源阻抗适配器参数设计方法，其特征在于，所述无源阻抗适配器包括主电容、主电阻和支路电感；所述主电容与所述主电阻串联；所述支路电感并联在所述主电阻两端；
    所述参数设计方法包括如下步骤：
    S1、获取柔性直流阻抗，根据所述柔性直流阻抗得到柔性直流阻抗曲线X(f)；
    S2、预估所述无源阻抗适配器中主电容值的上限值；
    S3、计算与所述主电容、支路电感和无源阻抗适配器中的主电阻相关的适配器参数曲线X adapter(f)；
    S4、在所述主电容值的范围内确定所述主电容的值，改变所述主电阻的大小，直至min[X(f)-X adapter(f)]最大；判断此时min[X(f)-X adapter(f)]>k是否成立；其中，k是预设的阈值；
    S5、若min[X(f)-X adapter(f)]>k不成立，增大所述主电容的值，执行步骤S2-S4，直至满足所述主电容的值小于所述主电容值的上限值时，min[X(f)-X adapter(f)]>k成立；输出此时所述主电容、支路电感和主电阻的值作为可用参数存入可用参数集中；若所述主电容的值为所述主电容值的范围内的最大值时，min[X(f)-X adapter(f)]>k仍未成立，减小k的大小，执行步骤S4；
    S6、若min[X(f)-X adapter(f)]>k成立，减小主电容C，直至不再满足min[X(f)-X adapter(f)]>k，输出减小主电容C过程中的所述主电容、支路电感和主电阻的值作为可用参数存入可用参数集中；
    S7、从所述可用参数集中选取所述可用参数。
  2. 如权利要求1所述的一种适用于柔性直流的无源阻抗适配器参数设计方 法，其特征在于，所述柔性直流阻抗曲线如下式所示：
    Figure PCTCN2019103748-appb-100001
    式中，|Z 1(f)|为柔性直流在频率点f下的阻抗幅值，Re(Z 1(f))为柔性直流阻抗在频率点f下的实部。
  3. 如权利要求2所述的一种适用于柔性直流的无源阻抗适配器参数设计方法，其特征在于，所述预估所述无源阻抗适配器中主电容的上限值，具体为，根据如下式进行预估：
    Figure PCTCN2019103748-appb-100002
    式中，S C为换流站接入点短路容量；U为换流站接入点额定电压；ω 0为基波角频率；a为标准中允许的电压波动值；
    根据所述换流站接入点短路容量、换流站接入点额定电压和基波角频率的值设置主电容的上限值。
  4. 如权利要求3所述的一种适用于柔性直流的无源阻抗适配器参数设计方法，其特征在于，所述适配器参数曲线如下式所示：
    Figure PCTCN2019103748-appb-100003
    式中，X adapter(f)为无源阻抗适配器的阻抗幅值。
  5. 如权利要求4所述的一种适用于柔性直流的无源阻抗适配器参数设计方法，其特征在于，步骤S5还包括：
    降低所述主电容的值，执行步骤S2-S4，直至在所述主电容值的限值内，所述主电容的值最小；将对应的主电容、支路电感和主电阻的值加入所述可用参数集。
  6. 一种适用于柔性直流的无源阻抗适配器参数设计装置，包括处理器、存储器以及存储在所述存储器中且被配置为由所述处理器执行的计算机程序，所述处理器执行所述计算机程序时实现如权利要求1至5中任意一项所述的适用于柔性直流的无源阻抗适配器参数设计方法。
  7. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质包括存储的计算机程序，其中，在所述计算机程序运行时控制所述计算机可读存储介质所在设备执行如权利要求1至5中任意一项所述的适用于柔性直流的无源阻抗适配器参数设计方法。
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