WO2020173045A1 - 一种仿真sxm2gpu的测试报警装置 - Google Patents

一种仿真sxm2gpu的测试报警装置 Download PDF

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WO2020173045A1
WO2020173045A1 PCT/CN2019/098503 CN2019098503W WO2020173045A1 WO 2020173045 A1 WO2020173045 A1 WO 2020173045A1 CN 2019098503 W CN2019098503 W CN 2019098503W WO 2020173045 A1 WO2020173045 A1 WO 2020173045A1
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switch
battery bat
resistor
connector
grounded
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French (fr)
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郑明�
张莉
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Suzhou Wave Intelligent Technology Co Ltd
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Suzhou Wave Intelligent Technology Co Ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer

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  • the present invention relates to the field of GPU testing, in particular to a test alarm device that simulates SXM2GPU.
  • the tests such as non-booting vibration, collision, and drop are all tests of the whole machine, and the test situation of the internal board of the server cannot be directly observed. Once the GPU and other valuable components are disconnected from the connector and the test is still going on, the motherboard will be affected. And GPU and other boards cause irreversible damage, which is not conducive to reducing costs and improving test efficiency.
  • the tests such as non-booting vibration, collision, and drop are all tests of the whole machine, and the test situation of the internal board of the server cannot be directly observed. Once the GPU and other valuable components are disconnected from the connector and the test is still going on, the motherboard will be affected. And GPU and other boards cause irreversible damage, which is not conducive to reducing costs and improving test efficiency.
  • Fig. 1 is a schematic structural diagram of Embodiment 1 of a test alarm device that simulates SXM2GPU in the scheme of the present invention
  • Embodiment 2 is a schematic structural diagram of Embodiment 2 of a test alarm device that simulates SXM2GPU in the solution of the present invention
  • Embodiment 3 is a schematic structural diagram of Embodiment 3 of a test alarm device that simulates SXM2GPU in the solution of the present invention
  • FIG. 4 is a schematic diagram of the bottom of the simulation device in a test alarm device that simulates SXM2GPU in the solution of the present invention
  • Fig. 5 is a schematic diagram of the front surface of the simulation device in a test alarm device that simulates SXM2GPU in the solution of the present invention.
  • a test alarm device for simulating SXM2GPU includes: a simulation device 10 and a test board 11.
  • the simulation device 10 is placed in the card slot of the SXM2GPU, and the test board 11 is connected through a first connector group and a second connection.
  • the device group is connected to the simulation device 10, wherein the first connector group includes a first connector 101 and a second connector 111, and the second connector group includes a third connector 102 and a fourth connector 112.
  • the simulation device 10 Including a first connector 101 and a third connector 102;
  • the test board 11 includes a second connector 111, a fourth connector 112, an OR gate logic circuit 113, and an audible alarm circuit 114.
  • the test board is connected to the simulation device 10 through the second connector 111 and the fourth connector 112,
  • the first in-position signal sending end of the second connector 111 is connected to the first input end of the OR gate logic circuit 113, the other is connected to one end of the switch SW1 through the resistor R1, and the other end of the switch SW1 is connected to the positive electrode of the battery BAT.
  • the negative electrode of the battery BAT is grounded, and the emitter of the transistor Q1 is grounded;
  • the second in-position signal sending end of the fourth connector 112 is connected to the second input end of the OR gate logic circuit 111, and the other way is connected to one end of the switch SW1 through a resistor R2 Connected, the other end of the switch SW1 is connected to the positive electrode of the battery BAT, the negative electrode of the battery BAT is grounded, and the emitter of the transistor Q1 is grounded;
  • the output terminal of the OR logic circuit 113 is connected to the input terminal of the sound alarm circuit 114.
  • the sound alarm circuit 114 includes: a transistor Q1, a resistor R6, a resistor R7, a buzzer 1141, the base of the transistor Q1 is connected to the output terminal of the OR gate logic circuit 113, and the collector of the transistor Q1 is connected to the switch SW1 through a resistor R6 One end is connected, the other end of the switch SW1 is connected to the positive electrode of the battery BAT, the negative electrode of the battery BAT is grounded, and the emitter of the transistor Q1 is grounded;
  • the first power input interface 1 of the buzzer 1141 is connected to one end of the switch SW1 through a resistor R7, the other end of the switch SW1 is connected to the positive electrode of the battery BAT, and the negative electrode of the battery BAT is grounded; the second power input interface 2 of the buzzer 1141
  • the resistor R6 is connected to one end of the switch SW1, the other end of the switch SW1 is connected to the positive electrode of the battery BAT, and the negative electrode of the battery BAT is grounded.
  • the test board 11 further includes an indicator circuit 115, and the input end of the indicator circuit 115 is connected to the output end of the OR logic circuit 113.
  • the indicator circuit 115 includes a microprocessor 1151, a light-emitting diode LED1, a light-emitting diode LED2, a light-emitting diode LED3, a resistor R3, a resistor R4, and a resistor R5.
  • the power terminal VCC of the microprocessor 1151 is connected to one end of the switch SW1, and the other of the switch SW1 One end is connected to the positive pole of the battery BAT, and the negative pole of the battery BAT is grounded; the ground terminal of the microprocessor 1151 is grounded; the general input/output interface GPIO1 of the microprocessor 1151 is connected to the output terminal of the OR gate logic circuit 113; the general purpose of the microprocessor 1151
  • the input/output interface GPIO2 is connected to the cathode of the light emitting diode LED1, the anode of the light emitting diode LED1 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to one end of the switch SW1, and the other end of the switch SW1 is connected to the anode of the battery BAT.
  • the cathode of the BAT is grounded;
  • the general input/output interface GPIO3 of the microprocessor 1151 is connected to the cathode of the light emitting diode LED2, the anode of the light emitting diode LED2 is connected to one end of the resistor R4, the other end of the resistor R4 is connected to one end of the switch SW1, and the other end of the switch SW1 One end is connected to the anode of the battery BAT, and the cathode of the battery BAT is grounded;
  • the universal input/output interface GPIO4 of the microprocessor 1151 is connected to the cathode of the light emitting diode LED3, the anode of the light emitting diode LED3 is connected to one end of the resistor R5, and the other end of the resistor R5 is connected to the switch One end of SW1 is connected, the other end of switch SW1 is connected to the positive electrode of battery BAT, and the negative electrode of battery BAT is grounded.
  • the third presence signal output by the OR gate logic circuit 113 is controlled by the microprocessor 1151 to turn on the corresponding light-emitting diode.
  • the third presence signal is At low level, the microprocessor 1151 controls the light-emitting diode LED1 to turn on, and the color of the light-emitting diode LED1 is green; if there is a connector at both ends of the simulation device that is in poor contact, the third presence signal changes to a high level and the microprocessor 1151 controls The light-emitting diode LED2 turns bright, and the color of the light-emitting diode LED2 is red.
  • the tester can immediately stop the corresponding test to avoid irreversible damage to the GPU board; if the connectors at both ends of the emulation device fall off and then bounce back (that is, due to poor contact Becomes good contact), the third presence signal completes the conversion from high level to low level, the microprocessor 1151 controls the light-emitting diode LED3 to brighten, the color of the light-emitting diode LED3 is yellow, and the tester can continue the test. After the test is over, the simulation device structure is modified and adjusted, and the microprocessor 1151 judges the level of the third in-position signal every one minute.
  • the colors of the light emitting diode LED1, LED2, and light emitting diode LED3 are two different.
  • the color of the light emitting diode LED1 is green
  • the color of the light emitting diode LED2 is red
  • the color of the light emitting diode LED3 is yellow.
  • the present invention does not limit the colors of the light-emitting diodes LED1, LED2, and light-emitting diode LED3, and other colors can also be used.
  • the test board 11 also includes a Schmitt trigger circuit 116, and the input terminal of the Schmitt trigger circuit 116 is connected to the OR gate logic circuit 113 The output terminal of the Schmitt trigger circuit 116 is connected to the input terminal of the sound alarm circuit 114 or the indicator circuit 115.
  • the Schmitt trigger circuit 116 includes a Schmitt trigger 1161, a capacitor C1, and the input terminal of the Schmitt trigger 1161 is connected to the output terminal of the OR gate logic circuit 113; the power terminal VCC of the Schmitt trigger 1161 is connected to the capacitor C1 all the way The other is connected to one end of the switch SW1, the other end of the switch SW1 is connected to the positive electrode of the battery BAT, and the negative electrode of the battery BAT is grounded; the ground terminal GND of the Schmitt trigger 1161 is grounded; the output of the Schmitt trigger 1161 The terminal is connected to the base of the transistor Q1 or the general input/output interface GPIO1 of the microprocessor 1151.
  • the embodiment of the present invention utilizes the Schmitt trigger's characteristic of optimizing the waveform shaping.
  • the Schmitt trigger circuit's waveform shaping is performed to optimize the third in-position signal , But also can improve the anti-interference ability.
  • the SXM2GPU is a buckle card type.
  • the second connector and the fourth connector in the test board are connected with The first connector 212 and the third connector 213 on the simulation device board 21 (or 31) are mated, and 8 screws 211 (or 311) in the simulation device board 21 are used to fix the test board to the simulation device board 21 ,
  • the counterweight 20 (or 30) has a screw hole corresponding to the screw 211 (or 311) in the simulation device version 21.
  • the screw 211 (or 311) is matched with the screw hole to facilitate the increase or decrease of weight. According to the weight of the heat sink of different materials, the test board is placed at the middle 312 of the bottom of the simulation device board 21.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Alarm Systems (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

一种仿真SXM2GPU的测试报警装置，两组连接器（101,111,102,112）将仿真装置（10）与待测板卡（11）连接，引入两组连接器（101,111,102,112）的在位信号，任一端连接器（101,111,102,112）不在位时，声音电路（114）进行报警，不仅可以避免对GPU等板卡造成不可逆的损坏，而且可以实现对GPU仿真测试，测试效果更好，提高了测试效率及精度，降低了测试成本。而且该装置中还引入了指示灯电路（115）和施密特触发电路（116），不仅使测试人员更直观的监控测试过程，便于测试人员及时发现问题并予以调整，而且使在位信号更优化，提高抗干扰能力。

Description

一种仿真SXM2GPU的测试报警装置
本申请要求于2019年2月27日提交中国专利局、申请号为201910147563.6、发明名称为“一种仿真SXM2GPU的测试报警装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及GPU测试领域，尤其是涉及一种仿真SXM2GPU的测试报警装置。
背景技术
随着AI服务器(复杂指令集架构服务器，也称PC服务器)的高速发展，服务器上每张PCBA(Printed Circuit Board+Assembly，即PCB空板经过表面组装技术上件，再经过双列直插式封装技术插件的整个制程)承载的元器件以及部件越来越多，这就有可能造成了板卡承载过大应变力而导致板卡锡裂或断裂等失效问题。为了科学的检测板卡在组装和运输过程中承受的应力值，需要设计一套针对服务器内部板卡的动态应变力的监测方法。
在可靠性测试过程中，不开机振动、碰撞、跌落等测试均为整机测试，不能直接观察到服务器内部板卡的测试情况，一旦GPU等贵重部件脱离连接器且测试依然进行，会对主板和GPU等板卡造成不可逆的损坏，不利于降低成本以及提高测试效率。
发明内容
随着AI服务器(复杂指令集架构服务器，也称PC服务器)的高速发展，服务器上每张PCBA(Printed Circuit Board+Assembly，即PCB空板经过表面组装技术上件，再经过双列直插式封装技术插件的整个制程)承载的元器件以及部件越来越多，这就有可能造成了板卡承载过大应变力而导致板卡锡裂或断裂等失效问题。为了科学的检测板卡在组装和运输过程 中承受的应力值，需要设计一套针对服务器内部板卡的动态应变力的监测方法。
在可靠性测试过程中，不开机振动、碰撞、跌落等测试均为整机测试，不能直接观察到服务器内部板卡的测试情况，一旦GPU等贵重部件脱离连接器且测试依然进行，会对主板和GPU等板卡造成不可逆的损坏，不利于降低成本以及提高测试效率。
附图说明
为了更清楚说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见的，对于本领域普通技术人员而言，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明方案中一种仿真SXM2GPU的测试报警装置实施例一的结构示意图；
图2为本发明方案中一种仿真SXM2GPU的测试报警装置实施例二的结构示意图；
图3为本发明方案中一种仿真SXM2GPU的测试报警装置实施例三的结构示意图；
图4为本发明方案中一种仿真SXM2GPU的测试报警装置中仿真装置底部的结构示意图；
图5为本发明方案中一种仿真SXM2GPU的测试报警装置中仿真装置正面的结构示意图。
具体实施方式
为能清楚说明本方案的技术特点，下面通过具体实施方式，并结合其附图，对本发明进行详细阐述。下文的公开提供了许多不同的实施例或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。此外，本发明可以在不同例子中重复参考数字和/或字母。这种重复是为了简化和清楚的目的，其本身不指示所讨论各种 实施例和/或设置之间的关系。应当注意，在附图中所图示的部件不一定按比例绘制。本发明省略了对公知组件和处理技术及工艺的描述以避免不必要地限制本发明。
实施例一
如图1所示，一种仿真SXM2GPU的测试报警装置，包括：仿真装置10以及测试板卡11，仿真装置10置于SXM2GPU的卡槽，测试板卡11通过第一连接器组以及第二连接器组与仿真装置10连接，其中所述第一连接器组包括第一连接器101和第二连接器111，第二连接器组包括第三连接器102和第四连接器112，仿真装置10包括第一连接器101和第三连接器102；
测试板卡11包括：第二连接器111、第四连接器112、或门逻辑电路113以及声音报警电路114，测试板卡通过第二连接器111与第四连接器112与仿真装置10连接，第二连接器111的第一在位信号发送端一路与或门逻辑电路113的第一输入端连接，另一路通过电阻R1与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地，三极管Q1的发射极接地；第四连接器112的第二在位信号发送端与或门逻辑电路111的第二输入端连接，另一路通过电阻R2与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地，三极管Q1的发射极接地；或门逻辑电路113的输出端与声音报警电路114的输入端连接。
其中，声音报警电路114包括：三极管Q1、电阻R6、电阻R7、蜂鸣器1141，三极管Q1的基极与或门逻辑电路113的输出端连接，三极管Q1的集电极通过电阻R6与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地，三极管Q1的发射极接地；
蜂鸣器1141的第一电源输入接口1通过电阻R7与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地；蜂鸣器1141的第二电源输入接口2通过电阻R6与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地。
测试前，将仿真装置10插入卡槽，当仿真装置两端都接触良好时，或 门逻辑电路113输出为低电平，蜂鸣器不叫；当仿真装置任一端脱落时，或门逻辑电路113输出为高电平，蜂鸣器报警，不仅可以避免对GPU等板卡造成不可逆的损坏，而且可以实现对GPU仿真测试，测试效果更好，提高了测试效率及精度，降低了测试成本。
实施例二
如图2所示，与本发明技术方案实施例一不同的是，测试板卡11还包括指示灯电路115，指示灯电路115的输入端连接或门逻辑电路113的输出端。指示灯电路115包括微处理器1151、发光二极管LED1、发光二极管LED2、发光二极管LED3、电阻R3、电阻R4、电阻R5，微处理器1151的电源端VCC与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地；微处理器1151的接地端接地；微处理器1151的通用输入/输出接口GPIO1连接或门逻辑电路113的输出端；微处理器1151的通用输入/输出接口GPIO2连接发光二极管LED1的阴极，所述发光二极管LED1的阳极连接电阻R3的一端，电阻R3的另一端与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地；微处理器1151的通用输入/输出接口GPIO3连接发光二极管LED2的阴极，发光二极管LED2的阳极连接电阻R4的一端，电阻R4的另一端与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地；微处理器1151的通用输入/输出接口GPIO4连接发光二极管LED3的阴极，发光二极管LED3的阳极连接电阻R5的一端，电阻R5的另一端与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地。
或门逻辑电路113输出的第三在位信号经过微处理器1151控制相应的发光二极管变亮，本发明实施例中，如果仿真装置两端任一连接器都接触良好，第三在位信号为低电平，微处理器1151控制发光二极管LED1变亮，发光二极管LED1的颜色为绿色；如果仿真装置两端有一连接器接触不良，第三在位信号变为高电平，微处理器1151控制发光二极管LED2变亮，发光二极管LED2的颜色为红色，测试人员可以立即停止相应测试，以避免造成GPU板卡的不可逆损坏；如果仿真装置两端连接器由脱落之后又弹回 (即由接触不良变为接触良好)，则第三在位信号完成由高电平到低电平的转换，微处理器1151控制发光二极管LED3变亮，发光二极管LED3的颜色为黄色,测试人员可继续进行测试，等测试结束后，再对仿真装置结构进行修改调整，微处理器1151每隔一分钟对第三在位信号电平的高低进行判断。本发明实施例中发光二极管LED1、发光二极管LED2、发光二极管LED3的颜色两两不同，本实施例中发光二极管LED1的颜色为绿色，发光二极管LED2的颜色为红色，发光二极管LED3的颜色为黄色，但是本发明对发光二极管LED1、发光二极管LED2、发光二极管LED3的颜色不做限制，也可以是其他颜色，当两端连接器在位信号处于不同状态时，微处理器可以控制相应的指示灯变亮，使测试人员更直观的监控测试过程，便于测试人员及时发现问题并予以调整。
实施例三
如图3所示，与本发明技术方案实施例一或实施例二不同的是，测试板卡11还包括施密特触发电路116，施密特触发电路116的输入端连接或门逻辑电路113的输出端，施密特触发电路116的输出端连接声音报警电路114或指示灯电路115的输入端。
施密特触发电路116包括施密特触发器1161、电容C1，施密特触发器1161的输入端连接或门逻辑电路113的输出端；施密特触发器1161的电源端VCC一路连接电容C1后接地，另一路与开关SW1的一端连接，开关SW1的另一端与电池BAT的正极连接，电池BAT的负极接地；施密特触发器1161的接地端GND接地；施密特触发器1161的输出端连接三极管Q1的基极或微处理器1151的通用输入/输出接口GPIO1。
本发明实施例利用施密特触发器的对波形整形优化的特点，当或门逻辑电路输出连接器的在位信号时，经过施密特触发电路的波形整形，使第三在位信号更优化，而且也可以提高抗干扰能力。
为考虑更直观的体现仿真装置的结构，本发明技术方案提供了结构图，SXM2GPU为扣卡式，如图4及图5所示，测试板卡中的第二连接器以及第四连接器与仿真装置板21(或31)上的第一连接器212以及第三连接器213对插，仿真装置板21中8颗螺丝211(或311)，用来固定测试板卡到 仿真装置板21上，配重块20(或30)为带有与仿真装置版21中螺丝211(或311)相对应的螺丝孔，通过螺丝211(或311)与螺丝孔的配合，便于增加或减少重量，已符合不同材质散热器的重量，测试板卡放置于仿真装置板21底部中间312位置。
上述虽然结合附图对本发明的具体实施方式进行了描述，但并非对本发明保护范围的限制，所属领域技术人员应该明白，在本发明的技术方案的基础上，本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。

Claims (7)

  1. 一种仿真SXM2GPU的测试报警装置，其特征是，包括：仿真装置以及测试板卡，所述仿真装置置于SXM2GPU的卡槽，所述测试板卡通过第一连接器组以及第二连接器组与仿真装置连接，其中所述第一连接器组包括第一连接器和第二连接器，所述第二连接器组包括第三连接器和第四连接器，所述仿真装置包括第一连接器和第三连接器；
    所述测试板卡包括：第二连接器、第四连接器、或门逻辑电路以及声音报警电路，所述测试板卡通过第二连接器与第四连接器与仿真装置连接，所述第二连接器的第一在位信号发送端一路与或门逻辑电路的第一输入端连接，另一路通过电阻R1与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地，所述三极管Q1的发射极接地；所述第四连接器的第二在位信号发送端与或门逻辑电路的第二输入端连接，另一路通过电阻R2与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地，所述三极管Q1的发射极接地；所述或门逻辑电路的输出端与声音报警电路的输入端连接。
  2. 根据权利要求1所述的仿真SXM2GPU的测试报警装置，其特征是，所述声音报警电路包括：三极管Q1、电阻R6、电阻R7、蜂鸣器，所述三极管Q1的基极与或门逻辑电路的输出端连接，所述三极管Q1的集电极通过电阻R6与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地，所述三极管Q1的发射极接地；
    所述蜂鸣器的第一电源输入接口(1)通过电阻R7与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地；所述蜂鸣器的第二电源输入接口(2)通过电阻R6与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地。
  3. 根据权利要求1所述的仿真SXM2GPU的测试报警装置，其特征是，所述仿真SXM2GPU的测试报警装置还包括指示灯电路，所述指示灯 电路的输入端连接或门逻辑电路的输出端。
  4. 根据权利要求1所述的仿真SXM2GPU的测试报警装置，其特征是，所述指示灯电路包括微处理器、发光二极管LED1、发光二极管LED2、发光二极管LED3、电阻R3、电阻R4、电阻R5，所述微处理器的电源端VCC与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地；所述微处理器的接地端接地；所述微处理器的通用输入/输出接口GPIO1连接或门逻辑电路的输出端；所述微处理器的通用输入/输出接口GPIO2连接发光二极管LED1的阴极，所述发光二极管LED1的阳极连接电阻R3的一端，电阻R3的另一端与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地；所述微处理器的通用输入/输出接口GPIO3连接发光二极管LED2的阴极，所述发光二极管LED2的阳极连接电阻R4的一端，电阻R4的另一端与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地；所述微处理器的通用输入/输出接口GPIO4连接发光二极管LED3的阴极，所述发光二极管LED3的阳极连接电阻R5的一端，电阻R5的另一端与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地。
  5. 根据权利要求4所述的仿真SXM2GPU的测试报警装置，其特征是，所述发光二极管LED1、发光二极管LED2、发光二极管LED3的颜色两两不同。
  6. 根据权利要求1或3所述的仿真SXM2GPU的测试报警装置，其特征是，所述仿真SXM2GPU的测试报警装置还包括施密特触发电路，所述施密特触发电路的输入端连接或门逻辑电路的输出端，所述施密特触发电路的输出端连接声音报警电路或指示灯电路的输入端。
  7. 根据权利要求6所述的仿真SXM2GPU的测试报警装置，其特征是，所述施密特触发电路包括施密特触发器、电容C1，所述施密特触发器的输入端连接或门逻辑电路的输出端；所述施密特触发器的电源端VCC一路连接电容C1后接地，另一路与开关SW1的一端连接，所述开关SW1的另一端与电池BAT的正极连接，所述电池BAT的负极接地；所述施密 特触发器的接地端GND接地；所述施密特触发器的输出端连接三极管Q1的基极或微处理器的通用输入/输出接口GPIO1。
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