WO2020170968A1 - Circuit board, mounting board, method for manufacturing circuit board, and method for manufacturing mounting board - Google Patents

Abstract

This circuit board is a circuit board for mounting at least one electronic component on one surface, and comprises an insulating substrate, and a circuit pattern layer which is disposed on one surface of the insulating substrate and has a plane facing outward in a thickness direction of the insulating substrate, wherein a part of the plane is solder-bonded as at least one bonding surface to be bonded with the at least one electronic component. The circuit pattern layer is formed with at least one groove separating the at least one bonding surface from at least one non-bonding surface which is a part of the plane other than the at least one bonding surface.

Description

Circuit board, mounting board, lighting device, method of manufacturing circuit board, and method of manufacturing mounting board

The present invention relates to a circuit board, a mounting board, a lighting device, a circuit board manufacturing method, and a mounting board manufacturing method.

Patent Document 1 discloses a configuration (LED lighting device) that reflects light from an LED light source using a reflecting material. However, the specific structure of the LED light source, which is an example of the electronic component, and the bonding surface of the circuit pattern of the substrate is not clearly disclosed.

Chinese Patent Publication No. 106163113

When solder is placed on the joint surface of the circuit pattern layer with the electronic component and the solder is melted and the electrode of the electronic component is joined to the joint surface, the solder may run off from the joint surface.

An object of the present invention is to provide a circuit board that suppresses the protrusion of solder from the joint surface of the electronic component in the circuit pattern layer to the non-joint surface.

A circuit board according to a first aspect of the present invention is a circuit board on which at least one electronic component is mounted on one surface thereof, the circuit board being disposed on an insulating substrate and one surface of the insulating substrate, and facing outward in a thickness direction of the insulating substrate. A circuit pattern layer which has a flat surface and is joined by solder as at least one joint surface for joining a part of the flat surface to the at least one electronic component, and the circuit pattern layer includes the at least one At least one groove is formed that separates the joint surface and at least one non-joint surface that is a portion of the plane other than the at least one joint surface.

The circuit board according to the second aspect of the present invention is the circuit board according to the first aspect, wherein the at least one joint surface and the at least one non-joint surface are located at the same position in the thickness direction.

A circuit board according to a third aspect of the present invention is the circuit board according to the first or second aspect, wherein the at least one electronic component is at least one light emitting element and is disposed on the at least one non-bonding surface. And a phosphor layer containing a phosphor having an emission peak wavelength in the visible light region when the emission of the at least one light emitting element is used as excitation light.

A phosphor substrate according to a fourth aspect of the present invention is the circuit board according to the third aspect, wherein the at least one light emitting element is a plurality of light emitting elements, and the at least one bonding surface is a plurality of bonding surfaces. The at least one non-bonding surface is a plurality of non-bonding surfaces, the at least one groove is a plurality of grooves, the plurality of light emitting elements are arranged on one surface of the insulating substrate, respectively, The plurality of joint surfaces are joined and mounted.

A circuit board according to a fifth aspect of the present invention is the circuit board according to the fourth aspect, wherein the phosphor layer faces the light emitting element to be mounted at a boundary between the plurality of non-bonding surfaces and the groove. It has a facing surface.

A circuit board according to a sixth aspect of the present invention is the circuit board according to any one of the third to fifth aspects, wherein a surface of the phosphor layer facing outward in the thickness direction is the same as that of the at least one light emitting element. It is located on the inner side in the thickness direction than the surface facing the outer side in the thickness direction.

A circuit board according to a seventh aspect of the present invention is the circuit board according to any one of the third to fifth aspects, wherein a surface of the phosphor layer facing outward in the thickness direction of the at least one light emitting element. It is located at the center position in the thickness direction or inside the thickness direction with respect to the position.

The mounting board according to the first aspect of the present invention includes the circuit board according to any one of the first to seventh aspects, and at least one electronic component bonded to the at least one bonding surface.

A mounting board according to a second aspect of the present invention includes the circuit board according to the sixth or seventh aspect, and at least one light emitting element bonded to the at least one bonding surface, and the thickness of the phosphor layer. The position in the thickness direction of the surface facing outward in the thickness direction is located inside the thickness direction with respect to the position of the surface facing outward in the thickness direction of the at least one light emitting element.

A mounting board according to a third aspect of the present invention includes the circuit board according to the sixth or seventh aspect, and at least one light-emitting element bonded to the at least one bonding surface, and the thickness of the phosphor layer. The position in the thickness direction of the surface facing outward in the direction is positioned at the center position in the thickness direction of the at least one light emitting element or inside the thickness direction with respect to the position.

The lighting device of the present invention includes the mounting substrate according to any one of the first to third aspects, and a power supply that supplies electric power for causing the light emitting element to emit light.

A method of manufacturing a circuit board according to a first aspect of the present invention is a method of manufacturing a circuit board including an insulating substrate and a circuit pattern layer disposed on one surface of the insulating substrate and having at least one electronic component bonded to a part thereof. And a pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate, and a groove forming step of forming at least one groove on a plane of the conductive pattern layer facing outward in the thickness direction of the insulating substrate. And a solder placement step of placing a solder for joining at least one electronic component to one portion across the at least one groove in the plane.

A method for manufacturing a circuit board according to a second aspect of the present invention is the method for manufacturing a circuit board according to the first aspect, wherein the at least one electronic component is at least one light emitting element, and the at least one electronic component on the plane is the at least one electronic component. A phosphor layer disposing step of disposing a phosphor layer containing a phosphor having an emission peak wavelength in the visible light region when the emission of the at least one light emitting element is used as excitation light, in the other portion across the groove. Including.

The method for manufacturing a circuit board according to the third aspect of the present invention is the method for manufacturing a circuit board according to the second aspect, wherein the phosphor layer arranging step is performed after the solder arranging step.

A method for manufacturing a circuit board according to a fourth aspect of the present invention is the method for manufacturing a circuit board according to the second or third aspect, wherein the phosphor layer disposing step is a surface of the phosphor layer facing outward in the thickness direction. The phosphor layer is arranged such that the position in the thickness direction is located on the inner side in the thickness direction than the position of the surface of the at least one light emitting element bonded to the circuit pattern layer facing outward in the thickness direction.

A method for manufacturing a circuit board according to a fifth aspect of the present invention is the method for manufacturing a circuit board according to the second or third aspect, wherein the phosphor layer disposing step is a surface of the phosphor layer facing outward in the thickness direction. The phosphor layer is arranged such that the position in the thickness direction is located on the inner side in the thickness direction with respect to the central position in the thickness direction of the at least one light emitting element bonded to the circuit pattern layer.

A method for manufacturing a mounting board according to a first aspect of the present invention is directed to an insulating substrate, a circuit pattern layer disposed on one surface of the insulating substrate, and at least one electronic component bonded to a part of the circuit pattern layer. A method of manufacturing a mounting substrate, comprising: a pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate; and at least 1 on a plane of the conductive pattern layer facing outward in a thickness direction of the insulating substrate. Groove forming step of forming two grooves, a solder arranging step of arranging solder on one side of the plane with the at least one groove interposed therebetween, and at least one electronic component on the one side of sandwiching the solder. A step of arranging the electrodes, melting the solder, and bonding the electrodes to the one portion.

A method for manufacturing a mounting board according to a second aspect of the present invention is the method for manufacturing a mounting board according to the first aspect, wherein the at least one electronic component is at least one light emitting element, and the at least one electronic component on the plane is the at least one electronic component. A phosphor layer disposing step of disposing a phosphor layer containing a phosphor having an emission peak wavelength in the visible light region when the emission of the at least one light emitting element is used as excitation light, in the other portion across the groove. Including.

The method for manufacturing a mounting board according to the third aspect of the present invention is the method for manufacturing a mounting board according to the second aspect, wherein the phosphor layer disposing step is performed after the solder disposing step.

A method for manufacturing a mounting board according to a fourth aspect of the present invention is the method for manufacturing a mounting board according to the second or third aspect, wherein the phosphor layer disposing step is a surface of the phosphor layer facing outward in the thickness direction. The phosphor layer is arranged such that the position in the thickness direction is located on the inner side in the thickness direction than the position of the surface of the at least one light emitting element bonded to the circuit pattern layer facing the outer side in the thickness direction. ..

A method of manufacturing a mounting board according to a fifth aspect of the present invention is the method of manufacturing a mounting board according to the second or third aspect, wherein the phosphor layer arranging step is a surface of the phosphor layer facing outward in the thickness direction. The phosphor layer is arranged such that the position in the thickness direction of the is located at the center position in the thickness direction of the at least one light emitting element bonded to the circuit pattern layer or inside the position in the thickness direction from the position. ..

A mounting board manufacturing method according to a sixth aspect of the present invention is the mounting board manufacturing method according to any one of the first to fifth aspects, wherein in the joining step, flux is applied to the solder, and then the solder is applied. The solder is melted to bond the electrode to the one portion.

According to the present invention, it is possible to prevent the solder from protruding from the joint surface of the electronic component in the circuit pattern layer to the non-joint surface.

It is a top view of the light emitting substrate of this embodiment. It is a bottom view of the light emitting substrate of this embodiment. FIG. 1B is a partial cross-sectional view of the light emitting substrate taken along the line 1C-1C in FIG. 1A. FIG. 3 is a plan view of a phosphor substrate (a phosphor layer is omitted) of the present embodiment. It is a top view of the fluorescent substance board of this embodiment. It is explanatory drawing of the 1st process in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 2nd process in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 3rd process in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 4th process (1st half) in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 4th process (latter half) in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 5th process in the manufacturing method of the light emitting substrate of this embodiment. It is a figure for demonstrating the light emission operation of the light emitting substrate of this embodiment. It is a figure for demonstrating the light emission operation of the light emitting substrate of a comparative form. It is explanatory drawing of the 3rd process in the manufacturing method of the light emitting substrate of a 1st modification. It is explanatory drawing of the 3rd process in the manufacturing method of the light emitting substrate of a 2nd modification. It is explanatory drawing of the manufacturing method of the light emitting substrate of a 3rd modification.

<<Overview>>
Hereinafter, the configuration and function of the light emitting substrate 10 (an example of a mounting substrate) of this embodiment will be described with reference to FIGS. 1A to 1C. Next, a method for manufacturing the light emitting substrate 10 of this embodiment will be described with reference to FIGS. 3A to 3F. Next, the light emitting operation of the light emitting substrate 10 of the present embodiment will be described with reference to FIG. Next, the effect of this embodiment will be described with reference to FIG. Note that, in all the drawings referred to in the following description, the same components are denoted by the same reference numerals, and the description thereof will be appropriately omitted.

<<Structure and Function of Light Emitting Substrate of Present Embodiment>>
1A is a plan view of the light emitting substrate 10 of the present embodiment (view seen from the front surface 31), and FIG. 1B is a bottom view of the light emitting substrate 10 of the present embodiment (view seen from the back surface 33). 1C is a partial cross-sectional view of the light emitting substrate 10 taken along the line 1C-1C in FIG. 1A.
The light emitting substrate 10 of the present embodiment has a rectangular shape as an example when viewed from the front surface 31 and the back surface 33. Further, the light emitting substrate 10 of the present embodiment includes a plurality of light emitting elements 20 (an example of electronic components), a phosphor substrate 30, and electronic components (not shown) such as a connector and a driver IC. That is, the light emitting substrate 10 of the present embodiment is configured such that the plurality of light emitting elements 20 and the electronic components are mounted on the phosphor substrate 30.
The light emitting substrate 10 of the present embodiment has a function of emitting light when power is supplied from an external power source (not shown) by directly attaching a lead wire or via a connector. Therefore, the light emitting substrate 10 of this embodiment is used as a main optical component in, for example, a lighting device (not shown).

<Multiple light emitting elements>
As an example, each of the plurality of light emitting elements 20 is a CSP (Chip Scale Package) in which a flip chip LED 22 (hereinafter, referred to as LED 22) is incorporated (see FIG. 1C). As the CSP, as shown in FIG. 1C, it is preferable that the entire periphery (five sides) of the LED 22 except the bottom surface is covered with the phosphor sealing layer 24. The phosphor sealing layer 24 contains a phosphor, and the light of the LED 22 is color-converted by the phosphor of the phosphor sealing layer 24 and emitted to the outside. As shown in FIG. 1A, the plurality of light emitting elements 20 are regularly arranged on the front surface 31 (an example of one surface) of the phosphor substrate 30 over the entire surface 31 of the phosphor substrate 30. It is installed. The correlated color temperature of the light emitted by each light emitting element 20 of the present embodiment is set to 3,018K as an example. In addition, the plurality of light emitting elements 20 use a heat sink (not shown) and a cooling fan (not shown) during the light emitting operation to radiate heat so that the phosphor substrate 30 is kept at room temperature from 50° C. to 100° C. as an example. Cooling).
Here, supplementing the meaning of “to” used in the numerical range in the present specification, for example, “50° C. to 100° C.” means “50° C. or more and 100° C. or less”. The term "-" used in the numerical range in the present specification means "more than the part described before "" and less than the part described after "".

<Phosphor substrate>
FIG. 2A is a diagram of the phosphor substrate 30 of the present embodiment, and is a plan view (a view from the front surface 31) in which the phosphor layer 36 is omitted. FIG. 2B is a plan view (view from the front surface 31) of the phosphor substrate 30 of the present embodiment. Here, FIG. 2B is attached with a partially enlarged view of a portion surrounded by a broken line. The bottom view of the phosphor substrate 30 of the present embodiment is the same as the view of the light emitting substrate 10 viewed from the back surface 33. In addition, the partial cross-sectional view of the phosphor substrate 30 of the present embodiment is the same as the drawing when the light emitting element 20 is removed from the partial cross-sectional view of FIG. 1C. That is, the phosphor substrate 30 of the present embodiment has a rectangular shape as viewed from the front surface 31 and the back surface 33, for example.

The phosphor substrate 30 of the present embodiment includes an insulating layer 32 (an example of an insulating substrate), a circuit pattern layer 34, a phosphor layer 36, and a back surface pattern layer 38 (FIGS. 1B, 1C, and 1C). 2A and FIG. 2B). Although the phosphor layer 36 is omitted in FIG. 2A, as shown in FIG. 2B, the phosphor layer 36 is, as an example, a plurality of phosphor layers 36 described later on the surface 31 of the insulating layer 32 and the circuit pattern layer 34. It is arranged in a portion other than the electrode pair 34A.

Further, as shown in FIGS. 1B and 2A, through holes 39 are formed in the phosphor substrate 30 at four locations near the four corners and two locations near the center. The six through holes 39 are used as positioning holes when manufacturing the phosphor substrate 30 and the light emitting substrate 10. In addition, the six through holes 39 are used as mounting screw holes for securing a heat-extracting effect (preventing substrate warpage and floating) to the (light emitting) lamp housing. As will be described later, the phosphor substrate 30 of the present embodiment is processed (etched or the like) by processing a double-sided plate (hereinafter referred to as a mother board MB; see FIG. 3A) in which copper foil layers are provided on both surfaces of an insulating plate. Although manufactured, as the motherboard MB, CS-3305A manufactured by Risho Industry Co., Ltd. is used as an example.

[Insulation layer]
The main features of the insulating layer 32 of this embodiment will be described below.
As described above, the shape is rectangular as viewed from the front surface 31 and the back surface 33, as an example.
The material is an insulating material including bismaleimide resin and glass cloth as an example. Further, the insulating material does not contain halogen and phosphorus (halogen-free, phosphorus-free).
The thickness is, for example, 100 μm to 200 μm.
The coefficient of thermal expansion (CTE) in the machine direction and the coefficient of thermal expansion (CTE) in the machine direction are each 10 ppm/° C. or less in the range of 50° C. to 100° C., for example. From another perspective, the coefficient of thermal expansion (CTE) in the longitudinal direction and the coefficient of thermal expansion (CTE) in the lateral direction are 6 ppm/K, respectively, as an example. This value is almost the same as the case of the light emitting element 20 of the present embodiment (90% to 110%, that is, within ±10%).
The glass transition temperature is, for example, higher than 300°C.
For example, the storage elastic modulus is larger than 1.0×10 ¹⁰ Pa and smaller than 1.0×10 ¹¹ Pa in the range of 100° C. to 300° C.
As an example, the bending elastic moduli in the machine direction and the transverse direction are 35 GPa and 34 GPa in the normal state, respectively.
The hot bending elastic modulus in the machine direction and the transverse direction is 19 GPa at 250° C., for example.
As an example, the water absorption is 0.13% when left for 24 hours in a temperature environment of 23°C.
The relative permittivity is 4.6 in a 1 MHz normal state as an example.
As an example, the dielectric loss tangent is 0.010 in the normal state of 1 MHz.

[Circuit pattern layer]
The circuit pattern layer 34 of the present embodiment is a metal layer provided on the surface 31 side of the insulating layer 32. The circuit pattern layer 34 of the present embodiment is, for example, a copper foil layer (a layer made of Cu). In other words, at least the surface (the surface facing the outer side in the thickness direction of the insulating layer 32) of the circuit pattern layer 34 of the present embodiment is a flat surface including copper.

The circuit pattern layer 34 is a pattern provided on the insulating layer 32, and is electrically connected to a terminal (not shown) to which a connector (not shown) is joined. The circuit pattern layer 34 supplies electric power supplied from an external power source (not shown) via the connector to the plurality of light emitting elements 20 when the light emitting substrate 10 is configured. Therefore, a part of the circuit pattern layer 34 is a plurality of electrode pairs 34A to which the plurality of light emitting elements 20 are respectively joined. That is, the circuit pattern layer 34 of the light emitting substrate 10 of the present embodiment is arranged on the insulating layer 32 and connected to each light emitting element 20. From another perspective, the circuit pattern layer 34 of the phosphor substrate 30 of the present embodiment is arranged on the insulating layer 32 and is connected to each light emitting element 20 by each electrode pair 34A. Here, in this specification, the surface of each electrode pair 34A is referred to as a bonding surface 34A1. In addition, as shown in FIG. 1C, FIG. 2A, FIG. 4, etc., each joint surface 34A1 is a surface on one side with each groove 34E on the surface (flat surface) of the circuit pattern layer 34 interposed therebetween.

Further, as described above, since the plurality of light emitting elements 20 in the light emitting substrate 10 of the present embodiment are regularly arranged over the entire surface 31, the plurality of electrode pairs 34A also extend over the entire surface 31. They are regularly arranged (see FIG. 2A). A portion of the circuit pattern layer 34 other than the plurality of electrode pairs 34A is referred to as a wiring portion 34B. Here, since the wiring portion 34B is not a portion joined to each light emitting element 20, the surface of the wiring portion 34B is referred to as a non-joint surface 34B1 in this specification. In other words, as shown in FIG. 1C, FIG. 2A, FIG. 4, etc., each non-bonding surface 34B1 is located on the opposite side of each bonding surface 34A1 with each groove 34E on the surface (plane) of the circuit pattern layer 34 interposed therebetween. It is regarded as a face. That is, in the circuit pattern layer 34 of the present embodiment, a plurality of grooves 34E that separate the plurality of bonding surfaces 34A1 and the plurality of non-bonding surfaces 34B1 are formed.
The region where the circuit pattern layer 34 is arranged on the surface 31 of the insulating layer 32 (the area occupied by the circuit pattern layer 34) is, for example, 60% or more of the surface 31 of the insulating layer 32 (area). (See FIG. 2A). Further, in the present embodiment, the bonding surfaces 34A1 and the non-bonding surfaces 34B1 are located at the same position in the thickness direction of the insulating layer 32 (see FIG. 1C, FIG. 3F, etc.).

[Phosphor layer]
As shown in FIG. 2B, as an example, the phosphor layer 36 of the present embodiment is arranged in a portion other than the plurality of electrode pairs 34A and the groove 34E on the surface 31 of the insulating layer 32 and the circuit pattern layer 34. .. That is, the phosphor layer 36 is arranged in a region other than the plurality of electrode pairs 34A and the groove 34E in the circuit pattern layer 34. In other words, at least a part of the phosphor layer 36 is arranged on the surface 31 around the plurality of grooves 34E and the bonding surfaces 34A1 adjacent to the grooves 34E (see FIGS. 1C and 2B). Further, from another perspective, at least a part of the phosphor layer 36 is arranged so as to surround the entire joint surface 34A1 when viewed from the surface 31 side. In the present embodiment, the region where the phosphor layer 36 is arranged on the surface 31 of the insulating layer 32 is, for example, 80% or more of the surface 31 of the insulating layer 32.
The surface of the phosphor layer 36 on the outer side in the thickness direction of the insulating layer 32 is located on the outer side in the thickness direction than the joint surface 34A1 of the circuit pattern layer 34 (see FIG. 1C). Further, the phosphor layer 36 of the present embodiment has a facing surface 36A facing the light emitting element 20 at the boundary with the groove 34E in each non-bonding surface 34B1 (see FIG. 1C). Further, in the present embodiment, as an example, the position in the thickness direction of the thickness direction outer surface (the surface facing the outside) of the insulating layer 32 in the phosphor layer 36 is the center position in the thickness direction of each light emitting element 20. (See FIG. 1C). However, the position in the thickness direction of the surface of the phosphor layer 36 on the outer side in the thickness direction of the insulating layer 32 is preferably located at a position on the inner side in the thickness direction than the center of each light emitting element 20 in the thickness direction. .. The above reason is to ensure the light emitting effect of each light emitting element 20.

The phosphor layer 36 of the present embodiment is, for example, an insulating layer containing a phosphor and a binder described later. The phosphor contained in the phosphor layer 36 is fine particles held in a state of being dispersed in a binder, and has a property of exciting the light emission of the LED 22 of each light emitting element 20 as excitation light. Specifically, the phosphor of the present embodiment has a property that the emission peak wavelength when the light emitted from the LED 22 of the light emitting element 20 is used as excitation light is in the visible light region. The binder may be, for example, an epoxy type, an acrylate type, a silicone type, or the like, as long as it has an insulating property equivalent to that of the binder contained in the solder resist.

(Specific example of phosphor)
Here, examples of the phosphor contained in the phosphor layer 36 of the present embodiment include an α-sialon phosphor containing Eu, a β-sialon phosphor containing Eu, a CASN phosphor containing Eu, and Eu. The phosphor is at least one phosphor selected from the group consisting of SCASN phosphors containing The above-mentioned phosphor is an example of this embodiment, and may be a phosphor other than the above-mentioned phosphor, such as YAG, LuAG, BOS, and other phosphors excited by visible light.

Α-sialon phosphor containing Eu, the general _formula: represented by _{M x Eu y Si 12- (m} + n) Al (m + n) O n N 16-n. In the above general formula, M is at least one element containing at least Ca selected from the group consisting of Li, Mg, Ca, Y and lanthanide elements (however, excluding La and Ce), and the valence of M is When a is set, ax+2y=m, x is 0<x≦1.5, 0.3≦m<4.5, and 0<n<2.25.

The β-sialon phosphor containing Eu is a divalent europium as an emission center of the β-sialon represented by the general formula: Si _6-z Al _z O _z N _8-z (z=0.005 to 1). It is a phosphor in which (Eu ²⁺ ) is solid-dissolved.

Further, examples of the nitride phosphor include a Eu-containing CASN phosphor and a Eu-containing SCASN phosphor.

A CASN phosphor containing Eu (an example of a nitride phosphor) is represented by, for example, the formula CaAlSiN ₃ :Eu ²⁺ , has Eu ²⁺ as an activator, and has a crystal composed of an alkaline earth silicon nitride as a matrix. A red phosphor. In addition, in the definition of the Eu-containing CASN phosphor in the present specification, the Eu-containing SCASN phosphor is excluded.

The SCASN phosphor containing Eu (an example of a nitride phosphor) is represented by, for example, the formula (Sr,Ca)AlSiN ₃ :Eu ²⁺ , uses Eu ²⁺ as an activator, and is made of an alkaline earth silicon nitride. A red phosphor having a crystal as a host.

[Backside pattern layer]
The back surface pattern layer 38 of the present embodiment is a metal layer provided on the back surface 33 side of the insulating layer 32. The back pattern layer 38 of the present embodiment is, for example, a copper foil layer (Cu layer).
As shown in FIG. 1B, the back surface pattern layer 38 is arranged such that a plurality of rectangular portion blocks arranged in a straight line along the longitudinal direction of the insulating layer 32 are adjacent to each other with their phases shifted in the lateral direction. It is supposed to be a layer.
The back pattern layer 38 is, for example, an independent floating layer. In addition, the back surface pattern layer 38 overlaps, for example, 80% or more of the area of the circuit pattern layer 34 arranged on the front surface 31 in the thickness direction of the insulating layer 32 (phosphor substrate 30).

The above is a description of the configurations of the light emitting substrate 10 and the phosphor substrate 30 of the present embodiment.

<<Method for Manufacturing Light Emitting Substrate of Present Embodiment>>
Next, a method for manufacturing the light emitting substrate 10 of this embodiment will be described with reference to FIGS. 3A to 3F. The method for manufacturing the light emitting substrate 10 according to the present embodiment includes a first step, a second step, a third step, a fourth step and a fifth step, and each step is performed in the order described.

<First step>
FIG. 3A is a diagram showing the start time and the end time of the first step. The first step is a step of forming the same pattern 34C (an example of a conductive pattern layer) as the circuit pattern layer 34 on the front surface 31 of the motherboard MB when viewed from the thickness direction, and the back surface pattern layer 38 on the back surface 33. This step is performed by etching using a mask pattern (not shown), for example. Note that this step is an example of the pattern layer forming step.

<Second step>
FIG. 3B is a diagram showing the start time and the end time of the second step. The second step is a step of forming a plurality of grooves 34E on the surface of the pattern 34C. This step is performed by etching using a mask pattern (not shown), for example. When this step is completed, the circuit pattern layer 34 is formed. That is, when this step is completed, the joint surface 34A1 and the non-joint surface 34B1 are formed on both sides of each groove 34E, respectively. Note that this step is an example of the groove forming step.

<Third step>
FIG. 3C is a diagram showing the start time and the end time of the third step. The third step is a step of disposing the solder SP on each joint surface 34A1 of the circuit pattern layer 34 (in other words, applying the solder SP). This step is performed by printing as an example. Note that this step is an example of the solder placement step.

<Fourth step>
FIG. 3D is a diagram showing the start of the fourth step and the application of the first layer. FIG. 3E is a diagram showing the second step and the third layer in the fourth step. The fourth step is a step of forming the phosphor layer 36 over the entire non-bonding surface 34B1 of the circuit pattern layer 34. In this step, for example, the phosphor layer 36 is arranged by stacking the phosphor patterns 361, 362, and 363 having a thickness of 1/3 of the phosphor layer 36 three times by transfer. In the present step, as an example, the position in the thickness direction of the surface of the phosphor layer 36 facing the thickness direction outside of the insulating layer 32 is the center position in the thickness direction of each light emitting element 20 bonded to the circuit pattern layer 34. The phosphor layer 36 is applied so as to be located at. In other words, in this step, the phosphor layer 36 is applied such that the thickness of the phosphor layer 36 is not more than half the thickness of each light emitting element 20. However, for the reasons described above, the thickness of the phosphor layer 36 is preferably half or less of the thickness of each light emitting element 20. Note that this step is an example of the phosphor layer arranging step.

<Fifth step>
FIG. 3F is a diagram showing the start time and the end time of the fifth step. The fifth step is a step of mounting the plurality of light emitting elements 20 on the phosphor substrate 30. In this step, the solder SP is melted in a state in which the electrodes of the plurality of light emitting elements 20 are aligned with the joint surfaces 34A1 on which the solder SP is arranged in the third step. After that, when the solder SP is cooled and solidified, each light emitting element 20 is bonded to each electrode pair 34A (each bonding surface 34A1). That is, this process is performed by a reflow process as an example. In this step, flux is applied to the solder SP on each joining surface 34A1 and then each light emitting element 20 is joined to each electrode pair 34A. By doing so, in the case of the present embodiment in which the third step is performed before the fourth step, the flux acts so as to adhere the solder SP to each light emitting element 20. This step is an example of a joining step.

The above is the description of the method for manufacturing the light emitting substrate 10 of the present embodiment.

<<Light-Emitting Operation of Light-Emitting Substrate of this Embodiment>>
Next, the light emitting operation of the light emitting substrate 10 of the present embodiment will be described with reference to FIG. Here, FIG. 4 is a diagram for explaining the light emitting operation of the light emitting substrate 10 of the present embodiment.

First, when an operation switch (not shown) for operating the plurality of light emitting elements 20 is turned on, power supply from an external power source (not shown) to the circuit pattern layer 34 is started via a connector (not shown), and a plurality of light emitting elements are emitted. The element 20 diverges and emits the light L radially, and a part of the light L reaches the surface 31 of the phosphor substrate 30. Hereinafter, the behavior of the light L will be described separately in the traveling direction of the emitted light L.

A part of the light L emitted from each light emitting element 20 is emitted to the outside without entering the phosphor layer 36. In this case, the wavelength of the light L remains the same as the wavelength of the light L emitted from each light emitting element 20.

The light of the LED 22 itself, which is a part of the light L emitted from each light emitting element 20, is incident on the phosphor layer 36. Here, the above-mentioned “light of the LED 22 itself in a part of the light L” means color conversion by the phosphor (phosphor sealing layer 24) of each light emitting element 20 (CSP itself) in the emitted light L. Light that is not emitted, that is, light of the LED 22 itself (for example, light of blue color (wavelength near 470 nm)) is meant. Then, when the light L of the LED 22 itself collides with the phosphor dispersed in the phosphor layer 36, the phosphor is excited and emits excitation light. Here, the reason why the phosphor is excited is that the phosphor dispersed in the phosphor layer 36 is a phosphor having an excitation peak in blue light (visible light excitation phosphor). Along with this, a part of the energy of the light L is used to excite the phosphor, so that a part of the energy of the light L is lost. As a result, the wavelength of the light L is converted (wavelength conversion is performed). For example, depending on the type of phosphor of the phosphor layer 36 (for example, when red-based CASN is used for the phosphor), the wavelength of the light L becomes long (for example, 650 nm or the like). Further, although some excitation light in the phosphor layer 36 is emitted from the phosphor layer 36 as it is, a part of the excitation light goes to the lower circuit pattern layer 34. Then, a part of the excitation light is emitted to the outside by being reflected by the circuit pattern layer 34. As described above, when the wavelength of the excitation light by the phosphor of the phosphor layer 36 is 600 nm or more, the reflection effect can be expected even if the circuit pattern layer 34 is Cu. Although the wavelength of the light L differs from that in the above example depending on the type of the fluorescent material of the fluorescent material layer 36, the wavelength conversion of the light L is performed in any case. For example, when the wavelength of the excitation light is less than 600 nm, the reflection effect can be expected if the circuit pattern layer 34 or its surface is made of Ag (plating), for example. A white reflective layer may be provided below the phosphor layer 36 (on the side of the insulating layer 32). The reflective layer is provided by, for example, white paint such as titanium oxide filler.

As described above, the light L emitted from each light emitting element 20 (the light L radially emitted from each light emitting element 20) is emitted to the outside together with the excitation light via the plurality of optical paths as described above. .. Therefore, when the emission wavelength of the phosphor included in the phosphor layer 36 is different from the emission wavelength of the phosphor (phosphor sealing layer 24) that seals (or covers) the LED 22 in the light emitting element 20 (CSP), In the light emitting substrate 10 of the present embodiment, the bundle of light L emitted by each light emitting element 20 is a bundle of light L including the light L having a wavelength different from the wavelength of the light L emitted by each light emitting element 20. Irradiation is performed together with the excitation light. For example, the light emitting substrate 10 of the present embodiment includes a light L including a bundle of light L emitted by each light emitting element 20 and a light L having a wavelength longer than the wavelength of the light L emitted by each light emitting element 20. Are irradiated together with the excitation light as a bundle of
On the other hand, the emission wavelength of the phosphor contained in the phosphor layer 36 and the emission wavelength of the phosphor (phosphor sealing layer 24) that seals (or covers) the LED 22 in the light emitting element 20 (CSP) are In the same case (in the case of the same correlated color temperature), in the light emitting substrate 10 of the present embodiment, the bundle of light L emitted by each light emitting element 20 is the same as the wavelength of the light L emitted by each light emitting element 20. A bundle of light L including a light L having a wavelength is emitted together with the excitation light.

The above is the description of the light emitting operation of the light emitting substrate 10 of the present embodiment.

<<Effect of this embodiment>>
Next, the effects of this embodiment will be described with reference to the drawings.

<First effect>
The first effect will be described by comparing the present embodiment with a comparison mode (see FIG. 5) described below. Here, in the description of the comparative embodiment, when the same constituent element or the like as in the present embodiment is used, the same name, reference numeral or the like as in the case of the present embodiment is used for the constituent element or the like. FIG. 5 is a diagram for explaining the light emitting operation of the light emitting substrate 10A of the comparative form. The light emitting substrate 10A of the comparative form (the substrate 30A on which the plurality of light emitting elements 20 are mounted) has the same configuration as the light emitting substrate 10 (phosphor substrate 30) of the present embodiment, except that the phosphor layer 36 is not provided. ing.

In the case of the light emitting substrate 10A of the comparative form, the light L emitted from each light emitting element 20 and incident on the surface 31 of the substrate 30A is reflected or scattered without the wavelength being converted. Therefore, in the case of the comparative substrate 30A, when the light emitting element 20 is mounted, it is not possible to adjust the light emission color different from the light emitted by the light emitting element 20. That is, in the case of the light emitting substrate 10A of the comparative form, it is not possible to adjust the light emission color different from the light emitted by the light emitting element 20.

On the other hand, in the case of the present embodiment, when viewed from the thickness direction of the insulating layer 32, the phosphor layer 36 is provided on the surface 31 of the insulating layer 32 and around each bonding surface 34A1 with each light emitting element 20. It is arranged. Therefore, a part of the light L radially emitted from each light emitting element 20 enters the phosphor layer 36, is wavelength-converted by the phosphor layer 36, and is irradiated to the outside. In this case, a part of the light L emitted from each light emitting element 20 in a hemispherical shape is incident on the phosphor layer 36 to excite the phosphor contained in the phosphor layer 36 and generate excitation light.

Therefore, according to the phosphor substrate 30 of the present embodiment, when the light emitting element 20 is mounted, the light L emitted from the phosphor substrate 30 is changed to the light of the emission color different from the light L emitted by the light emitting element 20. Can be adjusted. Accordingly, according to the light emitting substrate 10 of the present embodiment, the light L emitted from the phosphor substrate 30 can be adjusted to the light L having a different emission color from the light L emitted by the light emitting element 20.
In addition, when the emission wavelength of the phosphor included in the phosphor layer 36 is the same as the emission wavelength of the phosphor (phosphor sealing layer 24) that seals (or covers) the LED 22 in the light emitting element 20 (CSP) ( In the case of the same correlated color temperature), the light emitting substrate 10 according to the present embodiment converts the bundle of the light L emitted by each light emitting element 20 into the light having the same wavelength as the wavelength of the light L emitted by each light emitting element 20. A bundle of light L containing L is irradiated together with the excitation light. In this case, the phosphor layer 36 can also reduce the chromaticity variation of the mounted light emitting element 20.

<Second effect>
In the case of the comparative form, as shown in FIG. 5, unevenness occurs in the light L irradiated to the outside due to the arrangement intervals of the light emitting elements 20. Here, the larger the spot of the light L, the larger the glare.
On the other hand, in the case of the present embodiment, as shown in FIG. 2B, the periphery of each bonding surface 34A1 is surrounded (over the entire circumference) by the phosphor layer 36, and further adjacent to the light emitting element 20. The phosphor layer 36 is also provided between them. Therefore, the excitation light is also emitted from the periphery of each joint surface 34A1 (the periphery of each light emitting element 20).
Therefore, according to the present embodiment, it is possible to reduce glare as compared with the comparative example.
In particular, this effect is obtained when the phosphor layer 36 is provided over the entire surface of the insulating layer 32, specifically, the region of the surface 31 of the insulating layer 32 where the phosphor layer 36 is arranged is the surface 13. It is effective in the case of 80% or more of the area.
Further, the phosphor layer 36 of the present embodiment has a facing surface 36A corresponding to the adjacent light emitting element 20, as shown in FIG. 1C. Therefore, in the present embodiment, for example, glare can be reduced compared to the case where the light emitting element 20 is arranged on the phosphor layer 36 (not shown).

<Third effect>
Further, in the case of the present embodiment, for example, the phosphor contained in the phosphor layer 36 is a CASN phosphor containing Eu, and the phosphor layer 36 is provided on the Cu wiring portion 34B. Therefore, for example, when each light emitting element 20 emits white light L, for example, the excitation light from the CASN phosphor contained in the phosphor layer 36 is emitted by reflection by Cu forming the lower electrode. The efficiency is improved (the structure of the present embodiment has a Cu light reflection effect). Then, in the present embodiment, due to the effect, the white light L can be adjusted to the warmer color light L (color in which the correlated color temperature is shifted to the low temperature side). In this case, warm-colored light can be added to the white-based light of the light emitting element 20, and the special color rendering coefficient R9 value can be increased. This effect is particularly effective for pseudo white light using YAG-based white light (yellow phosphor).

<Fourth effect>
In the method for manufacturing the light emitting substrate 10 of the present embodiment, the fourth step (joining step or joining step of joining the light emitting element 20 to the joining surface 34A1 after the second step (see FIG. 3B), which is an example of the groove forming step. Reflow process) is performed.
Therefore, in the fourth step, even if the melted solder ball SP protrudes from the joint surface 34A1, it is housed in the groove 34E.
Therefore, according to the present embodiment, it is possible to prevent the solder SP from protruding from the bonding surface 34A1 of the light emitting element 20 in the circuit pattern layer 34 to the non-bonding surface 34B1. Accordingly, according to this embodiment, it is possible to manufacture the highly reliable phosphor substrate 30 and the light emitting substrate 10.
In the case of this embodiment, the bonding surfaces 34A1 and the non-bonding surfaces 34B1 are located at the same position in the thickness direction of the insulating layer 32 (see FIG. 1C, FIG. 3F, etc.). In such a case, it can be said that the present effect due to the formation of the groove 34E between the joint surface 34A1 and the non-joint surface 34B1 is effective.

<Fifth effect>
Further, in the method for manufacturing the light emitting substrate 10 of the present embodiment, the fourth step (phosphor layer arranging step) is performed after the third step (solder arranging step) (see FIGS. 3C to 3E). Here, the timing of arranging the solder SP may be, for example, the time of the fifth step (the step of mounting the plurality of light emitting elements 20) after the fourth step.
However, since the fourth step is performed after the third step as in the present embodiment, the solder SP can be easily arranged by printing. Further, each groove 34E formed on the surface of the circuit pattern layer 34 is effective in that it functions as a solder flow stop for the solder SP.

The above is a description of the effects of the present embodiment.

As described above, the present invention has been described by taking the above embodiment as an example, but the present invention is not limited to the above embodiment. The technical scope of the present invention includes, for example, the following forms (modifications).

For example, in the description of the fourth step (see FIG. 3D) of the present embodiment, the phosphor layer 36 is formed by transferring, for example, three phosphor patterns 361, 362, 363 each having a thickness of 1/3 of the phosphor layer 36. It has been described that the phosphor layer 36 is formed by stacking the layers once. However, the phosphor layer 36 may be formed by a method different from this embodiment.
For example, as in the modified example (first modified example) shown in FIG. 6A, in the fourth step, while the dispenser DP (an example of a discharge part) is moved relatively to the insulating layer 32, the phosphor layer 36 The phosphor layer 36 may be formed by discharging the liquid LQ containing the phosphor to the dispenser DP such that the phosphor patterns having a thickness of /n (n≧2) are stacked n times.
Further, for example, as in the modified example (second modified example) shown in FIG. 6B, in the third step, while the droplet discharge head IJH (an example of the discharge section) is relatively moved to the insulating layer 32, the fluorescent light is emitted. The phosphor layer 36 is formed by causing the liquid droplet ejection head IJH to eject the liquid droplet DL containing the phosphor so that the phosphor pattern having a thickness of 1/n (n≧2) of the body layer 36 is stacked n times. You may do so.
Further, unlike the first modification and the second modification, in the fourth step, 1/n so that the phosphor patterns having a thickness of 1/n (n≧2) of the phosphor layer 36 are laminated n times. The phosphor layer 36 may be formed by printing a phosphor pattern having a thickness of n times. As a printing method in the case of this modification, for example, there is a screen printing method. However, if the phosphor layer 36 can be formed by printing the phosphor pattern n times, the specific printing method is not limited to the screen printing method.

Further, in the manufacturing method of the light emitting substrate 10 of the present embodiment, the fifth step (bonding step of the light emitting element 20) is performed after the fourth step (phosphor layer arranging step). However, when the phosphor layer arranging step is performed by using the droplet discharge head IJH as in the second modification shown in FIG. 6B, as in the case of the modification (third modification) shown in FIG. 6C, The fourth step may be performed after the fifth step. Thus, the second modified example is effective in that the fourth step can be performed at any timing before and after the fifth step. Further, this point can also be said in the case of the first modification.

Further, in the description of the present embodiment, the example of the light emitting element 20 is the CSP. However, an example of the light emitting element 20 may be other than the CSP. For example, it may be simply mounted with a flip chip. It can also be applied to the substrate of the COB device itself.

Further, in the description of the present embodiment, it is assumed that the phosphor substrate 30 has a plurality of light emitting elements 20 mounted thereon, and the light emitting substrate 10 has a plurality of light emitting elements 20. However, considering the mechanism of the description of the first and fourth effects described above, it is clear that the first effect can be achieved even with one light emitting element 20. Therefore, the number of the light emitting elements 20 mounted on the phosphor substrate 30 may be at least one. Further, the number of the light emitting elements 20 mounted on the light emitting substrate 10 may be at least one. Along with this, the number of the bonding surfaces 34A1 and the non-bonding surfaces 34B1 may be at least one or more.

Further, in the description of the present embodiment, it is assumed that the back surface 33 of the phosphor substrate 30 is provided with the back surface pattern layer 38 (see FIG. 1B). However, considering the above-described mechanism of the first and fourth effects, it is clear that the first effect is achieved even if the back surface 33 of the phosphor substrate 30 is not provided with the back surface pattern layer 38. Therefore, even if the back surface 33 does not have the back surface pattern layer 38, which is different from the phosphor substrate 30 and the light emitting substrate 10 of the present embodiment, the embodiment can be said to belong to the technical scope of the present invention.

Further, in the description of this embodiment, it is assumed that the phosphor substrate 30 has a plurality of light emitting elements 20 mounted thereon. However, considering the mechanism of the description of the fourth effect described above, the example of the electronic component may not be the light emitting element 20.

In addition, in the description of the present embodiment, the phosphor substrate 30, which is an example of the circuit board, includes the phosphor layer 36. However, considering the mechanism of the description of the fourth effect described above, when the example of the electronic component is not the light emitting element 20, the phosphor layer 36 may not be provided on the circuit board.

In addition, in the description of the present embodiment, the phosphor layer 36 is arranged on the surface 31 of the insulating layer 32 and the circuit pattern layer 34 other than the plurality of electrode pairs 34A (see FIG. 2B). However, considering the mechanism of the description of the first and fourth effects described above, the first and the fourth effects can be obtained even if they are not arranged over the entire area of the surface 31 of the phosphor substrate 30 other than the plurality of electrode pairs 34A. It is clear that the effect of 4 is produced. Therefore, even if the phosphor substrate 36 and the light emitting substrate 10 of the present embodiment are different from each other only in that the phosphor layer 36 is arranged in the range of the surface 31 different from the case of the present embodiment, the embodiment is the present invention. Can be said to belong to the technical scope of.
In the case of the present embodiment, the phosphor layer 36 is provided between the adjacent light emitting elements 20 (FIG. 2B). Further, the binder of the phosphor layer 36 has the same insulating property as the binder contained in the solder resist, for example. That is, in the case of the present embodiment, the phosphor layer 36 functions as a solder resist.

In addition, in the description of the present embodiment, in manufacturing the phosphor substrate 30 and the light emitting substrate 10, CS-3305A manufactured by Risho Industry Co., Ltd. is used as the motherboard MB. However, this is an example, and a different motherboard MB may be used.

Note that the light emitting substrate 10 of the present embodiment (including its modification) can be applied to a lighting device by combining with other components. The other components in this case are a power supply for supplying electric power for causing the light emitting element 20 of the light emitting substrate 10 to emit light.

This application claims priority based on Japanese Patent Application No. 2019-029146 filed on February 21, 2019, and incorporates all of the disclosure thereof.

10 Light emitting board (an example of mounting board)
20 Light-Emitting Element 30 Phosphor Substrate (Example of Circuit Board)
31 surface (one example of one side)
32 insulating layer (an example of an insulating substrate)
33 back surface 34 circuit pattern layer 34A electrode pair 34A1 bonding surface 34B wiring portion 34B1 non-bonding surface 34E groove 36 phosphor layer 36E facing surface 38 back surface pattern layer DP dispenser (an example of a discharge part)
IJH droplet discharge head (an example of a discharge unit)
L Hikari MB Motherboard SP Solder ball, solder

Claims (21)

1. A circuit board on which at least one electronic component is mounted,
   An insulating substrate,
   A circuit which is disposed on one surface of the insulating substrate and has a flat surface facing outward in the thickness direction of the insulating substrate, and which is joined by solder as at least one joining surface for joining a part of the flat surface to the at least one electronic component. A pattern layer,
   Equipped with
   The circuit pattern layer is formed with at least one groove that separates the at least one bonding surface and at least one non-bonding surface that is a portion of the plane other than the at least one bonding surface.
   Circuit board.
2. The at least one bonding surface and the at least one non-bonding surface are located at the same position in the thickness direction,
   The circuit board according to claim 1.
3. The at least one electronic component is at least one light emitting element,
   A phosphor layer that is disposed on the at least one non-bonding surface and that includes a phosphor having an emission peak wavelength in the visible light region when the emission of the at least one light emitting element is used as excitation light,
   The circuit board according to claim 1 or 2, further comprising:
4. The at least one light emitting element is a plurality of light emitting elements,
   The at least one joint surface is a plurality of joint surfaces,
   The at least one non-bonding surface is a plurality of non-bonding surfaces,
   The at least one groove is a plurality of grooves,
   The plurality of light emitting elements are arranged on one surface of the insulating substrate and mounted by being bonded to the plurality of bonding surfaces, respectively.
   The circuit board according to claim 3.
5. The phosphor layer has a facing surface facing the mounted light emitting element at a boundary with the groove in the plurality of non-bonding surfaces.
   The circuit board according to claim 4.
6. The surface of the phosphor layer facing the thickness direction outer side is located on the thickness direction inner side than the surface of the at least one light emitting element facing the thickness direction outer side,
   The circuit board according to any one of claims 3 to 5.
7. A surface of the phosphor layer facing the thickness direction outer side is located at the center position in the thickness direction of the at least one light emitting element or located in the thickness direction inner side than the position.
   The circuit board according to any one of claims 3 to 5.
8. A circuit board according to any one of claims 1 to 7,
   At least one electronic component bonded to the at least one bonding surface;
   A mounting board including.
9. The circuit board according to claim 6 or 7,
   At least one light emitting element bonded to the at least one bonding surface;
   Equipped with
   The position in the thickness direction of the surface facing the thickness direction outside in the phosphor layer is located in the thickness direction inner side than the position of the surface facing the thickness direction outside of the at least one light emitting element,
   Mounting board.
10. The circuit board according to claim 6 or 7,
    At least one light emitting element bonded to the at least one bonding surface;
    Equipped with
    The position in the thickness direction of the surface facing the thickness direction outside in the phosphor layer, the position in the thickness direction center of the at least one light-emitting element in the thickness direction is located in the thickness direction inner side,
    Mounting board.
11. A mounting board according to any one of claims 8 to 10,
    A power supply for supplying electric power for causing the light emitting element to emit light,
    A lighting device including.
12. A method of manufacturing a circuit board, comprising: an insulating substrate; and a circuit pattern layer that is disposed on one surface of the insulating substrate and has at least one electronic component bonded to a part thereof.
    A pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate;
    A groove forming step of forming at least one groove on a flat surface of the conductive pattern layer, the flat surface facing outward in the thickness direction of the insulating substrate;
    A solder placement step of placing a solder for joining at least one electronic component to one portion across the at least one groove in the plane;
    A method for manufacturing a circuit board including the following.
13. The at least one electronic component is at least one light emitting element,
    A phosphor layer including a phosphor having an emission peak wavelength in the visible light region when the emission of the at least one light emitting element is used as excitation light is arranged in the other portion across the at least one groove in the plane. Phosphor layer placement step,
    The method for manufacturing a circuit board according to claim 12, further comprising:
14. The phosphor layer placement step is performed after the solder placement step,
    The method for manufacturing a circuit board according to claim 13.
15. In the phosphor layer disposing step, a position in the thickness direction of a surface of the phosphor layer facing outward in the thickness direction is more than a central position in the thickness direction of the at least one light emitting element bonded to the circuit pattern layer. Also, the phosphor layer is arranged so as to be located inside the thickness direction,
    The method for manufacturing a circuit board according to claim 13.
16. An insulating substrate, a circuit pattern layer arranged on one surface of the insulating substrate, and a method of manufacturing a mounting substrate comprising at least one electronic component bonded to a part of the circuit pattern layer,
    A pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate;
    A groove forming step of forming at least one groove on a flat surface of the conductive pattern layer, the flat surface facing outward in the thickness direction of the insulating substrate;
    A solder placement step of placing solder on one side across the at least one groove in the plane;
    A joining step of arranging the electrode of the at least one electronic component in the one portion with the solder interposed therebetween, and melting the solder to join the electrode to the one portion,
    A method of manufacturing a mounting board including:
17. The at least one electronic component is at least one light emitting element,
    A phosphor layer including a phosphor having an emission peak wavelength in the visible light region when the emission of the at least one light emitting element is used as excitation light is arranged in the other portion across the at least one groove in the plane. Phosphor layer placement step,
    The method for manufacturing a mounting board according to claim 16, further comprising:
18. The phosphor layer placement step is performed after the solder placement step,
    The method for manufacturing a mounting board according to claim 17.
19. In the phosphor layer arranging step, the position in the thickness direction of the surface of the phosphor layer facing the thickness direction outside of the thickness direction outside of the at least one light emitting element bonded to the circuit pattern layer The phosphor layer is arranged so as to be located on the inner side in the thickness direction than the position,
    The method for manufacturing a mounting board according to claim 17 or 18.
20. In the phosphor layer arranging step, a position in the thickness direction of a surface of the phosphor layer facing outward in the thickness direction is a central position in the thickness direction of the at least one light emitting element bonded to the circuit pattern layer, or The phosphor layer is arranged so as to be located inside the thickness direction with respect to the position,
    The method for manufacturing a mounting board according to claim 17 or 18.
21. In the joining step, a flux is applied to the solder and then the solder is melted to join the electrode to the one portion.
    The method for manufacturing a mounting board according to any one of claims 16 to 20.

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