JPWO2020170968A1 - Circuit board, mounting board, lighting equipment, circuit board manufacturing method and mounting board manufacturing method - Google Patents

Abstract

The circuit board of the present invention is a circuit board on which at least one electronic component is mounted on one surface, and has an insulating substrate and a flat surface arranged on one surface of the insulating substrate and facing outward in the thickness direction of the insulating substrate. A circuit pattern layer bonded by solder as at least one bonding surface for bonding a part of the plane to the at least one electronic component is provided, and the circuit pattern layer includes the at least one bonding surface and the above. At least one groove is formed that separates the at least one non-joint surface, which is a portion other than the at least one joint surface in the plane.

Description

The present invention relates to a circuit board, a mounting board, a lighting device, a method for manufacturing a circuit board, and a method for manufacturing a mounting board.

Patent Document 1 discloses a configuration (LED lighting device) that reflects light from an LED light source by using a reflective material. However, the specific structure of the LED light source, which is an example of an electronic component, and the joint surface in the circuit pattern of the substrate is not clearly disclosed.

Chinese Patent Publication No. 106163113

When solder is placed on the bonding surface with electronic components in the circuit pattern layer to melt the solder and the electrodes of the electronic components are bonded to the bonding surface, the solder may squeeze out from the bonding surface.

An object of the present invention is to provide a circuit board that suppresses solder squeeze out from a bonded surface to a non-bonded surface of an electronic component in a circuit pattern layer.

The circuit board of the first aspect of the present invention is a circuit board on which at least one electronic component is mounted on one surface, is arranged on one surface of the insulating substrate and the insulating substrate, and faces outward in the thickness direction of the insulating substrate. A circuit pattern layer having a plane and soldered as at least one joining surface for joining a part of the plane to the at least one electronic component is provided, and the circuit pattern layer includes the at least one. At least one groove is formed that separates the joint surface from at least one non-joint surface that is a portion other than the at least one joint surface in the plane.

The circuit board of the second aspect of the present invention is the circuit board of the first aspect, and the at least one junction surface and the at least one non-junction surface are located at the same position in the thickness direction.

The circuit board of the third aspect of the present invention is the circuit board of the first or second aspect, and the at least one electronic component is at least one light emitting element and is arranged on the at least one non-junction surface. Provided is a phosphor layer containing a phosphor whose emission peak wavelength is in the visible light region when the emission of the at least one light emitting element is used as excitation light.

The phosphor substrate of the fourth aspect of the present invention is the circuit board of the third aspect, wherein the at least one light emitting element is a plurality of light emitting elements, and the at least one bonding surface is a plurality of bonding surfaces. The at least one non-junction surface is a plurality of non-junction surfaces, the at least one groove is a plurality of grooves, and the plurality of light emitting elements are arranged on one surface of the insulating substrate, respectively. It is joined and mounted on the plurality of joint surfaces.

The circuit board of the fifth aspect of the present invention is the circuit board of the fourth aspect, and the phosphor layer faces the light emitting element mounted at the boundary with the groove on the plurality of non-bonded surfaces. Has facing surfaces.

The circuit board of the sixth aspect of the present invention is the circuit board of any one of the third to fifth aspects, and the surface of the phosphor layer facing outward in the thickness direction is in the at least one light emitting element. It is located inside the thickness direction with respect to the surface facing the outside in the thickness direction.

The circuit board of the seventh aspect of the present invention is the circuit board of any one of the third to fifth aspects, and the surface of the phosphor layer facing outward in the thickness direction is in the at least one light emitting element. It is located at the center of the thickness direction or inside the thickness direction from the position.

The mounting board of the first aspect of the present invention includes the circuit board of any one of the first to seventh aspects and at least one electronic component bonded to the at least one bonding surface.

The mounting substrate of the second aspect of the present invention includes the circuit board of the sixth or seventh aspect and at least one light emitting element bonded to the at least one bonding surface, and the thickness of the phosphor layer. The position of the surface facing outward in the direction in the thickness direction is located inside the thickness direction of the position of the surface of the at least one light emitting element facing outward in the thickness direction.

The mounting substrate of the third aspect of the present invention includes the circuit board of the sixth or seventh aspect and at least one light emitting element bonded to the at least one bonding surface, and the thickness of the phosphor layer. The position of the surface facing outward in the direction in the thickness direction is located at the center of the at least one light emitting element in the thickness direction or inside the position in the thickness direction.

The lighting device of the present invention includes a mounting substrate according to any one of the first to third aspects, and a power source for supplying electric power for causing the light emitting element to emit light.

The method for manufacturing a circuit board according to the first aspect of the present invention is a method for manufacturing a circuit board including an insulating substrate and a circuit pattern layer arranged on one surface of the insulating substrate and to which at least one electronic component is bonded. A pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate and a groove forming of at least one groove on a plane of the conductive pattern layer facing outward in the thickness direction of the insulating substrate. It comprises a step and a solder arranging step of arranging solder for joining at least one electronic component to one portion of the plane with the at least one groove interposed therebetween.

The method for manufacturing the circuit board of the second aspect of the present invention is the method for manufacturing the circuit board of the first aspect, wherein the at least one electronic component is at least one light emitting element, and the at least one in the plane. A phosphor layer arranging step of arranging a phosphor layer containing a phosphor whose emission peak wavelength is in the visible light region when the emission of at least one light emitting element is used as excitation light in the other portion across the groove. include.

The method for manufacturing a circuit board according to the third aspect of the present invention is the method for manufacturing a circuit board according to the second aspect, and the phosphor layer arranging step is performed after the solder arranging step.

The method for manufacturing a circuit board according to a fourth aspect of the present invention is the method for manufacturing a circuit board according to a second or third aspect, and the phosphor layer arranging step is a surface of the phosphor layer facing outward in the thickness direction. The phosphor layer is arranged so that the position in the thickness direction is located inside the thickness direction of the at least one light emitting element bonded to the circuit pattern layer so as to be located inside the surface facing the outside in the thickness direction.

The method for manufacturing a circuit board according to a fifth aspect of the present invention is the method for manufacturing a circuit board according to a second or third aspect, and the phosphor layer arranging step is a surface of the phosphor layer facing outward in the thickness direction. The phosphor layer is arranged so that the position in the thickness direction of the light emitting element is located inside the thickness direction of the center of the at least one light emitting element bonded to the circuit pattern layer.

The method for manufacturing a mounting substrate according to the first aspect of the present invention is an insulating substrate, a circuit pattern layer arranged on one surface of the insulating substrate, and at least one electronic component bonded to a part of the circuit pattern layer. A method for manufacturing a mounting substrate comprising:, a pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate, and at least one on a plane of the conductive pattern layer facing outward in the thickness direction of the insulating substrate. A groove forming step of forming one groove, a solder arranging step of arranging solder in one portion of the plane with the at least one groove sandwiched between them, and the at least one electronic component sandwiching the solder in the one portion. Includes a joining step of arranging the electrodes of the above, melting the solder and joining the electrodes to one of the portions.

The method for manufacturing the mounting substrate according to the second aspect of the present invention is the method for manufacturing the mounting substrate according to the first aspect, wherein the at least one electronic component is at least one light emitting element, and the at least one in the plane. A phosphor layer arranging step of arranging a phosphor layer containing a phosphor whose emission peak wavelength is in the visible light region when the emission of at least one light emitting element is used as excitation light in the other portion across the groove. include.

The method for manufacturing the mounting substrate according to the third aspect of the present invention is the method for manufacturing the mounting substrate according to the second aspect, and the phosphor layer arranging step is performed after the solder arranging step.

The method for manufacturing a mounting substrate according to a fourth aspect of the present invention is the method for manufacturing a mounting substrate according to a second or third aspect, and the fluorescent layer arranging step is a surface of the fluorescent layer facing outward in the thickness direction. The phosphor layer is arranged so that the position in the thickness direction is located inside the thickness direction of the at least one light emitting element bonded to the circuit pattern layer so as to be located inside the surface of the at least one light emitting element facing outward in the thickness direction. ..

The method for manufacturing a mounting substrate according to a fifth aspect of the present invention is the method for manufacturing a mounting substrate according to a second or third aspect, and the fluorescent layer arranging step is a surface of the fluorescent layer facing outward in the thickness direction. The fluorescent layer is arranged so that the position in the thickness direction is located at the center of the at least one light emitting element bonded to the circuit pattern layer in the thickness direction or inside the position in the thickness direction. ..

The method for manufacturing the mounting substrate according to the sixth aspect of the present invention is the method for manufacturing the mounting substrate according to any one of the first to fifth aspects, and in the joining step, the solder is coated with flux and then the above-mentioned. The solder is melted and the electrode is joined to the one portion.

INDUSTRIAL APPLICABILITY According to the present invention, it is possible to suppress the protrusion of solder from the bonded surface to the non-bonded surface of electronic components in the circuit pattern layer.

It is a top view of the light emitting substrate of this embodiment. It is a bottom view of the light emitting substrate of this embodiment. It is a partial cross-sectional view of the light emitting substrate cut by the 1C-1C cutting line of FIG. 1A. It is a top view of the fluorescent substance substrate (the fluorescent substance layer is omitted) of this embodiment. It is a top view of the phosphor substrate of this embodiment. It is explanatory drawing of the 1st step in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 2nd step in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 3rd process in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 4th step (the first half) in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 4th step (the latter half) in the manufacturing method of the light emitting substrate of this embodiment. It is explanatory drawing of the 5th step in the manufacturing method of the light emitting substrate of this embodiment. It is a figure for demonstrating the light emitting operation of the light emitting substrate of this embodiment. It is a figure for demonstrating the light emitting operation of the light emitting substrate of a comparative form. It is explanatory drawing of the 3rd process in the manufacturing method of the light emitting substrate of 1st modification. It is explanatory drawing of the 3rd step in the manufacturing method of the light emitting substrate of the 2nd modification. It is explanatory drawing of the manufacturing method of the light emitting substrate of the 3rd modification.

≪Overview≫
Hereinafter, the configuration and function of the light emitting board 10 (an example of the mounting board) of the present embodiment will be described with reference to FIGS. 1A to 1C. Next, the method of manufacturing the light emitting substrate 10 of the present embodiment will be described with reference to FIGS. 3A to 3F. Next, the light emitting operation of the light emitting substrate 10 of the present embodiment will be described with reference to FIG. Next, the effect of this embodiment will be described with reference to FIG. 4 and the like. In all the drawings referred to in the following description, similar components are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

<< Configuration and function of the light emitting substrate of this embodiment >>
1A is a plan view of the light emitting substrate 10 of the present embodiment (viewed from the front surface 31), and FIG. 1B is a bottom view of the light emitting substrate 10 of the present embodiment (viewed from the back surface 33). FIG. 1C is a partial cross-sectional view of a light emitting substrate 10 cut by the 1C-1C cutting line of FIG. 1A.
The light emitting substrate 10 of the present embodiment is rectangular as an example when viewed from the front surface 31 and the back surface 33. Further, the light emitting substrate 10 of the present embodiment includes a plurality of light emitting elements 20 (an example of electronic components), a phosphor substrate 30, and electronic components such as a connector and a driver IC (not shown). That is, in the light emitting substrate 10 of the present embodiment, a plurality of light emitting elements 20 and the above electronic components are mounted on the phosphor substrate 30.
The light emitting substrate 10 of the present embodiment has a function of emitting light when power is supplied from an external power source (not shown) by directly attaching a lead wire or via a connector. Therefore, the light emitting substrate 10 of the present embodiment is used as a main optical component in, for example, a lighting device (not shown).

<Multiple light emitting elements>
As an example, each of the plurality of light emitting elements 20 is a CSP (Chip Scale Package) in which a flip chip LED 22 (hereinafter referred to as LED 22) is incorporated (see FIG. 1C). As a CSP, as shown in FIG. 1C, it is preferable that the entire circumference (five surfaces) except the bottom surface of the LED 22 is covered with the fluorescent material encapsulating layer 24. The phosphor-sealed layer 24 contains a phosphor, and the light of the LED 22 is color-converted by the phosphor of the phosphor-sealed layer 24 and emitted to the outside. As shown in FIG. 1A, the plurality of light emitting elements 20 are regularly arranged on the surface 31 (an example of one surface) of the phosphor substrate 30 over the entire surface 31 on the phosphor substrate 30. It is installed. The correlated color temperature of the light emitted by each light emitting element 20 of the present embodiment is set to 3,018K as an example. Further, the plurality of light emitting elements 20 use a heat sink (not shown) and a cooling fan (not shown) during the light emitting operation to dissipate heat so as to be within 50 ° C. to 100 ° C. from room temperature, taking the phosphor substrate 30 as an example. It is designed to be cooled).
Here, supplementing the meaning of "-" used in the numerical range in the present specification, for example, "50 ° C to 100 ° C" means "50 ° C or more and 100 ° C or less". And, "~" used in the numerical range in this specification means "more than the description part before" ~ "and less than the description part after" ~ "".

<Fluorescent substrate>
FIG. 2A is a view of the phosphor substrate 30 of the present embodiment, and is a plan view (viewed from the surface 31) showing the phosphor layer 36 omitted. FIG. 2B is a plan view (viewed from the surface 31) of the phosphor substrate 30 of the present embodiment. Here, FIG. 2B is provided with a partially enlarged view of the portion surrounded by the broken line. The bottom view of the phosphor substrate 30 of the present embodiment is the same as the view of the light emitting substrate 10 from the back surface 33. Further, the partial cross-sectional view of the phosphor substrate 30 of the present embodiment is the same as the view when the light emitting element 20 is removed from the partial cross-sectional view of FIG. 1C. That is, the phosphor substrate 30 of the present embodiment is rectangular as an example when viewed from the front surface 31 and the back surface 33.

The phosphor substrate 30 of the present embodiment includes an insulating layer 32 (an example of an insulating substrate), a circuit pattern layer 34, a phosphor layer 36, and a back surface pattern layer 38 (FIGS. 1B, 1C, and FIG. 2A and FIG. 2B). Although the fluorescent material layer 36 is omitted in FIG. 2A, as shown in FIG. 2B, the fluorescent material layer 36 is, as an example, a plurality of described later on the surface 31 of the insulating layer 32 and the circuit pattern layer 34. It is arranged in a portion other than the electrode pair 34A.

Further, as shown in FIGS. 1B and 2A, the phosphor substrate 30 is formed with through holes 39 at four locations near the four corners and two locations near the center. The six through holes 39 are used as positioning holes during the manufacture of the phosphor substrate 30 and the light emitting substrate 10. In addition, the six through holes 39 are used as mounting screw holes for ensuring the heat-drawing effect (preventing warping and floating of the substrate) of the (light emitting) lamp housing. As described later, the phosphor substrate 30 of the present embodiment is processed (etched or the like) from a double-sided plate (hereinafter referred to as a motherboard MB; see FIG. 3A) in which copper foil layers are provided on both sides of the insulating plate. Although it is manufactured, CS-3305A manufactured by Risho Kogyo Co., Ltd. is used as an example of the motherboard MB.

[Insulation layer]
Hereinafter, the main features of the insulating layer 32 of the present embodiment will be described.
As described above, the shape is rectangular when viewed from the front surface 31 and the back surface 33 as an example.
The material is, for example, an insulating material containing a bismaleimide resin and a glass cloth. In addition, the insulating material does not contain halogen and phosphorus (halogen-free, phosphorus-free).
The thickness is, for example, 100 μm to 200 μm.
The coefficient of thermal expansion (CTE) in the vertical direction and the horizontal direction is, for example, 10 ppm / ° C. or less in the range of 50 ° C. to 100 ° C., respectively. From another point of view, the coefficient of thermal expansion (CTE) in the vertical direction and the horizontal direction is 6 ppm / K, respectively, as an example. This value is substantially the same as that of the light emitting device 20 of the present embodiment (90% to 110%, that is, within ± 10%).
The glass transition temperature is, for example, higher than 300 ° C.
^{As an example, the storage elastic modulus is larger than 1.0 × 10 10} Pa and smaller than 1.0 × 10 ¹¹ Pa in the range of 100 ° C to 300 ° C.
The flexural modulus in the longitudinal direction and the lateral direction is, for example, 35 GPa and 34 GPa in the normal state, respectively.
The hot bending modulus in the longitudinal and lateral directions is, for example, 19 GPa at 250 ° C.
As an example, the water absorption rate is 0.13% when left in a temperature environment of 23 ° C. for 24 hours.
The relative permittivity is, for example, 4.6 under the normal condition of 1 MHz.
The dielectric loss tangent is, for example, 0.010 in the 1 MHz normal state.

[Circuit pattern layer]
The circuit pattern layer 34 of the present embodiment is a metal layer provided on the surface 31 side of the insulating layer 32. The circuit pattern layer 34 of the present embodiment is, for example, a copper foil layer (a layer made of Cu). In other words, the circuit pattern layer 34 of the present embodiment is a flat surface formed by at least its surface (a surface of the insulating layer 32 facing outward in the thickness direction) containing copper.

The circuit pattern layer 34 has a pattern provided on the insulating layer 32, and is electrically connected to a terminal (not shown) to which a connector (not shown) is joined. The circuit pattern layer 34 is adapted to supply electric power supplied from an external power source (not shown) via a connector to a plurality of light emitting elements 20 at the time of configuring the light emitting board 10. Therefore, a part of the circuit pattern layer 34 is a plurality of electrode pairs 34A to which the plurality of light emitting elements 20 are bonded. That is, the circuit pattern layer 34 of the light emitting substrate 10 of the present embodiment is arranged in the insulating layer 32 and connected to each light emitting element 20. From another point of view, the circuit pattern layer 34 of the phosphor substrate 30 of the present embodiment is arranged on the insulating layer 32 and is connected to each light emitting element 20 by each electrode pair 34A. Here, in the present specification, the surface of each electrode pair 34A is referred to as a bonding surface 34A1. Further, as shown in FIGS. 1C, 2A, 4 and the like, each joint surface 34A1 is a surface on one side of each groove 34E on the surface (plane surface) of the circuit pattern layer 34.

Further, as described above, since the plurality of light emitting elements 20 in the light emitting substrate 10 of the present embodiment are regularly arranged over the entire surface 31, the plurality of electrode pairs 34A also cover the entire surface 31. They are arranged regularly (see FIG. 2A). The portion of the circuit pattern layer 34 other than the plurality of electrode pairs 34A is referred to as a wiring portion 34B. Here, since the wiring portion 34B is not a portion joined to each light emitting element 20, the surface of the wiring portion 34B is referred to as a non-joining surface 34B1 in the present specification. In other words, as shown in FIGS. 1C, 2A, 4 and the like, each non-joining surface 34B1 is located on the opposite side of each joining surface 34A1 with each groove 34E on the surface (planar surface) of the circuit pattern layer 34 interposed therebetween. It is said to be a face. That is, the circuit pattern layer 34 of the present embodiment is formed with a plurality of grooves 34E that separate the plurality of bonding surfaces 34A1 and the plurality of non-bonding surfaces 34B1.
The region (occupied area of the circuit pattern layer 34) on the surface 31 of the insulating layer 32 where the circuit pattern layer 34 is arranged is, for example, a region (area) of 60% or more of the surface 31 of the insulating layer 32. (See Fig. 2A). Further, in the present embodiment, each joint surface 34A1 and each non-joint surface 34B1 are located at the same position in the thickness direction of the insulating layer 32 (see FIGS. 1C, 3F, etc.).

[Fluorescent layer]
As shown in FIG. 2B, the phosphor layer 36 of the present embodiment is arranged in a portion other than the plurality of electrode pairs 34A and the groove 34E on the surface 31 of the insulating layer 32 and the circuit pattern layer 34, as an example. .. That is, the phosphor layer 36 is arranged in a region other than the plurality of electrode pairs 34A and the groove 34E in the circuit pattern layer 34. In other words, at least a portion of the phosphor layer 36 is arranged around the plurality of grooves 34E and each junction surface 34A1 adjacent to each groove 34E on the surface 31 (see FIGS. 1C and 2B). Further, from another viewpoint, at least a part of the phosphor layer 36 is arranged so as to surround each joint surface 34A1 over the entire circumference when viewed from the surface 31 side. In the present embodiment, the region where the phosphor layer 36 is arranged on the surface 31 of the insulating layer 32 is, for example, 80% or more of the region on the surface 31 of the insulating layer 32.
The surface of the phosphor layer 36 on the outer side in the thickness direction of the insulating layer 32 is located on the outer side in the thickness direction of the bonding surface 34A1 of the circuit pattern layer 34 (see FIG. 1C). Further, the phosphor layer 36 of the present embodiment has a facing surface 36A facing the light emitting element 20 at the boundary with the groove 34E in each non-bonding surface 34B1 (see FIG. 1C). Further, in the present embodiment, as an example, the position of the outer surface (outward facing surface) of the insulating layer 32 in the thickness direction of the phosphor layer 36 in the thickness direction is the central position in the thickness direction of each light emitting element 20. It is located in (see FIG. 1C). However, it is preferable that the position of the outer surface of the insulating layer 32 in the thickness direction of the phosphor layer 36 in the thickness direction is located inside the thickness direction of each light emitting element 20 with respect to the center in the thickness direction. .. The above reason is to secure the light emitting effect by each light emitting element 20.

As an example, the fluorescent substance layer 36 of the present embodiment is an insulating layer containing a fluorescent substance and a binder, which will be described later. The phosphor contained in the phosphor layer 36 is fine particles held in a state of being dispersed in a binder, and has a property of exciting the light emitted by the LED 22 of each light emitting element 20 as excitation light. Specifically, the phosphor of the present embodiment has a property that the emission peak wavelength in the visible light region when the emission of the LED 22 of the light emitting element 20 is used as excitation light. The binder may be, for example, epoxy-based, acrylate-based, silicone-based, or the like, and may have an insulating property equivalent to that of the binder contained in the solder resist.

(Specific example of fluorescent substance)
Here, the fluorescent material contained in the fluorescent material layer 36 of the present embodiment is, for example, an α-type sialone phosphor containing Eu, a β-type sialon fluorescent material containing Eu, a CASN fluorescent material containing Eu, and Eu. It is considered to be at least one kind of phosphor selected from the group consisting of SCASSN phosphors containing. The above-mentioned fluorescent material is an example of the present embodiment, and may be a fluorescent material other than the above-mentioned fluorescent material, such as YAG, LuAG, BOS and other visible light-excited fluorescent materials.

Α-sialon phosphor containing Eu, the general _formula: represented by _{M x Eu y Si 12- (m} + n) Al (m + n) O n N 16-n. In the above general formula, M is one or more elements containing at least Ca selected from the group consisting of Li, Mg, Ca, Y and lanthanide elements (excluding La and Ce), and has a valence of M. When a is set, ax + 2y = m, x is 0 <x ≦ 1.5, 0.3 ≦ m <4.5, and 0 <n <2.25.

The β-type sialone phosphor containing Eu is a β-type sialon represented by the general formula: Si _6-z Al _z O _z N _8-z (z = 0.005-1) and has a divalent europium as a light emitting center. It is a phosphor in which (Eu ^{2+) is dissolved.}

Further, examples of the nitride phosphor include a CASN phosphor containing Eu, a SCASN phosphor containing Eu, and the like.

The CASN phosphor (an example of a nitride phosphor) containing Eu is represented by, _{for example, the formula CaAlSiN 3} : Eu ^{2+ , using Eu 2+} as an activator and a crystal made of an alkaline earth silicate as a base. Refers to a red phosphor. In addition, in the definition of the CASN fluorescent substance containing Eu in this specification, the SCASN fluorescent substance containing Eu is excluded.

The SCASN fluorophore containing Eu (an example of a nitride fluorophore) is represented by, for example, the formula (Sr, Ca) AlSiN ₃ : Eu ²⁺ , with Eu ²⁺ as an activator, and is composed of an alkaline earth silicate nitride. A red fluorophore whose parent is a crystal.

[Back side pattern layer]
The back surface pattern layer 38 of the present embodiment is a metal layer provided on the back surface 33 side of the insulating layer 32. The back surface pattern layer 38 of the present embodiment is, for example, a copper foil layer (a layer made of Cu).
As shown in FIG. 1B, the back surface pattern layer 38 is arranged adjacent to each other so that a plurality of rectangular blocks arranged linearly along the longitudinal direction of the insulating layer 32 are out of phase in the lateral direction. It is said to be the layer that is being used.
The back surface pattern layer 38 is, for example, an independent floating layer. Further, the back surface pattern layer 38 overlaps with a region of 80% or more of the circuit pattern layer 34 arranged on the front surface 31 as an example in the thickness direction of the insulating layer 32 (fluorescent material substrate 30).

The above is a description of the configuration of the light emitting substrate 10 and the phosphor substrate 30 of the present embodiment.

<< Manufacturing method of light emitting substrate of this embodiment >>
Next, the manufacturing method of the light emitting substrate 10 of the present embodiment will be described with reference to FIGS. 3A to 3F. The method for manufacturing the light emitting substrate 10 of the present embodiment includes a first step, a second step, a third step, a fourth step, and a fifth step, and each step is performed in the order described.

<First step>
FIG. 3A is a diagram showing the start time and the end time of the first step. The first step is a step of forming the same pattern 34C (an example of the conductive pattern layer) as the circuit pattern layer 34 on the front surface 31 of the motherboard MB and the back surface pattern layer 38 on the back surface 33. This step is performed by etching using, for example, a mask pattern (not shown). This step is an example of a pattern layer forming step.

<Second step>
FIG. 3B is a diagram showing the start time and the end time of the second step. The second step is a step of forming a plurality of grooves 34E on the surface of the pattern 34C. This step is performed by etching using, for example, a mask pattern (not shown). When this step is completed, the circuit pattern layer 34 is formed. That is, when this step is completed, the joining surface 34A1 and the non-joining surface 34B1 are formed on both sides of each groove 34E. This step is an example of a groove forming step.

<Third step>
FIG. 3C is a diagram showing the start time and the end time of the third step. The third step is a step of arranging the solder SP on each joint surface 34A1 of the circuit pattern layer 34 (in other words, applying the solder SP). This step is performed by printing as an example. This step is an example of a solder placement step.

<Fourth step>
FIG. 3D is a diagram showing the start of the fourth step and the time of coating the first layer. FIG. 3E is a diagram showing the time of coating the second layer and the time of coating the third layer in the fourth step. The fourth step is a step of forming the phosphor layer 36 over the entire area of each non-bonded surface 34B1 in the circuit pattern layer 34. In this step, for example, the fluorescent material patterns 361, 362, and 363 having a thickness of 1/3 of the fluorescent material layer 36 are laminated three times by transfer to arrange the fluorescent material layer 36. In this step, as an example, the position in the thickness direction of the surface of the insulating layer 32 facing outward in the thickness direction of the phosphor layer 36 is the center position in the thickness direction of each light emitting element 20 bonded to the circuit pattern layer 34. The phosphor layer 36 is applied so as to be located at. In other words, in this step, the phosphor layer 36 is applied so that the thickness of the phosphor layer 36 is less than half the thickness of each light emitting element 20. However, for the reasons described above, the thickness of the phosphor layer 36 is preferably half or less of the thickness of each light emitting element 20. This step is an example of a phosphor layer arrangement step.

<Fifth step>
FIG. 3F is a diagram showing the start time and the end time of the fifth step. The fifth step is a step of mounting a plurality of light emitting elements 20 on the phosphor substrate 30. In this step, the solder SP is melted in a state where the electrodes of the plurality of light emitting elements 20 are aligned with each joint surface 34A1 on which the solder SP is arranged in the third step. After that, when the solder SP is cooled and solidified, each light emitting element 20 is bonded to each electrode pair 34A (each bonding surface 34A1). That is, this step is performed by a reflow step as an example. In this step, flux is applied to the solder SP of each bonding surface 34A1 and then each light emitting element 20 is bonded to each electrode pair 34A. By doing so, in the case of the present embodiment in which the third step is performed before the fourth step, the flux acts to adhere the solder SP to each light emitting element 20. This step is an example of a joining step.

The above is the description of the manufacturing method of the light emitting substrate 10 of this embodiment.

<< Light emitting operation of the light emitting substrate of this embodiment >>
Next, the light emitting operation of the light emitting substrate 10 of the present embodiment will be described with reference to FIG. Here, FIG. 4 is a diagram for explaining the light emitting operation of the light emitting substrate 10 of the present embodiment.

First, when the operation switch (not shown) for operating the plurality of light emitting elements 20 is turned on, the power supply to the circuit pattern layer 34 is started from the external power supply (not shown) via the connector (not shown), and the plurality of light emitting elements are emitted. The element 20 radiates and emits light L, and a part of the light L reaches the surface 31 of the phosphor substrate 30. Hereinafter, the behavior of the light L will be described separately according to the traveling direction of the emitted light L.

A part of the light L emitted from each light emitting element 20 is emitted to the outside without being incident on the phosphor layer 36. In this case, the wavelength of the light L remains the same as the wavelength of the light L when emitted from each light emitting element 20.

Further, the light of the LED 22 itself in a part of the light L emitted from each light emitting element 20 is incident on the phosphor layer 36. Here, the above-mentioned "light of the LED 22 itself in a part of the light L" is color-converted by the phosphor (fluorescent material sealing layer 24) of each light emitting element 20 (CSP itself) in the emitted light L. It means the light that is not emitted, that is, the light of the LED 22 itself (for example, the light of blue color (wavelength near 470 nm)). Then, when the light L of the LED 22 itself collides with the phosphor dispersed in the phosphor layer 36, the phosphor excites and emits excitation light. Here, the reason why the phosphor is excited is that the phosphor dispersed in the phosphor layer 36 uses a phosphor (visible light excited phosphor) having an excitation peak in blue light. Along with this, a part of the energy of the light L is used for exciting the phosphor, so that a part of the energy of the light L is lost. As a result, the wavelength of the light L is converted (wavelength conversion is performed). For example, depending on the type of phosphor in the phosphor layer 36 (for example, when a red CASN is used as the phosphor), the wavelength of light L becomes longer (for example, 650 nm). Further, the excitation light in the phosphor layer 36 may be emitted from the phosphor layer 36 as it is, but some of the excitation light goes to the lower circuit pattern layer 34. Then, a part of the excitation light is emitted to the outside by reflection at the circuit pattern layer 34. As described above, when the wavelength of the excitation light by the phosphor of the phosphor layer 36 is 600 nm or more, the reflection effect can be expected even if the circuit pattern layer 34 is Cu. The wavelength of the light L differs from the above example depending on the type of the phosphor of the phosphor layer 36, but in any case, the wavelength conversion of the light L is performed. For example, when the wavelength of the excitation light is less than 600 nm, the reflection effect can be expected if the circuit pattern layer 34 or its surface is made of, for example, Ag (plating). Further, a white reflective layer may be provided on the lower side (insulating layer 32 side) of the phosphor layer 36. The reflective layer is provided with, for example, a white paint such as a titanium oxide filler.

As described above, the light L emitted by each light emitting element 20 (the light L emitted radially by each light emitting element 20) is irradiated to the outside together with the excitation light via the plurality of optical paths as described above. .. Therefore, when the emission wavelength of the phosphor contained in the phosphor layer 36 and the emission wavelength of the phosphor (fluorescent encapsulation layer 24) that seals (or covers) the LED 22 in the light emitting element 20 (CSP) are different. In the light emitting substrate 10 of the present embodiment, the bundle of light L when each light emitting element 20 emits is used as a bundle of light L containing light L having a wavelength different from the wavelength of light L when each light emitting element 20 emits. Irradiate with the above excitation light. For example, the light emitting substrate 10 of the present embodiment contains light L having a wavelength longer than the wavelength of light L when each light emitting element 20 emits a bundle of light L when each light emitting element 20 emits light L. It is irradiated with the above-mentioned excitation light as a bundle of.
On the other hand, the emission wavelength of the phosphor contained in the phosphor layer 36 and the emission wavelength of the phosphor (fluorescent encapsulation layer 24) that seals (or covers) the LED 22 in the light emitting element 20 (CSP). In the same case (in the case of the same correlated color temperature), in the light emitting substrate 10 of the present embodiment, the bundle of light L when each light emitting element 20 emits is the same as the wavelength of light L when each light emitting element 20 emits. It is irradiated with the above-mentioned excitation light as a bundle of light L including light L having a wavelength.

The above is a description of the light emitting operation of the light emitting substrate 10 of the present embodiment.

<< Effect of this embodiment >>
Next, the effect of this embodiment will be described with reference to the drawings.

<First effect>
The first effect will be described in comparison with the comparative embodiment (see FIG. 5) described below in this embodiment. Here, in the description of the comparative embodiment, when the same components and the like as in the present embodiment are used, the same names, codes and the like as in the case of the present embodiment are used for the components and the like. FIG. 5 is a diagram for explaining the light emitting operation of the light emitting substrate 10A in the comparative form. The light emitting substrate 10A of the comparative embodiment (the substrate 30A on which the plurality of light emitting elements 20 are mounted) has the same configuration as the light emitting substrate 10 (fluorescent substrate 30) of the present embodiment except that the phosphor layer 36 is not provided. ing.

In the case of the light emitting substrate 10A of the comparative form, the light L emitted from each light emitting element 20 and incident on the surface 31 of the substrate 30A is reflected or scattered without converting the wavelength. Therefore, in the case of the substrate 30A in the comparative form, it is not possible to adjust the light to a light emission color different from the light emitted by the light emitting element 20 when the light emitting element 20 is mounted. That is, in the case of the light emitting substrate 10A in the comparative form, it is not possible to adjust the light to a light emission color different from the light emitted by the light emitting element 20.

On the other hand, in the case of the present embodiment, when viewed from the thickness direction of the insulating layer 32, the phosphor layer 36 is formed on the surface 31 of the insulating layer 32 and around each bonding surface 34A1 with each light emitting element 20. Have been placed. Therefore, a part of the light L radially emitted from each light emitting element 20 is incident on the phosphor layer 36, is wavelength-converted by the phosphor layer 36, and is irradiated to the outside. In this case, a part of the light L radiated hemispherically from each light emitting element 20 is incident on the phosphor layer 36 to excite the phosphor contained in the phosphor layer 36, and generate the excitation light.

Therefore, according to the phosphor substrate 30 of the present embodiment, when the light emitting element 20 is mounted, the light L emitted from the phosphor substrate 30 is converted into light having a different emission color from the light L emitted by the light emitting element 20. Can be adjusted. Along with this, according to the light emitting substrate 10 of the present embodiment, the light L emitted from the phosphor substrate 30 can be adjusted to the light L having a light emitting color different from the light L emitted by the light emitting element 20.
When the emission wavelength of the phosphor contained in the phosphor layer 36 and the emission wavelength of the phosphor (fluorescent encapsulation layer 24) that seals (or covers) the LED 22 in the light emitting element 20 (CSP) are the same ( (In the case of the same correlated color temperature), the light emitting substrate 10 of the present embodiment has a bundle of light L when each light emitting element 20 emits light having the same wavelength as the wavelength of light L when each light emitting element 20 emits. It is irradiated with the above-mentioned excitation light as a bundle of light L containing L. In this case, the effect of alleviating the variation in chromaticity of the mounted light emitting element 20 by the phosphor layer 36 can also be exhibited.

<Second effect>
In the case of the comparative form, as shown in FIG. 5, spots are generated in the light L irradiated to the outside due to the arrangement interval of each light emitting element 20. Here, it is said that the larger the spot of light L, the larger the glare.
On the other hand, in the case of the present embodiment, as shown in FIG. 2B, each bonding surface 34A1 is surrounded by the phosphor layer 36 (over the entire circumference), and the light emitting element 20 is further adjacent to the bonding element 20. A phosphor layer 36 is also provided between the two. Therefore, the excitation light is also emitted from the periphery of each joint surface 34A1 (periphery of each light emitting element 20).
Therefore, according to the present embodiment, the glare can be reduced as compared with the comparative embodiment.
In particular, in this effect, when the phosphor layer 36 is provided over the entire surface of the insulating layer 32, specifically, the region of the surface 31 of the insulating layer 32 where the fluorescent layer 36 is arranged is the surface 13. It is effective in the case of 80% or more of the area.
Further, as shown in FIG. 1C, the phosphor layer 36 of the present embodiment has a facing surface 36A corresponding to the adjacent light emitting element 20. Therefore, in this embodiment, glare can be reduced as compared with the case where the light emitting element 20 is arranged on the phosphor layer 36 (not shown), for example.

<Third effect>
Further, in the case of the present embodiment, for example, the phosphor contained in the phosphor layer 36 is a CASN phosphor containing Eu, and the phosphor layer 36 is provided on the wiring portion 34B made of Cu. Therefore, for example, when each light emitting element 20 emits white light L, for example, the excitation light from the CASN phosphor contained in the phosphor layer 36 emits light due to reflection by Cu constituting the lower layer electrode. The efficiency is improved (in the configuration of this embodiment, there is a light reflection effect of Cu). Then, in the present embodiment, the white light L can be adjusted to a warmer color light L (a color in which the correlated color temperature is shifted to the lower temperature side) by the effect. In this case, warm color light can be added to the white light of the light emitting element 20, and the special color rendering coefficient R9 value can be increased. This effect is particularly effective for pseudo-white using YAG-based white light (yellow phosphor).

<Fourth effect>
Further, in the method for manufacturing the light emitting substrate 10 of the present embodiment, after the second step (see FIG. 3B), which is an example of the groove forming step, the fourth step (joining step or joining step) of joining the light emitting element 20 to the joining surface 34A1. Reflow process) is performed.
Therefore, even if the molten solder ball SP protrudes from the joint surface 34A1 in the fourth step, it is accommodated in the groove 34E.
Therefore, according to the present embodiment, it is possible to suppress the protrusion of the solder SP from the bonding surface 34A1 of the light emitting element 20 to the non-bonding surface 34B1 in the circuit pattern layer 34. Along with this, according to the present embodiment, the phosphor substrate 30 and the light emitting substrate 10 with high reliability can be manufactured.
In the case of the present embodiment, each of the bonding surfaces 34A1 and each non-bonding surface 34B1 are located at the same position in the thickness direction of the insulating layer 32 (see FIGS. 1C, 3F, etc.). In such a case, it can be said that this effect due to the formation of the groove 34E between the bonded surface 34A1 and the non-bonded surface 34B1 is effective.

<Fifth effect>
Further, in the method for manufacturing the light emitting substrate 10 of the present embodiment, the fourth step (fluorescent layer placement step) is performed after the third step (solder placement step) (see FIGS. 3C to 3E). Here, the timing of arranging the solder SP may be, for example, at the time of the fifth step after the fourth step (at the time of the step of mounting the plurality of light emitting elements 20).
However, since the fourth step is performed after the third step as in the present embodiment, the solder SP can be easily arranged by printing. Further, each groove 34E formed on the surface of the circuit pattern layer 34 is effective in that it functions as a solder flow stop for the solder SP.

The above is the description of the effect of this embodiment.

As described above, the present invention has been described by way of the above-described embodiment as an example, but the present invention is not limited to the above-mentioned embodiment. The technical scope of the present invention also includes, for example, the following forms (modifications).

For example, in the description of the fourth step (see FIG. 3D) of the present embodiment, the fluorescent layer 36 has 3 fluorescent patterns 361, 362, and 363 having a thickness of 1/3 of the fluorescent layer 36, for example, by transfer. It has been described that the phosphor layer 36 is formed by laminating the phosphor layer 36 times. However, the fluorescent layer 36 may be formed by a method different from that of the present embodiment.
For example, as in the modified example (first modified example) shown in FIG. 6A, in the fourth step, the dispenser DP (an example of the ejection portion) is relatively moved to the insulating layer 32 while moving the dispenser DP (an example of the ejection portion) to the insulating layer 32. The liquid LQ containing the phosphor may be discharged to the dispenser DP to form the phosphor layer 36 so that the phosphor patterns having a thickness of / n (n ≧ 2) are laminated n times.
Further, for example, as in the modification shown in FIG. 6B (second modification), in the third step, the droplet ejection head IJH (an example of the ejection portion) is relatively moved to the insulating layer 32 while fluorescing. The droplet DL containing the phosphor is ejected to the droplet ejection head IJH to form the phosphor layer 36 so that the phosphor patterns having a thickness of 1 / n (n ≧ 2) of the body layer 36 are laminated n times. You may try to do it.
Further, unlike the first modification and the second modification, in the fourth step, the phosphor pattern having a thickness of 1 / n (n ≧ 2) of the phosphor layer 36 is laminated n times so as to be 1 / n. The fluorescent material layer 36 may be formed by printing the fluorescent material pattern having the same thickness n times. As a printing method in the case of this modification, for example, there is a method by screen printing. However, if the fluorescent material layer 36 can be formed by printing the fluorescent material pattern n times, the specific printing method does not have to be a screen printing method.

Further, in the method for manufacturing the light emitting substrate 10 of the present embodiment, it has been described that the fifth step (bonding step of the light emitting element 20) is performed after the fourth step (fluorescent layer arrangement step). However, when the phosphor layer arrangement step is performed using the droplet ejection head IJH as in the second modification shown in FIG. 6B, as in the case of the modification (third modification) shown in FIG. 6C. After the fifth step, the fourth step may be performed. As described above, the second modification is effective in that the fourth step can be performed at any timing before and after the fifth step. This point can also be said for the first modification.

Further, in the description of this embodiment, an example of the light emitting element 20 is assumed to be a CSP. However, an example of the light emitting element 20 may be other than the CSP. For example, it may be simply equipped with a flip chip. It can also be applied to the substrate itself of a COB device.

Further, in the description of the present embodiment, it is assumed that the phosphor substrate 30 is equipped with a plurality of light emitting elements 20 and the light emitting substrate 10 is provided with a plurality of light emitting elements 20. However, considering the mechanism for explaining the first and fourth effects described above, it is clear that even one light emitting element 20 exerts the first effect. Therefore, the number of light emitting elements 20 mounted on the phosphor substrate 30 may be at least one. Further, the number of light emitting elements 20 mounted on the light emitting substrate 10 may be at least one or more. Along with this, at least one joint surface 34A1 and one non-joint surface 34B1 may be used.

Further, in the description of the present embodiment, it is assumed that the back surface pattern layer 38 is provided on the back surface 33 of the phosphor substrate 30 (see FIG. 1B). However, considering the mechanism for explaining the first and fourth effects described above, it is clear that the first effect is exhibited even if the back surface 33 of the phosphor substrate 30 is not provided with the back surface pattern layer 38. Therefore, even if the form is different from the phosphor substrate 30 and the light emitting substrate 10 of the present embodiment only in that the back surface 33 does not have the back surface pattern layer 38, it can be said that the embodiment belongs to the technical scope of the present invention.

Further, in the description of the present embodiment, it is assumed that a plurality of light emitting elements 20 are mounted on the phosphor substrate 30. However, considering the mechanism for explaining the fourth effect described above, the example of the electronic component does not have to be the light emitting device 20.

Further, in the description of the present embodiment, it is assumed that the phosphor substrate 30, which is an example of the circuit board, includes the phosphor layer 36. However, considering the mechanism for explaining the fourth effect described above, when the example of the electronic component is not the light emitting element 20, the circuit board may not have the phosphor layer 36.

Further, in the description of the present embodiment, it is assumed that the phosphor layer 36 is arranged on the surface 31 of the insulating layer 32 and the circuit pattern layer 34 other than the plurality of electrode pairs 34A (see FIG. 2B). However, considering the mechanism for explaining the first and fourth effects described above, the first and first are not arranged over the entire area other than the plurality of electrode pairs 34A on the surface 31 of the phosphor substrate 30. It is clear that the effect of 4 is achieved. Therefore, even if the form is different from the phosphor substrate 30 and the light emitting substrate 10 of the present embodiment only in that the phosphor layer 36 is arranged in the range of the surface 31 different from that of the present embodiment, the present invention is the present invention. It can be said that it belongs to the technical scope of.
In the case of this embodiment, the phosphor layer 36 is provided between the adjacent light emitting elements 20 (FIG. 2B). Further, the binder of the phosphor layer 36 has an insulating property equivalent to that of the binder contained in, for example, a solder resist. That is, in the case of the present embodiment, the phosphor layer 36 functions as a solder resist.

Further, in the description of the present embodiment, it has been described that CS-3305A manufactured by Toshimasa Kogyo Co., Ltd. is used as the motherboard MB in manufacturing the phosphor substrate 30 and the light emitting substrate 10. However, this is just an example, and different motherboard MBs may be used.

The light emitting substrate 10 of the present embodiment (including a modification thereof) can be applied to a lighting device in combination with other components. Another component in this case is a power source or the like that supplies electric power for causing the light emitting element 20 of the light emitting substrate 10 to emit light.

This application claims priority on the basis of Japanese Application Japanese Patent Application No. 2019-029146 filed on February 21, 2019, and incorporates all of its disclosures herein.

10 Light emitting board (example of mounting board)
20 Light emitting element 30 Fluorescent board (example of circuit board)
31 Surface (an example of one surface)
32 Insulation layer (example of insulation substrate)
33 Back side 34 Circuit pattern layer 34A Electrode pair 34A1 Bonding surface 34B Wiring part 34B1 Non-joining surface 34E Groove 36 Fluorescent layer 36E Facing surface 38 Back side pattern layer DP dispenser (example of ejection part)
IJH Droplet Discharge Head (Example of Discharge Unit)
L Hikari MB Motherboard SP Solder Ball, Solder

Claims (21)

A circuit board on which at least one electronic component is mounted on one side.
Insulated board and
A circuit arranged on one surface of the insulating substrate, having a plane facing outward in the thickness direction of the insulating substrate, and soldering a part of the plane as at least one joining surface for joining the at least one electronic component. With the pattern layer,
Equipped with
The circuit pattern layer is formed with at least one groove separating the at least one junction surface and at least one non-junction surface which is a portion other than the at least one junction surface in the plane.
Circuit board. The at least one joint surface and the at least one non-joint surface are located at the same position in the thickness direction.
The circuit board according to claim 1. The at least one electronic component is regarded as at least one light emitting element.
A phosphor layer containing a phosphor which is arranged on the at least one non-junction surface and whose emission peak wavelength is in the visible light region when the emission of the at least one light emitting element is used as excitation light.
The circuit board according to claim 1 or 2. The at least one light emitting element is a plurality of light emitting elements.
The at least one joint surface is a plurality of joint surfaces.
The at least one non-bonded surface is a plurality of non-bonded surfaces.
The at least one groove is a plurality of grooves.
The plurality of light emitting elements are arranged on one surface of the insulating substrate, and each of the plurality of light emitting elements is bonded and mounted on the plurality of bonding surfaces.
The circuit board according to claim 3. The phosphor layer has a facing surface facing the light emitting element to be mounted at a boundary with the groove on the plurality of non-bonded surfaces.
The circuit board according to claim 4. The surface of the phosphor layer facing outward in the thickness direction is located inside the thickness direction of the surface of the at least one light emitting element facing outward in the thickness direction.
The circuit board according to any one of claims 3 to 5. The surface of the phosphor layer facing outward in the thickness direction is located at the center of the at least one light emitting element in the thickness direction or inside the position in the thickness direction.
The circuit board according to any one of claims 3 to 5. The circuit board according to any one of claims 1 to 7.
With at least one electronic component bonded to the at least one bonding surface,
A mounting board. The circuit board according to claim 6 or 7.
With at least one light emitting element bonded to the at least one bonding surface,
Equipped with
The position of the surface of the phosphor layer facing outward in the thickness direction in the thickness direction is located inside the thickness direction of the position of the surface of the at least one light emitting element facing outward in the thickness direction.
Mounting board. The circuit board according to claim 6 or 7.
With at least one light emitting element bonded to the at least one bonding surface,
Equipped with
The position of the surface of the phosphor layer facing outward in the thickness direction in the thickness direction is located at the center of the at least one light emitting element in the thickness direction or inside the position in the thickness direction.
Mounting board. The mounting board according to any one of claims 8 to 10.
A power source that supplies electric power for causing the light emitting element to emit light,
Lighting device equipped with. A method for manufacturing an insulating substrate and a circuit board including a circuit pattern layer arranged on one surface of the insulating substrate and to which at least one electronic component is bonded.
A pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate,
A groove forming step of forming at least one groove on a plane of the conductive pattern layer facing outward in the thickness direction of the insulating substrate.
A solder arranging step of arranging solder for joining at least one electronic component to one portion of the plane with the at least one groove interposed therebetween.
A method for manufacturing a circuit board including. The at least one electronic component is regarded as at least one light emitting element.
A phosphor layer containing a phosphor whose emission peak wavelength is in the visible light region when the emission of the at least one light emitting element is used as excitation light is arranged in the other portion of the plane with the at least one groove interposed therebetween. Fluorescent layer placement process,
12. The method for manufacturing a circuit board according to claim 12. The phosphor layer placement step is performed after the solder placement step.
The method for manufacturing a circuit board according to claim 13. In the phosphor layer arrangement step, the position in the thickness direction of the surface of the phosphor layer facing outward in the thickness direction is from the center position in the thickness direction of the at least one light emitting element bonded to the circuit pattern layer. The phosphor layer is arranged so as to be located inside in the thickness direction.
The method for manufacturing a circuit board according to claim 13 or 14. A method for manufacturing a mounting board including an insulating substrate, a circuit pattern layer arranged on one surface of the insulating substrate, and at least one electronic component bonded to a part of the circuit pattern layer.
A pattern layer forming step of forming a conductive pattern layer on one surface of the insulating substrate,
A groove forming step of forming at least one groove on a plane of the conductive pattern layer facing outward in the thickness direction of the insulating substrate.
A solder arranging step of arranging solder in one portion of the plane with the at least one groove interposed therebetween.
A joining step of arranging electrodes of the at least one electronic component on one portion of the solder sandwiching the solder, melting the solder, and joining the electrodes to the one portion.
Manufacturing method of mounting board including. The at least one electronic component is regarded as at least one light emitting element.
A phosphor layer containing a phosphor whose emission peak wavelength is in the visible light region when the emission of the at least one light emitting element is used as excitation light is arranged in the other portion of the plane with the at least one groove interposed therebetween. Fluorescent layer placement process,
The method for manufacturing a mounting board according to claim 16. The phosphor layer placement step is performed after the solder placement step.
The method for manufacturing a mounting board according to claim 17. In the fluorescent layer arranging step, the position of the surface facing outward in the thickness direction in the fluorescent layer is the surface of the at least one light emitting element bonded to the circuit pattern layer facing outward in the thickness direction. The phosphor layer is arranged so as to be located inside the thickness direction from the position.
The method for manufacturing a mounting board according to claim 17 or 18. In the phosphor layer arrangement step, the position in the thickness direction of the surface of the phosphor layer facing outward in the thickness direction is the central position in the thickness direction of the at least one light emitting element bonded to the circuit pattern layer. The phosphor layer is arranged so as to be located inside the thickness direction from the position.
The method for manufacturing a mounting board according to claim 17 or 18. In the joining step, flux is applied to the solder and then the solder is melted to join the electrode to one of the portions.
The method for manufacturing a mounting board according to any one of claims 16 to 20.

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