WO2020147575A1

WO2020147575A1 - Thin film transistor preparation method and display apparatus

Info

Publication number: WO2020147575A1
Application number: PCT/CN2019/130303
Authority: WO
Inventors: 何怀亮
Original assignee: 惠科股份有限公司
Priority date: 2019-01-18
Filing date: 2019-12-31
Publication date: 2020-07-23
Also published as: CN109786258A

Abstract

A thin film transistor preparation method and display apparatus. The thin film transistor preparation method comprises: using a physical vapour deposition method to sequentially deposit a first molybdenum metal layer, an aluminium metal layer, and a second molybdenum metal layer on a semiconductor layer of a substrate to obtain a source and drain metal layer, the introduced nitrogen flow rate being 0 sccm-1000 sccm when depositing the first molybdenum metal layer and the second molybdenum metal layer (S10); using etching solution to etch the source and drain metal layer to obtain a source electrode and drain electrode, the etching solution comprising a mixed solution of hydrochloric acid and nitric acid (S20); and sequentially forming a passivation layer and an electrode layer on the source electrode and the drain electrode (S30).

Description

Method for preparing thin film transistor and display device

Statement on Priority Citation: This application claims the priority of the Chinese patent application filed with the Chinese Patent Office on January 18, 2019, the application number is 201910051342.9, and the invention title is "method for preparing thin film transistor and display device", all of which The content is incorporated into this application by reference.

Technical field

This application relates to the field of thin film transistor liquid crystal display technology, and in particular to a method for manufacturing a thin film transistor and a display device.

Background technique

The statements here only provide background information related to the present application and do not necessarily constitute prior art.

Thin Film Transistor (TFT) is the current liquid crystal display device (Liquid The performance of the TFT, the main driving element in the Crystal Display (LCD), is directly related to the display performance of the liquid crystal display device.

In the preparation process of the TFT array, the source and drain electrodes are generally obtained by wet etching the source and drain metal layers. The source and drain metal layers usually adopt a molybdenum nitride/aluminum/molybdenum nitride multilayer metal structure. The reaction rate of the etching solution is relatively small, so that molybdenum metal residues easily appear in the source and drain electrodes obtained after wet etching, which affects the performance of the thin film transistor.

Technical solution

The main purpose of this application is to provide a method for manufacturing a thin film transistor and a display device, which improves the reaction rate of the molybdenum metal layer and the etching solution, and reduces the residue of metal molybdenum in the source and drain.

To achieve the purpose of the present application, the present application provides a method for manufacturing a thin film transistor, which includes the following steps:

The first molybdenum metal layer, the aluminum metal layer and the second molybdenum metal layer are sequentially deposited on the semiconductor layer of the substrate by physical vapor deposition to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the second molybdenum metal layer are deposited For the molybdenum metal layer, the nitrogen flow rate is 0sccm~1000sccm;

Etching the source and drain metal layers with an etching solution to obtain source and drain electrodes, wherein the etching solution includes a mixed solution of hydrochloric acid and nitric acid;

And, a passivation layer and an electrode layer are sequentially formed on the source electrode and the drain electrode.

Optionally, when the first molybdenum metal layer and the second molybdenum metal layer are deposited, the nitrogen gas flow rate is 0 sccm to 750 sccm.

Optionally, when the first molybdenum metal layer and the second molybdenum metal layer are deposited, the flow rate of nitrogen gas introduced is 500 sccm.

Optionally, the material of the electrode layer includes indium tin oxide.

Optionally, before the step of sequentially depositing a first molybdenum metal layer, an aluminum metal layer and a second molybdenum metal layer on the semiconductor layer of the substrate by using a physical vapor deposition method to obtain the source and drain metal layers, the method further includes:

Provide substrate;

And, forming a gate electrode, a gate insulating layer, and a semiconductor layer sequentially stacked on the substrate on the substrate.

Optionally, after the step of providing the substrate, the method further includes:

The substrate is cleaned.

Optionally, the etching temperature in the process of etching the source and drain metal layers with an etching solution is 30°C-40°C.

Optionally, the etching temperature is 32°C to 37°C.

Optionally, the etching temperature is 35°C.

Optionally, the etching solution includes hydrochloric acid and nitric acid, wherein the concentration by weight of the nitric acid is 1.5% to 3.5%.

Optionally, the weight percentage concentration of the nitric acid is 2% to 3%.

Optionally, the concentration by weight of the nitric acid is 2.5%.

Optionally, the step of etching the source and drain metal layers with an etchant to obtain source and drain electrodes, wherein the step of the etchant including a mixed solution of hydrochloric acid and nitric acid includes:

Coating photoresist on the source and drain metal layers, exposing the photoresist using a mask, and then developing the photoresist;

And, using an etchant to etch the source and drain metal layers coated with the photoresist, and then strip the photoresist to obtain a source electrode and a drain electrode, wherein the etchant includes a mixture of hydrochloric acid and nitric acid Solution.

Optionally, the material of the gate includes at least one of aluminum, molybdenum and copper.

Optionally, wherein the gate and the electrode layer are prepared by a physical vapor deposition method, and the gate insulating layer, the semiconductor layer, and the passivation layer are prepared by a chemical vapor deposition method.

In order to achieve the above objective, this application also proposes a method for manufacturing a thin film transistor, which includes the following steps:

Provide substrate;

Forming a gate electrode, a gate insulating layer and a semiconductor layer sequentially stacked on the substrate on the substrate;

A first molybdenum metal layer, an aluminum metal layer, and a second molybdenum metal layer are sequentially deposited on the semiconductor layer using a physical vapor deposition method to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the second molybdenum metal layer are deposited For the molybdenum metal layer, the nitrogen flow rate is 0sccm~1000sccm;

The source and drain metal layers are etched at 30°C to 40°C using an etching solution to obtain source and drain electrodes, wherein the etching solution includes a mixed solution of hydrochloric acid and nitric acid, wherein the nitric acid weight percentage concentration is 1.5%~3.5%;

Optionally, the gate and the electrode layer are prepared by a physical vapor deposition method, and the gate insulating layer, the semiconductor layer, and the passivation layer are prepared by a chemical vapor deposition method.

In order to achieve the above object, the present application also proposes a display device, the display device includes a thin film transistor, the thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, a source and a drain, which are sequentially stacked on a substrate. Passivation layer, electrode layer, the thin film transistor is prepared by the following steps:

The first molybdenum metal layer, the aluminum metal layer, and the second molybdenum metal layer are sequentially deposited on the semiconductor layer of the substrate by physical vapor deposition to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the second molybdenum metal layer are deposited For the molybdenum metal layer, the nitrogen flow rate is 0sccm~1000sccm;

The embodiment of the application provides a method for manufacturing a thin film transistor and a display device. A first molybdenum metal layer, an aluminum metal layer, and a second molybdenum metal layer are sequentially deposited on a semiconductor layer of a substrate using a physical vapor deposition method to obtain a source and drain metal layer , Wherein, when depositing the first molybdenum metal layer and the second molybdenum metal layer, the nitrogen gas flow rate is 0sccm-1000sccm, and then the source and drain metal layers are etched with an etchant to obtain source and drain Wherein, the etching solution includes a mixed solution of hydrochloric acid and nitric acid, and then a passivation layer and an electrode layer are sequentially formed on the source and drain electrodes. Since the nitrogen flow rate is controlled below 1000 sccm when depositing the molybdenum metal layer, the nitrogen content of the molybdenum metal layer is reduced, and the reaction rate of the molybdenum metal layer and the etching solution is increased, and the source and drain electrodes obtained by etching have no molybdenum metal residue.

BRIEF DESCRIPTION

FIG. 1 is a schematic diagram of the process flow of an embodiment of a method for manufacturing a thin film transistor according to the present application;

FIG. 2 is a schematic flow diagram of the steps of another embodiment of the method for manufacturing a thin film transistor of the present application.

Embodiments of the invention

It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

First, a brief overview of the manufacturing method of the thin film transistor provided in the embodiments of the present application is given.

Referring to FIG. 1, FIG. 1 is a schematic diagram of a step flow diagram of an embodiment of a method for manufacturing a thin film transistor according to the present application. The method for manufacturing a thin film transistor includes:

Step S10, using a physical vapor deposition method to sequentially deposit a first molybdenum metal layer, an aluminum metal layer and a second molybdenum metal layer on the semiconductor layer of the substrate to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the all When the second molybdenum metal layer is described, the nitrogen gas flow rate is 0sccm~1000sccm;

Provide a substrate on which a semiconductor layer has been deposited, clean the substrate, and then deposit a source and drain metal layer on the semiconductor layer by Physical Vapor Deposition (PVD), and perform wet etching on the source and drain metal layer to obtain the source and drain pole. Specifically, after cleaning the substrate on which the half-body layer has been deposited, the substrate is sent to the vacuum chamber of the PVD device, and the first molybdenum metal layer, the aluminum metal layer and the semiconductor layer are sequentially deposited on the semiconductor layer of the substrate by the physical vapor deposition method. The second molybdenum metal layer obtains a source and drain metal layer, wherein, when the first molybdenum metal layer and the second molybdenum metal layer are deposited, the nitrogen gas flow rate is 0 sccm to 1000 sccm. Specifically, first pure molybdenum is used as the target material, the nitrogen flow rate is controlled to 0sccm~1000sccm, and the first molybdenum metal layer is deposited on the semiconductor layer of the substrate by physical vapor deposition; then pure aluminum is used as the target material, and the first molybdenum metal layer A physical vapor deposition method is used to deposit an aluminum metal layer on the layer; pure molybdenum is used as a target, and the nitrogen flow rate is controlled to be 0 sccm~1000 sccm, and a second molybdenum metal layer is deposited on the aluminum metal layer by physical vapor deposition. Thus, a source and drain metal layer composed of the first molybdenum metal layer, the aluminum metal layer and the second molybdenum metal layer is obtained. It should be understood that the composition of the molybdenum metal layer in the present application may include pure molybdenum or molybdenum nitride.

Step S20, etching the source and drain metal layers with an etchant to obtain source and drain electrodes, wherein the etchant includes a mixed solution of hydrochloric acid and nitric acid;

The substrate on which the active drain metal layer is deposited is taken out, and then a layer of photoresist is applied, and the photoresist is exposed by the mask corresponding to the source and drain, and then developed, the etching solution is used to The source and drain metal layers are wet-etched, and then the substrate is put into a stripping solution, and the photoresist is stripped to obtain the source electrode and the drain electrode. Wherein, the etching solution includes a mixed solution of hydrochloric acid and nitric acid, and the etching solution can be an etching solution composed of hydrochloric acid and nitric acid used in conventional alumina acid etching. Among them, the reaction rate of metal and etching solution is mainly related to the concentration of nitric acid in the etching solution. By adjusting the concentration of nitric acid in the etching solution, the reaction rate of the etching solution and the source and drain metal layers can be adjusted to better solve the source and drain metal layers. The residue of metallic molybdenum after etching. Optionally, the concentration by weight of the nitric acid in the etching solution may be 1.5% to 3.5%. In addition, the etching temperature can be the etching temperature used in conventional alumina etching, and there is no specific limitation. Optionally, the step of etching the source and drain metal layers with an etching solution is performed at 30°C-40°C.

In step S30, a passivation layer and an electrode layer are sequentially formed on the source electrode and the drain electrode.

After obtaining the source electrode and the drain electrode, cleaning is performed, and then a passivation layer film is deposited on the source electrode and the drain electrode. Optionally, the passivation layer film can be deposited by a chemical vapor deposition method. Then apply a layer of photoresist, use the mask corresponding to the passivation layer to expose the photoresist, and then develop, dry etching, and then peel off the photoresist to obtain the passivation layer. The passivation layer includes Hole pattern.

After the passivation layer is obtained, cleaning is performed, and then a pixel electrode layer film is deposited on the passivation layer. Optionally, the material component of the pixel electrode layer film may be indium tin oxide. Then apply a layer of photoresist, use the mask corresponding to the pixel electrode layer to expose the photoresist, and after developing, perform wet etching, then put the substrate in the stripping solution, and peel off the photoresist to obtain the pixel electrode Layer (electrode layer).

Referring to FIG. 2, FIG. 2 is a schematic flow chart of the steps of another embodiment of the method for manufacturing a thin film transistor according to the present application. Before the step S10, it further includes:

Step S40 provides a substrate;

A substrate is provided as a substrate, and before the gate is prepared on the substrate, the substrate needs to be cleaned to prevent dirt on the substrate from affecting the uniformity of deposition or causing pollution in the subsequent deposition process.

In step S50, a gate electrode, a gate insulating layer and a semiconductor layer which are sequentially stacked on the substrate are formed on the substrate.

A first metal layer is deposited on the cleaned substrate. Optionally, the first metal layer can be deposited by physical vapor deposition; optionally, the material of the first metal layer is at least one of copper, aluminum or molybdenum . Then coat a layer of photoresist on the first metal layer, use the mask corresponding to the gate layer to expose the photoresist, and then develop the exposed photoresist, and then perform wet etching with an etching solution. Then the substrate is put into the stripping solution, and the photoresist is stripped off to obtain the gate.

After obtaining the gate, clean the substrate containing the gate, then deposit the gate insulating layer film on the substrate, and then clean the substrate again, and deposit the semiconductor layer (including intrinsic layer and doped layer) film on the substrate . Optionally, the gate insulating layer film and the semiconductor layer film can be deposited by chemical vapor deposition. Then a layer of photoresist is coated on the semiconductor layer, the photoresist is exposed using the mask corresponding to the semiconductor layer, and the exposed photoresist is developed, and then wet etched with an etching solution, and then the substrate Put it in a stripping solution, strip off the photoresist to obtain a gate. Gate insulating layer and semiconductor layer. Among them, the gate insulating layer is used to isolate the gate and the semiconductor layer to prevent the gate and the semiconductor layer from being connected to cause a short circuit.

Optionally, after depositing the gate insulating layer film and the semiconductor film, etching is not required, and the source and drain metal layers are deposited directly after cleaning, and then coated with photoresist, and the photolithography is performed using the masks corresponding to the source and drain electrodes. The glue is exposed, and then developed with a developer, and then two dry etching and two wet etching are performed to obtain the source electrode and the drain electrode, and the corresponding pattern of the semiconductor layer is obtained. Among them, wet etching can be performed under the above-mentioned conditions.

The thin film transistor prepared according to the above solution includes a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, a passivation layer, and an electrode layer which are sequentially stacked on a substrate, wherein the source electrode and the drain electrode have no metal residue, The passivation layer deposited on the source and drain has no undesirable conditions such as disconnection.

Furthermore, the present application also provides a display device, which includes the thin film transistor prepared by the above solution, and the display device may be a liquid crystal panel, electronic paper, OLED (Organic Light Emitting Diode (Organic Light Emitting Diode) panels, LCD TVs, LCD monitors, digital photo frames, mobile phones, tablet computers and other products or components with display functions.

In one embodiment, after the gate, the gate insulating layer, and the semiconductor layer are sequentially formed on the substrate, the steps of preparing the source electrode and the drain electrode are as follows: After cleaning the substrate on which the semiconductor layer has been deposited, the substrate Into the vacuum chamber of the PVD equipment, pure molybdenum was used as the target material, the nitrogen flow rate was controlled to 1000sccm, and the first molybdenum metal layer was deposited on the semiconductor layer of the substrate by physical vapor deposition; then pure aluminum was used as the target material. The aluminum metal layer is deposited on the metal layer by physical vapor deposition; pure molybdenum is used as the target, and the nitrogen flow rate is controlled to 1000 sccm, and the second molybdenum metal layer is deposited on the aluminum metal layer by physical vapor deposition to obtain the source and drain metal layer .

The substrate on which the active drain metal layer is deposited is taken out, and then a layer of photoresist is coated, and the photoresist is exposed by the mask plate corresponding to the source electrode and the drain electrode, and then developed. Then, an etching solution composed of hydrochloric acid and nitric acid is used to wet-etch the source and drain metal layers at 40° C., wherein the concentration of nitric acid in the etching solution is 1.5% by weight. After the etching is completed, the substrate is put into the stripping solution, and the photoresist is stripped to obtain the source electrode and the drain electrode.

The wet-etched substrate was observed under a scanning electron microscope (SEM), and the results showed that the edges of the source and drain were flat without metal residue, and the taper angles on both sides of the source and drain were at Within the range of 40°~60°.

Then, a passivation layer and an electrode layer are sequentially formed on the source electrode and the drain electrode to obtain a thin film transistor.

In one embodiment, after the gate, the gate insulating layer, and the semiconductor layer are sequentially formed on the substrate, the steps of preparing the source electrode and the drain electrode are as follows: After cleaning the substrate on which the semiconductor layer has been deposited, the substrate Into the vacuum chamber of the PVD equipment, pure molybdenum was used as the target, and the nitrogen flow rate was controlled to 750sccm. The first molybdenum metal layer was deposited on the semiconductor layer of the substrate by physical vapor deposition; then pure aluminum was used as the target. The aluminum metal layer is deposited on the metal layer by physical vapor deposition; pure molybdenum is used as the target, and the nitrogen flow rate is controlled to 750sccm, and the second molybdenum metal layer is deposited on the aluminum metal layer by physical vapor deposition to obtain the source and drain metal layer .

The substrate on which the active drain metal layer is deposited is taken out, and then a layer of photoresist is coated, and the photoresist is exposed by the mask plate corresponding to the source electrode and the drain electrode, and then developed. Then, an etching solution composed of hydrochloric acid and nitric acid is used to wet-etch the source and drain metal layers at 37° C., where the concentration of nitric acid in the etching solution is 2% by weight. After the etching is completed, the substrate is put into the stripping solution, and the photoresist is stripped to obtain the source electrode and the drain electrode.

In one embodiment, after the gate, the gate insulating layer, and the semiconductor layer are sequentially formed on the substrate, the steps of preparing the source electrode and the drain electrode are as follows: After cleaning the substrate on which the semiconductor layer has been deposited, the substrate Into the vacuum chamber of the PVD equipment, pure molybdenum was used as the target material, and the nitrogen flow rate was controlled to 500 sccm. The first molybdenum metal layer was deposited on the semiconductor layer of the substrate by physical vapor deposition; then pure aluminum was used as the target material. The aluminum metal layer is deposited on the metal layer by physical vapor deposition; pure molybdenum is used as the target material, and the nitrogen flow rate is controlled to 500sccm, and the second molybdenum metal layer is deposited on the aluminum metal layer by physical vapor deposition to obtain the source and drain metal layer .

The substrate on which the active drain metal layer is deposited is taken out, and then a layer of photoresist is coated, and the photoresist is exposed by the mask plate corresponding to the source electrode and the drain electrode, and then developed. Then, an etching solution composed of hydrochloric acid and nitric acid is used to wet-etch the source and drain metal layers at 35° C., wherein the concentration of nitric acid in the etching solution is 2.5% by weight. After the etching is completed, the substrate is put into the stripping solution, and the photoresist is stripped to obtain the source electrode and the drain electrode.

In one embodiment, after the gate, the gate insulating layer, and the semiconductor layer are sequentially formed on the substrate, the steps of preparing the source electrode and the drain electrode are as follows: After cleaning the substrate on which the semiconductor layer has been deposited, the substrate Into the vacuum chamber of the PVD equipment, pure molybdenum was used as the target material, and the nitrogen flow rate was controlled to 250sccm. The first molybdenum metal layer was deposited on the semiconductor layer of the substrate by physical vapor deposition; then pure aluminum was used as the target material. The aluminum metal layer is deposited on the metal layer by physical vapor deposition; pure molybdenum is used as the target, and the nitrogen flow rate is controlled to 250sccm, and the second molybdenum metal layer is deposited on the aluminum metal layer by physical vapor deposition to obtain the source and drain metal layer .

The substrate on which the active drain metal layer is deposited is taken out, and then a layer of photoresist is coated, and the photoresist is exposed by the mask plate corresponding to the source electrode and the drain electrode, and then developed. Then, an etching solution composed of hydrochloric acid and nitric acid is used to wet-etch the source and drain metal layers at 32° C., wherein the concentration of nitric acid in the etching solution is 3% by weight. After the etching is completed, the substrate is put into the stripping solution, and the photoresist is stripped to obtain the source electrode and the drain electrode.

In one embodiment, after the gate, the gate insulating layer, and the semiconductor layer are sequentially formed on the substrate, the steps of preparing the source electrode and the drain electrode are as follows: After cleaning the substrate on which the semiconductor layer has been deposited, the substrate Into the vacuum chamber of the PVD equipment, pure molybdenum was used as the target, the nitrogen flow rate was controlled to 0sccm, and the first molybdenum metal layer was deposited on the semiconductor layer of the substrate by physical vapor deposition; then pure aluminum was used as the target, and the first molybdenum The aluminum metal layer is deposited on the metal layer by physical vapor deposition; pure molybdenum is used as the target, and the nitrogen flow rate is controlled to 0sccm, and the second molybdenum metal layer is deposited on the aluminum metal layer by physical vapor deposition to obtain the source and drain metal layer .

The substrate on which the active drain metal layer is deposited is taken out, and then a layer of photoresist is coated, and the photoresist is exposed by the mask plate corresponding to the source electrode and the drain electrode, and then developed. Then, an etching solution composed of hydrochloric acid and nitric acid is used to wet-etch the source and drain metal layers at 30° C., wherein the concentration of nitric acid in the etching solution is 3.5% by weight. After the etching is completed, the substrate is put into the stripping solution, and the photoresist is stripped to obtain the source electrode and the drain electrode.

The wet-etched substrate was observed under a scanning electron microscope (SEM), and the results showed that the edges of the source and drain were flat without metal residue, and the taper angles on both sides of the source and drain were at Within the range of 20°~40°.

It can be seen from the results of the above embodiments that the edges of the source electrode and the drain electrode obtained in any of the above embodiments are flat and there is no metal residue, which well solves the problem of molybdenum metal residue that easily occurs after the source electrode and the drain electrode are etched. In addition, in the foregoing embodiment, when the molybdenum metal layer (the first molybdenum metal layer and the second molybdenum metal layer) in the source and drain metal layers is prepared, when the nitrogen gas flow rate is 0 sccm, the resulting molybdenum metal layer The material is pure molybdenum, and the taper angle between the source and drain obtained by etching is in the range of 20°~40°; when preparing the molybdenum metal layer in the source and drain metal layer (the first molybdenum metal layer and the second molybdenum metal layer) During the process of dimolybdenum metal layer), the nitrogen flow rate is not 0sccm (the nitrogen flow rate is 250 sccm, 500 sccm, 750 sccm or 1000 sccm), the material of the obtained molybdenum metal layer is molybdenum nitride, and the taper angles on both sides of the source and drain obtained by etching are in the range of 40°~60°; Since the taper angles on both sides of the source and drain obtained by etching are below 60°, the passivation layer deposited on the source and drain will not be disconnected due to excessive tilt angles. In addition, the use of a lower nitrogen flow rate when preparing the molybdenum metal layer also reduces the manufacturing cost of the thin film transistor.

It should be noted that in this article, the terms "include", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system that includes a series of elements includes not only those elements, It also includes other elements that are not explicitly listed, or include elements inherent to this process, method, article, or system. If there are no more restrictions, the element defined by the sentence "including..." does not exclude the existence of other identical elements in the process, method, article or system that includes the element.

In addition, the descriptions related to "first", "second", etc. in this application are only for descriptive purposes, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first" and "second" may include at least one of the features either explicitly or implicitly.

The above are only optional embodiments of this application, and do not limit the scope of this application. Any equivalent article or equivalent process transformation made using the content of the description and drawings of this application, or directly or indirectly applied to other related technologies In the same way, all fields are included in the scope of patent protection of this application.

Claims

A method for preparing a thin film transistor, wherein the method for preparing the thin film transistor includes the following steps:

The first molybdenum metal layer, the aluminum metal layer and the second molybdenum metal layer are sequentially deposited on the semiconductor layer of the substrate by physical vapor deposition to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the second molybdenum metal layer are deposited For the molybdenum metal layer, the nitrogen flow rate is 0sccm~1000sccm;

Etching the source and drain metal layers with an etching solution to obtain source and drain electrodes, wherein the etching solution includes a mixed solution of hydrochloric acid and nitric acid;

And, a passivation layer and an electrode layer are sequentially formed on the source electrode and the drain electrode.
8. The method of manufacturing a thin film transistor according to claim 1, wherein when the first molybdenum metal layer and the second molybdenum metal layer are deposited, a flow of nitrogen gas is 0 sccm to 750 sccm.
8. The method of manufacturing a thin film transistor according to claim 1, wherein the nitrogen gas flow rate is 500 sccm when depositing the first molybdenum metal layer and the second molybdenum metal layer.
8. The method for manufacturing a thin film transistor according to claim 1, wherein the material of the electrode layer includes indium tin oxide.
2. The method for manufacturing a thin film transistor according to claim 1, wherein the first molybdenum metal layer, the aluminum metal layer and the second molybdenum metal layer are sequentially deposited on the semiconductor layer of the substrate by the physical vapor deposition method to obtain source and drain metals Before the layer steps, it also includes:

Provide substrate;

And, forming a gate electrode, a gate insulating layer, and a semiconductor layer sequentially stacked on the substrate on the substrate.
7. The method of manufacturing a thin film transistor according to claim 5, wherein after the step of providing a substrate, the method further comprises:

The substrate is cleaned.
8. The method of manufacturing a thin film transistor according to claim 1, wherein the etching temperature is 30°C-40°C in the process of etching the source and drain metal layers with an etching solution.
8. The method of manufacturing a thin film transistor according to claim 7, wherein the etching temperature is 32°C to 37°C.
8. The method of manufacturing a thin film transistor according to claim 7, wherein the etching temperature is 35°C.
3. The method for manufacturing a thin film transistor according to claim 1, wherein the etching solution includes hydrochloric acid and nitric acid, wherein the concentration of the nitric acid by weight is 1.5% to 3.5%.
9. The method for manufacturing a thin film transistor according to claim 10, wherein the concentration of the nitric acid by weight is 2% to 3%.
10. The method of manufacturing a thin film transistor according to claim 10, wherein the concentration by weight of the nitric acid is 2.5%.
5. The method for manufacturing a thin film transistor according to claim 1, wherein the etching solution is used to etch the source and drain metal layers to obtain source and drain electrodes, wherein the etching solution includes a mixed solution of hydrochloric acid and nitric acid The steps include:

Coating photoresist on the source and drain metal layers, exposing the photoresist using a mask, and then developing the photoresist;

And, using an etchant to etch the source and drain metal layers coated with the photoresist, and then strip the photoresist to obtain a source electrode and a drain electrode, wherein the etchant includes a mixture of hydrochloric acid and nitric acid Solution.
7. The method of manufacturing a thin film transistor according to claim 5, wherein the material of the gate includes at least one of aluminum, molybdenum and copper.
The method for manufacturing a thin film transistor according to claim 5, wherein the gate and the electrode layer are prepared by physical vapor deposition, and the gate insulating layer, the semiconductor layer, and the passivation layer are prepared by chemical Prepared by vapor deposition method.
A method for preparing a thin film transistor, wherein the method for preparing the thin film transistor includes the following steps:

Provide substrate;

Forming a gate electrode, a gate insulating layer and a semiconductor layer sequentially stacked on the substrate on the substrate;

A first molybdenum metal layer, an aluminum metal layer, and a second molybdenum metal layer are sequentially deposited on the semiconductor layer using a physical vapor deposition method to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the second molybdenum metal layer are deposited For the molybdenum metal layer, the nitrogen flow rate is 0sccm~1000sccm;

The source and drain metal layers are etched at 30°C to 40°C using an etching solution to obtain source and drain electrodes, wherein the etching solution includes a mixed solution of hydrochloric acid and nitric acid, wherein the nitric acid weight percentage concentration is 1.5%~3.5%;

And, a passivation layer and an electrode layer are sequentially formed on the source electrode and the drain electrode.
The method for manufacturing a thin film transistor according to claim 16, wherein the gate and the electrode layer are prepared by physical vapor deposition, and the gate insulating layer, the semiconductor layer, and the passivation layer are prepared by chemical Prepared by vapor deposition method.
A display device, wherein the display device includes a thin film transistor including a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, a passivation layer, and an electrode layer which are sequentially stacked on a substrate, The thin film transistor is prepared by the following steps:

The first molybdenum metal layer, the aluminum metal layer and the second molybdenum metal layer are sequentially deposited on the semiconductor layer of the substrate by physical vapor deposition to obtain a source-drain metal layer, wherein the first molybdenum metal layer and the second molybdenum metal layer are deposited For the molybdenum metal layer, the nitrogen flow rate is 0sccm~1000sccm;

Etching the source and drain metal layers with an etching solution to obtain source and drain electrodes, wherein the etching solution includes a mixed solution of hydrochloric acid and nitric acid;

And, a passivation layer and an electrode layer are sequentially formed on the source electrode and the drain electrode.