WO2020133459A1 - 调相器的控制方法及装置、抵消电路、前馈功率放大器 - Google Patents

调相器的控制方法及装置、抵消电路、前馈功率放大器 Download PDF

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WO2020133459A1
WO2020133459A1 PCT/CN2018/125743 CN2018125743W WO2020133459A1 WO 2020133459 A1 WO2020133459 A1 WO 2020133459A1 CN 2018125743 W CN2018125743 W CN 2018125743W WO 2020133459 A1 WO2020133459 A1 WO 2020133459A1
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cancellation
traversal
coefficient
phase modulator
preset
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PCT/CN2018/125743
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English (en)
French (fr)
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冯志成
俞启进
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鹤壁天海电子信息系统有限公司
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Priority to PCT/CN2018/125743 priority Critical patent/WO2020133459A1/zh
Publication of WO2020133459A1 publication Critical patent/WO2020133459A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion

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  • This application relates to the field of phase adjustment, in particular to a method and device for controlling a phase modulator, a cancellation circuit, and a feedforward power amplifier.
  • a phase modulator needs to be used to adjust the signal amplitude and phase, and often a phase modulator needs to be controlled to align the signal amplitude and phase.
  • a feedforward circuit is used to cancel the distortion signal generated by the power amplifier.
  • the specific feedforward circuit includes a phase modulator, which divides the input signal into two channels, one of which passes through the phase modulator After phase modulation, the distortion signal is canceled with another input signal.
  • the exact same amplitude is reversed, that is, the alignment of the amplitude and the phase is required.
  • the technical problem mainly solved by the present application is to provide a phase modulator control method and device, a cancellation circuit, and a feedforward power amplifier, which can achieve the convergence of the cancellation coefficient of the cancellation circuit.
  • the first aspect of the present application provides a control method for a phase modulator, the method is applied to a cancellation circuit including a phase modulator, and the cancellation circuit is used to input a signal or cancel a signal through the phase modulator After performing amplitude modulation and/or phase modulation, performing signal cancellation on the input signal and the cancellation signal to obtain an output signal, the method includes:
  • the current cancellation coefficient is the ratio between the output signal power and the input signal power of the cancellation circuit
  • a second aspect of the present application provides a phase modulator control device, including a processor and a memory, wherein the memory stores program data, and the processor is used to run program instructions stored in the memory To perform the above method.
  • a third aspect of the present application provides a cancellation circuit, including a phase modulator, a combiner, and a processor, wherein the output terminal of the phase modulator is connected to one of the input terminals of the combiner, The processor is connected to the control end of the phase modulator;
  • the phase modulator is used for amplitude modulation and/or phase modulation of one of the signals of the combiner;
  • the combiner is used for signal cancellation of two signals
  • the processor is used to execute the above method to control the phase modulator.
  • the fourth aspect of the present application provides a feedforward power amplifier circuit, including a carrier cancellation loop, a distortion cancellation loop and a processor; the carrier cancellation loop includes a first phase modulator; the distortion The cancellation loop includes a second phase modulator;
  • the processor is used to execute the above method to control the first phase modulator and/or the second phase modulator.
  • the fifth aspect of the present application provides a phase modulator control device, which is applied to a cancellation circuit of a phase modulator.
  • the cancellation circuit is used for amplitude modulation of an input signal or a cancellation signal through a phase modulator After phase modulation and/or phase adjustment, perform signal cancellation on the input signal and the cancellation signal to obtain an output signal; the control device:
  • An obtaining module configured to obtain the current cancellation coefficient of the cancellation circuit, wherein the current cancellation coefficient is the ratio between the output signal power and the input signal power of the cancellation circuit;
  • a determining module configured to determine a traversal step size matching the current cancellation coefficient
  • An obtaining module configured to obtain multiple sets of traversal control variables that cause the cancellation coefficient of the cancellation circuit to change differently and the amount of change of the cancellation coefficient is not greater than the traversal step;
  • a control module configured to respectively control the phase modulator to perform amplitude modulation and/or phase modulation on the input signal by using the multiple sets of traversal control variables to obtain corresponding multiple traversal cancellation coefficients;
  • a selection module configured to select a minimum traversal cancellation coefficient among the plurality of traversal cancellation coefficients, and control the phase modulator using a traversal control amount corresponding to the minimum traversal cancellation coefficient
  • the acquisition module, the determination module, the acquisition module, the control module, and the selection module repeat the above functions again until the current cancellation coefficient of the cancellation circuit is lower than a preset threshold.
  • the current cancellation coefficient of the cancellation circuit is used to determine its traversal step size, so that multiple sets of traversal control variables with a transformation amount of the cancellation coefficient not greater than the traversal step size are selected to sequentially control the phase modulator so that the cancellation circuit gets a corresponding number of A traversal cancellation coefficient, and then select the traversal control amount corresponding to the minimum traversal cancellation coefficient to control the phase modulator.
  • the phase modulator is controlled to perform amplitude modulation and/or phase modulation multiple times, so that the cancellation coefficient of the cancellation circuit produces different Change to obtain the smallest cancellation coefficient, and use the amount of control to generate the cancellation coefficient to control the phase modulator.
  • the cancellation coefficient of the cancellation circuit has decreased.
  • the target cancellation coefficient is reached, that is, the optimal cancellation coefficient that is smaller than the preset threshold, so the convergence of the cancellation coefficient is achieved.
  • FIG. 1 is a schematic structural diagram of an embodiment of a feed-forward power amplifier circuit of the present application
  • FIG. 2 is a schematic flowchart of an embodiment of a method for controlling a phase modulator of the present application
  • FIG. 3 is a schematic diagram of a model of a cancellation circuit in an application scenario of this application.
  • FIG. 5 is a schematic diagram of a cancellation curve of a cancellation circuit of a polar coordinate system in an application scenario of this application;
  • FIG. 6 is a schematic diagram of traversal cancellation points of a cancellation circuit of a polar coordinate system in an application scenario of this application;
  • step S230 is a schematic flowchart of step S230 in another embodiment of the control method of the phase modulator of the present application.
  • FIG. 8 is a schematic flowchart of still another embodiment of the control method of the phase modulator of the present application.
  • FIG. 9 is a schematic diagram of a convergence process in an application scenario using the control method of the present application.
  • FIG. 10 is a schematic diagram of a feedforward linearization test without adopting the control method of the present application.
  • FIG. 11 is a schematic diagram of a feedforward linearization test using the control method of the present application.
  • FIG. 12 is a schematic structural view of an embodiment of a control device for a phase modulator
  • FIG. 13 is a schematic structural diagram of an embodiment of a storage device of the present application.
  • 15 is a schematic structural diagram of another embodiment of a control device for a phase modulator of the present application.
  • system and "network” are often used interchangeably in this document.
  • the term “and/or” in this article is just an association relationship that describes an associated object, which means that there can be three kinds of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist at the same time, exist alone B these three cases.
  • the character "/" in this article generally indicates that the related objects before and after are in an "or” relationship.
  • phase alignment method of the present application can be used in any cancellation circuit that requires phase alignment, such as a cancellation circuit in a feed-forward power amplifier circuit, a zero intermediate frequency DC calibration circuit, a Cartesian loop circuit, etc.
  • a feedforward power amplifier is taken as an example for description.
  • FIG. 1 is a schematic structural diagram of an embodiment of a feed-forward power amplifier circuit of the present application.
  • the feedforward power amplifier circuit includes a carrier cancellation loop 110, a distortion cancellation loop 120, and a processor 130.
  • the carrier cancellation loop 110 includes a phase modulator 111, a power amplifier (ie, AMP) 112, and a combiner 113.
  • a phase modulator 111 After the carrier cancellation loop 110 of the input signal S i is divided into two, wherein one input signal S i as an input signal via a phase modulator 111 amplitude and / or phase modulation, and a power amplifier 112 amplifies the power amplifier to obtain a mixed signal S ' i and output to the combiner 113, and the other input signal S i is directly output to the combiner 113 as a carrier cancellation signal.
  • the power amplifier mixed signal S i In addition to the original input signal S i (ie, carrier signal), the power amplifier mixed signal S i also includes a distortion signal generated by the power amplifier 112.
  • the combiner 113 adds the input power amplifier mixed signal S′ i and the carrier cancellation signal S i to cancel the carrier signal with the same amplitude and inverse phase, and output the distortion signal S v .
  • the distortion cancellation loop 120 includes a phase modulator 121 and a power amplifier 122.
  • the distortion signal S v output by the carrier cancellation loop 110 is used as the distortion cancellation signal by the amplitude modulation and/or phase modulation of the phase modulator 121 and the power amplifier 122 performs power amplification to obtain the distortion cancellation signal S′ v .
  • the phase modulator 121 distortion cancellation signal S 'v amplitude phase adjusting amplifier is mixed with a signal S' I approach or the same as the web is inverted, so that the mixed signal amplifier S 'I and distortion cancellation signal S' for adding v to the distorted signal with inverted amplitude cancellation, the carrier amplifier output signal S o.
  • This application uses a feed-forward power amplifier circuit to achieve linearization of the power amplifier, and the feed-forward power amplifier circuit can be implemented by an analog device, which is fast and stable, and can keep up with changes in the environment in real time.
  • the processor can use the digital-to-analog converter to convert the digital signal to an analog signal and use it as the control quantity of the phase modulator. By controlling the digital signal, it can achieve high precision and good linearization ability, such as Linearization of 15dB bandwidth 40dB is achieved.
  • the combiner described in this application is a general term for any device that can realize signal cancellation.
  • the carrier cancellation loop and the distortion cancellation loop in the feedforward power amplifier circuit may also be other existing carrier cancellation loops and distortion cancellation loops, which are not limited herein.
  • the processor 130 of the present application adopts an adaptive method to control the phase modulators 111 and 121 (as shown in FIG. 1, input to the phase modulator 111 Control signal C 1 , input the control signal C 2 ) to the phase modulator 121, so that the amplitude-modulated and/or phase-modulated signals of the phase modulators 111 and 121 can be reversed to or approach the same amplitude as another signal, and Can achieve the best offset effect.
  • the processor 130 adopts the method of the following embodiments to realize the control of the phase modulator, thereby achieving amplitude and phase alignment.
  • the feedforward power amplifier circuit may further include a power detector for detecting the input signal power (ie, the power of the signal S i ) and the output signal power of the carrier cancellation loop (Ie the power of the signal S v ), and the input signal power (ie the power of the signal S′ i ) and the output signal power (ie the power of the signal S o ) in the distorted carrier loop, and input the detected power to processor.
  • the control principle of the phase modulator used in this application is: through the traversal method, the phase modulator is controlled to perform amplitude modulation and/or phase modulation multiple times, so that the cancellation coefficient of the cancellation circuit changes differently to obtain the smallest cancellation coefficient among them, And control the phase modulator using the control amount that generates the cancellation coefficient. At this time, the cancellation coefficient of the cancellation circuit has decreased. Continue to repeat this method so that the cancellation coefficient in the cancellation circuit continues to decline and eventually reach the target cancellation coefficient (that is, the optimal Offset coefficient), so the convergence of the offset coefficient is achieved.
  • FIG. 2 is a schematic flowchart of an embodiment of a method for controlling a phase modulator of the present application.
  • the method is applied to a cancellation circuit, where the cancellation circuit includes a phase modulator, and the cancellation circuit is used for amplitude modulation and/or phase modulation of the input signal or the cancellation signal through the phase modulator, and then the input signal and The cancellation signal performs signal cancellation to obtain an output signal.
  • the cancellation circuit may specifically be, but not limited to, the carrier cancellation loop and the distortion cancellation loop shown in FIG. 1.
  • the method is performed by the control device of the phase modulator, specifically, the processor shown in FIG. 1 or the control device shown in FIG. 12.
  • the method includes the following steps:
  • the current output signal power and input signal power of the cancellation circuit are obtained, and the ratio between the two is used as the current cancellation coefficient.
  • the carrier cancellation loop of the feed-forward power amplifier circuit shown in FIG. 1 as an example, the input signal power and output signal power of the carrier cancellation loop detected by the received power detector, and the difference between the output signal power and the input signal power The ratio is used as the current cancellation factor.
  • the cancellation curves of different cancellation coefficients C in the polar coordinate system are circles with different radii centered on (1, 0).
  • the cancellation curve for the cancellation coefficient C 0.1, 0.05, 0.032, 0.018, 0.01 (that is, the power cancellation is: -20dB, -25dB, -30dB, -35dB, -40dB) is shown in Figure 5.
  • S220 Determine a traversal step size that matches the current cancellation coefficient.
  • the traversal step size matching it is selected according to the size of the current cancellation coefficient.
  • the smaller the offset coefficient the smaller the traversal step of its matching.
  • a plurality of traversal step sizes that match different offset coefficients may be pre-stored, so after obtaining the current offset coefficient, the traversal step sizes that match it may be found from the pre-stored information.
  • the matching traversal step size can be calculated immediately according to the current cancellation coefficient.
  • This S220 specifically includes: determining a preset cancellation coefficient range to which the current cancellation coefficient belongs, and acquiring a traversal step size that matches the preset cancellation coefficient range.
  • the preset range of offset coefficients includes:
  • the difference between the minimum cancellation coefficients of adjacent preset cancellation coefficient ranges may be set to 5dB-10dB, that is, the preset cancellation coefficient range is 5dB-10dB (the difference between the upper and lower limits).
  • the minimum cancellation coefficients in the two ranges are -20dB and -25dB, respectively, with a difference of 5dB.
  • different cancellation coefficient ranges can be set according to actual conditions, and the difference between the minimum cancellation coefficients of adjacent preset cancellation coefficient ranges is also not limited to 5dB-10dB.
  • the difference when the efficiency requirements are not High, but in embodiments that require better convergence effects, the difference can be set smaller, or in embodiments that require better efficiency, but do not require high convergence effects, the difference can be set Set to larger.
  • the preset cancellation coefficient range including the larger cancellation coefficient may be set wider than the preset cancellation coefficient range having the smaller cancellation coefficient. For example, the range of the cancellation coefficient that is close to the optimal state from -40dB to -50dB is set to 10dB, and the other cancellation coefficient range is set to 5dB.
  • the larger the preset cancellation coefficient range of the larger cancellation coefficient the larger the traversal step assigned.
  • the preset cancellation coefficient range of -20dB to -25dB corresponds to a preset traversal step of greater than -25dB to -30dB The traversal step corresponding to the range of the offset coefficient.
  • this embodiment uses polar coordinates to illustrate an implementation process of offset convergence.
  • FIG. 6 Please refer to FIG. 6 to explain the principle of cancellation convergence.
  • the current cancellation coefficient C is in the polar coordinate
  • the current cancellation curve is a circle with a radius of 0.10
  • the current cancellation point ( ⁇ 0 , ⁇ 0 ) is a point on a circle with a radius of 0.10.
  • n is an integer greater than or equal to 1.
  • n is greater than or equal to 4, for example, n is 4, 8, or 16.
  • r represents the traversal step.
  • C max represents the maximum cancellation coefficient in the preset cancellation coefficient range
  • C min represents the minimum cancellation coefficient in the preset cancellation coefficient range.
  • ⁇ represents the maximum difference between adjacent preset traversal angles, that is, in n preset traversal angles Compare the difference between adjacent preset traversal angles of each group to get the maximum difference.
  • the traversal points can be taken at equal phases on the circle, that is, the difference between each set of adjacent traversal angles is consistent.
  • n preset traversal angles are ⁇ 0,45°,90°,135°,180°,225°,270°,315° ⁇ , so ⁇ is any adjacent preset traversal angle The difference between them is 45°.
  • C max is 0.1 and C min is 0.05.
  • the above formula 3 becomes:
  • the preset cancellation coefficient range is -20dB to -25dB, and its traversal step is: 0.068 ⁇ r ⁇ 0.06.
  • the preset cancellation coefficient range is -25dB to -30dB, and its traversal step is: 0.032 ⁇ r ⁇ 0.02;
  • the preset cancellation coefficient range is -30dB to -35dB, and its traversal step is: 0.022 ⁇ r ⁇ 0.0083;
  • the preset cancellation coefficient range is -35dB to -40dB, and its traversal step is: 0.015 ⁇ r ⁇ 0.0025;
  • the preset cancellation coefficient range is -40dB to -50dB, and its traversal step is: 0.009 ⁇ r ⁇ 0.001.
  • a traversal step corresponding to the current cancellation coefficient can be arbitrarily selected, or multiple traversal steps can be preferentially selected. Small traversal step. For example, for the preset cancellation coefficient range -20dB to -25dB, you can choose any value between 0.06 and 0.063, or directly take the minimum value of 0.06.
  • the traversal step size can be calculated in real time by using Formula 3 after obtaining the current offset coefficient, or firstly, using the above Formula 3 to obtain the traversal step size of each offset coefficient range in advance and saving it in advance, after obtaining the current offset coefficient , Obtain the traversal step size matching the preset offset coefficient range where the current offset coefficient is located from the pre-stored information.
  • the cancellation coefficient of the cancellation circuit changes differently, and the change of the cancellation coefficient is not greater than the preset traversal step, the cancellation The change amount of the coefficient is the change amount of the offset coefficient before and after the phase modulator is controlled by the traversing control amount.
  • this embodiment continues to illustrate the process of obtaining the traversal control amount in combination with polar coordinates. That is, the relationship between the amplitude difference and the phase difference between the input signal of the cancellation circuit and the cancellation circuit and the cancellation coefficient in the polar coordinate system shown in FIG. 6 is used to determine multiple traversal cancellation points, and then the corresponding traversal control is obtained the amount.
  • the polar diameter of the point on the polar coordinate system represents the degree of amplitude difference ⁇ between the input signal and the cancellation signal during signal cancellation
  • the polar angle of the point on the polar coordinate system represents the The degree of phase difference ⁇ between the input signal and the cancellation signal.
  • this S230 includes the following sub-steps:
  • the plurality of traversal cancellation points are points on a circle with the current cancellation point as the center and the traversal step length as the radius
  • the information of the plurality of traversal cancellation points includes the radius of the circle and the respective A plurality of preset traversal angles of the positions of the plurality of traversal cancellation points on the circle.
  • the information of the offset points of n traversal points is obtained, that is, r and n preset traversal angles obtained by S220 As shown in FIG. 6, n is 8, and n preset traversal angles are ⁇ 0, 45°, 90°, 135°, 180°, 225°, 270°, 315° ⁇ .
  • S232 Obtain multiple sets of traversal control variables corresponding to the multiple traversal cancellation points according to a preset relationship between the information of the traversal cancellation points and the control amount of the phase modulator.
  • the preset relationship between the information of the traversal cancellation point and the control amount of the phase modulator may be: the polar diameters and polar angles of the traversal cancellation point and the current cancellation point and the traversal cancellation point.
  • the first relationship between the information and the second relationship between the magnitude difference ⁇ and the phase difference degree ⁇ and the control amount of the phase modulator are obtained.
  • Equation 4 the first relationship between each traversal traversal point ( ⁇ , ⁇ ) and the current cancellation point ( ⁇ 0 , ⁇ 0 ) is as follows: Equation 4:
  • the second relationship between the amplitude difference ⁇ and the phase difference degree ⁇ of the phase modulator and the cancellation circuit can be analyzed as follows.
  • the mathematical model of the phase modulator is shown in FIG. 7, that is, the mathematical model of the phase modulator may be k(V I +j*V Q ).
  • k is the parameter of the phase modulator, which is the parameter that comes with the phase modulator.
  • the control device controls the amplitude and/or phase change of the input signal by the phase modulator by outputting two first control voltages V I and second control voltages V Q to the phase modulator.
  • the phase modulator can be an IQ modulator.
  • the first control voltage V I and the second control voltage V Q may be DC control voltages, and the two control voltages may be generated by a digital-to-analog converter (DAC for short), that is, the control device is generated by a digital-to-analog converter
  • the control voltage converts the digital magnitude loudness conversion into an analog DC voltage change, thereby obtaining higher accuracy.
  • the digital-to-analog converter may be a 12-bit converter.
  • V I1 is the first control voltage for the phase modulator when the cancellation circuit is traversing the cancellation point
  • V I0 is the first control voltage for the phase modulator when the cancellation circuit is at the current cancellation point
  • V Q1 is when the cancellation circuit is traversing the cancellation point
  • V Q0 is the first control voltage for the phase modulator when the cancellation circuit is at the current cancellation point
  • ⁇ V I is the first control voltage for the phase modulator when the cancellation circuit changes from the current cancellation point to the traversal cancellation point
  • the amount of change in the control voltage, ⁇ V Q is the amount of change in the second control voltage for the phase modulator when the cancellation circuit changes from the current cancellation point to the traversal of the cancellation point.
  • the relationship between the calculated traversal control quantities corresponding to the 8 traversal cancellation points is:
  • the 4-bit 16-bit control word of the digital-to-analog converter can be obtained as follows:
  • ⁇ D I is a digital signal of ⁇ V I
  • ⁇ D Q is a digital signal of ⁇ V Q.
  • S240 Use multiple sets of traversal control variables to control the phase modulator to perform amplitude modulation and/or phase modulation on the input signal to obtain corresponding multiple traversal cancellation coefficients.
  • the cancellation circuit After obtaining multiple sets of traversal control variables ( ⁇ D I , ⁇ D Q ) through S230, input the multiple sets of traversal control variables to the phase modulator to control the phase modulator to adjust the amplitude and/or phase of the input signal.
  • the cancellation circuit generates a corresponding ergodic cancellation coefficient corresponding to each set of ergodic control variables.
  • the ergodic cancellation coefficient is the output signal power and the input signal power after amplitude modulation and/or phase modulation by the phase modulator controlled by the ergodic control variable. Ratio. For example, in the above embodiment where n is 8, 8 traversal cancellation coefficients are obtained, and the 8 traversal cancellation coefficients correspond to the 8 traversal cancellation points shown in FIG. 6.
  • S250 Select a minimum ergodic cancellation coefficient among a plurality of ergodic cancellation coefficients, and control the phase modulator using a traversal control amount corresponding to the minimum ergodic cancellation coefficient.
  • the smallest ergodic cancellation coefficient is selected therefrom, for example, the third ergodic cancellation coefficient.
  • the third traversal control variable corresponding to the minimum traversal cancellation coefficient is selected again, and the traversal control variable is used to continue to control the phase modulator for phase modulation and/or amplitude modulation. At this time, the current cancellation coefficient of the cancellation circuit becomes the minimum ergodic cancellation coefficient.
  • step S210 to compare whether the current cancellation coefficient of the cancellation circuit is lower than the preset threshold; if it is lower, it means that the convergence coefficient of the cancellation circuit has reached the preset optimization at this time, achieve convergence, and end the process; if not low Therefore, S220 to S250 continue to be executed, and the above steps are continued to be looped until the current cancellation coefficient of the cancellation circuit is lower than the preset threshold.
  • the preset threshold may be preset by the user, or determined by the control device according to experience or user needs. In an embodiment, the preset threshold is 0.001.
  • S801 Determine whether the current cancellation coefficient C is less than -20dB. If not, execute S802-S803, if yes, execute S804.
  • the 8 traversal control quantities are the phase modulator control quantities corresponding to the 8 traversal cancellation points obtained by the above formulas 4, 6 and 7, the 8 traversal cancellation points are in the polar coordinate system with the current cancellation point as the center and 8 traversal cancellation points on a circle with a step size r of radius, and
  • the current cancellation coefficient of the cancellation circuit is the minimum cancellation coefficient.
  • S804 Determine whether the current cancellation coefficient C is less than -25dB. If not, execute S805-S806, if yes, execute S807.
  • the current cancellation coefficient of the cancellation circuit is the minimum cancellation coefficient.
  • S807 Determine whether the current cancellation coefficient C is less than -30dB. If not, execute S808-S809, if yes, execute S810.
  • S810 Determine whether the current cancellation coefficient C is less than -35dB. If not, execute S811-S812, if yes, execute S813.
  • S813 Determine whether the current cancellation coefficient C is less than -40dB. If not, execute S814-S815, if yes, execute S816.
  • S816 Determine whether the current cancellation coefficient C is less than -50dB. If not, execute S817-S818, if yes, execute S819.
  • S801 is repeatedly executed to monitor the modulation of the phase modulator in real time, to achieve long-term adaptive control, and to ensure the long-term stable optimization of the cancellation coefficient of the cancellation circuit.
  • the preset time may be but not limited to 1ms, or 5ms, or 10ms.
  • the digital phase modulator controls the amount of (D I, D Q) is (3a90,3ed0), the cancel coefficient is -20dB. Then, the control method of the above embodiment is used to control the state of the phase modulator four times.
  • the digital control amount and the cancellation coefficient of the phase modulator each time it is controlled are shown in Table 1 below.
  • Phase Modulator Status Offset coefficient C D I D Q Initial state -20dB 0X3a90 0X3ed0 First control -30dB 0X38d0 0X4090 Second control -38.7dB 0X3830 0X4090 Third control -44.3dB 0X37e0 0X4090 Fourth control -60dB 0X37a0 0X4060
  • the convergence process achieved is as shown by the dotted arrow in FIG. 9.
  • the point closest to the center of the circle can be determined to follow the fastest downward direction Convergence, successively approaching the center of the circle, making the convergence process shorter.
  • the whole convergence process taking the single-chip experiment as an example, the single-chip clock cycle is about 10us, the entire convergence process takes 4.16ms, requires about 416 clock cycles, the entire convergence process takes very short time.
  • the output spectrum of the feedforward linearization test of the circuit is shown in FIG. 10. If the above control method is adopted, the feed-forward linearization test of the circuit, the output spectrum is shown in Figure 11. Therefore, it is possible to achieve a 15MHz bandwidth and a non-linear cancellation of more than 40dB; intermodulation distortion (IMD) is -73.8dBc.
  • IMD intermodulation distortion
  • FIG. 12 is a schematic structural diagram of an embodiment of a control device for a phase modulator of the present application.
  • the control device 1200 is applied to a cancellation circuit including a phase modulator (as shown in FIG. 1).
  • the cancellation circuit is used to modulate the input signal or the cancellation signal through the phase modulator and/or Or after phase modulation, perform signal cancellation on the input signal and the cancellation signal to obtain an output signal.
  • the control device 1200 includes a memory 1201 and a processor 1202. Wherein, each component of the control device 1200 may be coupled together via a bus, or the processor of the control device 1200 may be connected to other components one by one.
  • the memory 1201 is used to store program instructions executed by the processor 1202 and data during processing by the processor 1202, wherein the memory 1201 includes a non-volatile storage part for storing the above-mentioned program instructions.
  • the memory 1201 may only serve as the memory of the processor 1202 to cache program instructions executed by the processor 1202.
  • the program instructions are actually stored in a device other than the terminal, and the processor 1202 is connected to an external device. By calling externally stored program instructions, corresponding processing is performed.
  • the processor 1202 controls the operation of the control device 1200.
  • the processor 1202 may also be referred to as a CPU (Central Processing Unit, central processing unit).
  • the processor 1202 may be an integrated circuit chip with signal processing capabilities.
  • the processor 1202 may also be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, and discrete hardware components .
  • the general-purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the processor 1202 may integrate an application processor and a baseband processor, or only an application processor.
  • the processor 1202 is used to obtain the current cancellation coefficient of the cancellation circuit by calling the program instructions stored in the memory 1201, where the current cancellation coefficient is between the output signal power and the input signal power of the cancellation circuit Ratio; determine the traversal step size that matches the current cancellation coefficient; obtain multiple sets of traversal control variables that cause the cancellation coefficient of the cancellation circuit to change differently and the amount of change in the cancellation coefficient is not greater than the traversal step size; Separately using the multiple sets of traversal control variables to control the phase modulator to perform amplitude modulation and/or phase modulation on the input signal to obtain corresponding multiple ergodic cancellation coefficients; selecting the smallest traversal among the multiple ergodic cancellation coefficients The cancellation coefficient, and use the traversal control amount corresponding to the minimum traversal cancellation coefficient to control the phase modulator; repeat the above steps until the current cancellation coefficient of the cancellation circuit is lower than a preset threshold.
  • the processor 1202 executes the obtaining multiple sets of traversal control variables that cause the cancellation coefficient of the cancellation circuit to change differently and the change amount of the cancellation coefficient is not greater than the preset traversal step, including : Obtaining information of multiple traversal cancellation points in a polar coordinate system, where the multiple traversal cancellation points are points on a circle with the current cancellation point as the center and the traversal step length as the radius, and the multiple traversals
  • the information of the cancellation point includes the radius of the circle and the multiple preset traversal angles used to determine the positions of the multiple traversal cancellation points on the circle; according to the information of the traversal cancellation point and the control amount of the phase modulator A preset relationship between the two to obtain multiple sets of traversal control quantities corresponding to the multiple traversal cancellation points; wherein, the polar diameter of the point on the polar coordinate system represents the difference between the input signal and the cancellation signal during signal cancellation Degree of amplitude difference ⁇ , the polar angle of the point on the polar coordinate system represents the degree of phase difference ⁇ between the input signal and
  • the number of traversal cancellation points may be greater than or equal to 4, and the angle difference between two adjacent preset traversal angles may be the same.
  • the preset relationship between the information of the traversal cancellation point and the control amount of the phase modulator is caused by: the polar diameter and polar angle of the traversal cancellation point and the current cancellation point are The first relationship between the information traversing the cancellation point and the second relationship between the magnitude difference ⁇ and the phase difference degree ⁇ and the control amount of the phase modulator are obtained.
  • control amount of the phase modulator includes the change amount of the first control voltage V I and the change amount of the second control voltage V Q ;
  • first relationship may include the above formula 4; and the second relationship may include Formula 5 above.
  • the processor 1202 executing the traversal step determined to match the current cancellation coefficient includes: determining a preset cancellation coefficient range to which the current cancellation coefficient belongs, and acquiring the preset The traversal step size of the offset coefficient range matching.
  • the processor 1202 executing the acquiring the ergodic step size matching the preset cancellation coefficient range includes: according to the above formula 3, obtaining the ergodic step size matching the preset cancellation coefficient range; Or, obtain the traversal step size matching the preset cancellation coefficient range from the pre-stored information, wherein the pre-stored traversal step size is calculated and saved in advance using the above formula 3.
  • the processor 1202 selects the traversal step size with the smallest step size value among the multiple traversal step sizes.
  • the difference between the minimum cancellation coefficients in the adjacent preset cancellation coefficient ranges is 5dB-10dB.
  • the range of the preset cancellation coefficient including the larger cancellation coefficient may be wider than the range of the preset cancellation coefficient smaller than the cancellation coefficient.
  • the processor 1202 of the control device 1200 is further used to execute the method of any of the foregoing embodiments.
  • the processor 1202 of the control device 1200 may be the processor described in FIG. 1.
  • this application also provides a schematic structural diagram of an embodiment of a storage device.
  • the storage device 1300 stores program instructions 1301 executable by the processor, and the program instructions 1301 are used to execute the method in the foregoing embodiment.
  • the storage device 1301 may specifically be a medium that can store program instructions, such as a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disk. Or, it may be a server that stores the program instructions, and the server may send the stored program instructions to other devices to run, or it may run the stored program instructions by itself.
  • the storage device 1300 may also be the memory 1201 shown in FIG. 12.
  • FIG. 14 is a schematic structural diagram of an embodiment of a cancellation circuit of the present application.
  • the cancellation circuit includes a phase modulator 1401, a combiner 1402, and a processor 1403, wherein the output terminal of the phase modulator 1401 is connected to one of the input terminals of the combiner 1402, and the processor 1403 is connected to the phase modulator The control end of the device 1401.
  • the phase modulator 1401 is used to perform amplitude modulation and/or phase modulation on one of the signals of the combiner 1402.
  • the combiner 1402 is used to cancel the two signals.
  • the processor 1403 is used to execute the method of any of the foregoing embodiments to control the phase modulator.
  • the processor 1403 may specifically be any processor or control device described above.
  • the cancellation circuit may specifically be the carrier cancellation circuit or the distortion cancellation circuit described in FIG. 1.
  • the cancellation circuit is a phase alignment circuit during DC calibration in a zero-IF scheme, or the cancellation circuit is a phase alignment circuit in a Cartesian ring.
  • FIG. 15 is a schematic structural diagram of another embodiment of a control device for a phase modulator of the present application.
  • the control device is applied to a cancellation circuit of a phase modulator.
  • the cancellation circuit is used to perform amplitude modulation and/or phase modulation on the input signal or the cancellation signal through the phase modulator, and then signal the input signal and the cancellation signal. Cancel, get the output signal.
  • the cancellation circuit is specifically as any of the above cancellation circuits.
  • the control device includes an acquisition module 1510, a determination module 1520, an acquisition module 1530, a control module 1540, and a selection module 1550.
  • the obtaining module 1510 is configured to obtain a current cancellation coefficient of the cancellation circuit, where the current cancellation coefficient is the ratio between the output signal power and the input signal power of the cancellation circuit;
  • the determining module 1520 is used to determine the traversal step size matching the current cancellation coefficient
  • the obtaining module 1530 is configured to obtain multiple sets of traversal control variables that cause the cancellation coefficient of the cancellation circuit to change differently and the change amount of the cancellation coefficient is not greater than the traversal step;
  • the control module 1540 is configured to respectively control the phase modulator to perform amplitude modulation and/or phase modulation on the input signal by using the multiple sets of traversal control variables to obtain corresponding multiple traversal cancellation coefficients;
  • the selection module 1550 is configured to select a minimum traversal cancellation coefficient among the plurality of traversal cancellation coefficients, and control the phase modulator using a traversal control amount corresponding to the minimum traversal cancellation coefficient;
  • the acquisition module 1510, the determination module 1520, the acquisition module 1530, the control module 1540, and the selection module 1550 repeat the above functions again until the current cancellation coefficient of the cancellation circuit is lower than a preset threshold.
  • the obtaining module 1530 includes:
  • the obtaining unit 1531 obtains information of a plurality of traversal cancellation points in the polar coordinate system, where the plurality of traversal cancellation points are a number of points on a circle with the current cancellation point as the center and the traversal step length as the radius.
  • the information of the traversal cancellation points includes the radius of the circle and the multiple preset traversal angles used to determine the positions of the plurality of traversal cancellation points on the circle;
  • the obtaining unit 1532 is configured to obtain multiple sets of traversal control variables corresponding to the multiple traversal cancellation points according to a preset relationship between the information of the traversal cancellation points and the control amount of the phase modulator;
  • the polar diameter of the point on the polar coordinate system represents the degree of amplitude difference ⁇ between the input signal and the cancellation signal during signal cancellation
  • the polar angle of the point on the polar coordinate system represents the The degree of phase difference ⁇ between the input signal and the cancellation signal.
  • the number of traversal cancellation points is greater than or equal to 4, and the angle difference between two adjacent preset traversal angles is the same.
  • the preset relationship between the information of the traversal cancellation point and the control amount of the phase modulator is caused by: the polar diameter and polar angle of the traversal cancellation point and the current cancellation point are The first relationship between the information traversing the cancellation point and the second relationship between the magnitude difference ⁇ and the phase difference degree ⁇ and the control amount of the phase modulator are obtained.
  • control amount of the phase modulator includes the change amount of the first control voltage V I and the change amount of the second control voltage V Q ;
  • first relationship may include the above formula 4;
  • first The second relationship may include the above formula 5.
  • the determination module 1520 is specifically configured to: determine a preset cancellation coefficient range to which the current cancellation coefficient belongs, and obtain a traversal step size that matches the preset cancellation coefficient range.
  • the determination module 1520 is specifically configured to: according to the above formula 3, obtain a traversal step size that matches the preset offset coefficient range; or, obtain from the prestored information that the preset offset coefficient range matches Traversal step size, wherein the pre-stored traversal step size is calculated and saved in advance using the above formula 3.
  • the traversal step with the smallest step value among the multiple traversal steps is selected.
  • the difference between the minimum cancellation coefficients of the adjacent preset cancellation coefficient ranges is 5dB-10dB; wherein, the range of the preset cancellation coefficients including the larger cancellation coefficient is wider than the cancellation coefficient.
  • the small range of the preset cancellation coefficient is 5dB-10dB; wherein, the range of the preset cancellation coefficients including the larger cancellation coefficient is wider than the cancellation coefficient.
  • the current cancellation coefficient of the cancellation circuit is used to determine its traversal step size, so as to select multiple sets of traversal control variables whose transformation amount of the cancellation coefficient is not greater than the traversal step size, to sequentially control the phase modulator, so that the cancellation circuit obtains a corresponding number of Traverse the cancellation coefficient, and then select the traversal control amount corresponding to the minimum traversal cancellation coefficient to control the phase modulator.
  • the phase modulator is controlled to perform multiple amplitude modulation and/or phase modulation to make the cancellation circuit's cancellation coefficient produce different changes.
  • the cancellation coefficient of the cancellation circuit has decreased. Continue to repeat this method so that the cancellation coefficient in the cancellation circuit continues to decline.
  • the target cancellation coefficient is finally reached, that is, the optimal cancellation coefficient that is less than the preset threshold, so the convergence of the cancellation coefficient is achieved.
  • the traversal cancellation point of the present application is an equal phase point on a circle with the current cancellation point as the center and the traversal step length as the radius, so it can be guaranteed that among the multiple traversal cancellation system points obtained by each control, there must be
  • the current cancellation point is close to the center of the circle, so it can be guaranteed that after each control, the cancellation coefficient continuously converges and has a clear convergence path to achieve fast, efficient and stable convergence, and because the method directly responds according to the actual cancellation coefficient of the cancellation circuit
  • the adaptive control can quickly follow the changes of the external environment and converge accordingly.
  • the disclosed method and device may be implemented in other ways.
  • the device implementation described above is only schematic.
  • the division of modules or units is only a division of logical functions.
  • there may be other divisions for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical, or other forms.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or software function unit.
  • the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of the present application may be essentially or part of the contribution to the existing technology or all or part of the technical solution may be embodied in the form of a software product, and the computer software product is stored in a storage medium , Including several instructions to enable a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of the embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code .

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Abstract

本申请公开了一种调相器的控制方法及装置、抵消电路、前馈功率放大器。其中，该方法包括：获取抵消电路的当前抵消系数；确定与当前抵消系数匹配的遍历步长；获得使抵消电路的抵消系数发生不同变化且抵消系数的变化量不大于遍历步长的多组遍历控制量；分别利用多组遍历控制量控制调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；选择多个遍历抵消系数中的最小遍历抵消系数，并利用与最小遍历抵消系数对应的遍历控制量来控制所述调相器；重复上述步骤，直至所述抵消电路的当前抵消系数低于预设阈值。上述方案，实现对抵消电路的抵消系数的收敛。

Description

调相器的控制方法及装置、抵消电路、前馈功率放大器 【技术领域】
本申请涉及相位调整领域，特别是涉及调相器的控制方法及装置、抵消电路、前馈功率放大器。
【背景技术】
目前，在很多电路中需要利用调相器对信号幅度和相位进行调整，而且往往需要控制调相器来实现信号幅度和相位进行对齐。例如，为实现功率放大器的线性化，采用前馈电路对功率放大器产生的失真信号进行抵消，具体前馈电路包括调相器，将输入信号分成两路，其中一路输入信号经所述调相器调相后与另一路输入信号进行失真信号抵消。其中，为了实现失真信号的有效抵消需要两路输入电路在进行失真信号抵消时，精确的同幅反向，也即需要幅度和相位的对齐。
【发明内容】
本申请主要解决的技术问题是提供调相器的控制方法及装置、抵消电路、前馈功率放大器，能够实现对抵消电路的抵消系数的收敛。
为了解决上述问题，本申请第一方面提供了一种调相器的控制方法，所述方法应用于包括调相器的抵消电路，所述抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，对所述输入信号和抵消信号进行信号抵消，得到输出信号，所述方法包括：
获取所述抵消电路的当前抵消系数，其中，所述当前抵消系数为所述抵消电路的输出信号功率和输入信号功率间的比值；
确定与所述当前抵消系数匹配的遍历步长；
获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述遍历步长的多组遍历控制量；
分别利用所述多组遍历控制量控制所述调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；
选择所述多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器；
重复上述步骤，直至所述抵消电路的当前抵消系数低于预设阈值。
为了解决上述问题，本申请第二方面提供了一种调相器的控制装置，包括处理器和存储器，其中，所述存储器存储有程序数据，所述处理器用于运行所述存储器存储的程序指令，以执行上述的方法。
为了解决上述问题，本申请第三方面提供了一种抵消电路，包括调相器、合路器和处理器，其中，所述调相器的输出端与合路器的其中一个输入端连接，所述处理器连接于所述调相器的控制端；
所述调相器用于对合路器的其中一路信号进行调幅和/或调相；
所述合路器用于对两路信号进行信号抵消；
所述处理器用于执行上述的方法，以控制所述调相器。
为了解决上述问题，本申请第四方面提供了一种前馈功率放大电路，包括载波抵消环路、失真抵消环路和处理器；所述载波抵消环路包括第一调相器；所述失真抵消环路包括第二调相器；
所述处理器用于执行上述的方法，以控制所述第一调相器和/第二调相器。
为了解决上述问题，本申请第五方面提供了一种调相器的控制装置，所述控制装置应用于调相器的抵消电路，抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，对所述输入信号和抵消信号进行信号抵消，得到输出信号；所述控制装置：
获取模块，用于获取所述抵消电路的当前抵消系数，其中，所述当前抵消系数为所述抵消电路的输出信号功率和输入信号功率间的比值；
确定模块，用于确定与所述当前抵消系数匹配的遍历步长；
获得模块，用于获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述遍历步长的多组遍历控制量；
控制模块，用于分别利用所述多组遍历控制量控制所述调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；
选择模块，用于选择所述多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器；
所述获取模块、确定模块、获得模块、控制模块以及选择模块再次重复上述功能，直至所述抵消电路的当前抵消系数低于预设阈值。
上述方案中，利用抵消电路的当前抵消系数确定其遍历步长，从而选择抵消系数的变换量不大于该遍历步长的多组遍历控制量，来依次控制调相器，使得抵消电路得到对应多个遍历抵消系数，进而选出最小遍历抵消系数对应的遍历控制量来控制调相器，通过遍历方式，控制调相器进行多次调幅和/或调相，使抵消电路的抵消系数产生不同的变化，以获得其中最小的抵消系数，并利用产生该抵消系数的控制量控制调相器，此时，抵消电路的抵消系数有所下降，继续重复此方式，使得抵消电路中的抵消系数不断下降，最终达到目标抵消系数，即小于预设阈值的最优抵消系数，故实现抵消系数的收敛。
【附图说明】
图1是本申请前馈功率放大电路一实施例的结构示意图；
图2是本申请调相器的控制方法一实施例的流程示意图；
图3是本申请一应用场景中抵消电路的模型示意图；
图4是本申请一应用场景中抵消电路中的信号抵消示意图；
图5是本申请一应用场景中极坐标系的抵消电路的抵消曲线示意图；
图6是本申请一应用场景中极坐标系的抵消电路的遍历抵消点示意图；
图7是本申请调相器的控制方法另一实施例中步骤S230的流程示意图；
图8是本申请调相器的控制方法再一实施例的流程示意图；
图9是采用本申请控制方法的一应用场景中的收敛过程示意图；
图10是未采用本申请控制方法的前馈线性化测试示意图；
图11是采用本申请控制方法的前馈线性化测试示意图；
图12是调相器的控制装置一实施例的结构示意图；
图13是本申请存储装置一实施例的结构示意图；
图14是本申请抵消电路一实施例的结构示意图
图15是本申请调相器的控制装置另一实施例的结构示意图。
【具体实施方式】
下面结合说明书附图，对本申请实施例的方案进行详细说明。
以下描述中，为了说明而不是为了限定，提出了诸如特定系统结构、接口、技术之类的具体细节，以便透彻理解本申请。
本文中术语“系统”和“网络”在本文中常被可互换使用。本文中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
本申请的相位对其方法可用于任意需要相位对齐的抵消电路中，例如前馈功率放大电路中的抵消电路、零中频的直流校准电路、笛卡尔环电路等。下面，以前馈功率放大器为例进行举例描述。
为便于理解本申请，先对本申请前馈功率放大电路进行说明。
请参阅图1，图1是本申请前馈功率放大电路一实施例的结构示意图。本实施例中，前馈功率放大电路包括载波抵消环路110、失真抵消环路120和处理器130。
其中，载波抵消环路110包括调相器111、功率放大器(即AMP)112和合路器113。载波抵消环路110将输入信号S i分为两路，其中一路输入信号S i作为输入信号经调相器111调幅和/或调相、以及功率放大器112进行功率放大后得到功放混合信号S' i，并输出至合路器113，另一路输入信号S i作为载波抵消信号直接输出至合路器113。功放混合信号S i除包括原来的输入信号S i(即载波信号)外，还包括由于功率放大器112产生的失真信号。由于调相器111将功放混合信号S' i的幅度相位调整为与载波抵消信号S i为或者趋近同幅反相(即，幅度和/或相位比调整前更接近同幅反相)，故合路器113将输入的功放混合信号S' i与载波抵消信号S i进行相加，以将载波信号同幅反相相消，输出失真信号S v。
失真抵消环路120包括调相器121、功率放大器122。载波抵消环路110输出的失真信号S v作为失真抵消信号经调相器121调幅和/或调相、以及功率放大器122进行功率放大后得到失真抵消信号S' v。调相器121将失真抵消信号S' v的幅度相位调整为与功放混合信号S' i为或者趋近同幅反相，故将功放混合信号S' i和失真抵消信号S' v进行相加，以将失真信号同幅反相相消，输出功放后的载波信号S o。
本申请采用前馈功率放大电路实现功放线性化，且该前馈功率放大电路可采用模拟器件实现，快速稳定，可以实时的跟上环境的变化。另外，处理器可利用数模转换器来将数字信号转换为模拟信号并作为调相器的控制量，通过数字信号进行控制，可以实现很高的精度，实现很好的线性化能力，例如可实现15MHz带宽40dB的线性化。
可以理解的是，本申请所述的合路器为任意可实现信号抵消的器件统称。另外，前馈功率放大电路中的载波抵消环路和失真抵消环路也可具体为其他的现有载波抵消环路和失真抵消环路，在此不作限定。
进一步地，由于电路中信号的幅度和/或相位的改变量是由调相器实现的。故为了使前馈功率放大电路的抵消电路可实现最优的抵消效果，本申请的处理器130采用自适应方法对调相器111和121进行控制(如图1所示，向调相器111输入控制信号C 1，向调相器121输入控制信号C 2)，以使经调相器111和121调幅和/或调相后的信号能够与另一路信号为或趋近同幅反相，进而可实现最优的抵消效果。
具体地，处理器130采用下述实施例的方法实现对调相器的控制，进而实现幅度相位对齐。可选地，为实现下述实施例方法，前馈功率放大电路还可包括功率检测器，该功率检测器用于检测载波抵消环路的输入信号功率(即信号S i的功率)和输出信号功率(即信号S v的功率)，以及检测失真载波环路中的输入信号功率(即信号S' i的功率)和输出信号功率(即信号S o的功率)，并将检测到的功率输入至处理器。
本申请所采用的对调相器的控制原理为：通过遍历方式，控制调相器进行多次调幅和/或调相，使抵消电路的抵消系数产生不同的变化，以获得其中最小的抵消系数，并利用产生该抵消系数的控制量控制调相器，此时，抵消电路的抵消系数有所下降，继续重复此方式，使得抵消电路中的抵消系数不断下降，最终达到目标抵消系数(即最优的抵消系数)，故实现抵消系数的收敛。
下面继续通过对方法实施例的详细描述来清楚说明该调相器的控制方法。
请参阅图2，图2是本申请调相器的控制方法一实施例的流程示意图。本实施例中，该方法应用于抵消电路中，其中，该抵消电路包括调相器，抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，将输入信号和抵消信号进行信号抵消，得到输出信号。即，该抵消电路具体可为但不限为图1所示的载波抵消环路和失真抵消环路。
本实施例中，所述方法由调相器的控制装置，具体可如图1所示的处理器执行，或者图12所示的控制装置。所述方法包括以下步骤：
S210：获取抵消电路的当前抵消系数。
为了表征抵消电路的抵消能力，将抵消电路的抵消系数定义为抵消电路的输出信号功率和输入信号功率间的比值，即所述当前抵消系数为所述抵消系数C＝输出信号功率/输入信号功率。
本实施例中，通过获取抵消电路当前的输出信号功率和输入信号功率，将两者的比值作为当前抵消系数。以图1所示的前馈功率放大电路的载波抵消环路为例，接收功率检测器检测的载波抵消环路的输入信号功率和输出信号功率，并将输出信号功率与输入信号功率之间的比值作为当前抵消系数。
为更好分析抵消电路的抵消收敛过程，可建立该抵消电路的模型，如图3所示，其中，在进行信号抵消前的输入信号和抵消信号可表示为两个矢量，即输入信号表示为
Figure PCTCN2018125743-appb-000001
抵消信号表示为
Figure PCTCN2018125743-appb-000002
其中，t表示时间，a表示常数，Α 1和Α 2分别表示该信号的幅度，τ 1和τ 2表示该信号的时延，φ 1和φ 2表示该信号的相位。故其进行抵消的数学关系如同两个矢量相加，即可得到输出的矢量功率，即输出信号S o(t)如图4所示。当输入信号与抵消信号同幅反相时，可以获得最好的抵消效果。根据抵消系数C＝输出信号功率/输入信号功率，可得下公式(1)：
Figure PCTCN2018125743-appb-000003
其中，令输入信号S i(t)与抵消信号S d(t)之间的幅度差异程度表示为ρ＝A 2/A 1，令输入信号S i(t)与抵消信号S d(t)之间的相位差异程度表示为θ＝φ 1-φ 2-180°。
由于时延可通过同轴线或者滤波器进行精确的补偿，所以分析过程中可认为：τ 2＝τ 1。
因此，根据公式(1)，将抵消系数C与幅度差异程度ρ以及相位差异程度θ的关系化简后，得到下面公式(2)：
[ρ cos(θ)-1] 2+ρ 2sin 2(θ)＝C 2  (2)
即，在极坐标表示为(ρ，θ)的极坐标系中，C与ρ，θ满足(1，0)为圆心，C为半径的圆。故，不同抵消系数C在极坐标系的抵消曲线为以(1，0)为圆心的不同半径的圆。例如，对于抵消系数C＝0.1,0.05,0.032,0.018,0.01(即功率抵消为：-20dB,-25dB,-30dB,-35dB,-40dB)的抵消曲线如图5所示。
在获得当前抵消系数C后，只能确定当前抵消点(ρ 0，θ 0)在图5中C为半径的圆上，而不能确定在圆上的具体坐标，其中，ρ 0，θ 0分别表示当前调相器调制后得到的幅度差异程度以及相位差异程度。
故，可通过下述步骤，来选择多个遍历控制量来测试调相器，并通过在调相器不同测试下，对应的抵消系数的值来选择一个遍历控制量来控制调相器，由此以慢慢向目标抵消系数收敛。
S220：确定与当前抵消系数匹配的遍历步长。
在获得当前抵消系数后，根据当前抵消系数的大小选择与之匹配的遍历步长。其中，抵消系数越小，其匹配的遍历步长则越小。在一实施例中，可先预存有分别与不同抵消系数匹配的多个遍历步长，故在得到当前抵消系数后，从预存信息中查找到与其匹配的遍历步长。当然，在另一实施例中，可以即时根据当前抵消系数计算出其匹配的遍历步长。
具体地，可以为不同抵消系数范围配置不同的遍历步长。本S220具体包括：确定所述当前抵消系数属于的预设抵消系数范围，并获取与所述预设抵消系数范围匹配的遍历步长。例如，预先设定抵消系数范围包括：
大于-20dB(转换为数值，即为：大于0.10)；
-20dB至-25dB(即0.10至0.05)；
-25dB至-30dB(即0.05至0.32)；
-30dB至-35dB(即0.32至0.018)；
-35dB至-40dB(即0.018至0.01)；
-40dB至-50dB(即0.01至0)。
可以理解的是，本实施例中，为实现高效且稳定的收敛，可将相邻预设抵消系数范围的最小抵消系数之间的差值设为5dB-10dB，也即预设抵消系数范围为5dB-10dB(上下限的差值)。例如，两个范围中的最小抵消系数分别为-20dB和-25dB，相差5dB。但在其他实施例中，可根据实际情况设置不同的抵消系数范围，且相邻预设抵消系数范围的最小抵消系数之间的差值也不限为5dB-10dB，例如，在对效率要求不高，但要求收敛效果更好的实施例中，可将该差值设置为更小，又或者在对效率要求更好的，但对收敛效果要求不高的实施例中，可将该差值设置为更大。进 一步地，可将包含抵消系数较大的所述预设抵消系数范围设置为宽于抵消系数较小的所述预设抵消系数范围。例如，将抵消系数已经接近最优状态的抵消系数-40dB至-50dB的范围设为10dB，而其他抵消系数范围设置5dB。
在某些实施中，抵消系数较大的预设抵消系数范围分配的遍历步长越大，例如-20dB至-25dB的预设抵消系数范围对应的遍历步长大于-25dB至-30dB的预设抵消系数范围对应的遍历步长。
下面，本实施例结合极坐标举例说明抵消收敛的实现过程。
具体地，请结合参阅图6以对抵消收敛原理进行解释说明，在如图5所示的极坐标系中，当确定抵消电路的当前抵消系数C后，即可确定当前抵消系数C在极坐标系上的抵消曲线，例如当前抵消系数C为0.10，则当前抵消曲线为以0.10为半径的圆，当前抵消点(ρ 0，θ 0)即为在0.10为半径的圆上的点。
继续在极坐标系上，以当前抵消点(ρ 0，θ 0)为圆心，遍历步长r为半径作圆，在其圆上取n个点作为n个遍历抵消点，其中，每个点所在的半径与极坐标的极轴方向之间的夹角为对应的预设遍历角
Figure PCTCN2018125743-appb-000004
该n为大于等于1的整数，本实施例中，n为大于或等于4，例如n为4、8或16等。在n个遍历抵消点中，必然出现相对靠近圆心的点以及相对远离圆心的点，通过控制调相器使得抵消电路得到分别对应n个遍历抵消点的n个抵消系数，比较该n个抵消系数即可找到n个遍历抵消点中最靠近圆心的点。因此，可通过使抵消电路的抵消系数逐步靠近圆心，以实现收敛。
为实现该收敛，且从当前抵消点到可采用下述公式3来确定每个预设抵消系数范围匹配的遍历步长。此时，相当于有两个遍历点与该预设抵消系数范围的最小抵消系数所在的抵消曲线圆相交，即可保证至少有两个遍历点落在该预设抵消系数范围中最小抵消系数的抵消曲线上，此时，也即落在其相邻预设抵消系数范围的最大抵消系数的抵消曲线上。
Figure PCTCN2018125743-appb-000005
其中，r表示遍历步长。C max表示所述预设抵消系数范围中的最大抵消系数，C min表示所述预设抵消系数范围中的最小抵消系数。β表示最大的相邻预设遍历角之差，即在n个预设遍历角
Figure PCTCN2018125743-appb-000006
中比较每组相邻预设遍历角之间的差值，以得到最大差。
在一些实施例中，可在圆上等相位取该遍历点，即，每组相邻遍历角之间的差值一致。以n为8为例，即n个预设遍历角为{0,45°,90°,135°,180°,225°,270°,315°}，故β为任意相邻预设遍历角之间的差值45°。对于-20dB至-25dB的预设抵消系数范围，C max为0.1，C min为0.05。上述公式3即变为：
Figure PCTCN2018125743-appb-000007
利用上面公式，可得到预设抵消系数范围为-20dB至-25dB，其遍历步长为：0.068≥r≥0.06。
同理，可得到：
预设抵消系数范围为-25dB至-30dB，其遍历步长为：0.032≥r≥0.02；
预设抵消系数范围为-30dB至-35dB，其遍历步长为：0.022≥r≥0.0083；
预设抵消系数范围为-35dB至-40dB，其遍历步长为：0.015≥r≥0.0025；
预设抵消系数范围为-40dB至-50dB，其遍历步长为：0.009≥r≥0.001。
经公式3得到的每个预设抵消系数范围对应的遍历步长有多个，此时，可任意选择一个与当前抵消系数对应的遍历步长，或者也可优先选择多个遍历步长中较小的遍历步长。例如对于预设抵消系数范围-20dB至-25dB，可选择0.06至0.063之间的任意值，或者直接取最小值0.06。
可以理解的是，该遍历步长可在获得当前抵消系数后，利用公式3实时计算得到，或者先预先利用上述公式3得到每个抵消系数范围的遍历步长预先保存，在获得当前抵消系数后，从预存信息中获取与当前抵消系数所在的预设抵消系数范围匹配的遍历步长。
S230：获得使抵消电路的抵消系数发生不同变化且抵消系数的变化量不大于遍历步长的多组遍历控制量。
本实施例中，为实现收敛，即实现抵消电路的抵消系数逐步减少，进而最后达到最优，需要使抵消电路的抵消系数发生多个变化，以从中选择抵消系数下降最多的控制量来控制调相器，重复该步骤以使抵消系数逐步下降，直至达到目标状态。
故，根据抵消系数的变化与遍历控制量之间的关系，可获得多组遍历控制量，使得抵消电路的抵消系数发生不同变化，且抵消系数的变化量不大于预设遍历步长，该抵消系数的变化量即在利用该遍历控制量对调相器进行控制前后的抵消系数的变化量。
进一步，本实施例继续结合极坐标举例说明该遍历控制量的获得过程。即，利用该抵消电路的输入信号与抵消电路之间的幅度差异和相位差异与抵消系数在如图6所示极坐标系中的关系，来确定多个遍历抵消点，进而得到对应的遍历控制量。其中，所述极坐标系上的点的极径表示在信号抵消时的所述输入信号与抵消信号间的幅度差异程度ρ，所述极坐标系上的点的极角表示在信号抵消时的所述输入信号与抵消信号间的相位差异程度θ。具体地，结合参阅图7，本S230包括以下子步骤：
S231：获取极坐标系的多个遍历抵消点的信息。
其中，所述多个遍历抵消点为以当前抵消点作为圆心且所述遍历步长为半径的圆上的若干点，所述多个遍历抵消点的信息包括所在圆的半径以及分别用于确定所述多个遍历抵消点在圆上位置的多个预设遍历角。如上例所述，获取n个遍历点抵消点的信息，即获取S220所得到的r以及n个预设遍历角
Figure PCTCN2018125743-appb-000008
如图6所示，n为8，n个预设遍历角为{0,45°,90°,135°,180°,225°,270°,315°}。
S232：根据遍历抵消点的信息与调相器的控制量间的预设关系，获得与所述多个遍历抵消点对应的多组遍历控制量。
具体地，该遍历抵消点的信息与所述调相器的控制量间的预设关系可以由：所述遍历抵消点及所述当前抵消点的极径和极角与所述遍历抵消点的信息之间的第一关系以及所述幅度差异程度ρ和相位差异程度θ与所述调相器的控制量之间的第二关系获得的。
例如，继续参阅图6，每个遍历遍历点(ρ，θ)与当前抵消点(ρ 0，θ 0)之间的第一关系如下公式4：
Figure PCTCN2018125743-appb-000009
同时，调相器与抵消电路的幅度差异程度ρ和相位差异程度θ之间的第二关系可如下分析得到。
本实施例中，调相器的数学模型如图7所示，即该调相器的数学模型可以为k(V I+j*V Q)。k为调相器的参数，该参数为调相器自带的参数。控制装置通通过向调相器输出两个第一控制电压V I和第二控制电压V Q来控制调相器对输入信号的幅度和/相位的变化。该调相器可以为IQ调制器。另外，该第一控制电压V I和第二控制电压V Q可以为直流控制电压，而且，该两个控制电压可通过数模转换器(简称DAC)生成，即控制装置通过数模转换器生成该控制电压，从而将数字的幅度响度变换转换为模拟的直流电压变化，从而可获得较高的精度。其中，该数模转换器的位数越高，可得到越高的精度。在某些实施例中，可采用数模转换器为12位转换器。
因此，可得到幅度差异程度ρ和相位差异程度θ与调相器的控制量之间的第二关系，如下面公式5：
Figure PCTCN2018125743-appb-000010
由公式可得到下面公式6：
Figure PCTCN2018125743-appb-000011
当控制电压变化时，引起的幅度和相位的变化，即从抵消电路的当前抵消点变化到遍历抵消点，需要调相器的控制量满足如下公式7：
Figure PCTCN2018125743-appb-000012
其中，V I1为抵消电路处于遍历抵消点时对调相器的第一控制电压，V I0为抵消电路处于当前抵消点时对调相器的第一控制电压，V Q1为抵消电路处于遍历抵消点时对调相器的第一控制电压，V Q0为抵消电路处于当前抵消点时对调相器的第一控制电压，ΔV I为使抵消电路从当前抵消点变化到遍历抵消点时对调相器的第一控制电压的变化量，ΔV Q为使抵消电路从当前抵消点变化到遍历抵消点时对调相器的第二控制电压的变化量。
因此，结合上面公式4、6和7可得到，每个遍历抵消点对应的控制信号的变换量(ΔV I，ΔV Q)与遍历步长r及该遍历抵消点对应的预设遍历角
Figure PCTCN2018125743-appb-000013
之间的关系式。因此由于每个遍历抵消点的遍历步长r和预设遍历角
Figure PCTCN2018125743-appb-000014
均由步骤S231获得，故利用该关系式，可得到对应每个遍历抵消点的调相器的控制量(ΔV I，ΔV Q)，以作为一组遍历控制量。
在一应用场景中，以预设抵消系数范围-20dB到-25dB为例：
调相器的参数k＝0.316V，n为8，该预设抵消系数范围对应的遍历半径r＝0.062，
Figure PCTCN2018125743-appb-000015
根据每个遍历抵消点对应的控制量(ΔV I，ΔV Q)与遍历步长r及预设遍历角
Figure PCTCN2018125743-appb-000016
之间的关系式，计算出8个遍历抵消点对应的遍历控制量为：
(ΔV I,ΔV Q)＝(+0.196,+0)，(+0.138,+0.138)，(+0,+0.196)，(-0.138,+0.138)，(-0.196,+0)，(-0.138,-0.138)，(+0,-0.196)，(+0.138,-0.138)；
若该控制量由12位的数模转换器生成，即可得到得出数模转换器的4位16进 制控制字如下所示:
(ΔD I，ΔD Q)＝(+0280,+0000),(+01c0,+01c0),(+0000,+0280),(-01c0,+01c0),(-0280,+0000),(-01c0,-01c0),(+0000,-0280),(+01c0,-01c0)。
其中，ΔD I为ΔV I的数字信号，ΔD Q为ΔV Q的数字信号。
S240：分别利用多组遍历控制量控制调相器对输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数。
经S230得到多组遍历控制量(ΔD I，ΔD Q)之后，分别将该多组遍历控制量输入至调相器，以控制调相器来调节输入信号的幅度和/或相位，此时，抵消电路对应每一组遍历控制量产生对应一个遍历抵消系数，该遍历抵消系数即为利用经遍历控制量控制后的调相器调幅和/或调相后的输出信号功率与输入信号功率之间的比值。例如，在上述n为8的实施例中，得到8个遍历抵消系数，该8个遍历抵消系数就是对应图6所示的8个遍历抵消点。
S250：选择多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器。
继续如n＝8的例子中，在利用S240得到8个遍历抵消系数之后，从中选择最小的遍历抵消系数，例如为第3个遍历抵消系数。再次选出与该最小遍历抵消系数对应的遍历控制量第3个遍历控制量，利用该遍历控制量来继续控制该调相器来调相和/或调幅。此时，抵消电路的当前抵消系数即变成该最小遍历抵消系数。
重复上面步骤S210至S250，直至抵消电路的当前抵消系数低于预设阈值。即，重复上面步骤S210，比较该抵消电路的当前抵消系数是否低于预设阈值；若低于，表示此时抵消电路的收敛系数已达预设优化，实现收敛，并结束流程；若不低于，继续执行S220至S250，且继续循环上述步骤直至抵消电路的当前抵消系数低于预设阈值。其中，该预设阈值可以由用户预先设定，或者控制装置根据经验或者用户需求确定的，在一实施例中，该预设阈值为0.001。
为更清楚理解本申请，下面结合图8列举一场景实施例：
在本应用场景中，预先设置多个抵消系数范围，该方法包括以下步骤：
S801：判断当前抵消系数C是否小于-20dB。若否，则执行S802-S803，若是，则执行S804。
S802：确定遍历步长r为0.06，并利用该8个遍历控制量控制调相器。
其中，该8个遍历控制量是利用上述公式4、6和7得到的8个遍历抵消点对应的调相器控制量，该8个遍历抵消点为极坐标系的以当前抵消点作为圆心且遍历步长r为半径的圆上的8个遍历抵消点，且
Figure PCTCN2018125743-appb-000017
S803：从对应8个遍历控制量的8个抵消系数中，选择最小抵消系数对应的遍历控制量控制调相器。并重新执行S801。
此时，抵消电路的当前抵消系数即为该最小抵消系数。
S804：判断当前抵消系数C是否小于-25dB。若否，则执行S805-S806，若是，则执行S807。
S805：确定遍历步长r为0.032，并利用该8个遍历控制量控制调相器。
其中，该8个遍历控制量同理于上述S802，故在此不做赘述。
S806：从对应8个遍历控制量的8个抵消系数中，选择最小抵消系数对应的遍历控制量控制调相器。并重新执行S804。
此时，抵消电路的当前抵消系数即为该最小抵消系数。
S807：判断当前抵消系数C是否小于-30dB。若否，则执行S808-S809，若是，则执行S810。
S808：确定遍历步长r为0.017，并利用该8个遍历控制量控制调相器。
其中，该8个遍历控制量同理于上述S802，故在此不做赘述。
S809：从对应8个遍历控制量的8个抵消系数中，选择最小抵消系数对应的遍历控制量控制调相器。并重新执行S807。
S810：判断当前抵消系数C是否小于-35dB。若否，则执行S811-S812，若是，则执行S813。
S811：确定遍历步长r为0.012，并利用该8个遍历控制量控制调相器。
其中，该8个遍历控制量同理于上述S802，故在此不做赘述。
S812：从对应8个遍历控制量的8个抵消系数中，选择最小抵消系数对应的遍历控制量控制调相器。并重新执行S810。
S813：判断当前抵消系数C是否小于-40dB。若否，则执行S814-S815，若是，则执行S816。
S814：确定遍历步长r为0.004，并利用该8个遍历控制量控制调相器。
其中，该8个遍历控制量同理于上述S802，故在此不做赘述。
S815：从对应8个遍历控制量的8个抵消系数中，选择最小抵消系数对应的遍历控制量控制调相器。并重新执行S813。
S816：判断当前抵消系数C是否小于-50dB。若否，则执行S817-S818，若是，则执行S819。
S817：确定遍历步长r为0.001，并利用该8个遍历控制量控制调相器。
其中，该8个遍历控制量同理于上述S802，故在此不做赘述。
S818：从对应8个遍历控制量的8个抵消系数中，选择最小抵消系数对应的遍历控制量控制调相器。并重新执行S816。
S819：延时预设时间。
在到达该预设时间后，再重复执行S801，以实时监测该调相器的调制，实现长期自适应控制，保证抵消电路的抵消系数的长期稳定优化。
其中，该预设时间可以为但不限为1ms，或者5ms，又或者为10ms。
下面，继续列举另一应用场景对本申请方法进行说明。
本实施例中，初始时，调相器的数字控制量(D I，D Q)为(3a90,3ed0)，抵消系数为-20dB。然后利用上述实施例控制方法来四次控制调相器的状态，其每次控制调相器的数字控制量及其抵消系数如下表1所示。
表1
调相器状态 抵消系数C D I D Q
初始状态 -20dB 0X3a90 0X3ed0
第一次控制 -30dB 0X38d0 0X4090
第二次控制 -38.7dB 0X3830 0X4090
第三次控制 -44.3dB 0X37e0 0X4090
第四次控制 -60dB 0X37a0 0X4060
对应地，经过上述四次对调相器的控制，实现的收敛过程如图9所示的虚线箭头。本应用场景中，通过等相位间隔取点，则必然会出现靠近圆心的点，以及远离圆心的点，通过获取遍历抵消系数可以判断出最靠近圆心的点，从而沿着最快的下降方向进行收敛，逐次逼近圆心，使得收敛过程用时更短。
整个收敛过程，以单片机实验为例，该单片机时钟周期约为10us，整个收敛过程所用时间为4.16ms，大约需要416个时钟周期，整个收敛过程用时非常短。
在再一实施例中，在如图1所示的前馈功率放大电路中，若不采用上述控制方法，对该电路的前馈线性化测试，其输出的频谱如图10所示。若采用上述控制方法，对该电路的前馈线性化测试，其输出的频谱如图11所示。故，可实现15MHz带宽，非线性40dB以上的对消；其中，互调失真(IMD)为-73.8dBc。
请参阅图12，图12是本申请调相器的控制装置一实施例的结构示意图。本实施例中，该控制装置1200应用用于包括调相器的抵消电路(如图1所示的抵消电路)，所述抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，对所述输入信号和抵消信号进行信号抵消，得到输出信号。控制装置1200包括存储器1201、处理器1202。其中，控制装置1200的各个组件可通过总线耦合在一起，或者控制装置1200的处理器分别与其他组件一一连接。
存储器1201用于存储处理器1202执行的程序指令以及处理器1202在处理过程中的数据，其中，该存储器1201包括非易失性存储部分，用于存储上述程序指令。在另一实施例中，该存储器1201可仅作为处理器1202的内存而缓存该处理器1202执行的程序指令，该程序指令实际存储于终端之外设备中，处理器1202通过与外部设备连接，通过调用外部存储的程序指令，以执行相应处理。
处理器1202控制该控制装置1200的操作，处理器1202还可以称为CPU(Central Processing Unit，中央处理单元)。处理器1202可能是一种集成电路芯片，具有信号的处理能力。处理器1202还可以是通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现成可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。该处理器1202可集成有应用处理器和基带处理器，或者仅为应用处理器。
在本实施例中，处理器1202通过调用存储器1201存储的程序指令，用于：获取抵消电路的当前抵消系数，其中，所述当前抵消系数为所述抵消电路的输出信号功率和输入信号功率间的比值；确定与所述当前抵消系数匹配的遍历步长；获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述遍历步长的多组遍历控制量；分别利用所述多组遍历控制量控制所述调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；选择所述多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器；重复上述步骤，直至所述抵消电路的当前抵消系数低于预设阈值。
在某些实施例中，处理器1202执行所述获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述预设遍历步长的多组遍历控制量，包括：获取极坐标系的多个遍历抵消点的信息，其中，所述多个遍历抵消点为以当前抵消点作为圆心且所述遍历步长为半径的圆上的若干点，所述多个遍历抵消点的信息包括所在圆的半径以及分别用于确定所述多个遍历抵消点在圆上位置的多个预设遍历角；根据所述遍历抵消点的信息与所述调相器的控制量间的预设关系，获得与所述多个遍历抵消点对应的多组遍历控制量；其中，所述极坐标系上的点的极径表示在 信号抵消时的所述输入信号与抵消信号间的幅度差异程度ρ，所述极坐标系上的点的极角表示在信号抵消时的所述输入信号与抵消信号间的相位差异程度θ。
进一步地，所述遍历抵消点的个数可以为大于或等于4，相邻两个预设遍历角间的角度差可以为相同。
在某些实施例中，所述遍历抵消点的信息与所述调相器的控制量间的预设关系是由：所述遍历抵消点及所述当前抵消点的极径和极角与所述遍历抵消点的信息之间的第一关系以及所述幅度差异程度ρ和相位差异程度θ与所述调相器的控制量之间的第二关系获得的。
具体地，所述调相器的控制量包括第一控制电压V I的变化量和第二控制电压V Q的变化量；所述第一关系可以包括上述公式4；所述第二关系可以包括上述公式5。
在某些实施例中，处理器1202执行所述确定与所述当前抵消系数匹配的的遍历步长，包括：确定所述当前抵消系数属于的预设抵消系数范围，并获取与所述预设抵消系数范围匹配的遍历步长。
在某些实施例中，处理器1202执行所述获取与所述预设抵消系数范围匹配的遍历步长，包括：根据上述公式3，得到与所述预设抵消系数范围匹配的遍历步长；或者，从预存信息中获取与所述预设抵消系数范围匹配的遍历步长，其中，所述预存的遍历步长是预先利用上述公式3计算并保存的。
在某些实施例中，当与所述预设抵消系数范围匹配的遍历步长有多个时，处理器1202选择所述多个遍历步长中步长值小的遍历步长。
在某些实施例中，相邻所述预设抵消系数范围的最小抵消系数之间的差值为5dB-10dB。而且，包含抵消系数较大的所述预设抵消系数范围可以宽于抵消系数较小的所述预设抵消系数范围。
在另一实施例中，该控制装置1200的处理器1202还用于执行上述任一实施例的方法。
再另一实施例中，该控制装置1200的处理器1202可以为图1所述的处理器。
请参阅图13，本申请还提供一种存储装置的实施例的结构示意图。本实施例中，该存储装置1300存储有处理器可运行的程序指令1301，该程序指令1301用于执行上述实施例中的方法。
该存储装置1301具体可以为U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory，)、磁碟或者光盘等可以存储程序指令的介质，或者也可以为存储有该程序指令的服务器，该服务器可将存储的程序指令发送给其他设备运行，或者也可以自运行该存储的程序指令。
在一实施例中，存储装置1300还可以为如图12所示的存储器1201。
请参阅图14，图14是本申请抵消电路一实施例的结构示意图。本实施例中，抵消电路包括调相器1401、合路器1402和处理器1403，其中，调相器1401的输出端与合路器1402的其中一个输入端连接，处理器1403连接于调相器1401的控制端。
调相器1401用于对合路器1402的其中一路信号进行调幅和/或调相。
合路器1402用于对两路信号进行信号抵消。
处理器1403用于执行上述任一实施例的方法，以控制所述调相器。该处理器1403具体可以为上述任一处理器或者控制装置。
在一些实施例中，该抵消电路具体可以为图如1所述的载波抵消电路或者失真抵消电路。或者，该抵消电路为零中频方案中直流校准时的相位对齐电路，又或者 该抵消电路为笛卡尔环中的相位对齐电路。
请参阅图15，图15是本申请调相器的控制装置另一实施例的结构示意图。本实施例中，该控制装置应用于调相器的抵消电路，抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，对所述输入信号和抵消信号进行信号抵消，得到输出信号。该抵消电路具体如上上述任一抵消电路。
该控制装置包括获取模块1510、确定模块1520、获得模块1530、控制模块1540以及选择模块1550。
获取模块1510用于获取所述抵消电路的当前抵消系数，其中，所述当前抵消系数为所述抵消电路的输出信号功率和输入信号功率间的比值；
确定模块1520用于确定与所述当前抵消系数匹配的遍历步长；
获得模块1530用于获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述遍历步长的多组遍历控制量；
控制模块1540用于分别利用所述多组遍历控制量控制所述调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；
选择模块1550用于选择所述多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器；
获取模块1510、确定模块1520、获得模块1530、控制模块1540以及选择模块1550再次重复上述功能，直至所述抵消电路的当前抵消系数低于预设阈值。
在某些实施例中，获得模块1530包括：
获取单元1531获取极坐标系的多个遍历抵消点的信息，其中，所述多个遍历抵消点为以当前抵消点作为圆心且所述遍历步长为半径的圆上的若干点，所述多个遍历抵消点的信息包括所在圆的半径以及分别用于确定所述多个遍历抵消点在圆上位置的多个预设遍历角；
获得单元1532用于根据所述遍历抵消点的信息与所述调相器的控制量间的预设关系，获得与所述多个遍历抵消点对应的多组遍历控制量；
其中，所述极坐标系上的点的极径表示在信号抵消时的所述输入信号与抵消信号间的幅度差异程度ρ，所述极坐标系上的点的极角表示在信号抵消时的所述输入信号与抵消信号间的相位差异程度θ。
在某些实施例中，所述遍历抵消点的个数大于或等于4，相邻两个预设遍历角间的角度差相同。
在某些实施例中，所述遍历抵消点的信息与所述调相器的控制量间的预设关系是由：所述遍历抵消点及所述当前抵消点的极径和极角与所述遍历抵消点的信息之间的第一关系以及所述幅度差异程度ρ和相位差异程度θ与所述调相器的控制量之间的第二关系获得的。
在某些实施例中，所述调相器的控制量包括第一控制电压V I的变化量和第二控制电压V Q的变化量；所述第一关系可以包括上述公式4；所述第二关系可以包括上述公式5。
在某些实施例中，确定模块1520具体用于：确定所述当前抵消系数属于的预设抵消系数范围，并获取与所述预设抵消系数范围匹配的遍历步长。
在某些实施例中，确定模块1520具体用于：根据上述公式3，得到与所述预设抵消系数范围匹配的遍历步长；或者，从预存信息中获取与所述预设抵消系数范围匹配的遍历步长，其中，所述预存的遍历步长是预先利用上述公式3计算并保存的。
在某些实施例中，当与所述预设抵消系数范围匹配的遍历步长有多个时，选择 所述多个遍历步长中步长值小的遍历步长。
在某些实施例中，相邻所述预设抵消系数范围的最小抵消系数之间的差值为5dB-10dB；其中，包含抵消系数较大的所述预设抵消系数范围宽于抵消系数较小的所述预设抵消系数范围。
上述方案，利用抵消电路的当前抵消系数确定其遍历步长，从而选择抵消系数的变换量不大于该遍历步长的多组遍历控制量，来依次控制调相器，使得抵消电路得到对应多个遍历抵消系数，进而选出最小遍历抵消系数对应的遍历控制量来控制调相器，通过遍历方式，控制调相器进行多次调幅和/或调相，使抵消电路的抵消系数产生不同的变化，以获得其中最小的抵消系数，并利用产生该抵消系数的控制量控制调相器，此时，抵消电路的抵消系数有所下降，继续重复此方式，使得抵消电路中的抵消系数不断下降，最终达到目标抵消系数，即小于预设阈值的最优抵消系数，故实现抵消系数的收敛。
进一步地，本申请的遍历抵消点为以当前抵消点为圆心、遍历步长为半径的圆上的等相位点，故可保证每次控制得到的多个遍历抵消系点中，必然存在相对于当前抵消点靠近圆心的点，故可保证经过每次控制，抵消系数不断收敛，且具有明确的收敛路径，实现快速高效且稳定的收敛，而且由于该方法直接根据抵消电路的实际抵消系数进行相应的自适应控制，能够快速跟随外界环境的变化进行相应的收敛。
另外，在上述控制方法中，其中只有大小比较和加减法，故占用资源少，且速度快。
在本申请所提供的几个实施例中，应该理解到，所揭露的方法和装置，可以通过其它的方式实现。例如，以上所描述的装置实施方式仅仅是示意性的，例如，模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施方式方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(processor)执行本申请各个实施方式方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (20)

  1. 一种调相器的控制方法，其特征在于，所述方法应用于包括调相器的抵消电路，所述抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，对所述输入信号和抵消信号进行信号抵消，得到输出信号，所述方法包括：
    获取所述抵消电路的当前抵消系数，其中，所述当前抵消系数为所述抵消电路的输出信号功率和输入信号功率间的比值；
    确定与所述当前抵消系数匹配的遍历步长；
    获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述遍历步长的多组遍历控制量；
    分别利用所述多组遍历控制量控制所述调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；
    选择所述多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器；
    重复上述步骤，直至所述抵消电路的当前抵消系数低于预设阈值。
  2. 根据权利要求1所述的方法，其特征在于，所述获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述预设遍历步长的多组遍历控制量，包括：
    获取极坐标系的多个遍历抵消点的信息，其中，所述多个遍历抵消点为以当前抵消点作为圆心且所述遍历步长为半径的圆上的若干点，所述多个遍历抵消点的信息包括所在圆的半径以及分别用于确定所述多个遍历抵消点在圆上位置的多个预设遍历角；
    根据所述遍历抵消点的信息与所述调相器的控制量间的预设关系，获得与所述多个遍历抵消点对应的多组遍历控制量；
    其中，所述极坐标系上的点的极径表示在信号抵消时的所述输入信号与抵消信号间的幅度差异程度ρ，所述极坐标系上的点的极角表示在信号抵消时的所述输入信号与抵消信号间的相位差异程度θ。
  3. 根据权利要求2所述的方法，其特征在于，所述遍历抵消点的个数大于或等于4，相邻两个预设遍历角间的角度差相同。
  4. 根据权利要求2所述的方法，其特征在于，所述遍历抵消点的信息与所述调相器的控制量间的预设关系是由：所述遍历抵消点及所述当前抵消点的极径和极角与所述遍历抵消点的信息之间的第一关系以及所述幅度差异程度ρ和相位差异程度θ与所述调相器的控制量之间的第二关系获得的。
  5. 根据权利要求4所述的方法，其特征在于，所述调相器的控制量包括第一控制电压V I的变化量和第二控制电压V Q的变化量；
    所述第一关系包括
    Figure PCTCN2018125743-appb-100001
    所述第二关系包括
    Figure PCTCN2018125743-appb-100002
    其中，k为所述调相器的参数，所述当前抵消点的极坐标为(ρ 0，θ 0)，所述遍历抵消点的的极坐标为(ρ，θ)，r表示所述遍历步长，
    Figure PCTCN2018125743-appb-100003
    表示预设遍历角。
  6. 根据权利要求2所述的方法，其特征在于，所述确定与所述当前抵消系数匹配的的遍历步长，包括：
    确定所述当前抵消系数属于的预设抵消系数范围，并获取与所述预设抵消系数范围匹配的遍历步长。
  7. 根据权利要求6所述的方法，其特征在于，所述获取与所述预设抵消系数范围匹配的遍历步长，包括：
    根据下面公式(1)，得到与所述预设抵消系数范围匹配的遍历步长：
    Figure PCTCN2018125743-appb-100004
    其中，r表示遍历步长，β表示最大的相邻预设遍历角之差，C max表示所述预设抵消系数范围中的最大抵消系数，C min表示所述预设抵消系数范围中的最小抵消系数；或者，
    从预存信息中获取与所述预设抵消系数范围匹配的遍历步长，其中，所述预存的遍历步长是预先利用上述公式(1)计算并保存的。
  8. 根据权利要求7所述的方法，其特征在于，当与所述预设抵消系数范围匹配的遍历步长有多个时，选择所述多个遍历步长中步长值小的遍历步长。
  9. 根据权利要求6所述的方法，其特征在于，相邻所述预设抵消系数范围的最小抵消系数之间的差值为5dB-10dB；
    其中，包含抵消系数较大的所述预设抵消系数范围宽于抵消系数较小的所述预设抵消系数范围。
  10. 一种调相器的控制装置，其特征在于，包括处理器和存储器，其中，所述存储器存储有程序数据，所述处理器用于运行所述存储器存储的程序指令，以执行权利要求1至9任一项所述的方法。
  11. 一种抵消电路，其特征在于，包括调相器、合路器和处理器，其中，所述调相器的输出端与合路器的其中一个输入端连接，所述处理器连接于所述调相器的控制端；
    所述调相器用于对合路器的其中一路信号进行调幅和/或调相；
    所述合路器用于对两路信号进行信号抵消；
    所述处理器用于执行权利要求1至9任一项所述的方法，以控制所述调相器。
  12. 一种前馈功率放大电路，其特征在于，包括载波抵消环路、失真抵消环路和处理器；所述载波抵消环路包括第一调相器；所述失真抵消环路包括第二调相器；
    所述处理器用于执行权利要求1至9任一项所述的方法，以控制所述第一调相器和/第二调相器。
  13. 根据权利要求12所述的前馈功率放大电路，其特征在于，
    所述载波抵消环路还包括第一功率放大器和合路器；所述载波抵消环路将输入信号分为两路，其中一路输入信号经第一调相器进行调幅和/或调相、以及第一功率放大器进行功率放大后作为功放混合信号输入至合路器；所述合路器将功放混合信号与另一路输入信号进行信号抵消，输出失真信号；
    所述失真抵消环路还包括第二功率放大器；所述失真抵消环路将所述失真信号经第二调相器进行调幅和/或调相、以及第二功率放大器进行功率放大后，与所述功放混合信号进行信号抵消，输出载波信号。
  14. 一种调相器的控制装置，其特征在于，所述控制装置应用于调相器的抵消 电路，抵消电路用于通过调相器将输入信号或抵消信号进行调幅和/或调相后，对所述输入信号和抵消信号进行信号抵消，得到输出信号；所述控制装置：
    获取模块，用于获取所述抵消电路的当前抵消系数，其中，所述当前抵消系数为所述抵消电路的输出信号功率和输入信号功率间的比值；
    确定模块，用于确定与所述当前抵消系数匹配的遍历步长；
    获得模块，用于获得使所述抵消电路的抵消系数发生不同变化且所述抵消系数的变化量不大于所述遍历步长的多组遍历控制量；
    控制模块，用于分别利用所述多组遍历控制量控制所述调相器对所述输入信号进行调幅和/或调相，以获得对应的多个遍历抵消系数；
    选择模块，用于选择所述多个遍历抵消系数中的最小遍历抵消系数，并利用与所述最小遍历抵消系数对应的遍历控制量来控制所述调相器；
    所述获取模块、确定模块、获得模块、控制模块以及选择模块再次重复上述功能，直至所述抵消电路的当前抵消系数低于预设阈值。
  15. 根据权利要求14所述的装置，其特征在于，所述获得模块包括：
    获取单元，获取极坐标系的多个遍历抵消点的信息，其中，所述多个遍历抵消点为以当前抵消点作为圆心且所述遍历步长为半径的圆上的若干点，所述多个遍历抵消点的信息包括所在圆的半径以及分别用于确定所述多个遍历抵消点在圆上位置的多个预设遍历角；
    获得单元，用于根据所述遍历抵消点的信息与所述调相器的控制量间的预设关系，获得与所述多个遍历抵消点对应的多组遍历控制量；
    其中，所述极坐标系上的点的极径表示在信号抵消时的所述输入信号与抵消信号间的幅度差异程度ρ，所述极坐标系上的点的极角表示在信号抵消时的所述输入信号与抵消信号间的相位差异程度θ。
  16. 根据权利要求15所述的装置，其特征在于，所述遍历抵消点的个数大于或等于4，相邻两个预设遍历角间的角度差相同；
    所述遍历抵消点的信息与所述调相器的控制量间的预设关系是由：所述遍历抵消点及所述当前抵消点的极径和极角与所述遍历抵消点的信息之间的第一关系以及所述幅度差异程度ρ和相位差异程度θ与所述调相器的控制量之间的第二关系获得的。
  17. 根据权利要求16所述的装置，其特征在于，所述调相器的控制量包括第一控制电压V I的变化量和第二控制电压V Q的变化量；
    所述第一关系包括
    Figure PCTCN2018125743-appb-100005
    所述第二关系包括
    Figure PCTCN2018125743-appb-100006
    其中，k为所述调相器的参数，所述当前抵消点的极坐标为(ρ 0，θ 0)，所述遍历抵消点的的极坐标为(ρ，θ)，r表示所述遍历步长，
    Figure PCTCN2018125743-appb-100007
    表示预设遍历角。
  18. 根据权利要求15所述的装置，其特征在于，所述确定模块具体用于：确定所述当前抵消系数属于的预设抵消系数范围，并获取与所述预设抵消系数范围匹配的遍历步长。
  19. 根据权利要求18所述的装置，其特征在于，所述确定模块具体用于：
    根据下面公式(1)，得到与所述预设抵消系数范围匹配的遍历步长：
    Figure PCTCN2018125743-appb-100008
    其中，r表示遍历步长，β表示最大的相邻预设遍历角之差，C max表示所述预设抵消系数范围中的最大抵消系数，C min表示所述预设抵消系数范围中的最小抵消系数；或者，
    从预存信息中获取与所述预设抵消系数范围匹配的遍历步长，其中，所述预存的遍历步长是预先利用上述公式(1)计算并保存的。
  20. 根据权利要求18所述的装置，其特征在于，相邻所述预设抵消系数范围的最小抵消系数之间的差值为5dB-10dB；其中，包含抵消系数较大的所述预设抵消系数范围宽于抵消系数较小的所述预设抵消系数范围。
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