WO2020132779A1 - 光学传感器结构及其形成方法、光学传感器电路 - Google Patents

光学传感器结构及其形成方法、光学传感器电路 Download PDF

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Publication number
WO2020132779A1
WO2020132779A1 PCT/CN2018/122984 CN2018122984W WO2020132779A1 WO 2020132779 A1 WO2020132779 A1 WO 2020132779A1 CN 2018122984 W CN2018122984 W CN 2018122984W WO 2020132779 A1 WO2020132779 A1 WO 2020132779A1
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photosensitive
layer
conductive layer
photosensitive pixel
insulating layer
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PCT/CN2018/122984
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English (en)
French (fr)
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凌严
朱虹
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上海箩箕技术有限公司
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Priority to PCT/CN2018/122984 priority Critical patent/WO2020132779A1/zh
Publication of WO2020132779A1 publication Critical patent/WO2020132779A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F18/00—Pattern recognition

Definitions

  • the invention relates to the field of sensors, in particular to an optical sensor structure and a method for forming the same, and an optical sensor circuit.
  • the optical sensor is a large-area planar imaging device composed of a pixel cell array, drive lines, signal readout lines, and so on.
  • the optical signal with image information is directly projected to each pixel unit of the imaging surface of the sensor, which is absorbed and imaged by the pixel unit of the sensor. Since the light is not focused through the lens or fiber, it is the same size, without scaling, so it will have better imaging quality; at the same time, the imaging device is also thinner and lighter, so it has been widely used in various fields.
  • optical sensors used in fingerprint imaging, document scanning and other fields.
  • Each pixel unit is composed of a switching device and a photoelectric device. Visible light is converted into electronic signals by photoelectric devices in each pixel unit of the optical sensor and stored.
  • the system controller controls the driving chip on the driving unit to control the driving line on the optical sensor, and then controls the row-by-row opening of the pixel unit array; at the same time, the system controller controls the signal reading unit on the signal acquisition unit to pass through the optical sensor
  • the signal line is used to read the electronic signal of the row that is turned on in the pixel cell array, and then to perform amplification, analog-to-digital conversion, and storage. Finally, a digital grayscale image directly related to the surface characteristics of the illuminated object is realized.
  • the problem solved by the present invention is to provide an optical sensor structure and a method for forming the same, and an optical sensor circuit to improve the performance of the optical sensor.
  • the present invention provides an optical sensor, including: a substrate; a fingerprint sensing circuit layer on the substrate, the fingerprint sensing circuit layer including: a plurality of photosensitive pixel units; and a side of the plurality of photosensitive pixel units
  • Non-photosensitive pixel unit of the part the photosensitive pixel unit includes: a photosensitive diode; a first switching device electrically connected to the photosensitive diode; the non-photosensitive pixel unit includes: a capacitor; a second switch electrically connected to the capacitor Device.
  • the substrate includes a photosensitive area and a non-photosensitive area, a plurality of photosensitive pixel units are located on the photosensitive area, and a non-photosensitive pixel unit is located on the non-photosensitive area;
  • the photosensitive area includes an effective photosensitive area and a first switch Area, the photosensitive diode is located on the effective photosensitive area, and the first switching device is located on the first switching area;
  • the non-photosensitive area includes an effective non-photosensitive area and a second switching area, and the capacitor is located on the effective non-photosensitive area, and the second switch The device is located on the second switch area;
  • the photosensitive pixel unit includes: a first conductive layer located on the surface of the first switch area of the substrate; a first insulation located on the surface of the effective photosensitive area and the surface of the first switch area and covering the first conductive layer Layer; a first semiconductor layer on the surface of the first insulating layer part of the first switching region, and the first semiconductor layer is opposite to the first conductive layer on the first switching region;
  • the third insulating layer has a third opening on the photodiode.
  • the bottom surface of the third opening is the surface of the photodiode;
  • the non-photosensitive pixel unit includes: a third conductive layer on a part of the surface of the second switch area of the substrate; and a second switch on the surface of the effective non-photosensitive area
  • a fourth insulating layer on the surface of the region and covering the third conductive layer; a second semiconductor layer on the surface of the fourth insulating layer of the second switching region, and the second semiconductor layer is opposite to the third conductive layer on the second switching region;
  • a fourth conductive layer covering the second semiconductor layer, the fourth conductive layer has a fourth opening, the bottom surface of the fourth opening is the surface of the second semiconductor layer, and the fourth conductive layer also extends to the fourth of the effective non-photosensitive region
  • the insulating structure layer is a laminated structure; the insulating structure layer includes: a fifth insulating layer covering the fourth conductive layer and filling the fourth opening; a sixth insulating layer covering the fifth insulating layer; The second transparent conductive layer covers the sixth insulating layer.
  • the insulating structure layer is a single-layer structure.
  • the photosensitive pixel unit further includes: a first additional capacitor connected to the photosensitive diode; the non-photosensitive pixel unit further includes a second additional capacitor connected to the capacitor.
  • the first conductive layer is also located on part of the surface of the effective photosensitive area of the substrate, and the first conductive layer on the first switching area and the first conductive layer on the effective photosensitive area are separated from each other; the first on the effective photosensitive area
  • the conductive layer is located on the bottom of the photodiode;
  • the third conductive layer is also located on the surface of the effective non-photosensitive region of the substrate, and the third conductive layer on the effective non-photosensitive region of the substrate and the third conductive layer on the second switching region of the substrate Separated from each other; on the effective non-photosensitive area of the substrate, the third conductive layer is located at the bottom of the fourth conductive layer.
  • both the first transparent conductive layer and the second transparent conductive layer are connected to a first common potential; the first conductive layer on the effective photosensitive area and the third conductive layer on the effective non-photosensitive area are connected to the first Two common potentials; the second common potential is equal to or different from the first common potential.
  • the method further includes: a first light blocking layer located on the third insulating layer of the first switching area, and the first light blocking layer is located on the first opening; a first light blocking layer located on the sixth insulating layer of the second switching area Two light blocking layers, and the second light blocking layer is located on the fourth opening.
  • the first light blocking layer is located on the first transparent conductive layer
  • the second light blocking layer is located on the second transparent conductive layer.
  • the first light blocking layer is located at the bottom of the first transparent conductive layer
  • the second light blocking layer is located at the bottom of the second transparent conductive layer.
  • the plurality of photosensitive pixel units are arranged in several columns; the non-photosensitive pixel units are arranged in one column or several columns; the column direction of the non-photosensitive pixel units is parallel to the column direction of the plurality of photosensitive pixel units.
  • the several photosensitive pixel units are arranged in several rows; the non-photosensitive pixel units are in one row or several rows, and the row direction of the non-photosensitive pixel units is parallel to the row direction of several photosensitive pixel units.
  • the non-photosensitive pixel unit is located on one side of the plurality of photosensitive pixel units; or, the non-photosensitive pixel unit is located on both sides of the plurality of photosensitive pixel units, respectively.
  • the invention also provides a method for forming an optical sensor structure, comprising: providing a substrate; forming a fingerprint sensing circuit layer on the substrate, and the method for forming the fingerprint sensing circuit layer includes: forming a number of photosensitive pixel units; and forming non-photosensitive pixels Unit, the non-photosensitive pixel unit is located at the side of the plurality of photosensitive pixel units; the method of forming the photosensitive pixel unit includes: forming a photosensitive diode; forming a first switching device, the first switching device is electrically connected to the photosensitive diode; The method of forming the non-photosensitive pixel unit includes: forming a capacitor; forming a second switching device, the second switching device being electrically connected to the capacitor.
  • the substrate includes a photosensitive area and a non-photosensitive area, a plurality of photosensitive pixel units are located on the photosensitive area, and a non-photosensitive pixel unit is located on the non-photosensitive area;
  • the photosensitive area includes an effective photosensitive area and a first switch Area, the photosensitive diode is located on the effective photosensitive area, and the first switching device is located on the first switching area;
  • the non-photosensitive area includes an effective non-photosensitive area and a second switching area, and the capacitor is located on the effective non-photosensitive area, and the second switch The device is located on the second switching area.
  • the method for forming the photosensitive pixel unit and the non-photosensitive pixel unit includes: forming a first conductive layer on a part of the surface of the first switching region of the substrate; during the process of forming the first conductive layer, the substrate A third conductive layer is formed on a part of the surface of the second switching area; a first insulating layer covering the first conductive layer is formed on the surface of the effective photosensitive area and the surface of the first switching area; in the process of forming the first insulating layer, the effective non-photosensitive A fourth insulating layer covering the third conductive layer is formed on the surface of the area and the surface of the second switching area; a first semiconductor layer is formed on the surface of the first insulating layer of the first switching area, and the first semiconductor layer is opposite to the first conductive layer; During the formation of the first semiconductor layer, a second semiconductor layer is formed on the surface of the fourth insulating layer of the second switching region, and the second semiconductor layer is opposite to the third conductive layer; a second conductive layer covering
  • the insulating structure layer includes: a fifth insulating layer and a sixth insulating layer; in the process of forming the second insulating layer, a fifth insulating layer covering the fourth conductive layer and filling the fourth opening is formed; During the formation of the third insulating layer, a sixth insulating layer covering the fifth insulating layer is formed.
  • the insulating structure layer is a single-layer structure; in the process of forming the second insulating layer, the insulating structure layer is formed; or, in the process of forming the third insulating layer, the insulating structure layer is formed.
  • the first conductive layer is also located on part of the surface of the effective photosensitive area of the substrate, and the first conductive layer on the first switching area and the first conductive layer on the effective photosensitive area are separated from each other; the first on the effective photosensitive area
  • the conductive layer is located on the bottom of the photodiode;
  • the third conductive layer is also located on the surface of the effective non-photosensitive region of the substrate, and the third conductive layer on the effective non-photosensitive region of the substrate and the third conductive layer on the second switching region of the substrate Separated from each other; on the effective non-photosensitive area of the substrate, the third conductive layer is located at the bottom of the fourth conductive layer.
  • the present invention also provides an optical sensor circuit, including: a plurality of photosensitive pixel units, the photosensitive pixel unit including: a photosensitive diode; a first switching device electrically connected to the photosensitive diode; and located on the side of the plurality of photosensitive pixel units A non-photosensitive pixel unit.
  • the non-photosensitive pixel unit includes: a capacitor; and a second switching device electrically connected to the capacitor.
  • the first switching device is a first transistor
  • the second switching device is a second transistor
  • the positive electrode of the photodiode is connected to the first common potential;
  • the first transistor has a first source and drain, and the first source drain is connected to the negative electrode of the photodiode;
  • the capacitor has a terminal opposite to the first capacitor And the second capacitor terminal, the first capacitor terminal is connected to the first common potential;
  • the second transistor has a third source and drain, and the third source drain is connected to the second capacitor terminal.
  • the photosensitive pixel unit further includes: a first additional capacitor, the first additional capacitor has opposite third and fourth capacitor terminals, the third capacitor terminal is connected to the negative electrode of the photodiode, and the third capacitor terminal and The first source and drain share the negative electrode of the photodiode, the fourth capacitor terminal is connected to the second common potential; the second additional capacitor, the second additional capacitor has opposite fifth capacitor terminal and sixth capacitor terminal, the fifth capacitor terminal and the second The capacitor terminal is connected, the fifth capacitor terminal and the third source-drain terminal share the second capacitor terminal, and the sixth capacitor terminal is connected to the second common potential; the second common potential is equal to or different from the first common potential.
  • the plurality of photosensitive pixel units are arranged in several columns; the non-photosensitive pixel units are arranged in one column or several columns; the column direction of the non-photosensitive pixel units is parallel to the column direction of the plurality of photosensitive pixel units.
  • the several photosensitive pixel units are arranged in several rows; the non-photosensitive pixel units are in one row or several rows, and the row direction of the non-photosensitive pixel units is parallel to the row direction of several photosensitive pixel units.
  • the non-photosensitive pixel unit is located on one side of the plurality of photosensitive pixel units; or, the non-photosensitive pixel unit is located on both sides of the plurality of photosensitive pixel units, respectively.
  • the non-photosensitive pixel unit when light is irradiated to the photosensitive pixel unit, the non-photosensitive pixel unit is used to collect real-time electronic noise of the optical sensor, and the signal value output by each photosensitive pixel unit is reduced by part or all of the non-photosensitive The pixel unit outputs the average value of the background signal value to eliminate most of the electronic noise of the image and improve the image effect. Since the non-photosensitive pixel unit includes a capacitor and a second switching device, the capacitor collects information on power supply fluctuations or interference of external electromagnetic waves on the structure of the optical sensor.
  • FIG. 1 is a schematic structural diagram of an optical sensor structure in an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of the photosensitive pixel unit and the non-photosensitive pixel unit in FIG. 1;
  • FIG. 3 is a cross-sectional view along the cutting line A-a in FIG. 2;
  • FIG. 5 is a schematic diagram of an optical sensor circuit in still another embodiment of the present invention.
  • FIG. 6 is a schematic diagram of a photosensitive pixel unit and a non-photosensitive pixel unit in another embodiment of the invention.
  • FIG. 7 is a cross-sectional view along B-b in FIG. 6;
  • FIG. 8 is a schematic diagram of an optical sensor circuit in another embodiment of the invention.
  • An optical sensor structure includes: a substrate; a fingerprint sensing circuit layer on the substrate, the fingerprint sensing circuit layer including: a plurality of photosensitive pixel units; a non-photosensitive pixel unit located on a side of the plurality of photosensitive pixel units;
  • the photosensitive pixel unit includes: a first photosensitive diode; a first switching device electrically connected to the first photosensitive diode;
  • the non-photosensitive pixel unit includes: a second photosensitive diode; electrically connected to the second photosensitive diode A second switching device; a light blocking layer covering the second photodiode.
  • the non-photosensitive pixel unit is used to collect real-time electronic noise of the optical sensor.
  • the signal value output by each photosensitive pixel unit is subtracted from the average value of part or all of the background signal value output by the non-photosensitive pixel unit to eliminate most of the electronic noise of the image , Improve the image effect.
  • a structure of a second photodiode plus a light blocking layer is used to collect real-time electronic noise of the optical sensor.
  • the substrate is a PI substrate or a glass substrate
  • the substrate transmits light. Therefore, light around the optical sensor structure is irradiated into the substrate. After being reflected or scattered at the bottom of the substrate, it enters the second photodiode, causing the second photodiode to partially receive light.
  • the signal output by the non-photosensitive pixel unit will include a part of the optical signal, and this part of the optical signal is an interference optical signal.
  • Each non-photosensitive pixel contains interference light signals and electronic noise signals, and the interference light signals and electronic noise cannot be separated.
  • Each pixel unit (each photosensitive pixel unit and each non-photosensitive pixel unit) receives the interference light signal, and the intensity of the interference light signal of each pixel unit is very different and random.
  • the second photodiode itself will have dark current
  • the signal output by the non-photosensitive pixel unit will include the dark current signal of the second photodiode, and each pixel unit (each photosensitive pixel unit and each non-photosensitive pixel unit) is dark
  • the current size is also very different, with randomness.
  • the signal of the non-photosensitive pixel unit includes the above-mentioned interference light signal and dark current signal
  • the signal of the non-photosensitive pixel unit is subtracted from the signal of the non-photosensitive pixel unit, and then the random interference light signal
  • the dark current signal is introduced into the final image signal. Therefore, while reducing electronic noise, interference light signals and dark current signals are introduced. Finally, it will cause the noise of the final image to become larger, making the image worse.
  • the present invention provides an optical sensor structure, including: a substrate; a fingerprint sensing circuit layer on the substrate, the fingerprint sensing circuit layer includes: a plurality of photosensitive pixel units; A non-photosensitive pixel unit on the side; the photosensitive pixel unit includes: a photosensitive diode; a first switching device electrically connected to the photosensitive diode; the non-photosensitive pixel unit includes: a capacitor; a second electrically connected to the capacitor Switching device.
  • the performance of the optical sensor structure is improved.
  • An embodiment of the present invention provides an optical sensor structure. Please refer to FIG. 1, FIG. 2 and FIG. 3 in combination, including:
  • a fingerprint sensing circuit layer 110 on the substrate 100 includes: a plurality of photosensitive pixel units 110a; a non-photosensitive pixel unit 110b located on a side of the plurality of photosensitive pixel units 110a;
  • the photosensitive pixel unit 110a includes: a photosensitive diode 120; a first switching device 130 electrically connected to the photosensitive diode 120;
  • the non-photosensitive pixel unit 110b includes: a capacitor 140; and a second switching device 150 electrically connected to the capacitor 140.
  • the substrate 100 is a PI substrate or a glass substrate.
  • the substrate 100 includes a photosensitive area S1 and a non-photosensitive area S2, a plurality of photosensitive pixel units 110a are located on the photosensitive area S1, and a non-photosensitive pixel unit 110b is located on the non-photosensitive area S2.
  • the optical sensor structure further includes: a first data line connected to each column of photosensitive pixel units a1; and a second data line connected to each column of non-photosensitive pixel units a2.
  • the only difference between the non-photosensitive pixel unit 110b and the photosensitive pixel unit 110a is that the non-photosensitive pixel unit 110b is not photosensitive, and the photosensitive pixel unit 110a is photosensitive.
  • the plurality of photosensitive pixel units 110a are arranged in several columns; the non-photosensitive pixel units 110b are arranged in one column or several columns; the column direction of the non-photosensitive pixel units 110b is parallel to the column direction of the plurality of photosensitive pixel units 110a .
  • the second data line is connected to the non-photosensitive pixel unit 110b. Since the non-photosensitive pixel unit 110b is not photosensitive, the output value of the second data line is suitable to be maintained at a background signal value. During image acquisition, the electronic noise generated by power supply fluctuations or interference of external electromagnetic waves on the structure of the optical sensor will be included in this background signal value, and the interference of the non-photosensitive pixel unit 110b and the photosensitive pixel unit 110a is synchronized The size is basically the same. Therefore, when no light is incident on the optical sensor, the signal value output by the first data line and the signal value output by the second data line are substantially the same.
  • the second data line is used to collect real-time electronic noise of the optical sensor.
  • the signal value output by each first data line is subtracted from the average value of part or all of the signal value output by the second data line to eliminate most of the line noise of the image (electronic noise changes with time), which improves Image effects.
  • the plurality of photosensitive pixel units are arranged in several rows; the non-photosensitive pixel units are in one row or several rows, and the row direction of the non-photosensitive pixel units is parallel to the row direction of the plurality of photosensitive pixel units, the The non-photosensitive pixel unit is used to eliminate fixed column differences (the electronic signal offset does not change with time). There is a fixed difference in electronic signals between different columns, and this difference does not change with time.
  • the non-photosensitive pixel unit since the non-photosensitive pixel unit includes a capacitor and a second switching device, the capacitor collects interference information of power fluctuations or external electromagnetic waves on the structure of the optical sensor, thus avoiding the structure of using a photodiode and a light blocking layer covering the photodiode To collect information about power supply fluctuations or interference from external electromagnetic waves on the structure of the optical sensor. Therefore, the capacitor can avoid the situation of dark current and light leakage, making the information output by the non-photosensitive structures more consistent, so as to avoid introducing other interference in electronic noise. For example, the light signal and the dark current signal of the non-photosensitive pixel unit, to avoid introducing the dark current signal that interferes with the light signal and the non-photosensitive pixel while reducing electronic noise.
  • the non-photosensitive pixel units 110b are respectively located on both sides of the plurality of photosensitive pixel units 110a. In other embodiments, the non-photosensitive pixel units are located on one side of the plurality of photosensitive pixel units.
  • non-photosensitive pixel units 110b are respectively located on both sides of the plurality of photosensitive pixel units 110a, which means that the non-photosensitive pixel units 110b are located on both sides of the entirety of the plurality of photosensitive pixel units 110a;
  • the non-photosensitive pixel unit is located on one side of the plurality of photosensitive pixel units, which means that the non-photosensitive pixel unit is located on the entire side of the plurality of photosensitive pixel units 110a.
  • the photosensitive region S1 includes an effective photosensitive region S11 and a first switching region S12, the photodiode 120 is located on the effective photosensitive region S11, and the first switching device 130 is located on the first switching region S12.
  • the non-photosensitive area S2 includes an effective non-photosensitive area S21 and a second switching area S22, the capacitor 140 is located on the effective non-photosensitive area S21, and the second switching device 150 is located on the second switching area S22.
  • the first switching device 130 is a transistor, such as an amorphous silicon thin film transistor (amorphous Silicon Thin Film Transistor, a-Si TFT), a low temperature polysilicon thin film transistor (Low Temperature PolyPolysilicon Thin Film Transistor, LTPS TFT), or an oxide semiconductor thin film transistor (Oxide Semiconductor Thin Film Transistor, OTFT).
  • amorphous Silicon Thin Film Transistor amorphous Silicon Thin Film Transistor, a-Si TFT
  • a low temperature polysilicon thin film transistor Low Temperature PolyPolysilicon Thin Film Transistor, LTPS TFT
  • oxide semiconductor thin film transistor Oxide Semiconductor Thin Film Transistor
  • the second switching device 150 is a transistor, such as an amorphous silicon thin-film transistor (amorphous Silicon Thin Film Transistor, a-Si TFT), a low-temperature polysilicon thin-film transistor (Low Temperature Temperature Poly-Silicon Thin Film Transistor, LTPS TFT), or an oxide semiconductor thin film transistor (Oxide Semiconductor Thin Film Transistor, OTFT).
  • amorphous Silicon Thin Film Transistor amorphous Silicon Thin Film Transistor, a-Si TFT
  • a low-temperature polysilicon thin-film transistor Low Temperature Temperature Poly-Silicon Thin Film Transistor, LTPS TFT
  • oxide semiconductor thin film transistor Oxide Semiconductor Thin Film Transistor
  • the first switching device 130 is an amorphous silicon thin film transistor
  • the second switching device 150 is an amorphous silicon thin film transistor as an example for description.
  • the photosensitive pixel unit 110a includes: a first conductive layer 210 on a portion of the surface of the first switching region S12 of the substrate 100; a first insulating layer on the surface of the effective photosensitive region S11 and the surface of the first switching region S12 and covering the first conductive layer 210 220; a first semiconductor layer 230 located on a part of the surface of the first insulating layer 220 of the first switching region S12, and the first semiconductor layer 230 is opposite to the first conductive layer 210 on the first switching region S12; covering the first semiconductor layer 230 Second conductive layer 240, the second conductive layer 240 has a first opening, the bottom surface of the first opening is the surface of the first semiconductor layer 230, and the second conductive layer 240 also extends to the first photosensitive area S11 A surface of an insulating layer 220; a second insulating layer 250 covering the second conductive layer 240 and filling the first opening; a second opening in the second insulating layer 250 of the effective photosensitive region S11, the
  • the non-photosensitive pixel unit 110b includes: a third conductive layer 211 on the surface of the second switching region S22 of the substrate 100; a fourth on the surface of the effective non-photosensitive region S21 and the surface of the second switching region S22 and covering the third conductive layer 211 An insulating layer 221; a second semiconductor layer 231 located on a part of the surface of the fourth insulating layer 221 of the second switching region S22, and the second semiconductor layer 231 is opposite to the third conductive layer 211 on the second switching region S22; covering the second semiconductor
  • the fourth conductive layer 241 of the layer 231 has a fourth opening therein, the bottom surface of the fourth opening is the surface of the second semiconductor layer 231, and the fourth conductive layer 241 also extends to the effective non-photosensitive area S21
  • the insulating structure layer is a laminated structure; the insulating structure layer includes: a fifth insulating layer 251 covering the fourth conductive layer 241 and filling the fourth opening; a sixth insulating layer covering the fifth insulating layer 251 261.
  • the second transparent conductive layer 271 covers the sixth insulating layer 261.
  • the insulating structure layer is a single-layer structure.
  • the first switching device 130 includes: the first conductive layer 210 on the first switching region S12, the first semiconductor layer 230, and the second conductive layer 240 on the first switching region S12.
  • the second switching device 150 includes the third conductive layer 211 on the second switching region S22, the second semiconductor layer 231, and the fourth conductive layer 241 on the second switching region S22.
  • the capacitor includes: a fourth conductive layer 241 on the effective non-photosensitive area S21, an insulating structure layer on the effective non-photosensitive area S21, and a second transparent conductive layer 271 on the effective non-photosensitive area S21.
  • the fourth conductive layer 241 on the effective non-photosensitive area S21 serves as one conductive electrode plate of the capacitor
  • the second transparent conductive layer 271 on the effective non-photosensitive area S21 serves as another conductive electrode plate of the capacitor
  • the insulating structure layer on S21 serves as a capacitor dielectric layer of the capacitor.
  • the insulating structure layer includes a fifth insulating layer 251 and a sixth insulating layer 261.
  • the fifth insulating layer 251 on the effective non-photosensitive area S21 and the sixth insulating layer 261 on the effective non-photosensitive area S21 As the capacitor dielectric layer of the capacitor, since the capacitor dielectric layer of the capacitor has a two-layer structure, the probability of defects in the capacitor dielectric layer of the capacitor is reduced, so the probability of leakage of the capacitor dielectric layer is reduced, and the stability of the capacitor sexual improvement.
  • the materials of the first conductive layer 210, the second conductive layer 240, the third conductive layer 211, and the fourth conductive layer 241 may be aluminum, molybdenum, or aluminum-neodymium alloy, or may be other alloy metals or multi-layer structures of different materials .
  • the first conductive layer 210 on the first switching region S12 serves as the gate of the first switching device 130, and the second conductive layers 240 on both sides of the first semiconductor layer 230 on the first switching region S12 are the source of the first switching device 130 Pole and drain.
  • the third conductive layer 211 on the second switching region S22 serves as the gate of the second switching device 150, and the fourth conductive layer 241 on both sides of the second semiconductor layer 231 on the second switching region S22 is the source of the second switching device 150 Pole and drain.
  • the material of the first semiconductor layer 230 is amorphous silicon, low temperature polysilicon, or oxide semiconductor.
  • the material of the second semiconductor layer 231 is amorphous silicon, low temperature polysilicon, or oxide semiconductor.
  • the material of the first insulating layer 220, the second insulating layer 250, the third insulating layer 260, the fourth insulating layer 221, the fifth insulating layer 251 and the sixth insulating layer 261 may be silicon nitride (SiNx) or silicon oxide (SiOx).
  • the materials of the first transparent conductive layer 270 and the second transparent conductive layer 271 include indium tin oxide (ITO).
  • the first semiconductor layer 230 at the bottom of the first opening serves as a channel of the first switching device 130
  • the second semiconductor layer 231 at the bottom of the fourth opening serves as a channel of the second switching device 150.
  • the photodiode 120 has a PIN structure. Specifically, the photodiode 120 includes an n-type layer, an i-type layer on the n-type layer, and a p-type layer on the i-type layer. The n-type layer is in contact with the second conductive layer 240 on the effective photosensitive region S11.
  • the n-type layer is located on the side wall surface and the bottom surface of the second opening, and the n-type layer also extends to a part of the top surface of the second insulating layer 250 around the second opening; the i-type layer Located in and on the second opening, the i-type layer also extends to a portion of the second insulating layer 250 around the second opening, the i-type layer is located on the upper surface of the n-type layer; The p-type layer is located on the upper surface of the i-type layer.
  • the first transparent conductive layer 270 and the second transparent conductive layer 271 are both connected to a first common potential.
  • the gate of the first switching device 130 and the gate of the second switching device 150 are connected to the scan driving line.
  • the first conductive layer 210 and the third conductive layer 211 can also serve as scan driving lines.
  • the second conductive layer 240 may also serve as the first data line
  • the fourth conductive layer 241 may also serve as the second data line.
  • the second conductive layer 240 on one side of the first semiconductor layer 230 is the source of the first switching device 130 and the second on the other side of the first semiconductor layer 230
  • the conductive layer 240 is the drain of the first switching device 130.
  • the drain of the first switching device 130 is connected to the photodiode 120.
  • the source of the first switching device is connected to the photodiode.
  • the source of the first switching device 130 when the drain of the first switching device 130 is connected to the photodiode 120, the source of the first switching device 130 is connected to the first data line. In other embodiments, the source of the first switching device is connected to the photodiode, and the drain of the first switching device is connected to the first data line.
  • the fourth conductive layer 241 on the side of the second semiconductor layer 231 is the source of the second switching device 150, and is located on the second semiconductor layer 231.
  • the fourth conductive layer 241 on one side is the drain of the second switching device 150.
  • the drain of the second switching device 150 is connected to the capacitor.
  • the source of the first switching device is connected to the capacitor.
  • the source of the second switching device 150 when the drain of the second switching device 150 is connected to the capacitor, the source of the second switching device 150 is connected to the second data line. In other embodiments, the source of the second switching device is connected to the capacitor, and the drain of the second switching device is connected to the second data line.
  • the optical sensor structure further includes: a first light blocking layer 280 located on the third insulating layer 260 of the first switching area S12, and the first light blocking layer 280 is located on the first opening;
  • the second light blocking layer 281 on the sixth insulating layer 261 of the switching area S22 is located on the fourth opening.
  • the first light blocking layer 280 is located on the first transparent conductive layer 270, and the second light blocking layer 281 is located on the second transparent conductive layer 271. In other embodiments, the first light blocking layer is located at the bottom of the first transparent conductive layer, and the second light blocking layer is located at the bottom of the second transparent conductive layer.
  • the first light-blocking layer 280 and the second light-blocking layer 281 are made of an opaque conductive material, which may be aluminum, molybdenum, or aluminum-neodymium alloy (AlNd), other alloy metals, or many different materials. Layer structure.
  • This embodiment also provides a method for forming an optical sensor structure. Referring to FIG. 4, the method includes the following steps:
  • S02 forming a fingerprint sensing circuit layer on the substrate, and the method for forming the fingerprint sensing circuit layer includes: forming a plurality of photosensitive pixel units;
  • the method for forming the photosensitive pixel unit includes: forming a photosensitive diode; forming a first switching device, the first switching device is electrically connected to the photosensitive diode; the method for forming the non-photosensitive pixel unit includes: forming a capacitor; and forming a second A switching device, the second switching device is electrically connected to the capacitor.
  • the substrate includes a photosensitive area and a non-photosensitive area, a plurality of photosensitive pixel units are located on the photosensitive area, and a non-photosensitive pixel unit is located on the non-photosensitive area;
  • the photosensitive area includes an effective photosensitive area and a first switching area, and a photosensitive diode Located on the effective photosensitive area, the first switching device is located on the first switching area;
  • the non-photosensitive area includes an effective non-photosensitive area and a second switching area, the capacitor is located on the effective non-photosensitive area, and the second switching device is located on the second On the switch zone.
  • the method for forming the photosensitive pixel unit and the non-photosensitive pixel unit includes: forming a first conductive layer on a part of the surface of the first switching region of the substrate; during the process of forming the first conductive layer, in the second switching region of the substrate A third conductive layer is formed on part of the surface; a first insulating layer covering the first conductive layer is formed on the surface of the effective photosensitive region and the surface of the first switching region; in the process of forming the first insulating layer, the surface of the effective non-photosensitive region and the first A fourth insulating layer covering the third conductive layer is formed on the surface of the two switching regions; a first semiconductor layer is formed on the surface of the first insulating layer of the first switching region, and the first semiconductor layer is opposite to the first conductive layer; In the process of the semiconductor layer, a second semiconductor layer is formed on the surface of the fourth insulating layer of the second switching region, and the second semiconductor layer is opposite to the third conductive layer; forming a second conductive layer covering the first
  • the insulating structure layer includes: a fifth insulating layer and a sixth insulating layer.
  • a fifth insulating layer covering the fourth conductive layer and filling the fourth opening is formed; in the process of forming the third insulating layer, a sixth covering the fifth insulating layer is formed Insulation.
  • the insulating structure layer is a single-layer structure, correspondingly, the insulating structure layer is formed during the process of forming the second insulating layer; or, the insulating structure layer is formed during the process of forming the third insulating layer .
  • the method further includes: forming a first light blocking layer 280 on the third insulating layer 260 of the first switching region S12, and the first light blocking layer 280 is located on the first opening; and forming the first light blocking layer 280 During the process, a second light blocking layer 281 is formed on the sixth insulating layer 261 of the second switching region S22, and the second light blocking layer 281 is located on the fourth opening.
  • the first transparent conductive layer 270 and the second transparent conductive layer 271 are formed.
  • the first light blocking layer 280 and the second light blocking layer 281 are formed.
  • the first transparent conductive layer 270 and the second transparent conductive layer 271 are formed.
  • the size of the capacitor is 0.1pF-10pF.
  • the total thickness of the fifth insulating layer 251 on the effective non-photosensitive area S21 and the sixth insulating layer 261 on the effective non-photosensitive area S21 is 0.2 um to 10 um.
  • the thickness of the fifth insulating layer 251 on the effective non-photosensitive area S21 is 0.1 um to 5 um, and the thickness of the sixth insulating layer 261 on the effective non-photosensitive area S21 is 0.1 um to 5 um.
  • the insulating structure layer on the effective non-photosensitive area S21 is used as the capacitor dielectric layer of the capacitor.
  • the fifth insulating layer 251 and the sixth insulating layer 261 on the effective non-photosensitive area S21 are superimposed to form the capacitive dielectric medium of the capacitor Floor.
  • the fifth insulating layer 251 and the second insulating layer 250 are simultaneously formed, and the sixth insulating layer 261 and the third insulating layer 260 are simultaneously formed.
  • the size of the capacitor is 0.1 pF to 10 pF.
  • the capacitance value is greater than or equal to 0.1 times the capacitance value of the equivalent capacitance of the photodiode 120, and The capacitance of the capacitor is less than or equal to 5 times the capacitance of the equivalent capacitance of the photodiode 120.
  • the electrical characteristics of the photosensitive pixel unit and the non-photosensitive pixel unit are relatively close, and the electronic noise of the signal collected by the non-photosensitive pixel unit is It is closer to the actual electronic noise of the photosensitive pixel unit, so the effect of noise cancellation is better.
  • FIG. 5 it includes: a plurality of photosensitive pixel units 300, and the photosensitive pixel unit 300 includes: a photosensitive diode 301; and a first switching device electrically connected to the photosensitive diode 301 302; a non-photosensitive pixel unit 400 located on the side of the plurality of photosensitive pixel units 300.
  • the non-photosensitive pixel unit 400 includes: a capacitor 401; and a second switching device 402 electrically connected to the capacitor 401.
  • the first switching device 302 is a first transistor
  • the second switching device 402 is a second transistor
  • the anode of the photodiode 301 is connected to the first common potential; the first transistor has a first source drain and a second source drain, and the first source drain is connected to the cathode of the photodiode 301.
  • the first source drain is the source of the first transistor, and the second source drain is the drain of the first transistor; in another embodiment, the first source drain is the drain of the first transistor, The second source drain is the source of the first transistor.
  • the capacitor 401 has opposite to the first capacitor end and the second capacitor end, the first capacitor end is connected to the first common potential; the second transistor has a third source drain and a fourth source drain, the third source drain is connected to the first Two capacitor terminals are connected.
  • the third source and drain are the source of the second transistor, and the fourth source and drain are the drain of the second transistor; in another embodiment, the third source and drain are the drain of the second transistor, The four-source drain is the source of the second transistor.
  • the plurality of photosensitive pixel units 300 are arranged in several columns; the non-photosensitive pixel units 400 are in one column or several columns; the column direction of the non-photosensitive pixel units 400 is parallel to the column direction of the plurality of photosensitive pixel units 300 .
  • the optical sensor circuit further includes: a plurality of columns of first data lines 310, and one or more columns of second data lines 410.
  • the second source and drain are connected to the first data line 310, and the fourth source and drain are connected to the second data line 410.
  • the gate of the first transistor and the gate of the second transistor are connected to the scan drive line W. Specifically, in the same row, both the gate of the first transistor and the gate of the second transistor are connected to the scan driving line W of the same row.
  • the several photosensitive pixel units are arranged in several rows; the non-photosensitive pixel units are in one row or several rows, and the row direction of the non-photosensitive pixel units is parallel to the row direction of several photosensitive pixel units.
  • the non-photosensitive pixel units 400 are respectively located on both sides of the plurality of photosensitive pixel units 300. In other embodiments, the non-photosensitive pixel unit is located on one side of the plurality of photosensitive pixel units.
  • non-photosensitive pixel units 400 are respectively located on both sides of the plurality of photosensitive pixel units 300, which means that the non-photosensitive pixel units 400 are located on both sides of the entirety of the plurality of photosensitive pixel units 300;
  • the non-photosensitive pixel unit is located on one side of the plurality of photosensitive pixel units, which means that the non-photosensitive pixel unit is located on one side of the entirety of the plurality of photosensitive pixel units.
  • Another embodiment of the present invention also provides an optical sensor structure.
  • the photosensitive pixel unit further includes: a first additional capacitor connected to the photosensitive diode;
  • the non-photosensitive pixel unit further includes: a second additional capacitor connected to the capacitor.
  • FIG. 6 is a schematic diagram based on FIG. 2
  • FIG. 7 is a schematic diagram based on FIG. 3.
  • the first conductive layer 210 is also located on the surface of the effective photosensitive area S11 of the substrate 100, and The first conductive layer 210 on a switching area S12 and the first conductive layer 210 on the effective photosensitive area S11 are separated from each other; the first conductive layer 210 on the effective photosensitive area S11 is located at the bottom of the photosensitive diode 120.
  • the first conductive layer 210 on the effective photosensitive region S11 is covered by the first insulating layer 220 on the effective photosensitive region S11.
  • the third conductive layer 211 is also located on a part of the surface of the effective non-photosensitive area S21 of the substrate 100, and the third conductive layer 211 on the effective non-photosensitive area S21 of the substrate 100 and the second switching area S22 of the substrate 100
  • the third conductive layers 211 on the top are separated from each other; on the effective non-photosensitive area S21 of the substrate 100, the third conductive layer 211 is located at the bottom of the fourth conductive layer 241.
  • the third conductive layer 211 on the effective non-photosensitive area S21 is covered by the fourth insulating layer 221 on the effective non-photosensitive area S21.
  • the first additional capacitor includes: a first conductive layer 210 on the effective photosensitive region S11, a first insulating layer 220 on the effective photosensitive region S11, and a second conductive layer 240 on the effective photosensitive region S11.
  • the first conductive layer 210 on the effective photosensitive region serves as one conductive electrode plate of the first additional capacitance
  • the second conductive layer 240 on the effective photosensitive region S11 serves as another conductive electrode plate of the first additional capacitance, effectively receiving light
  • the first insulating layer 220 on the region S11 serves as a capacitor dielectric layer of the first additional capacitor.
  • the second additional capacitor includes: a third conductive layer 211 on the effective non-photosensitive area S21, a fourth insulating layer 221 on the effective non-photosensitive area S21, and a fourth conductive layer 241 on the effective non-photosensitive area S21.
  • the third conductive layer 211 on the effective non-photosensitive area S21 serves as one conductive electrode plate of the second additional capacitance
  • the fourth conductive layer 241 on the effective non-photosensitive area S21 serves as another conductive electrode plate of the second additional capacitance
  • the fourth insulating layer 221 on the effective non-photosensitive area S21 serves as a capacitor dielectric layer of the second additional capacitor.
  • the size of the first additional capacitor is 0.1 pF to 10 pF, and the size of the second additional capacitor is 0.1 pF to 10 pF.
  • the thickness of the first insulating layer 220 on the effective photosensitive region S11 is 0.1 um to 1 um, and the thickness of the fourth insulating layer 221 on the effective non-photosensitive region S21 is 0.1 um to 1 um.
  • the first transparent conductive layer 270 and the second transparent conductive layer 271 are both connected to a first common potential.
  • the first conductive layer 400 on the effective photosensitive area S11 and the third conductive layer 211 of the effective non-photosensitive area S21 are both connected to the second common potential.
  • the second common potential is equal to or different from the first common potential.
  • the function of the first additional capacitor includes: the first additional capacitor and the photodiode jointly store the photo-generated charge generated by the photodiode, so that the storage capacity is increased.
  • the function of the second additional capacitor includes: on the premise of simplifying the manufacturing process as much as possible, the total capacitance of the second additional capacitor and the capacitor in the non-photosensitive pixel unit is as close as possible to the equivalent capacitance of the first additional capacitor and the photosensitive diode in the photosensitive pixel unit.
  • the total capacitance of the second additional capacitor and capacitor is greater than or equal to 0.1 times the total capacitance of the first additional capacitor and the equivalent capacitance of the photodiode, and the total capacitance of the second additional capacitor and capacitor is less than or equal to the first 5 times the total capacitance of the additional capacitance and the equivalent capacitance of the photodiode.
  • the electrical characteristics of the photosensitive pixel unit and the non-photosensitive pixel unit are relatively close.
  • the electronic noise of the signal collected by the non-photosensitive pixel unit is closer to the actual electronic noise of the photosensitive pixel unit, so the effect of noise cancellation is better.
  • the first additional capacitor is connected in parallel with the photodiode 120, and the second additional capacitor is connected in parallel with the capacitor.
  • This embodiment also provides a method for forming an optical sensor structure.
  • the difference between the method in this embodiment and the method in the previous embodiment is that a first additional capacitor and a second additional capacitor are also formed.
  • a first conductive layer is also formed on the surface of the effective photosensitive area of the substrate, and the first conductive layer on the first switching area and the first conductive layer on the effective photosensitive area are separated from each other; after the formation of the photodiode, the effective photosensitive area
  • the first conductive layer on the bottom is located at the bottom of the photodiode;
  • a third conductive layer is also formed on the surface of the effective non-photosensitive area of the substrate, and the third conductive layer on the effective non-photosensitive area of the substrate and the third on the second switching area of the substrate
  • the three conductive layers are separated from each other; after the fourth conductive layer is formed, the third conductive layer is located at the bottom of the fourth conductive layer on the effective non-photosensitive area of the substrate.
  • FIG. 8 is a schematic diagram based on FIG. 5.
  • the difference between this embodiment and the previous implementation circuit is that: the photosensitive pixel
  • the unit further includes: a first additional capacitor 303, the first additional capacitor 303 has opposite third and fourth capacitor terminals, the third capacitor terminal is connected to the negative electrode of the photodiode 301, and the third capacitor terminal and the first source and drain The negative electrode of the photodiode 301 is shared, and the fourth capacitor terminal is connected to the second common potential;
  • the second additional capacitor 403, the second additional capacitor 403 has opposite fifth and sixth capacitor terminals, the fifth and second capacitor terminals Connected, the fifth capacitor terminal and the third source-drain terminal share the second capacitor terminal, and the sixth capacitor terminal is connected to the second common potential.
  • the second common potential is equal to or different from the first common potential.
  • the first additional capacitor 303 is connected in parallel with the photodiode 301, and the second additional capacitor 403 is connected in parallel with the capacitor 401.

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Abstract

一种光学传感器结构及其形成方法、光学传感器电路，其中光学传感器结构包括：基板；位于基板上的指纹感测电路层，所述指纹感测电路层包括：若干感光像素单元；位于所述若干感光像素单元的侧部的非感光像素单元；所述感光像素单元包括：感光二极管；与感光二极管电性连接的第一开关器件；所述非感光像素单元包括：电容；与所述电容电性连接的第二开关器件。所述光学传感器结构的性能得到提高。

Description

光学传感器结构及其形成方法、光学传感器电路 技术领域
本发明涉及传感器领域，尤其涉及一种光学传感器结构及其形成方法、光学传感器电路。
背景技术
光学传感器是一种大面积的平面成像设备，由像素单元阵列、驱动线、信号读出线等构成。带有图像信息的光信号直接投射到传感器成像表面的各个像素单元，被传感器的像素单元吸收而成像。由于不经过透镜或光纤聚焦光，是同尺寸、无缩放比例的成像，因而会有更好的成像质量；同时成像设备也更加轻薄，所以已经大量应用于各个领域。
比如应用于指纹成像、文件扫描等领域的光学传感器。各像素单元由开关器件和光电器件构成。可见光被光学传感器的各像素单元中的光电器件转化为电子信号存储起来。系统控制器控制驱动单元上的驱动芯片，来控制光学传感器上的驱动线，进而控制像素单元阵列的逐行开启；同时系统控制器控制信号采集单元上的信号读出芯片，通过光学传感器上的信号线来读取像素单元阵列中被开启的那一行的电子信号，然后进行放大、模数转化、存储。最终实现一个与被照射物体表面特征直接相关的数字化灰阶图像。
然而，现有的光学传感器的性能有待提高。
发明内容
本发明解决的问题是提供一种光学传感器结构及其形成方法、光学传感器电路，以提高光学传感器的性能。
为解决上述问题，本发明提供一种光学传感器，包括：基板；位 于基板上的指纹感测电路层，所述指纹感测电路层包括：若干感光像素单元；位于所述若干感光像素单元的侧部的非感光像素单元；所述感光像素单元包括：感光二极管；与感光二极管电性连接的第一开关器件；所述非感光像素单元包括：电容；与所述电容电性连接的第二开关器件。
可选的，所述基板包括感光区和非感光区，若干感光像素单元位于所述感光区上，非感光像素单元位于所述非感光区上；所述感光区包括有效感光区和第一开关区，感光二极管位于有效感光区上，第一开关器件位于第一开关区上；所述非感光区包括有效非感光区和第二开关区，所述电容位于有效非感光区上，第二开关器件位于第二开关区上；所述感光像素单元包括：位于基板第一开关区部分表面的第一导电层；位于有效感光区表面和第一开关区表面且覆盖第一导电层的第一绝缘层；位于第一开关区的第一绝缘层部分表面的第一半导体层，且第一半导体层与第一开关区上的第一导电层相对；覆盖第一半导体层的第二导电层，所述第二导电层内具有第一开口，第一开口的底部表面为第一半导体层的表面，且第二导电层还延伸至有效感光区的第一绝缘层表面；覆盖第二导电层且填充满第一开口的第二绝缘层；位于有效感光区的第二绝缘层内的第二开口，第二开口的底部为第二导电层的表面；填充在第二开口中且覆盖在第二开口上的感光二极管，感光二极管还延伸至第二绝缘层的部分顶部表面，感光二极管的底部表面与第二导电层接触；第三绝缘层，第三绝缘层覆盖所述感光二极管的部分顶部表面、第二绝缘层上感光二极管的侧壁以及第二绝缘层，第三绝缘层中具有位于感光二极管上的第三开口，第三开口的底部表面为感光二极管的表面；位于第三开口的内壁、以及第一开关区的第三绝缘层上的第一透明导电层；所述非感光像素单元包括：位于基板第二开关区部分表面的第三导电层；位于有效非感光区表面和第二开关区表面且覆盖第三导电层的第四绝缘层；位于第二开关区的第四绝缘层部分表面的第二半导体层，且第二半导体层与第二开关区上的第三导电层相对；覆盖第二半导体层的第四导电层，第四导电 层内具有第四开口，第四开口的底部表面为第二半导体层的表面，且第四导电层还延伸至有效非感光区的第四绝缘层表面；覆盖第四导电层且填充满第四开口的绝缘结构层覆盖绝缘结构层的第二透明导电层。
可选的，所述绝缘结构层为叠层结构；所述绝缘结构层包括：覆盖第四导电层且填充满第四开口的第五绝缘层；覆盖第五绝缘层的第六绝缘层；所述第二透明导电层覆盖第六绝缘层。
可选的，所述绝缘结构层为单层结构。
可选的，所述感光像素单元还包括：第一附加电容，第一附加电容与感光二极管连接；所述非感光像素单元还包括：第二附加电容，第二附加电容与所述电容连接。
可选的，所述第一导电层还位于基板有效感光区部分表面，且第一开关区上的第一导电层和有效感光区上的第一导电层相互分立；有效感光区上的第一导电层位于所述感光二极管的底部；所述第三导电层还位于基板有效非感光区部分表面，且基板有效非感光区上的第三导电层和基板第二开关区上的第三导电层相互分立；在基板有效非感光区上，第三导电层位于第四导电层的底部。
可选的，所述第一透明导电层和第二透明导电层均连接至第一公共电位；所述有效感光区上的第一导电层和有效非感光区的第三导电层均连接至第二公共电位；第二公共电位与第一公共电位相等或不等。
可选的，还包括：位于第一开关区的第三绝缘层上的第一挡光层，且第一挡光层位于第一开口上；位于第二开关区的第六绝缘层上的第二挡光层，且第二挡光层位于第四开口上。
可选的，所述第一挡光层位于第一透明导电层上，且第二挡光层位于第二透明导电层上。
可选的，所述第一挡光层位于第一透明导电层的底部，且第二挡 光层位于第二透明导电层底部。
可选的，所述若干感光像素单元排列成若干列；所述非感光像素单元呈一列或若干列；所述非感光像素单元的列方向与若干感光像素单元的列方向平行。
可选的，所述若干感光像素单元排列成若干行；所述非感光像素单元呈一行或若干行，所述非感光像素单元的行方向与若干感光像素单元的行方向平行。
可选的，所述非感光像素单元位于所述若干感光像素单元的一侧；或者，所述非感光像素单元分别位于所述若干感光像素单元的两侧。
本发明还提供一种光学传感器结构的形成方法，包括：提供基板；在所述基板上形成指纹感测电路层，形成指纹感测电路层的方法包括：形成若干感光像素单元；形成非感光像素单元，所述非感光像素单元位于所述若干感光像素单元的侧部；形成所述感光像素单元的方法包括：形成感光二极管；形成第一开关器件，第一开关器件与感光二极管电性连接；形成所述非感光像素单元的方法包括：形成电容；形成第二开关器件，第二开关器件与所述电容电性连接。
可选的，所述基板包括感光区和非感光区，若干感光像素单元位于所述感光区上，非感光像素单元位于所述非感光区上；所述感光区包括有效感光区和第一开关区，感光二极管位于有效感光区上，第一开关器件位于第一开关区上；所述非感光区包括有效非感光区和第二开关区，所述电容位于有效非感光区上，第二开关器件位于第二开关区上。
可选的，形成所述感光像素单元和非感光像素单元的方法包括：在所述基板第一开关区的部分表面形成第一导电层；在形成第一导电层的过程中，在所述基板第二开关区的部分表面形成第三导电层；在有效感光区表面和第一开关区表面形成覆盖第一导电层的第一绝缘 层；在形成第一绝缘层的过程中，在有效非感光区表面和第二开关区表面形成覆盖第三导电层的第四绝缘层；在第一开关区的第一绝缘层部分表面形成第一半导体层，且第一半导体层与第一导电层相对；在形成第一半导体层的过程中，在第二开关区的第四绝缘层部分表面形成第二半导体层，且第二半导体层与第三导电层相对；形成覆盖第一半导体层的第二导电层，所述第二导电层内具有第一开口，第一开口的底部表面为第一半导体层的表面，且第二导电层还延伸至有效感光区的第一绝缘层表面；在形成第二导电层的过程中，形成覆盖第二半导体层的第四导电层，第四导电层内具有第四开口，第四开口的底部表面为第二半导体层的表面，且第四导电层还延伸至有效非感光区的第四绝缘层表面；形成覆盖第二导电层且填充满第一开口的第二绝缘层；在有效感光区的第二绝缘层内形成第二开口，第二开口的底部为第二导电层的表面；形成填充满第二开口且覆盖在第二开口上的感光二极管，感光二极管还延伸至第二绝缘层的部分顶部表面，感光二极管的底部表面与第二导电层接触；形成覆盖所述感光二极管的部分顶部表面、第二绝缘层上感光二极管的侧壁以及第二绝缘层的第三绝缘层，第三绝缘层中具有第三开口，第三开口的底部表面为感光二极管的表面；在形成第二绝缘层和第三绝缘层的过程中，形成覆盖第四导电层且填充满第四开口的绝缘结构层；在第三开口的内壁、以及第一开关区的第三绝缘层上形成第一透明导电层；在形成第一透明导电层的过程中，形成覆盖绝缘结构层的第二透明导电层。
可选的，所述绝缘结构层包括：第五绝缘层和第六绝缘层；在形成第二绝缘层的过程中，形成覆盖第四导电层且填充满第四开口的第五绝缘层；在形成第三绝缘层的过程中，形成覆盖第五绝缘层的第六绝缘层。
可选的，所述绝缘结构层为单层结构；在形成第二绝缘层的过程中，形成绝缘结构层；或者，在形成第三绝缘层的过程中，形成绝缘结构层。
可选的，所述第一导电层还位于基板有效感光区部分表面，且第一开关区上的第一导电层和有效感光区上的第一导电层相互分立；有效感光区上的第一导电层位于所述感光二极管的底部；所述第三导电层还位于基板有效非感光区部分表面，且基板有效非感光区上的第三导电层和基板第二开关区上的第三导电层相互分立；在基板有效非感光区上，第三导电层位于第四导电层的底部。
本发明还提供一种光学传感器电路，包括：若干感光像素单元，所述感光像素单元包括：感光二极管；与感光二极管电性连接的第一开关器件；位于所述若干感光像素单元的侧部的非感光像素单元，所述非感光像素单元包括：电容；与所述电容电性连接的第二开关器件。
可选的，所述第一开关器件为第一晶体管，所述第二开关器件为第二晶体管。
可选的，所述感光二极管的正极连接第一公共电位；所述第一晶体管具有第一源漏极，第一源漏极连接所述感光二极管的负极；所述电容具有相对第一电容端和第二电容端，第一电容端与第一公共电位连接；第二晶体管具有第三源漏极，第三源漏极与第二电容端连接。
可选的，所述感光像素单元还包括：第一附加电容，第一附加电容具有相对的第三电容端和第四电容端，第三电容端和感光二极管的负极连接，第三电容端和第一源漏极共用感光二极管的负极，第四电容端连接第二公共电位；第二附加电容，第二附加电容具有相对的第五电容端和第六电容端，第五电容端与第二电容端连接，第五电容端和第三源漏极共用第二电容端，第六电容端连接第二公共电位；第二公共电位与第一公共电位相等或不等。
可选的，所述若干感光像素单元排列成若干列；所述非感光像素单元呈一列或若干列；所述非感光像素单元的列方向与若干感光像素单元的列方向平行。
可选的，所述若干感光像素单元排列成若干行；所述非感光像素 单元呈一行或若干行，所述非感光像素单元的行方向与若干感光像素单元的行方向平行。
可选的，所述非感光像素单元位于所述若干感光像素单元的一侧；或者，所述非感光像素单元分别位于所述若干感光像素单元的两侧。
与现有技术相比，本发明的技术方案具有以下优点：
本发明技术方案提供的光学传感器结构中，在光线照射至感光像素单元时，非感光像素单元用于收集光学传感器的实时电子噪音，各感光像素单元输出的信号值分别减去部分或全部非感光像素单元输出本底信号值的平均值，以消除图像的绝大部分电子噪音，提高了图像效果。由于非感光像素单元包括电容和第二开关器件，由电容来收集电源波动或外界电磁波对光学传感器结构的干扰信息，这样避免使用光电二极管加遮盖光电二极管的挡光层的结构来收集电源波动或外界电磁波对光学传感器结构的干扰信息，因此所述电容能够避免引起暗电流和和漏光的情况，使得各非感光结构输出的信息较为一致，这样使得电子噪音消除的效果更好，避免电子噪音中引入其他干扰，比如非感光像素单元的光信号和暗电流信号。综上提高了光学传感器结构的性能。
附图说明
图1是本发明一实施例中光学传感器结构的结构示意图；
图2为图1中感光像素单元和非感光像素单元的示意图；
图3为沿图2中切割线A-a的剖面图；
图4为本发明另一实施例中光学传感器结构形成过程的流程图；
图5是本发明又一实施例中光学传感器电路的示意图；
图6是本发明另一实施例中感光像素单元和非感光像素单元的示意图；
图7是沿图6中B-b的剖面图；
图8是本发明另一实施例中光学传感器电路的示意图。
具体实施方式
正如背景技术所述，现有技术的光学传感器结构的性能较差。
一种光学传感器结构，包括：基板；位于基板上的指纹感测电路层，所述指纹感测电路层包括：若干感光像素单元；位于所述若干感光像素单元的侧部的非感光像素单元；所述感光像素单元包括：第一感光二极管；与第一感光二极管电性连接的第一开关器件；所述非感光像素单元包括：第二感光二极管；与所述第二感光二极管电性连接的第二开关器件；遮盖第二感光二极管的挡光层。
非感光像素单元用于收集光学传感器的实时电子噪音，各感光像素单元输出的信号值分别减去部分或全部非感光像素单元输出本底信号值的平均值，以消除图像的绝大部分电子噪音，提高了图像效果。
所述非感光像素单元中，采用第二感光二极管加挡光层的结构来收集光学传感器的实时电子噪音。首先，受到工艺波动的影响，挡光层的位置和第二感光二极管的位置会发生偏移，那么挡光层就不能很好的遮盖第二感光二极管，导致第二感光二极管部分感光，其次，由于基板为PI基板或玻璃基板时，基板透光，因此，光学传感器结构周围的光线照射至基板中，在基板的底部反射或散射后，进入第二感光二极管，导致第二感光二极管部分感光。由于第二感光二极管部分感光，那么非感光像素单元输出的信号中就会包含部分光信号，而这部分光信号属于干扰光信号。各非感光像素就包含干扰光信号和电子噪音信号，而且干扰光信号和电子噪音无法分离。各像素单元(各感光像素单元和各非感光像素单元)都会接受到干扰光信号，而且各像素单元的干扰光信号强度很不同，且具有随机性。
另外，第二感光二极管本身会存在暗电流，那么非感光像素单元输出的信号中就会包含第二感光二极管的暗电流信号，各像素单元 (各感光像素单元和各非感光像素单元)中暗电流大小也很不同，具有随机性。
基于上述内容，如果非感光像素单元的信号包含了上述干扰光信号和暗电流信号，那么将感光像素单元的信号减去非感光像素单元的信号后，就会将上述具有随机性的干扰光信号和暗电流信号引入到最终的图像信号中。因此，在减小电子噪音的同时会引入干扰光信号和暗电流信号。最后，会导致最终图像的噪音反而变大，使得图像效果更差。
在此基础上，本发明提供一种光学传感器结构，包括：基板；位于基板上的指纹感测电路层，所述指纹感测电路层包括：若干感光像素单元；位于所述若干感光像素单元的侧部的非感光像素单元；所述感光像素单元包括：感光二极管；与感光二极管电性连接的第一开关器件；所述非感光像素单元包括：电容；与所述电容电性连接的第二开关器件。所述光学传感器结构的性能得到提高。
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细的说明。
本发明实施例提供一种光学传感器结构，请结合参考图1、图2和图3，包括：
基板100；
位于基板100上的指纹感测电路层110，所述指纹感测电路层110包括：若干感光像素单元110a；位于所述若干感光像素单元110a的侧部的非感光像素单元110b；
所述感光像素单元110a包括：感光二极管120；与感光二极管120电性连接的第一开关器件130；
所述非感光像素单元110b包括：电容140；与所述电容140电性连接的第二开关器件150。
所述基板100为PI基板或玻璃基板。
所述基板100包括感光区S1和非感光区S2，若干感光像素单元110a位于所述感光区S1上，非感光像素单元110b位于所述非感光区S2上。
所述光学传感器结构还包括：与各列感光像素单元a1连接的第一数据线；与各列非感光像素单元a2连接的第二数据线。
非感光像素单元110b与感光像素单元110a的唯一差别是：非感光像素单元110b没有感光性，感光像素单元110a具有感光性。
本实施例中，所述若干感光像素单元110a排列成若干列；所述非感光像素单元110b呈一列或若干列；所述非感光像素单元110b的列方向与若干感光像素单元110a的列方向平行。
本实施例中，第二数据线与非感光像素单元110b连接，由于非感光像素单元110b没有感光性，因此第二数据线的输出值适于保持在一个本底信号值。在图像采集时，电源波动或外界电磁波对光学传感器结构的干扰而产生的电子噪声就会被包含在这个本底信号值中，而且非感光像素单元110b和感光像素单元110a所受干扰是同步的，大小也是基本一致的。因此在光学传感器没有光入射时，第一数据线输出的信号值和第二数据线输出的信号值基本一致。在光线照射至感光像素单元110a时，第二数据线用于收集光学传感器的实时电子噪音。每一行中，各第一数据线输出的信号值分别减去部分或全部第二数据线输出的信号值的平均值，以消除图像的绝大部分行噪声(电子噪音随时间变化)，提高了图像效果。
在其他实施例中，所述若干感光像素单元排列成若干行；所述非感光像素单元呈一行或若干行，所述非感光像素单元的行方向与若干感光像素单元的行方向平行，所述非感光像素单元用于消除固定的列差异(电子信号偏移量不随时间变化)。不同列之间存在一个固定的电子信号的差异，而且这个差异不随时间变化。
本实施例中，由于非感光像素单元包括电容和第二开关器件，由电容来收集电源波动或外界电磁波对光学传感器结构的干扰信息，这样避免使用光电二极管加遮盖光电二极管的挡光层的结构来收集电源波动或外界电磁波对光学传感器结构的干扰信息，因此所述电容能够避免引起暗电流和和漏光的情况，使得各非感光结构输出的信息较为一致，这样避免电子噪音中引入其他干扰，比如非感光像素单元的光信号和暗电流信号，避免在减小电子噪音的同时会引入干扰光信号和非感光像素的暗电流信号。
本实施例中，所述非感光像素单元110b分别位于所述若干感光像素单元110a的两侧，在其他实施例中，所述非感光像素单元位于所述若干感光像素单元的一侧。
需要说明的是，所述非感光像素单元110b分别位于所述若干感光像素单元110a的两侧，指的是：所述非感光像素单元110b位于所述若干感光像素单元110a整体的两侧；所述非感光像素单元位于所述若干感光像素单元的一侧，指的是：所述非感光像素单元位于所述若干感光像素单元110a整体的一侧。
需要说明的是，在相邻列之间的感光像素单元110a之间，以及相邻行之间的感光像素单元110a之间均没有非感光像素单元110b。这样避免有效成像区域的图像缺失。
所述感光区S1包括有效感光区S11和第一开关区S12，感光二极管120位于有效感光区S11上，第一开关器件130位于第一开关区S12上。
所述非感光区S2包括有效非感光区S21和第二开关区S22，所述电容140位于有效非感光区S21上，第二开关器件150位于第二开关区S22上。
第一开关器件130为晶体管，如非晶硅薄膜晶体管(amorphous Silicon Thin Film Transistor，a-Si TFT)、低温多晶硅薄膜晶体管(Low  Temperature Poly Silicon Thin Film Transistor，LTPS TFT)、或者氧化物半导体薄膜晶体管(Oxide Semiconductor Thin Film Transistor，OTFT)。
第二开关器件150为晶体管，如非晶硅薄膜晶体管(amorphous Silicon Thin Film Transistor，a-Si TFT)、低温多晶硅薄膜晶体管(Low Temperature Poly Silicon Thin Film Transistor，LTPS TFT)、或者氧化物半导体薄膜晶体管(Oxide Semiconductor Thin Film Transistor，OTFT)。
本实施例中，以第一开关器件130为非晶硅薄膜晶体管，第二开关器件150为非晶硅薄膜晶体管为示例进行说明。
所述感光像素单元110a包括：位于基板100第一开关区S12部分表面的第一导电层210；位于有效感光区S11表面和第一开关区S12表面且覆盖第一导电层210的第一绝缘层220；位于第一开关区S12的第一绝缘层220部分表面的第一半导体层230，且第一半导体层230与第一开关区S12上的第一导电层210相对；覆盖第一半导体层230的第二导电层240，所述第二导电层240内具有第一开口，第一开口的底部表面为第一半导体层230的表面，且第二导电层240还延伸至有效感光区S11的第一绝缘层220表面；覆盖第二导电层240且填充满第一开口的第二绝缘层250；位于有效感光区S11的第二绝缘层250内的第二开口，第二开口的底部为第二导电层240的表面；填充在第二开口内且覆盖在第二开口上的感光二极管120，感光二极管120还延伸至第二绝缘层250的部分顶部表面，感光二极管120的底部表面与第二导电层240接触；第三绝缘层260，第三绝缘层260覆盖所述感光二极管120的部分顶部表面、第二绝缘层250上感光二极管120的侧壁以及第二绝缘层250，第三绝缘层260中具有位于感光二极管120上的第三开口，第三开口的底部表面为感光二极管120的表面；位于第三开口的内壁、以及第一开关区S12的第三绝缘层260上的第一透明导电层270。
所述非感光像素单元110b包括：位于基板100第二开关区S22部分表面的第三导电层211；位于有效非感光区S21表面和第二开关区S22表面且覆盖第三导电层211的第四绝缘层221；位于第二开关区S22的第四绝缘层221部分表面的第二半导体层231，且第二半导体层231与第二开关区S22上的第三导电层211相对；覆盖第二半导体层231的第四导电层241，第四导电层241内具有第四开口，第四开口的底部表面为第二半导体层231的表面，且第四导电层241还延伸至有效非感光区S21的第四绝缘层221表面；覆盖第四导电层241且填充满第四开口的绝缘结构层；覆盖绝缘结构层的第二透明导电层271。
本实施例中，绝缘结构层为叠层结构；所述绝缘结构层包括：覆盖第四导电层241且填充满第四开口的第五绝缘层251；覆盖第五绝缘层251的第六绝缘层261。
本实施例中，所述第二透明导电层271覆盖第六绝缘层261。
在其他实施例中，所述绝缘结构层为单层结构。
上述结构中，第一开关器件130包括：第一开关区S12上的第一导电层210、第一半导体层230、以及第一开关区S12上的第二导电层240。
上述结构中，第二开关器件150包括：第二开关区S22上的第三导电层211、第二半导体层231、以及第二开关区S22上的第四导电层241。
上述结构中，所述电容包括：有效非感光区S21上的第四导电层241，有效非感光区S21上的绝缘结构层、以及有效非感光区S21上的第二透明导电层271。有效非感光区S21上的第四导电层241作为所述电容的一个导电极板，有效非感光区S21上的第二透明导电层271作为所述电容的另一个导电极板，有效非感光区S21上的绝缘结构层作为所述电容的电容介质层。
本实施例中，绝缘结构层包括第五绝缘层251和第六绝缘层261，相应的，有效非感光区S21上的第五绝缘层251和有效非感光区S21上的第六绝缘层261共同作为所述电容的电容介质层，由于所述电容的电容介质层的为两层结构，所述电容的电容介质层发生缺陷几率降低，因此电容介质层出现漏电的几率降低，所述电容的稳定性提高。
所述第一导电层210、第二导电层240、第三导电层211和第四导电层241的材料可以是铝、钼或铝钕合金，也可以是其它合金金属或不同材料的多层结构。第一开关区S12上的第一导电层210作为第一开关器件130的栅极，第一开关区S12上位于第一半导体层230两侧的第二导电层240为第一开关器件130的源极和漏极。第二开关区S22上的第三导电层211作为第二开关器件150的栅极，第二开关区S22上的第二半导体层231两侧的第四导电层241为第二开关器件150的源极和漏极。
所述第一半导体层230的材料为非晶硅、低温多晶硅或氧化物半导体。第二半导体层231的材料为非晶硅、低温多晶硅或氧化物半导体。
所述第一绝缘层220、第二绝缘层250、第三绝缘层260、第四绝缘层221、第五绝缘层251和第六绝缘层261的材料可以是氮化硅(SiNx)或氧化硅(SiOx)。
第一透明导电层270和第二透明导电层271的材料包括氧化铟锡(ITO)。
第一开口底部的第一半导体层230作为第一开关器件130的沟道，第四开口底部的第二半导体层231作为第二开关器件150的沟道。
所述感光二极管120为PIN结构，具体的，所述感光二极管120包括n型层、位于n型层上的i型层、以及位于i型层上的p型层。其中，n型层与有效感光区S11上的第二导电层240接触。
本实施例中，所述n型层位于所述第二开口的侧壁表面和底部表 面，且n型层还延伸至第二开口周围第二绝缘层250的部分顶部表面；所述i型层位于所述第二开口中以及第二开口上，所述i型层还延伸至第二开口周围的部分第二绝缘层250上，所述i型层位于所述n型层的上表面；所述p型层位于所述i型层的上表面。
所述第一透明导电层270和第二透明导电层271均连接至第一公共电位。
第一开关器件130的栅极和第二开关器件150的栅极连接扫描驱动线。所述第一导电层210和第三导电层211还可以作为扫描驱动线。
本实施例中，第二导电层240还可以作为第一数据线，第四导电层241还可以作为第二数据线。
对于第一开关区S12上的第二导电层240，位于第一半导体层230一侧的第二导电层240为第一开关器件130的源极，位于第一半导体层230另一侧的第二导电层240为第一开关器件130的漏极。
本实施例中，第一开关器件130的漏极与感光二极管120连接，在其他实施例中，第一开关器件的源极与感光二极管连接。
本实施例中，当第一开关器件130的漏极与感光二极管120连接时，第一开关器件130的源极与第一数据线连接。在其他实施例中，第一开关器件的源极与感光二极管连接，第一开关器件的漏极与第一数据线连接。
本实施例中，对于第二开关区S22上的第四导电层241，位于第二半导体层231一侧的第四导电层241为第二开关器件150的源极，位于第二半导体层231另一侧的第四导电层241为第二开关器件150的漏极。
本实施例中，第二开关器件150的漏极与电容连接，在其他实施例中，第一开关器件的源极与电容连接。
本实施例中，当第二开关器件150的漏极与电容连接时，第二开 关器件150的源极与第二数据线连接。在其他实施例中，第二开关器件的源极与电容连接，第二开关器件的漏极与第二数据线连接。
本实施例中，所述光学传感器结构还包括：位于第一开关区S12的第三绝缘层260上的第一挡光层280，且第一挡光层280位于第一开口上；位于第二开关区S22的第六绝缘层261上的第二挡光层281，且第二挡光层281位于第四开口上。
本实施例中，所述第一挡光层280位于第一透明导电层270上，且第二挡光层281位于第二透明导电层271上。在其他实施例中，所述第一挡光层位于第一透明导电层的底部，且第二挡光层位于第二透明导电层底部。
所述第一挡光层280和第二挡光层281由不透光导电材料组成，可以是铝、钼或铝钕合金(AlNd)，也可以是其它合金金属，还可以是不同材料的多层结构。
本实施例还提供一种光学传感器结构的形成方法，参考图4，包括以下步骤：
S01：提供基板；
S02：在所述基板上形成指纹感测电路层，形成指纹感测电路层的方法包括：形成若干感光像素单元；
S03：形成非感光像素单元，所述非感光像素单元位于所述若干感光像素单元的侧部；
S04：形成所述感光像素单元的方法包括：形成感光二极管；形成第一开关器件，第一开关器件与感光二极管电性连接；形成所述非感光像素单元的方法包括：形成电容；形成第二开关器件，第二开关器件与所述电容电性连接。
所述基板包括感光区和非感光区，若干感光像素单元位于所述感光区上，非感光像素单元位于所述非感光区上；所述感光区包括有效 感光区和第一开关区，感光二极管位于有效感光区上，第一开关器件位于第一开关区上；所述非感光区包括有效非感光区和第二开关区，所述电容位于有效非感光区上，第二开关器件位于第二开关区上。
形成所述感光像素单元和非感光像素单元的方法包括：在所述基板第一开关区的部分表面形成第一导电层；在形成第一导电层的过程中，在所述基板第二开关区的部分表面形成第三导电层；在有效感光区表面和第一开关区表面形成覆盖第一导电层的第一绝缘层；在形成第一绝缘层的过程中，在有效非感光区表面和第二开关区表面形成覆盖第三导电层的第四绝缘层；在第一开关区的第一绝缘层部分表面形成第一半导体层，且第一半导体层与第一导电层相对；在形成第一半导体层的过程中，在第二开关区的第四绝缘层部分表面形成第二半导体层，且第二半导体层与第三导电层相对；形成覆盖第一半导体层的第二导电层，所述第二导电层内具有第一开口，第一开口的底部表面为第一半导体层的表面，且第二导电层还延伸至有效感光区的第一绝缘层表面；在形成第二导电层的过程中，形成覆盖第二半导体层的第四导电层，第四导电层内具有第四开口，第四开口的底部表面为第二半导体层的表面，且第四导电层还延伸至有效非感光区的第四绝缘层表面；形成覆盖第二导电层且填充满第一开口的第二绝缘层；在有效感光区的第二绝缘层内形成第二开口，第二开口的底部为第二导电层的表面；形成填充满第二开口且覆盖在第二开口上的感光二极管，感光二极管还延伸至第二绝缘层的部分顶部表面，感光二极管的底部表面与第二导电层接触；形成覆盖所述感光二极管的部分顶部表面、第二绝缘层上感光二极管的侧壁以及第二绝缘层的第三绝缘层，第三绝缘层中具有第三开口，第三开口的底部表面为感光二极管的表面；在形成第二绝缘层和第三绝缘层的过程中，形成覆盖第四导电层且填充满第四开口的绝缘结构层；在第三开口的内壁、以及第一开关区的第三绝缘层上形成第一透明导电层；在形成第一透明导电层的过程中，形成覆盖绝缘结构层的第二透明导电层。
本实施例中，所述绝缘结构层包括：第五绝缘层和第六绝缘层。 相应的，在形成第二绝缘层的过程中，形成覆盖第四导电层且填充满第四开口的第五绝缘层；在形成第三绝缘层的过程中，形成覆盖第五绝缘层的第六绝缘层。
在其他实施例中，所述绝缘结构层为单层结构，相应的，在形成第二绝缘层的过程中，形成绝缘结构层；或者，在形成第三绝缘层的过程中，形成绝缘结构层。
本实施例中，还包括：在第一开关区S12的第三绝缘层260上形成第一挡光层280，且第一挡光层280位于第一开口上；在形成第一挡光层280的过程中，在第二开关区S22的第六绝缘层261上形成第二挡光层281，且第二挡光层281位于第四开口上。
在一个实施例中，在形成第一透明导电层270和第二透明导电层271后，形成第一挡光层280和第二挡光层281。在另一个实施例中，形成第一挡光层280和第二挡光层281后，形成第一透明导电层270和第二透明导电层271。
所述电容的大小为0.1pF～10pF。有效非感光区S21上的第五绝缘层251和有效非感光区S21上的第六绝缘层261的总厚度为0.2um～10um。有效非感光区S21上的第五绝缘层251的厚度为0.1um～5um，有效非感光区S21上的第六绝缘层261的厚度为0.1um～5um。
本实施例中，有效非感光区S21上的绝缘结构层作为电容的电容介质层，具体的，有效非感光区S21上的第五绝缘层251和第六绝缘层261叠加而构成电容的电容介质层。为了工艺简单，第五绝缘层251和第二绝缘层250同时形成，第六绝缘层261和第三绝缘层260同时形成。
在一个实施例中，所述电容的大小为0.1pF～10pF。在尽量简化制作工艺的前提下，使得电容的容值尽量接近感光二极管120的等效电容的容值，例如，电容的容值大于等于感光二极管120的等效电容的 容值的0.1倍，且电容的容值小于等于感光二极管120的等效电容的容值的5倍，这样的话，感光像素单元和非感光像素单元的电学特性就比较接近，非感光像素单元采集到的信号的电子噪音就比较接近感光像素单元实际的电子噪音，所以噪音消除的效果就比较好。
本发明另一实施例还提供一种光学传感器电路，参考图5，包括：若干感光像素单元300，所述感光像素单元300包括：感光二极管301；与感光二极管301电性连接的第一开关器件302；位于所述若干感光像素单元300的侧部的非感光像素单元400，所述非感光像素单元400包括：电容401；与所述电容401电性连接的第二开关器件402。
本实施例中，所述第一开关器件302为第一晶体管，所述第二开关器件402为第二晶体管。
所述感光二极管301的正极连接第一公共电位；所述第一晶体管具有第一源漏极和第二源漏极，第一源漏极连接所述感光二极管301的负极。
在一个实施例中，第一源漏极为第一晶体管的源极，第二源漏极为第一晶体管的漏极；在另一个实施例中，第一源漏极为第一晶体管的漏极，第二源漏极为第一晶体管的源极。
所述电容401具有相对第一电容端和第二电容端，第一电容端与第一公共电位连接；第二晶体管具有第三源漏极和第四源漏极，第三源漏极与第二电容端连接。
在一个实施例中，第三源漏极为第二晶体管的源极，第四源漏极为第二晶体管的漏极；在另一个实施例中，第三源漏极为第二晶体管的漏极，第四源漏极为第二晶体管的源极。
本实施例中，所述若干感光像素单元300排列成若干列；所述非感光像素单元400呈一列或若干列；所述非感光像素单元400的列方向与若干感光像素单元300的列方向平行。
本实施例中，光学传感器电路还包括：若干列第一数据线310， 一列或多列的第二数据线410。
本实施例中，第二源漏极连接第一数据线310，第四源漏极连接第二数据线410。
第一晶体管的栅极与第二晶体管的栅极连接扫描驱动线W。具体的，在同一行，第一晶体管的栅极与第二晶体管的栅极都连接到同一行的扫描驱动线W。
在其他实施例中，所述若干感光像素单元排列成若干行；所述非感光像素单元呈一行或若干行，所述非感光像素单元的行方向与若干感光像素单元的行方向平行。
本实施例中，所述非感光像素单元400分别位于所述若干感光像素单元300的两侧。在其他实施例中，所述非感光像素单元位于所述若干感光像素单元的一侧。
需要说明的是，所述非感光像素单元400分别位于所述若干感光像素单元300的两侧，指的是：所述非感光像素单元400位于所述若干感光像素单元300整体的两侧；所述非感光像素单元位于所述若干感光像素单元的一侧，指的是：所述非感光像素单元位于所述若干感光像素单元整体的一侧。
本发明另一实施例还提供一种光学传感器结构，本实施例与前一实施例的区别在于：所述感光像素单元还包括：第一附加电容，第一附加电容与感光二极管连接；所述非感光像素单元还包括：第二附加电容，第二附加电容与所述电容连接。关于本实施例与前一实施例相同的内容不在详述。
结合参考图6和图7，图6为在图2基础上的示意图，图7为在图3基础上的示意图，所述第一导电层210还位于基板100有效感光区S11部分表面，且第一开关区S12上的第一导电层210和有效感光区S11上的第一导电层210相互分立；有效感光区S11上的第一导电层210位于所述感光二极管120的底部。
有效感光区S11上的第一导电层210被有效感光区S11上的第一绝缘层220覆盖。
结合参考图6和图7，所述第三导电层211还位于基板100有效非感光区S21部分表面，且基板100有效非感光区S21上的第三导电层211和基板100第二开关区S22上的第三导电层211相互分立；在基板100有效非感光区S21上，第三导电层211位于第四导电层241的底部。
有效非感光区S21上的第三导电层211被有效非感光区S21上的第四绝缘层221覆盖。
第一附加电容包括：有效感光区S11上的第一导电层210、有效感光区S11上的第一绝缘层220、以及有效感光区S11上的第二导电层240。有效感光区上的第一导电层210作为所述第一附加电容的一个导电极板，有效感光区S11上的第二导电层240作为所述第一附加电容的另一个导电极板，有效感光区S11上的第一绝缘层220作为所述第一附加电容的电容介质层。
第二附加电容包括：有效非感光区S21上的第三导电层211、有效非感光区S21上的第四绝缘层221、以及有效非感光区S21上的第四导电层241。有效非感光区S21上的第三导电层211作为所述第二附加电容的一个导电极板，有效非感光区S21上的第四导电层241作为所述第二附加电容的另一个导电极板，有效非感光区S21上的第四绝缘层221作为所述第二附加电容的电容介质层。
第一附加电容的大小为0.1pF～10pF，第二附加电容的大小为0.1pF～10pF。有效感光区S11上的第一绝缘层220的厚度为0.1um～1um，有效非感光区S21上的第四绝缘层221的厚度为0.1um～1um。
所述第一透明导电层270和第二透明导电层271均连接至第一公共电位。所述有效感光区S11上的第一导电层400和有效非感光区 S21的第三导电层211均连接至第二公共电位。第二公共电位与第一公共电位相等或不等。
第一附加电容的作用包括：第一附加电容和感光二极管共同存储由感光二极管产生的光生电荷，使得存储容量提高。
第二附加电容的作用包括：在尽量简化制作工艺的前提下，使得非感光像素单元中第二附加电容与电容的总容值，尽量接近感光像素单元中第一附加电容与感光二极管等效电容的总容值，第二附加电容与电容的总容值大于等于第一附加电容与感光二极管等效电容的总容值的0.1倍，且第二附加电容与电容的总容值小于等于第一附加电容与感光二极管等效电容的总容值的5倍。这样的话，感光像素单元和非感光像素单元的电学特性就比较接近。非感光像素单元采集到的信号的电子噪音就比较接近感光像素单元实际的电子噪音，所以噪音消除的效果就比较好。
本实施例中，在电学连接关系上，第一附加电容与感光二极管120并联连接，第二附加电容与所述电容并联连接。
本实施例还提供一种光学传感器结构的形成方法，参照前一实施例的方法，本实施例的方法与前一实施的方法的区别在于：还形成了第一附加电容和第二附加电容。具体的，还在基板有效感光区部分表面形成了第一导电层，且第一开关区上的第一导电层和有效感光区上的第一导电层相互分立；形成感光二极管后，有效感光区上的第一导电层位于所述感光二极管的底部；还在基板有效非感光区部分表面形成第三导电层，且基板有效非感光区上的第三导电层和基板第二开关区上的第三导电层相互分立；形成第四导电层后，在基板有效非感光区上，第三导电层位于第四导电层的底部。
相应的，本发明另一实施例还提供一种光学传感器电路，请参考图8，图8为在图5基础上的示意图，本实施例与前一实施的电路的区别在于：所述感光像素单元还包括：第一附加电容303，第一附加电容303具有相对的第三电容端和第四电容端，第三电容端和感光二 极管301的负极连接，第三电容端和第一源漏极共用感光二极管301的负极，第四电容端连接第二公共电位；第二附加电容403，第二附加电容403具有相对的第五电容端和第六电容端，第五电容端与第二电容端连接，第五电容端和第三源漏极共用第二电容端，第六电容端连接第二公共电位。
第二公共电位与第一公共电位相等或不等。
本实施例中，第一附加电容303与感光二极管301并联连接，第二附加电容403与电容401并联连接。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (26)

  1. 一种光学传感器结构，其特征在于，包括：
    基板；
    位于基板上的指纹感测电路层，所述指纹感测电路层包括：若干感光像素单元；位于所述若干感光像素单元的侧部的非感光像素单元；
    所述感光像素单元包括：感光二极管；与感光二极管电性连接的第一开关器件；
    所述非感光像素单元包括：电容；与所述电容电性连接的第二开关器件。
  2. 根据权利要求1所述的光学传感器结构，其特征在于，所述基板包括感光区和非感光区，若干感光像素单元位于所述感光区上，非感光像素单元位于所述非感光区上；所述感光区包括有效感光区和第一开关区，感光二极管位于有效感光区上，第一开关器件位于第一开关区上；所述非感光区包括有效非感光区和第二开关区，所述电容位于有效非感光区上，第二开关器件位于第二开关区上；
    所述感光像素单元包括：位于基板第一开关区部分表面的第一导电层；位于有效感光区表面和第一开关区表面且覆盖第一导电层的第一绝缘层；位于第一开关区的第一绝缘层部分表面的第一半导体层，且第一半导体层与第一开关区上的第一导电层相对；覆盖第一半导体层的第二导电层，所述第二导电层内具有第一开口，第一开口的底部表面为第一半导体层的表面，且第二导电层还延伸至有效感光区的第一绝缘层表面；覆盖第二导电层且填充满第一开口的第二绝缘层；位于有效感光区的第二绝缘层内的第二开口，第二开口的底部为第二导电层的表面；填充在第二开口中且覆盖在第二开口上的感光二极管，感光二极管还延伸至第二绝缘层的部分顶部表面，感光二极管的底部表面与第二导电层接触；第三绝缘层，第三绝缘层覆盖所述感光二极 管的部分顶部表面、第二绝缘层上感光二极管的侧壁以及第二绝缘层，第三绝缘层中具有位于感光二极管上的第三开口，第三开口的底部表面为感光二极管的表面；位于第三开口的内壁、以及第一开关区的第三绝缘层上的第一透明导电层；
    所述非感光像素单元包括：位于基板第二开关区部分表面的第三导电层；位于有效非感光区表面和第二开关区表面且覆盖第三导电层的第四绝缘层；位于第二开关区的第四绝缘层部分表面的第二半导体层，且第二半导体层与第二开关区上的第三导电层相对；覆盖第二半导体层的第四导电层，第四导电层内具有第四开口，第四开口的底部表面为第二半导体层的表面，且第四导电层还延伸至有效非感光区的第四绝缘层表面；覆盖第四导电层且填充满第四开口的绝缘结构层；覆盖绝缘结构层的第二透明导电层。
  3. 根据权利要求2所述的光学传感器结构，其特征在于，所述绝缘结构层为叠层结构；所述绝缘结构层包括：覆盖第四导电层且填充满第四开口的第五绝缘层；覆盖第五绝缘层的第六绝缘层；所述第二透明导电层覆盖第六绝缘层。
  4. 根据权利要求2所述的光学传感器结构，其特征在于，所述绝缘结构层为单层结构。
  5. 根据权利要求2所述的光学传感器结构，其特征在于，所述感光像素单元还包括：第一附加电容，第一附加电容与感光二极管连接；所述非感光像素单元还包括：第二附加电容，第二附加电容与所述电容连接。
  6. 根据权利要求5所述的光学传感器结构，其特征在于，所述第一导电层还位于基板有效感光区部分表面，且第一开关区上的第一导电层和有效感光区上的第一导电层相互分立；有效感光区上的第一导电层位于所述感光二极管的底部；
    所述第三导电层还位于基板有效非感光区部分表面，且基板有效非感光区上的第三导电层和基板第二开关区上的第三导电层相互分立；在基板有效非感光区上，第三导电层位于第四导电层的底部。
  7. 根据权利要求6所述的光学传感器结构，其特征在于，所述第一透明导电层和第二透明导电层均连接至第一公共电位；所述有效感光区上的第一导电层和有效非感光区的第三导电层均连接至第二公共电位；第二公共电位与第一公共电位相等或不等。
  8. 根据权利要求2所述的光学传感器结构，其特征在于，还包括：位于第一开关区的第三绝缘层上的第一挡光层，且第一挡光层位于第一开口上；位于第二开关区的第六绝缘层上的第二挡光层，且第二挡光层位于第四开口上。
  9. 根据权利要求8所述的光学传感器结构，其特征在于，所述第一挡光层位于第一透明导电层上，且第二挡光层位于第二透明导电层上。
  10. 根据权利要求8所述的光学传感器结构，其特征在于，所述第一挡光层位于第一透明导电层的底部，且第二挡光层位于第二透明导电层底部。
  11. 根据权利要求1所述的光学传感器结构，其特征在于，所述若干感光像素单元排列成若干列；所述非感光像素单元呈一列或若干列；所述非感光像素单元的列方向与若干感光像素单元的列方向平行。
  12. 根据权利要求1所述的光学传感器结构，其特征在于，所述若干感光像素单元排列成若干行；所述非感光像素单元呈一行或若干行，所述非感光像素单元的行方向与若干感光像素单元的行方向平行。
  13. 根据权利要求1所述的光学传感器结构，其特征在于，所述非感光像素单元位于所述若干感光像素单元的一侧；或者，所述非感光像素单元分别位于所述若干感光像素单元的两侧。
  14. 一种光学传感器结构的形成方法，其特征在于，包括：
    提供基板；
    在所述基板上形成指纹感测电路层，形成指纹感测电路层的方法包括：形成若干感光像素单元；形成非感光像素单元，所述非感光像 素单元位于所述若干感光像素单元的侧部；
    形成所述感光像素单元的方法包括：形成感光二极管；形成第一开关器件，第一开关器件与感光二极管电性连接；
    形成所述非感光像素单元的方法包括：形成电容；形成第二开关器件，第二开关器件与所述电容电性连接。
  15. 根据权利要求14所述的光学传感器结构的形成方法，其特征在于，所述基板包括感光区和非感光区，若干感光像素单元位于所述感光区上，非感光像素单元位于所述非感光区上；所述感光区包括有效感光区和第一开关区，感光二极管位于有效感光区上，第一开关器件位于第一开关区上；所述非感光区包括有效非感光区和第二开关区，所述电容位于有效非感光区上，第二开关器件位于第二开关区上。
  16. 根据权利要求15所述的光学传感器结构的形成方法，其特征在于，形成所述感光像素单元和非感光像素单元的方法包括：在所述基板第一开关区的部分表面形成第一导电层；在形成第一导电层的过程中，在所述基板第二开关区的部分表面形成第三导电层；在有效感光区表面和第一开关区表面形成覆盖第一导电层的第一绝缘层；在形成第一绝缘层的过程中，在有效非感光区表面和第二开关区表面形成覆盖第三导电层的第四绝缘层；在第一开关区的第一绝缘层部分表面形成第一半导体层，且第一半导体层与第一导电层相对；在形成第一半导体层的过程中，在第二开关区的第四绝缘层部分表面形成第二半导体层，且第二半导体层与第三导电层相对；形成覆盖第一半导体层的第二导电层，所述第二导电层内具有第一开口，第一开口的底部表面为第一半导体层的表面，且第二导电层还延伸至有效感光区的第一绝缘层表面；在形成第二导电层的过程中，形成覆盖第二半导体层的第四导电层，第四导电层内具有第四开口，第四开口的底部表面为第二半导体层的表面，且第四导电层还延伸至有效非感光区的第四绝缘层表面；形成覆盖第二导电层且填充满第一开口的第二绝缘层；在有效感光区的第二绝缘层内形成第二开口，第二开口的底部为第二导 电层的表面；形成填充满第二开口且覆盖在第二开口上的感光二极管，感光二极管还延伸至第二绝缘层的部分顶部表面，感光二极管的底部表面与第二导电层接触；形成覆盖所述感光二极管的部分顶部表面、第二绝缘层上感光二极管的侧壁以及第二绝缘层的第三绝缘层，第三绝缘层中具有第三开口，第三开口的底部表面为感光二极管的表面；在形成第二绝缘层和第三绝缘层的过程中，形成覆盖第四导电层且填充满第四开口的绝缘结构层；在第三开口的内壁、以及第一开关区的第三绝缘层上形成第一透明导电层；在形成第一透明导电层的过程中，形成覆盖绝缘结构层的第二透明导电层。
  17. 根据权利要求16所述的光学传感器结构的形成方法，其特征在于，所述绝缘结构层包括：第五绝缘层和第六绝缘层；在形成第二绝缘层的过程中，形成覆盖第四导电层且填充满第四开口的第五绝缘层；在形成第三绝缘层的过程中，形成覆盖第五绝缘层的第六绝缘层。
  18. 根据权利要求16所述的光学传感器结构的形成方法，其特征在于，所述绝缘结构层为单层结构；在形成第二绝缘层的过程中，形成绝缘结构层；或者，在形成第三绝缘层的过程中，形成绝缘结构层。
  19. 根据权利要求16所述的光学传感器结构的形成方法，其特征在于，所述第一导电层还位于基板有效感光区部分表面，且第一开关区上的第一导电层和有效感光区上的第一导电层相互分立；有效感光区上的第一导电层位于所述感光二极管的底部；所述第三导电层还位于基板有效非感光区部分表面，且基板有效非感光区上的第三导电层和基板第二开关区上的第三导电层相互分立；在基板有效非感光区上，第三导电层位于第四导电层的底部。
  20. 一种光学传感器电路，其特征在于，包括：
    若干感光像素单元，所述感光像素单元包括：感光二极管；与感光二极管电性连接的第一开关器件；
    位于所述若干感光像素单元的侧部的非感光像素单元，所述非感 光像素单元包括：电容；与所述电容电性连接的第二开关器件。
  21. 根据权利要求20所述的光学传感器电路，其特征在于，所述第一开关器件为第一晶体管，所述第二开关器件为第二晶体管。
  22. 根据权利要求21所述的光学传感器电路，其特征在于，所述感光二极管的正极连接第一公共电位；所述第一晶体管具有第一源漏极，第一源漏极连接所述感光二极管的负极；所述电容具有相对第一电容端和第二电容端，第一电容端与第一公共电位连接；第二晶体管具有第三源漏极，第三源漏极与第二电容端连接。
  23. 根据权利要求22所述的光学传感器电路，其特征在于，所述感光像素单元还包括：第一附加电容，第一附加电容具有相对的第三电容端和第四电容端，第三电容端和感光二极管的负极连接，第三电容端和第一源漏极共用感光二极管的负极，第四电容端连接第二公共电位；第二附加电容，第二附加电容具有相对的第五电容端和第六电容端，第五电容端与第二电容端连接，第五电容端和第三源漏极共用第二电容端，第六电容端连接第二公共电位；第二公共电位与第一公共电位相等或不等。
  24. 根据权利要求20所述的光学传感器电路，其特征在于，所述若干感光像素单元排列成若干列；所述非感光像素单元呈一列或若干列；所述非感光像素单元的列方向与若干感光像素单元的列方向平行。
  25. 根据权利要求20所述的光学传感器电路，其特征在于，所述若干感光像素单元排列成若干行；所述非感光像素单元呈一行或若干行，所述非感光像素单元的行方向与若干感光像素单元的行方向平行。
  26. 根据权利要求20所述的光学传感器电路，其特征在于，所述非感光像素单元位于所述若干感光像素单元的一侧；或者，所述非感光像素单元分别位于所述若干感光像素单元的两侧。
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Publication number Priority date Publication date Assignee Title
CN101465359A (zh) * 2007-12-17 2009-06-24 瀚宇彩晶股份有限公司 具有光敏薄膜晶体管的大型光传感器
US20110018842A1 (en) * 2007-07-26 2011-01-27 Hsin-Hung Lee Touch Panel
CN108090467A (zh) * 2017-12-30 2018-05-29 深圳信炜科技有限公司 感光装置、感光模组、显示模组及电子设备
CN108288013A (zh) * 2017-01-09 2018-07-17 上海箩箕技术有限公司 成像传感器和成像模组

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Publication number Priority date Publication date Assignee Title
US20110018842A1 (en) * 2007-07-26 2011-01-27 Hsin-Hung Lee Touch Panel
CN101465359A (zh) * 2007-12-17 2009-06-24 瀚宇彩晶股份有限公司 具有光敏薄膜晶体管的大型光传感器
CN108288013A (zh) * 2017-01-09 2018-07-17 上海箩箕技术有限公司 成像传感器和成像模组
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