WO2020124899A1

WO2020124899A1 - Silicon controlled dimming active bleeder control circuit

Info

Publication number: WO2020124899A1
Application number: PCT/CN2019/083202
Authority: WO
Inventors: 陶冬毅; 刘明龙
Original assignee: 苏州菲达旭微电子有限公司
Priority date: 2018-12-19
Filing date: 2019-04-18
Publication date: 2020-06-25
Also published as: CN109673079A

Abstract

A silicon controlled dimming active bleeder control circuit, comprising a sequentially connected edge detection circuit unit (1) used for detecting a rising edge/a falling edge of a bus voltage when a silicon controlled rectifier is switched on so as to output a differential signal, an analog-to-digital conversion circuit unit (2) used for converting the differential signal into a digital signal, a digital control circuit unit (3) used for generating time sequence and amplitude control signals required by a corresponding bleeder circuit according to the digital signal, a digital-to-analog conversion circuit unit (4) for selecting a corresponding control level signal at corresponding time according to the time sequence and amplitude control signals, and an active bleeder circuit unit (5) used for outputting an active bleeder current signal controlled by the level signal. The edge detection circuit unit (1) and the active bleeder circuit unit (5) are connected to a rectified bus port (6). A digital-analog hybrid circuit is used for achieving the time and amplitude control of the bleeder current; an RC edge detection circuit is not required for the generation of a locking current and locking transition time, and the integration degree of the system is improved.

Description

A thyristor dimming active bleed control circuit

Technical field

The invention relates to the technical field of thyristor dimming, in particular to a thyristor dimming active bleed control circuit.

Background technique

As a high-efficiency new light source, LED has been widely used in various fields due to its long life, low energy consumption, energy saving and environmental protection. The dimming technology of LEDs has developed increasingly mature, and SCR dimming is currently the most commonly used dimming technology. Its dimming cost is low, compatible with existing lines, and does not require rewiring. When the lamp needs to be dimmed by the thyristor signal, the waveform of the input voltage in the circuit deviates from the sine wave due to the change of the thyristor conduction angle, which also changes the effective value of the input voltage, thereby achieving dimming.

However, thyristor dimming destroys the waveform of the voltage sine wave, thereby reducing the power factor value. The non-sinusoidal waveform increases the harmonic coefficient and will also produce serious interference signals. Especially at low loads, the dimming circuit is very unstable, so it is necessary to control the discharge current of the thyristor dimming.

The prior art is shown in Fig. 1. An independent RC circuit is used to generate the thyristor conduction lock and transition current, and an independent constant current circuit is used to generate the thyristor holding current. However, due to the large lock current demand, the lock time and transition The time is longer, therefore, the large resistance value and large capacitance value of the external RC line have high requirements, which makes the external RC line larger and at the same time higher cost, unable to integrate the system, which is not conducive to the drive Miniaturized development.

Summary of the invention

In order to overcome the shortcomings of the existing technology, the present invention provides a thyristor dimming active bleed control circuit, does not require the RC edge detection circuit to generate lock current and lock transition time, which is conducive to system integration and reduces the overall solution For volume and cost, the technical solution is as follows:

The invention provides a thyristor dimming active bleed control circuit, which includes an edge detection circuit unit, an analog-to-digital conversion circuit unit, a digital control circuit unit, a digital-to-analog conversion circuit unit, and an active bleed circuit unit. The circuit unit and the active bleeder circuit unit are connected to the rectified bus voltage port;

The edge detection circuit unit is used to detect the rising or falling edge of the bus voltage when the thyristor is turned on to output a differential signal, and the output terminal of the edge detection circuit unit is connected to the input terminal of the analog-to-digital conversion circuit unit;

The analog-to-digital conversion circuit unit converts the differential signal into a digital signal, and the output terminal of the analog-to-digital conversion circuit unit is connected to the input terminal of the digital control circuit unit;

The digital control circuit unit generates the timing and amplitude control signals required by the corresponding bleeder circuit according to the digital signal, and the output terminal of the digital control circuit unit is connected to the input terminal of the digital-analog conversion circuit unit;

The digital-to-analog conversion circuit unit selects a corresponding level signal at a corresponding time according to the timing and amplitude control signals, and the output terminal of the digital-to-analog conversion circuit unit is connected to the input terminal of the active bleed circuit unit;

The active bleeder circuit unit outputs an active bleeder current signal controlled by the level signal.

Preferably, the active bleeder circuit unit includes an operational amplifier, a first power transistor and a bleeder resistor, the non-inverting input terminal of the operational amplifier is connected to the output terminal of the digital-to-analog conversion circuit unit, and the output of the operational amplifier Is connected to the gate of the first power transistor, the drain of the first power transistor is connected to the rectified bus voltage port, the inverting input of the operational amplifier, and the source of the first power transistor Both are connected to one end of the bleeder resistor, and the other end of the bleeder resistor is grounded.

Optionally, the active bleeder circuit unit includes a second power transistor, the gate of the second power transistor is connected to the output of the digital-to-analog conversion circuit unit, and the drain of the second power transistor is The rectified bus voltage port is connected, and the source of the second power transistor is grounded.

Preferably, the edge detection circuit unit includes a JFET transistor, a first capacitor, a first resistor and a second resistor, the gate of the JFET transistor is grounded, the drain of the JFET transistor and the rectified bus voltage port Connected, the source of the JFET transistor is connected to one end of the first capacitor, the other end of the capacitor is connected to one end of the first resistor, the other end of the first resistor is grounded; the upper end of the second resistor is biased A voltage source is connected, and the lower end of the second resistor is simultaneously connected to the connection point between the first capacitor and the first resistor and the input end of the analog-to-digital conversion circuit unit.

Optionally, the edge detection circuit unit includes a second capacitor and a third resistor, one end of the second capacitor is connected to the rectified bus voltage port, and the other end of the second capacitor is respectively connected to the third resistor The upper end of the and the input end of the analog-to-digital conversion circuit unit are connected, and the lower end of the third resistor is grounded.

Preferably, the analog-to-digital conversion circuit unit includes a first comparator, an in-phase input terminal of the first comparator is connected to the lower terminal of the second resistor, and an inverting input terminal of the first comparator is connected to the first The reference voltage source is connected, and the output terminal of the first comparator is connected to the input terminal of the digital control circuit unit.

Optionally, the analog-to-digital conversion circuit unit includes a second comparator, the inverting input terminal of the second comparator is connected to the upper end of the third resistor, and the non-inverting input terminal of the second comparator is Two reference voltage sources are connected, and the output terminal of the second comparator is connected to the input terminal of the digital control circuit unit.

Preferably, the digital control circuit unit has a cyclic initial state, a locked state, a transition state and a hold state, corresponding to different states, the digital control circuit unit outputs different amplitude control signals.

Optionally, the digital control circuit unit has a cyclic initial state, a locked state and a hold state, corresponding to different states, the digital control circuit unit outputs different amplitude control signals.

Further, the digital-to-analog conversion circuit unit includes a reference power supply, a plurality of voltage-dividing resistors connected in series, and multiple selection switches, and the digital-to-analog conversion circuit unit controls the corresponding selection according to the amplitude control signal output by the digital control circuit unit The switch is opened or closed, so that the digital-to-analog conversion circuit unit outputs a level signal corresponding to the timing state.

The beneficial effects brought by the technical solutions provided by the present invention are as follows:

1) The thyristor locking current and holding current are generated by the active bleeder circuit, and the time and amplitude control is realized by a digital-analog hybrid circuit, so there is no need for the RC edge detection line to generate the locking current and locking transition time, so as the RC value increases Reduced, the size is greatly reduced to facilitate system integration and realize the miniaturization of the driver;

2) Use digital control circuit to introduce transition state, reduce electromagnetic interference and reduce the overall cost of the solution;

3) Use the active bleeder circuit to achieve precise control of the bleeder current.

BRIEF DESCRIPTION

In order to more clearly explain the technical solutions in the embodiments of the present invention, the drawings required in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without paying any creative work, other drawings may be obtained based on these drawings.

Figure 1 is a circuit diagram of a solution in the prior art that uses an external RC line to generate thyristor conduction lock and transient current;

2 is a block diagram of a general topology structure of a thyristor dimming active bleed control circuit provided by an embodiment of the present invention;

FIG. 3 is a preferred circuit diagram of a first thyristor dimming active bleed control circuit provided by an embodiment of the present invention;

4 is an optional circuit diagram of a second thyristor dimming active bleed control circuit provided by an embodiment of the present invention;

FIG. 5 is a typical timing waveform diagram provided by an embodiment of the present invention.

Among them, the reference numerals include: 1-edge detection circuit unit, 11-JFET transistor, 12-first capacitor, 13-first resistor, 14-second resistor, 15-second capacitor, 16-third resistor, 2 -Analog-to-digital conversion circuit unit, 21-first comparator, 22-second comparator, 3-digital control circuit unit, 4-digital-analog conversion circuit unit, 41-reference power supply, 42-divider resistor, 43-select Switch, 5-active bleeder circuit unit, 51-op amplifier, 52-first power transistor, 53-bleeder resistor, 54-second power transistor, 6-bus voltage port 6.

detailed description

In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be described clearly and completely in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only It is a part of the embodiments of the present invention, but not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

It should be noted that the terms “first” and “second” in the description and claims of the present invention and the above drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data so used can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

In an embodiment of the present invention, a general topology diagram of a thyristor dimming active bleeder control circuit is provided. Referring to FIG. 2, the bleeder control circuit includes an edge detection circuit unit 1 and an analog-to-digital conversion circuit unit. 2. The digital control circuit unit 3, the digital-to-analog conversion circuit unit 4 and the active bleeder circuit unit 5, the edge detection circuit unit 1 and the active bleeder circuit unit 5 are all connected to the rectified bus voltage port 6;

The edge detection circuit unit 1 is used to detect the rising or falling edge of the bus voltage when the thyristor is turned on to output a differential signal V_edge. The output terminal of the edge detection circuit unit 1 and the input of the analog-to-digital conversion circuit unit 2 To connect the differential signal V_edge to the analog-to-digital conversion circuit unit 2:

The analog-to-digital conversion circuit unit 2 converts the differential signal V_edge into a digital signal D_shape, and the output terminal of the analog-to-digital conversion circuit unit 2 is connected to the input terminal of the digital control circuit unit 3 to input the digital signal D_shape The digital control circuit unit 3;

The digital control circuit unit 3 generates the timing and amplitude control signal D_ctrl required by the corresponding bleeder circuit according to the digital signal D_shape, and the output terminal of the digital control circuit unit 3 is connected to the input terminal of the digital-analog conversion circuit unit 4 to Input the timing and amplitude control signal D_ctrl to the digital-to-analog conversion circuit unit 4;

The digital-to-analog conversion circuit unit 4 selects a corresponding level signal V_ctrl at a corresponding time according to the timing and amplitude control signal D_ctrl, the output terminal of the digital-to-analog conversion circuit unit 4 and the input terminal of the active bleed circuit unit 5 Connected to input the level signal V_ctrl to the active bleeder circuit unit 5;

The active bleeder circuit unit 5 outputs an active bleeder current signal I_bleed controlled by the level signal V_ctrl.

Specifically, the typical timing waveforms of the edge detection output signal V_edge, the shaped digital signal D_shape, the digital control signal D_ctrl, the timing active bleed signal to the analog control signal V_ctrl, and the active bleed current signal I_bleed are shown in FIG. 5 and can be seen Out, when the rectified bus voltage port outputs a voltage deviating from the sinusoidal waveform, the digital control circuit and the digital-to-analog conversion circuit control to generate a voltage corresponding to the lock time, transition time, and hold time, which is then converted by the active bleed circuit unit 5 Obtain corresponding locking current, transition current and holding current, and accurately control the discharge current.

For the overall topology diagram of the thyristor dimming active bleed control circuit of FIG. 2, there are at least the following two possible implementations, no matter which method is adopted, its working principle is the same as the above-mentioned overall topology diagram. It only discloses the specific circuits of the edge detection circuit unit 1, the analog-to-digital conversion circuit unit 2, the digital control circuit unit 3, the digital-to-analog conversion circuit unit 4 and the active bleeder circuit unit 5. Specific instructions:

Example 1

In a first preferred embodiment, referring to FIG. 3, the edge detection circuit unit 1 includes a JFET transistor 11, a first capacitor 12, a first resistor 13, and a second resistor 14, the gate of the JFET transistor 11 is grounded, The drain of the JFET transistor 11 is connected to the rectified bus voltage port 6, the source of the JFET transistor 11 is sequentially connected to the first capacitor 12, the first resistor 13, and the lower end of the first resistor 13 is grounded ; The upper end of the second resistor 14 is connected to a bias voltage, the lower end of the second resistor 14 is connected to the connection point between the first capacitor 12, the first resistor 13 and the input of the analog-to-digital conversion circuit unit 2 at the same time;端连接。 End connection. The structure of the analog-to-digital conversion circuit unit 2 is as follows:

The analog-to-digital conversion circuit unit 2 includes a first comparator 21, the non-inverting input end of the first comparator 21 is connected to the lower end of the second resistor 14, and the inverting input end of the first comparator 21 is A first reference voltage source (having a first reference voltage V_ref1) is connected, and an output terminal of the first comparator 21 is connected to an input terminal of the digital control circuit unit 3. The structure of the digital control circuit unit 3 is as follows:

The digital control circuit unit 3 has a cyclic initial state, a locked state, a transition state, and a hold state. Corresponding to different states, the digital control circuit unit 3 outputs different amplitude control signals.

Corresponding to the output of the digital control circuit unit 3 is a digital-to-analog conversion circuit unit 4, specifically including a reference power supply 41, a plurality of voltage-dividing resistors 42 in series and a plurality of selection switches 43, the digital-to-analog conversion circuit unit 4 is based on the digital The amplitude control signal output by the control circuit unit 3 controls the corresponding selection switch 43 to be opened or closed, so that the digital-to-analog conversion circuit unit 4 outputs a level signal corresponding to the timing state, including the lock level corresponding to the lock time, The transition level corresponding to the transition time and the hold level corresponding to the hold time.

Referring to FIG. 3, the active bleeder circuit unit 5 includes an operational amplifier 51, a first power transistor 52 and a bleeder resistor 53. The non-inverting input terminal of the operational amplifier 51 is connected to the output terminal of the digital-analog conversion circuit unit 4 (Get a level signal corresponding to the timing state), the output terminal of the operational amplifier 51 is connected to the gate of the first power transistor 52, the drain of the first power transistor 52 and the rectified bus voltage Port 6 is connected. The inverting input terminal of the operational amplifier 51 and the source of the first power transistor 52 are connected to one end of the bleeder resistor 53, and the other end of the bleeder resistor 53 is grounded. In this case , The discharge current is calculated by the following formula:

I_bleed=V_ctrl/R _s , where I_bleed is the controlled active bleed current, V_ctrl is the voltage output from the digital-to-analog conversion circuit unit 4, R _s is the resistance value of the bleeder resistor 53, where V_ctrl is locked with the initial state The state, transition state and hold state change in time sequence and output different voltage values.

The above is the preferred embodiment of the thyristor dimming active bleed control circuit. Its advantage is that it can be detected bilaterally to adapt to the rising and falling edges of the thyristor dimmer. The introduction of the transition state can greatly reduce the electromagnetic interference (EMI) ), to accurately control the discharge current.

Example 2

In the first alternative implementation, unlike Embodiment 1, the edge detection circuit unit 1 in this embodiment does not include the JFET transistor 11 and the second resistor 14 connected to the bias voltage, see FIG. 4, The edge detection circuit unit 1 includes a second capacitor 15 and a third resistor 16, one end of the second capacitor 15 is connected to the rectified bus voltage port 6, and the other end of the second capacitor 15 is connected to the third The upper end of the resistor 16 and the input end of the analog-to-digital conversion circuit unit 2 are connected, and the lower end of the third resistor 16 is grounded. The edge detection circuit unit 1 in this embodiment can only be adapted to a rising edge thyristor dimmer. The structure of the analog-to-digital conversion circuit unit 2 is as follows:

Different from Embodiment 1, in this embodiment, the inverting input terminal of the second comparator 22 of the analog-to-digital conversion circuit unit 2 is connected to the upper end of the third resistor 16, and the non-inverting input of the second comparator 22 The terminal is connected to a first reference voltage source (having a second reference voltage V_ref2), and the output terminal of the second comparator 22 is connected to the input terminal of the digital control circuit unit 3. The structure of the digital control circuit unit 3 is as follows:

The digital control circuit unit 3 has a cyclic initial state, a locked state and a holding state, corresponding to different states, the digital control circuit unit 3 outputs different amplitude control signals. It can be seen that, unlike Embodiment 1, the digital control circuit unit 3 in this embodiment only outputs three states, that is, there are less transition states. Therefore, lack of transition time control cannot generate transition current, and EMI is higher.

The digital-to-analog conversion circuit unit 4 corresponding to the output of the digital control circuit unit 3 has the same structure as Embodiment 1, but since the digital control circuit unit 3 outputs three timing states, the digital-to-analog conversion in this embodiment The circuit unit 4 outputs the lock level and the hold level without transition level.

Different from Embodiment 1, in this embodiment, the active bleeder circuit unit 5 does not include an operational amplifier 51 and a bleeder resistor 53, as shown in FIG. 4, the active bleeder circuit unit 5 includes a second A power transistor 54, the gate of the second power transistor 54 is connected to the output of the digital-to-analog conversion circuit unit 4, and the drain of the second power transistor 54 is connected to the rectified bus voltage port 6, The source of the second power transistor 54 is grounded. In this case, the discharge current is calculated by the following formula:

I_bleed=Beta*(V_ctl-V _TH ) ² , where I_bleed is the controlled active bleed current, Beta is the conductivity factor of the second power transistor 54, V_ctrl is the voltage output from the digital-to-analog conversion circuit unit 4, and V _TH is The threshold voltage of the second power transistor 54 in which V_ctrl outputs different voltage values as the timing of the initial state, the locked state, and the hold state changes. It can be seen from the calculation formula that the bleeder current of this embodiment is calculated by a classic formula, and in the absence of transition state control, the active bleeder current control is inaccurate. However, compared with Embodiment 1, the cost of Embodiment 2 is lower, and the implementation method is simple.

The invention only needs to use the RC line to detect the rising or falling edge of the bus voltage when the thyristor is turned on. The thyristor lock current and holding current are generated by the active bleed circuit unit, and the time and amplitude control are determined by the subsequent number of the RC line. The implementation of the analog hybrid circuit does not require the RC edge detection circuit to generate the lock current and lock transition time, which reduces the size and cost of the overall solution and improves the degree of system integration.

The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection of the present invention Within range.

Claims

A thyristor dimming active bleed control circuit, characterized in that it includes an edge detection circuit unit (1), an analog-to-digital conversion circuit unit (2), a digital control circuit unit (3), and a digital-analog conversion circuit unit (4 ) And active bleeder circuit unit (5), the edge detection circuit unit (1) and the active bleeder circuit unit (5) are connected to the rectified bus voltage port (6);

The edge detection circuit unit (1) is used to detect the rising or falling edge of the bus voltage when the thyristor is turned on to output a differential signal. The output end of the edge detection circuit unit (1) and the analog-to-digital conversion circuit unit (2) Input terminal connection;

The analog-to-digital conversion circuit unit (2) converts the differential signal into a digital signal, and the output terminal of the analog-to-digital conversion circuit unit (2) is connected to the input terminal of the digital control circuit unit (3);

The digital control circuit unit (3) generates timing and amplitude control signals required by the corresponding bleeder circuit according to the digital signal, the output of the digital control circuit unit (3) and the input of the digital-analog conversion circuit unit (4) End connection

The digital-to-analog conversion circuit unit (4) selects a corresponding level signal at a corresponding time according to the timing and amplitude control signals, and the output terminal of the digital-to-analog conversion circuit unit (4) and the active bleed circuit unit (5) ) Input connection;

The active bleeder circuit unit (5) outputs an active bleeder current signal controlled by the level signal.
The active bleeder control circuit according to claim 1, characterized in that the active bleeder circuit unit (5) includes an operational amplifier (51), a first power transistor (52), and a bleeder resistor (53), so The non-inverting input terminal of the operational amplifier (51) is connected to the output terminal of the digital-analog conversion circuit unit (4), and the output terminal of the operational amplifier (51) is connected to the gate of the first power transistor (52) , The drain of the first power transistor (52) is connected to the rectified bus voltage port (6), the inverting input terminal of the operational amplifier (51), the source of the first power transistor (52) Both are connected to one end of the bleeder resistor (53), and the other end of the bleeder resistor (53) is grounded.
The active bleeder control circuit according to claim 1, characterized in that the active bleeder circuit unit (5) includes a second power transistor (54), a gate of the second power transistor (54) and all The output terminal of the digital-to-analog conversion circuit unit (4) is connected, the drain of the second power transistor (54) is connected to the rectified bus voltage port (6), the second power transistor (54) The source is grounded.
The active bleed control circuit according to claim 2, wherein the edge detection circuit unit (1) includes a JFET transistor (11), a first capacitor (12), a first resistor (13) and a second resistor (14), the gate of the JFET transistor (11) is grounded, the drain of the JFET transistor (11) is connected to the rectified bus voltage port (6), and the source of the JFET transistor (11) Connected to one end of the first capacitor (12), the other end of the capacitor (12) is connected to one end of the first resistor (13), the other end of the first resistor (13) is grounded; the second resistor ( 14) The upper end of the second resistor (14) is connected to the bias voltage source, and the connection point between the lower end of the second resistor (14) and the first capacitor (12) and the first resistor (13) and the analog-to-digital conversion circuit unit ( 2) The input terminal is connected.
The active bleed control circuit according to claim 3, characterized in that the edge detection circuit unit (1) includes a second capacitor (15) and a third resistor (16), the second capacitor (15) One end is connected to the rectified bus voltage port (6), and the other end of the second capacitor (15) is connected to the upper end of the third resistor (16) and the input end of the analog-to-digital conversion circuit unit (2), The lower end of the third resistor (16) is grounded.
The active bleed control circuit according to claim 4, characterized in that the analog-to-digital conversion circuit unit (2) includes a first comparator (21), and the non-inverting input terminal of the first comparator (21) is The lower end of the second resistor (14) is connected, the inverting input end of the first comparator (21) is connected to a first reference voltage source, and the output end of the first comparator (21) is connected to the digital The input terminal of the control circuit unit (3) is connected.
The active bleed control circuit according to claim 5, characterized in that the analog-to-digital conversion circuit unit (2) includes a second comparator (22), an inverting input terminal of the second comparator (22) Connected to the upper end of the third resistor (16), the non-inverting input end of the second comparator (22) is connected to the second reference voltage source, and the output end of the second comparator (22) is connected to the digital The input terminal of the control circuit unit (3) is connected.
The active bleed control circuit according to claim 6, characterized in that the digital control circuit unit (3) has a cyclic initial state, a locked state, a transition state and a hold state, corresponding to different states, the digital control The circuit unit (3) outputs different amplitude control signals.
The active bleed control circuit according to claim 7, characterized in that the digital control circuit unit (3) has a cyclic initial state, a locked state and a hold state, corresponding to different states, the digital control circuit unit ( 3) Output different amplitude control signals.
The active bleeder control circuit according to claim 8 or 9, characterized in that the digital-to-analog conversion circuit unit (4) includes a reference power supply (41), a plurality of voltage-dividing resistors (42) connected in series and a plurality of options A switch (43), the digital-to-analog conversion circuit unit (4) controls the corresponding selection switch (43) to open or close according to the amplitude control signal output by the digital control circuit unit (3), so that the digital-to-analog conversion The circuit unit (4) outputs a level signal corresponding to the timing state.