CN109673079A - A kind of controllable silicon light modulation is actively released control circuit - Google Patents
A kind of controllable silicon light modulation is actively released control circuit Download PDFInfo
- Publication number
- CN109673079A CN109673079A CN201811557333.9A CN201811557333A CN109673079A CN 109673079 A CN109673079 A CN 109673079A CN 201811557333 A CN201811557333 A CN 201811557333A CN 109673079 A CN109673079 A CN 109673079A
- Authority
- CN
- China
- Prior art keywords
- circuit unit
- control circuit
- digital
- signal
- conversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
Abstract
It actively releases control circuit the invention discloses controllable silicon light modulation, dropping along the edge sense circuit unit to export differential signal for busbar voltage up/down when detecting controlled silicon conducting including sequential connection, for differential signal to be converted to shaping and the analog to digital conversion circuit unit of digital signal, digital control circuit unit for timing and amplitude control signal needed for generating corresponding leadage circuit according to digital signal, for controlling the D/A converting circuit unit of level signal and V-I conversion and the active leadage circuit unit of the active bleed current signal for output-controlled level signal control processed accordingly in corresponding selection of time according to timing and amplitude control signal, edge sense circuit unit, V-I conversion and active leadage circuit unit are connect with the bus port after rectification.The present invention realizes that the time of leakage current and amplitude control using Digital Analog Hybrid Circuits, does not need RC Edge check route and generates lock current and locking transit time, improves system integration degree.
Description
Technical field
The present invention relates to controllable silicon light modulation technical field, in particular to a kind of controllable silicon light modulation is actively released control circuit.
Background technique
LED is as a kind of efficient new light sources, and due to long with the service life, low energy consumption, energy conservation and environmental protection, is just being widely used in each
Field illumination.The tunable optical technology of LED develops increasingly mature therewith, and controllable silicon light modulation is most common light modulation skill
Art, light modulation is at low cost, compatible with existing line, is not necessarily to rewiring.When lamps and lanterns are needed through silicon-controlled signal to dim,
The waveform of input voltage deviates sine wave because controlled silicon conducting angle changes in circuit, also just changes the effective of input voltage
Value, to realize light modulation.
But controllable silicon light modulation destroys the waveform of voltage sine wave, to reduce power factor (PF) value, nonsinusoidal waveform
Harmonic constant is increased, serious interference signal can be also generated.It is highly unstable that route is especially dimmed in low-load, therefore
It needs to control the leakage current of controllable silicon light modulation.
The prior art is as shown in Figure 1, generate controlled silicon conducting locking and transition current using independent RC route, with independence
Constant-current circuit generate silicon-controlled holding electric current, but since lock current demand is larger, locking time and transit time again compared with
It is long, therefore, higher requirement is proposed to the big resistance value and large capacitance of external RC route, so that external RC route body
Product it is larger while higher cost, can not the system integration, be unfavorable for the miniaturization of driver.
Summary of the invention
In order to overcome the shortcomings of the prior art, actively releases the present invention provides a kind of controllable silicon light modulation and control electricity
Road does not need RC edge sense circuit and generates lock current and locking transit time, is conducive to the system integration, reduces whole solve
The volume and cost of scheme, the technical solution is as follows:
It actively releases control circuit, including edge sense circuit unit, shaping the present invention provides a kind of controllable silicon light modulation
And analog to digital conversion circuit unit, digital control circuit unit, D/A converting circuit unit and V-I are converted and active leadage circuit list
Member, the edge sense circuit unit, V-I conversion and active leadage circuit unit connect with the busbar voltage port after rectification
It connects；
The rising edge or failing edge of busbar voltage when the edge sense circuit unit is used to detect controlled silicon conducting, with defeated
The output end of differential signal out, the edge sense circuit unit is connect with the input terminal of shaping and analog to digital conversion circuit unit；
The differential signal is converted to digital signal, the shaping and modulus by the shaping and analog to digital conversion circuit unit
The output end of conversion circuit unit is connect with the input terminal of digital control circuit unit；
Timing needed for the digital control circuit unit generates corresponding leadage circuit according to the digital signal and amplitude control
The output end of signal processed, the digital control circuit unit is connect with the input terminal of D/A converting circuit unit；
The D/A converting circuit unit is corresponding in corresponding selection of time according to the timing and amplitude control signal
Level signal is controlled, the output end and V-I of the D/A converting circuit unit are converted and the input terminal of active leadage circuit unit
Connection；
The active leakage current that the V-I conversion and the output of active leadage circuit unit are controlled by the control level signal
Signal.
Preferably, the V-I conversion and active leadage circuit unit include amplifier, the first power transistor and vent discharge
Resistance, the noninverting input of the amplifier are connect with the output end of the D/A converting circuit unit, the output of the amplifier
End is connect with the grid of first power transistor, the drain electrode of first power transistor and the bus electricity after the rectification
The connection of pressure side mouth, one end with the bleeder resistance of source electrode of the reverse input end of the amplifier, the first power transistor
Connection, the other end ground connection of the bleeder resistance.
Optionally, the V-I conversion and active leadage circuit unit include the second power transistor, and second power is brilliant
The grid of body pipe is connect with the output end of the D/A converting circuit unit, the drain electrode of second power transistor with it is described whole
Busbar voltage port connection after stream, the source electrode ground connection of second power transistor.
Preferably, the edge sense circuit unit includes JFET transistor, first capacitor, first resistor and the second electricity
Resistance, the grounded-grid of the JFET transistor, drain electrode and the busbar voltage port after the rectification of the JFET transistor connect
It connects, the source electrode and first capacitor of the JFET transistor, first resistor are linked in sequence, the lower end ground connection of the first resistor；Institute
The upper end access bias voltage of second resistance is stated, the lower end of the second resistance is simultaneously between first capacitor, first resistor
The connection of the input terminal of tie point and the shaping and analog to digital conversion circuit unit.
Optionally, the edge sense circuit unit includes the second capacitor and 3rd resistor, one end of second capacitor
Connect with the busbar voltage port after the rectification, the other end respectively with the upper end of 3rd resistor and shaping and analog to digital conversion circuit
The input terminal of unit connects, the lower end ground connection of the 3rd resistor.
Preferably, the shaping and analog to digital conversion circuit unit include first comparator, the forward direction of the first comparator
Input terminal is connect with the lower end of the second resistance, and the reverse input end of the first comparator accesses the first reference voltage, institute
The output end for stating first comparator is connect with the input terminal of the digital control circuit unit.
Optionally, the shaping and analog to digital conversion circuit unit include the second comparator, second comparator it is reversed
Input terminal is connect with the upper end of the 3rd resistor, and the positive input of second comparator accesses the second reference voltage, institute
The output end for stating the second comparator is connect with the input terminal of the digital control circuit unit.
Preferably, the digital control circuit unit has original state, lock state, transition state and the holding of circulation
State, corresponding different state, the digital control circuit unit export different amplitude control signals.
Optionally, the digital control circuit unit has original state, lock state and the hold mode of circulation, corresponding
Different states, the digital control circuit unit export different amplitude control signals.
Further, the D/A converting circuit unit includes reference power supply, multiple concatenated divider resistances and multiple choosings
Switch is selected, the D/A converting circuit unit controls corresponding according to the amplitude control signal that the digital control circuit unit exports
Selection switch be opened or closed so that the D/A converting circuit unit exports corresponding with time sequence status level signal.
Technical solution bring provided by the invention has the beneficial effect that:
1) silicon-controlled lock current and holding electric current are converted by V-I and active leadage circuit generates, time and amplitude control
It is realized using Digital Analog Hybrid Circuits, therefore does not need RC Edge check route and generate lock current and locking transit time, therefore
As RC value substantially reduces, volume is substantially reduced the miniaturization that driver is realized to be conducive to the system integration；
2) transition state is introduced using digital control circuit, reduces electromagnetic interference, reduces the overall cost of solution；
3) the accurate control to leakage current is realized using V-I conversion and active leadage circuit.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is the solution line for generating controlled silicon conducting locking and transition current using external RC route in the prior art
Lu Tu；
Fig. 2 is that controllable silicon light modulation provided in an embodiment of the present invention is actively released the total topological structure block diagram of control circuit；
Fig. 3 is that the first controllable silicon light modulation provided in an embodiment of the present invention is actively released control circuit preferred layout；
Fig. 4 is that second of controllable silicon light modulation provided in an embodiment of the present invention is actively released the optional line map of control circuit；
Fig. 5 is typical timing waveform provided in an embodiment of the present invention.
Wherein, appended drawing reference includes: 1- edge sense circuit unit, 11-JFET transistor, 12- first capacitor, 13-
One resistance, 14- second resistance, the second capacitor of 15-, 16- 3rd resistor, 2- shaping and analog to digital conversion circuit unit, 21- first compare
Compared with device, the second comparator of 22-, 3- digital control circuit unit, 4- D/A converting circuit unit, 41- reference power supply, 42- partial pressure
Resistance, 43- selection switch, 5-V-I conversion and active leadage circuit unit, 51- amplifier, the first power transistor of 52-, 53-
Bleeder resistance, the second power transistor of 54-, 6- busbar voltage port 6.
Specific embodiment
In order to enable those skilled in the art to better understand the solution of the present invention, below in conjunction in the embodiment of the present invention
Attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is only
The embodiment of a part of the invention, instead of all the embodiments.Based on the embodiments of the present invention, ordinary skill people
The model that the present invention protects all should belong in member's every other embodiment obtained without making creative work
It encloses.
It should be noted that description and claims of this specification and term " first " in above-mentioned attached drawing, "
Two " etc. be to be used to distinguish similar objects, without being used to describe a particular order or precedence order.It should be understood that using in this way
Data be interchangeable under appropriate circumstances, so as to the embodiment of the present invention described herein can in addition to illustrating herein or
Sequence other than those of description is implemented.In addition, term " includes " and " having " and their any deformation, it is intended that cover
It covers and non-exclusive includes.
In one embodiment of the invention, a kind of controllable silicon light modulation is provided actively to release total topology of control circuit
Figure, referring to fig. 2, the control circuit of releasing include edge sense circuit unit 1, shaping and analog to digital conversion circuit unit 2, number
Control circuit unit 3, D/A converting circuit unit 4 and V-I conversion and active leadage circuit unit 5, the edge sense circuit
Unit 1, V-I conversion and active leadage circuit unit 5 are connect with the busbar voltage port 6 after rectification；
The rising edge or failing edge of busbar voltage when the edge sense circuit unit 1 is used to detect controlled silicon conducting, with
Export differential signal V_edge, the output end of the edge sense circuit unit 1 and shaping and analog to digital conversion circuit unit 2 it is defeated
Enter end connection, the differential signal V_edge is inputted into the shaping and analog to digital conversion circuit unit 2；
The differential signal V_edge is converted to digital signal D_shape by the shaping and analog to digital conversion circuit unit 2,
The output end of the shaping and analog to digital conversion circuit unit 2 is connect with the input terminal of digital control circuit unit 3, by the number
Word signal D_shape inputs the digital control circuit unit 3；
The digital control circuit unit 3 timing needed for D_shape generates corresponding leadage circuit according to the digital signal
With amplitude control signal D_ctrl, the output end of the digital control circuit unit 3 and the input terminal of D/A converting circuit unit 4
The timing and amplitude control signal D_ctrl are inputted the D/A converting circuit unit 4 by connection；
The D/A converting circuit unit 4 is according to the timing and amplitude control signal D_ctrl in corresponding selection of time
Corresponding control level signal V_ctrl, the output end and V-I of the D/A converting circuit unit 4 are converted and active leadage circuit
The input terminal of unit 5 connects, and the control level signal V_ctrl is inputted the V-I conversion and active leadage circuit unit
5；
The active that the V-I conversion and the output of active leadage circuit unit 5 are controlled by the control level signal V_ctrl
Bleed current signal I_bleed.
Specifically, the digital signal D_shape after Edge check output signal V_edge, shaping, digital controlled signal D_
Ctrl, timing signal of actively releasing turn the typical timing wave of analog control signal V_ctrl, active bleed current signal I_bleed
Shape is as shown in Figure 5, it can be seen that when the busbar voltage port output through over commutation deviates the voltage of sinusoidal waveform, number control
Circuit and D/A converting circuit control processed generates locking time, transit time, retention time corresponding voltage, and then by the V-
I conversion and active leadage circuit unit 5 are converted to corresponding lock current, transition current and keep electric current, and accurate control is let out
Discharge stream.
It actively releases total topological diagram of control circuit for the controllable silicon light modulation of Fig. 2, specifically has at least following two can be real
Mode is applied, no matter which kind of mode is used, working principle is identical as the working principle of above-mentioned total topological diagram and process, only has
Body discloses edge sense circuit unit 1, shaping and analog to digital conversion circuit unit 2, digital control circuit unit 3, digital-to-analogue conversion
The specific route of circuit unit 4 and V-I conversion and active leadage circuit unit 5, individually below makes two kinds of embodiments
It illustrates:
Embodiment 1
In the first preferred embodiment, referring to Fig. 3, the edge sense circuit unit 1 include JFET transistor 11,
First capacitor 12, first resistor 13 and second resistance 14, the grounded-grid of the JFET transistor 11, the JFET transistor 11
Drain electrode connect with the busbar voltage port 6 after the rectification, the source electrode of the JFET transistor 11 and first capacitor 12, first
Resistance 13 is linked in sequence, the lower end ground connection of the first resistor 13；Bias voltage is accessed in the upper end of the second resistance 14, described
The tie point between first capacitor 12, first resistor 13 and the shaping simultaneously of the lower end of second resistance 14 and analog-to-digital conversion electricity
The input terminal of road unit 2 connects.Wherein, the shaping and 2 structure of analog to digital conversion circuit unit are as follows:
The shaping and analog to digital conversion circuit unit 2 include first comparator 21, and the forward direction of the first comparator 21 is defeated
Enter end to connect with the lower end of the second resistance 14, the reverse input end of the first comparator 21 accesses the first reference voltage V_
Ref1, the output end of the first comparator 21 are connect with the input terminal of the digital control circuit unit 3.Wherein, the number
3 structure of word control circuit unit is as follows:
The digital control circuit unit 3 has original state, lock state, transition state and the hold mode of circulation,
Corresponding different state, the digital control circuit unit 3 export different amplitude control signals.
Exporting corresponding with digital control circuit unit 3 is D/A converting circuit unit 4, specifically include reference power supply 41,
Multiple concatenated divider resistances 42 and multiple selection switches 43, the D/A converting circuit unit 4 is according to the digital control electricity
The corresponding selection switch 43 of amplitude control signal control that road unit 3 exports is opened or closed, so that the D/A converting circuit
Unit 4 exports level signal corresponding with time sequence status, including corresponding to the block level of locking time, corresponding to transit time
Transitional level, the holding level corresponding to the retention time.
Referring to Fig. 3, the V-I conversion and active leadage circuit unit 5 include amplifier 51,52 and of the first power transistor
Bleeder resistance 53, the noninverting input of the amplifier 51 is connect with the output end of the D/A converting circuit unit 4 (to be obtained pair
Answer the level signal of time sequence status), the output end of the amplifier 51 is connect with the grid of first power transistor 52, institute
The drain electrode for stating the first power transistor 52 is connect with the busbar voltage port 6 after the rectification, the amplifier 51 it is reversed defeated
Enter end, the first power transistor 52 source electrode connect with one end of the bleeder resistance 53, the bleeder resistance 53 it is another
End ground connection, in the case, the leakage current is calculated by the following formula to obtain:
I_bleed=V_ctrlRs, wherein I_bleed is controlled active leakage current, and V_ctrl is digital-to-analogue conversion electricity
The voltage that road unit 4 exports, RsFor 53 resistance value of bleeder resistance, wherein V_ctrl is with original state, lock state, transition state
Different voltage values is exported with the timing variations of hold mode.
It actively releases the preferred embodiment of control circuit the above are controllable silicon light modulation, the advantage is that bilateral can detect
To adapt to two kinds of controllable silicon dimmers of rising edge and failing edge, the introducing of transition state can substantially reduce electromagnetic interference (EMI),
Accurate control leakage current.
Embodiment 2
In the first optional embodiment, unlike the first embodiment, the edge sense circuit unit in the present embodiment
1 does not include the second resistance 14 of JFET transistor 11 and access bias voltage, and referring to fig. 4, the edge sense circuit unit 1 wraps
The second capacitor 15 and 3rd resistor 16 are included, one end of second capacitor 15 is connect with the busbar voltage port 6 after the rectification,
The other end is connect with the input terminal of the upper end of 3rd resistor 16 and shaping and analog to digital conversion circuit unit 2 respectively, the third electricity
The lower end of resistance 16 is grounded, and the edge sense circuit unit 1 in the present embodiment can only adapt to rising edge controllable silicon dimmer.Wherein,
The shaping and 2 structure of analog to digital conversion circuit unit are as follows:
Unlike the first embodiment, in the present embodiment the second comparator 22 of shaping and analog to digital conversion circuit unit 2 it is anti-
It is connect to input terminal with the upper end of the 3rd resistor 16, the positive input of second comparator 22 accesses the second benchmark electricity
V_ref2 is pressed, the output end of second comparator 22 is connect with the input terminal of the digital control circuit unit 3.Wherein, institute
It is as follows to state 3 structure of digital control circuit unit:
The digital control circuit unit 3 has original state, lock state and the hold mode of circulation, and correspondence is different
State, the digital control circuit unit 3 export different amplitude control signals.As can be seen that unlike the first embodiment,
Three kinds of states of digital control circuit unit 3 output in the present embodiment, that is, lacked transition state, therefore, lacked transit time
Control is can not generate transition current, EMI higher.
The structure phase of corresponding with the output of the digital control circuit unit 3 D/A converting circuit unit 4 and embodiment 1
Together, but since the digital control circuit unit 3 exports three kinds of time sequence status, the D/A converting circuit in the present embodiment
Unit 4 exports block level and keeps level, and without transitional level.
Unlike the first embodiment, in the present embodiment, the V-I conversion and active leadage circuit unit 5 do not include putting
Big device 51 and bleeder resistance 53, as shown in figure 4, V-I conversion and active leadage circuit unit 5 include the second power transistor
54, the grid of second power transistor 54 is connect with the output end of the D/A converting circuit unit 4, second power
The drain electrode of transistor 54 is connect with the busbar voltage port 6 after the rectification, the source electrode ground connection of second power transistor 54.
In the case, the leakage current is calculated by the following formula to obtain:
I_bleed=Beta* (V_ctl-VTH)2, wherein I_bleed is controlled active leakage current, Beta second
The conductive factor of power transistor 54, V_ctrl are the voltage that D/A converting circuit unit 4 exports, VTHFor the second power transistor
54 threshold voltage, wherein V_ctrl is exported different with the timing variations of original state, lock state and hold mode
Voltage value.By calculation formula as can be seen that the leakage current of the present embodiment is to be calculated by classical formulas, and lacked
In the case that degree state controls, the control of active leakage current is inaccurate.But compared with embodiment 1 for, the cost of the present embodiment 2 compared with
Low, implementation method is simple.
Present invention only requires utilize busbar voltage rising edge when RC wireline inspection controlled silicon conducting or failing edge, silicon-controlled lock
Constant current and holding electric current are converted by V-I and active leadage circuit unit generates, and after time and amplitude control are by RC route
Continuous Digital Analog Hybrid Circuits are realized, are not needed RC Edge check route and are generated lock current and locking transit time, reduce whole
The volume and cost of body solution improve system integration degree.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
- The control circuit 1. a kind of controllable silicon light modulation is actively released, which is characterized in that including edge sense circuit unit (1), shaping And analog to digital conversion circuit unit (2), digital control circuit unit (3), D/A converting circuit unit (4) and V-I are converted and active Leadage circuit unit (5), the edge sense circuit unit (1), V-I conversion and active leadage circuit unit (5) with rectification Busbar voltage port (6) connection afterwards；The rising edge or failing edge of busbar voltage when the edge sense circuit unit (1) is used to detect controlled silicon conducting, with defeated The input terminal of differential signal out, the output end of the edge sense circuit unit (1) and shaping and analog to digital conversion circuit unit (2) Connection；The differential signal is converted to digital signal, the shaping and modulus by the shaping and analog to digital conversion circuit unit (2) The output end of conversion circuit unit (2) is connect with the input terminal of digital control circuit unit (3)；Timing needed for the digital control circuit unit (3) generates corresponding leadage circuit according to the digital signal and amplitude control The output end of signal, the digital control circuit unit (3) is connect with the input terminal of D/A converting circuit unit (4)；The D/A converting circuit unit (4) controls according to the timing and amplitude control signal in corresponding selection of time accordingly Level signal processed, the output end of the D/A converting circuit unit (4) converted with V-I and active leadage circuit unit (5) it is defeated Enter end connection；The active leakage current that the V-I conversion and active leadage circuit unit (5) output are controlled by the control level signal Signal.
- 2. control circuit according to claim 1 of actively releasing, which is characterized in that the V-I conversion and active vent discharge Road unit (5) includes amplifier (51), the first power transistor (52) and bleeder resistance (53), the amplifier (51) it is in the same direction Input terminal is connect with the output end of the D/A converting circuit unit (4), the output end and described first of the amplifier (51) The grid of power transistor (52) connects, drain electrode and the busbar voltage end after the rectification of first power transistor (52) Mouthful (6) connection, the reverse input end of the amplifier (51), the first power transistor (52) source electrode with the bleeder resistance (53) one end connection, the other end ground connection of the bleeder resistance (53).
- 3. control circuit according to claim 1 of actively releasing, which is characterized in that the V-I conversion and active vent discharge Road unit (5) includes the second power transistor (54), the grid of second power transistor (54) and digital-to-analogue conversion electricity The output end of road unit (4) connects, drain electrode and the busbar voltage port after the rectification of second power transistor (54) (6) it connects, the source electrode ground connection of second power transistor (54).
- 4. control circuit according to claim 2 of actively releasing, which is characterized in that the edge sense circuit unit (1) Including JFET transistor (11), first capacitor (12), first resistor (13) and second resistance (14), the JFET transistor (11) Grounded-grid, the drain electrode of the JFET transistor (11) connect with the busbar voltage port (6) after the rectification, the JFET The source electrode of transistor (11) and first capacitor (12), first resistor (13) are linked in sequence, the lower termination of the first resistor (13) Ground；Bias voltage, the lower end of the second resistance (14) while and first capacitor are accessed in the upper end of the second resistance (14) (12), the input terminal of the tie point between first resistor (13) and the shaping and analog to digital conversion circuit unit (2) connects.
- 5. control circuit according to claim 3 of actively releasing, which is characterized in that the edge sense circuit unit (1) Including the second capacitor (15) and 3rd resistor (16), one end and the busbar voltage end after the rectification of second capacitor (15) Mouth (6) connection, the other end connect with the input terminal of the upper end of 3rd resistor (16) and shaping and analog to digital conversion circuit unit (2) respectively It connects, the lower end ground connection of the 3rd resistor (16).
- 6. control circuit according to claim 4 of actively releasing, which is characterized in that the shaping and analog to digital conversion circuit list First (2) include first comparator (21), under the positive input of the first comparator (21) and the second resistance (14) End connection, the reverse input end of the first comparator (21) access the first reference voltage, the first comparator (21) it is defeated Outlet is connect with the input terminal of the digital control circuit unit (3).
- 7. control circuit according to claim 5 of actively releasing, which is characterized in that the shaping and analog to digital conversion circuit list First (2) include the second comparator (22), and the reverse input end of second comparator (22) is upper with the 3rd resistor (16) End connection, the positive input of second comparator (22) access the second reference voltage, second comparator (22) it is defeated Outlet is connect with the input terminal of the digital control circuit unit (3).
- 8. control circuit according to claim 6 of actively releasing, which is characterized in that the digital control circuit unit (3) Original state, lock state, transition state and hold mode with circulation, corresponding different state, the digital control electricity Road unit (3) exports different amplitude control signals.
- 9. control circuit according to claim 7 of actively releasing, which is characterized in that the digital control circuit unit (3) Original state, lock state and hold mode with circulation, corresponding different state, the digital control circuit unit (3) Export different amplitude control signals.
- 10. control circuit of actively releasing according to claim 8 or claim 9, which is characterized in that the D/A converting circuit unit It (4) include reference power supply (41), multiple concatenated divider resistances (42) and multiple selections switch (43), the D/A converting circuit Unit (4) is disconnected according to the corresponding selection switch (43) of amplitude control signal control that the digital control circuit unit (3) exports It opens or is closed, so that the D/A converting circuit unit (4) exports level signal corresponding with time sequence status.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811557333.9A CN109673079A (en) | 2018-12-19 | 2018-12-19 | A kind of controllable silicon light modulation is actively released control circuit |
| PCT/CN2019/083202 WO2020124899A1 (en) | 2018-12-19 | 2019-04-18 | Silicon controlled dimming active bleeder control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811557333.9A CN109673079A (en) | 2018-12-19 | 2018-12-19 | A kind of controllable silicon light modulation is actively released control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109673079A true CN109673079A (en) | 2019-04-23 |
Family
ID=66144410
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811557333.9A Pending CN109673079A (en) | 2018-12-19 | 2018-12-19 | A kind of controllable silicon light modulation is actively released control circuit |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109673079A (en) |
| WO (1) | WO2020124899A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117458848A (en) * | 2023-12-26 | 2024-01-26 | 西安荣耀终端有限公司 | Power bus bleeder circuit, display device and power adapter |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110266968A1 (en) * | 2010-04-30 | 2011-11-03 | Osram Gesellschaft Mit Beschraenkter Haftung | Method and device for obtaining conduction angle, method and device for driving led |
| CN107846756A (en) * | 2017-11-29 | 2018-03-27 | 深圳音浮光电股份有限公司 | LED light modulating devices |
| CN108463030A (en) * | 2018-04-18 | 2018-08-28 | 矽力杰半导体技术(杭州)有限公司 | LED drive circuit, circuit module with controllable silicon dimmer and control method |
| CN209462665U (en) * | 2018-12-19 | 2019-10-01 | 苏州菲达旭微电子有限公司 | A kind of controllable silicon light modulation is actively released control circuit |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120080908A (en) * | 2011-01-10 | 2012-07-18 | 페어차일드코리아반도체 주식회사 | Apparatus for controlling bleed switch, power supply, and method for driving power supply |
| EP2590477B1 (en) * | 2011-11-07 | 2018-04-25 | Silergy Corp. | A method of controlling a ballast, a ballast, a lighting controller, and a digital signal processor |
| US9408261B2 (en) * | 2013-05-07 | 2016-08-02 | Power Integrations, Inc. | Dimmer detector for bleeder circuit activation |
| CN205029943U (en) * | 2015-10-22 | 2016-02-10 | 成都绿洲电子有限公司 | LED driver based on damping circuit |
| CN205051938U (en) * | 2015-10-22 | 2016-02-24 | 成都绿洲电子有限公司 | Active offset voltage type LED drive circuit who adjusts of phase place |
| CN205040078U (en) * | 2015-10-22 | 2016-02-17 | 成都绿洲电子有限公司 | Anti EMI's offset -type LED drive circuit |
| CN106793352B (en) * | 2017-04-06 | 2018-11-13 | 矽力杰半导体技术(杭州)有限公司 | LED drive circuit, circuit module with controllable silicon dimmer and control method |
-
2018
- 2018-12-19 CN CN201811557333.9A patent/CN109673079A/en active Pending
-
2019
- 2019-04-18 WO PCT/CN2019/083202 patent/WO2020124899A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110266968A1 (en) * | 2010-04-30 | 2011-11-03 | Osram Gesellschaft Mit Beschraenkter Haftung | Method and device for obtaining conduction angle, method and device for driving led |
| CN107846756A (en) * | 2017-11-29 | 2018-03-27 | 深圳音浮光电股份有限公司 | LED light modulating devices |
| CN108463030A (en) * | 2018-04-18 | 2018-08-28 | 矽力杰半导体技术(杭州)有限公司 | LED drive circuit, circuit module with controllable silicon dimmer and control method |
| CN209462665U (en) * | 2018-12-19 | 2019-10-01 | 苏州菲达旭微电子有限公司 | A kind of controllable silicon light modulation is actively released control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020124899A1 (en) | 2020-06-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN206042434U (en) | Lighting drive circuit and lighting system | |
| CN105792441B (en) | A kind of linear constant current circuit for controllable silicon light modulation | |
| CN205105426U (en) | Automatic linear constant current LED drive circuit of full voltage sectional type of switching mode | |
| CN105282929A (en) | Full voltage segmented linear constant current LED drive circuit capable of switching modes automatically | |
| CN101977469B (en) | Adjustable LED drive power supply | |
| CN105939554A (en) | LED dimming apparatus and LED driving power supply | |
| CN106658838A (en) | Lighting device, control chip, linear dimming system and linear dimming method | |
| CN202340339U (en) | LED (light-emitting diode) illumination power supply and drive control system | |
| CN209462665U (en) | A kind of controllable silicon light modulation is actively released control circuit | |
| CN105025636B (en) | LED light adjusting circuits | |
| CN105007668B (en) | LED light adjusting systems | |
| CN109673079A (en) | A kind of controllable silicon light modulation is actively released control circuit | |
| CN206024154U (en) | LED light modulating devices and LED drive power | |
| CN105792433B (en) | Switching Power Supply driving chip and controllable silicon light modulation LED drive circuit | |
| CN107197561A (en) | A kind of LED energy saving light modulators based on straight edge line voltage signal | |
| CN103687150A (en) | Non-overshoot LED linear constant current drive circuit | |
| CN206196097U (en) | Lighting device , control chip and linear dimming system | |
| CN109951921A (en) | A kind of knob lamp operating circuit and hand-held lamp | |
| CN202799315U (en) | Overshoot-free light-emitting diode (LED) linear constant current drive circuit | |
| CN103338563B (en) | Alternating current LED driving circuit free from influence of power grid fluctuation | |
| CN201821272U (en) | Three-wire dimmer | |
| CN206851090U (en) | A kind of LED energy saving light modulators based on straight edge line voltage signal | |
| CN209345428U (en) | Lamp control circuit and lamps and lanterns | |
| CN203632549U (en) | Energy-feedback LED array interface circuit | |
| CN207802450U (en) | The light source driving circuit and light source module of tunable optical |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |