WO2020119796A1 - 指令处理方法和芯片 - Google Patents

指令处理方法和芯片 Download PDF

Info

Publication number
WO2020119796A1
WO2020119796A1 PCT/CN2019/125296 CN2019125296W WO2020119796A1 WO 2020119796 A1 WO2020119796 A1 WO 2020119796A1 CN 2019125296 W CN2019125296 W CN 2019125296W WO 2020119796 A1 WO2020119796 A1 WO 2020119796A1
Authority
WO
WIPO (PCT)
Prior art keywords
search
unit
data
search engine
engine unit
Prior art date
Application number
PCT/CN2019/125296
Other languages
English (en)
French (fr)
Inventor
佟兴
高红亮
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP19894659.2A priority Critical patent/EP3723330A4/en
Publication of WO2020119796A1 publication Critical patent/WO2020119796A1/zh
Priority to US16/922,457 priority patent/US11442735B2/en

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90—Details of database functions independent of the retrieved data types
    • G06F16/95—Retrieval from the web
    • G06F16/953—Querying, e.g. by the use of web search engines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047—Prefetch instructions; cache control instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30061—Multi-way branch instructions, e.g. CASE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H04L45/745—Address table lookup; Address filtering
    • H04L45/74591—Address table lookup; Address filtering using content-addressable memories [CAM]

Definitions

  • the present application relates to communication technology, in particular to an instruction processing method and chip.
  • NPs multi-core and multi-thread network processors
  • the chip has a thread unit, a search engine unit, a memory unit and a tri-state content addressable memory (ternary content addressable memory, TCAM) unit.
  • TCAM tri-state content addressable memory
  • the thread unit in the chip sends a search instruction to the search engine unit during the processing of the instruction.
  • the search instruction includes the specific address of the data.
  • the thread unit will run (RUN)
  • the state enters the WAIT state; the search engine unit finds the data indicated by the specific address of the data from the memory unit, where the data includes multiple fields; then, the search engine unit returns the obtained data to the thread unit
  • the thread unit enters the RUN state from the WAIT state; then, the thread unit sends the key for branch search to the TCAM unit.
  • the thread unit enters the WAIT state from the RUN state; the TCAM unit will determine The program pointer corresponding to the key is returned to the thread unit.
  • the thread unit enters the RUN state in the WAIT state.
  • the thread unit in the chip performs two state switching processes, and each time the state switching process switches between the RUN state and the WAIT state; thus, the instruction processing process of the thread unit may be caused by the thread
  • the unit enters the WAIT state and is interrupted twice, and when the thread unit enters the RUN state again, the thread unit needs to repeat the steps that have been executed, which will cause the thread unit's instruction processing process to be slow, resulting in the chip's core
  • the operating efficiency is relatively low, which further leads to a lower operating efficiency of the chip.
  • the present application provides an instruction processing method and a chip to solve the problem of low operating efficiency of the chip.
  • the present application provides an instruction processing method, which is applied to a chip.
  • the chip includes a thread unit and a search engine unit, including:
  • the thread unit sends a search instruction to the search engine unit, where the search instruction includes a data address and a first search field;
  • the search engine unit determines the data indicated by the data address and the program pointer indicated by the first search field according to the search instruction
  • the search engine unit sends the data and the program pointer to the thread unit.
  • the search engine unit determines the data address according to the search instruction The indicated data and the program pointer indicated by the first search field; the thread unit receives the data and the program pointer sent by the search engine unit, and then the thread unit switches from the WAIT state to the RUN state.
  • the thread unit because the thread unit only needs to initiate a search instruction, the data and program pointers required by the thread unit can be obtained, so that the thread unit only switches once from the RUN state to the WAIT state, reducing the thread unit switching to The number of times in the WAIT state, which can speed up the instruction processing process of the thread unit, speed up the operation efficiency of the chip core and the operation efficiency of the chip.
  • the chip further includes a tri-state content addressable memory TCAM unit, the TCAM unit is provided in the search engine unit; the search engine unit determines the data according to the search instruction
  • the data indicated by the address and the program pointer indicated by the first search field include:
  • the search engine unit determines the data according to the data address
  • the search engine unit determines search keywords based on the data and the first search field
  • the search engine unit sends the search keyword and the data to the TCAM unit;
  • the TCAM unit determines the program pointer according to the search key.
  • the chip further includes a tri-state content addressable memory TCAM unit, the TCAM unit is connected to the search engine unit; the search engine unit determines the data address according to the search instruction
  • the indicated data and the program pointer indicated by the first search field include:
  • the search engine unit determines the data according to the data address
  • the search engine unit determines search keywords based on the data and the first search field
  • the search engine unit sends the search keyword to the TCAM unit
  • the TCAM unit determines the program pointer according to the search key, and sends the program pointer to the search engine unit.
  • the chip further includes a memory unit, and the search engine unit determines the data according to the data address, including:
  • the search engine unit sends the data address to the memory unit
  • the memory unit determines the data indicated by the data address according to the data address, and sends the data indicated by the data address to the search engine unit.
  • the search instruction further includes a search identifier, and the search identifier is used to identify a second search field; the search engine unit determines a search key based on the data and the first search field Words, including:
  • the search engine unit determines the second search field in the data according to the search identifier
  • the search engine unit generates the search keyword based on the first search field and the second search field.
  • the search key includes the first search field, the priority of the first search field, the second search field, and the priority of the second search field.
  • the method before the thread unit sends a search instruction to the search engine unit, the method further includes:
  • the thread unit obtains a message and generates the first search field according to any field in the message.
  • the arbitrary field is the destination address of the data.
  • the method before the thread unit sends a search instruction to the search engine unit, the method further includes:
  • the thread unit obtains a message and generates the first search field according to the message.
  • the present application provides a chip including: a thread unit and a search engine unit, wherein the thread unit is connected to the search engine unit;
  • the thread unit is configured to send a search instruction to the search engine unit, where the search instruction includes a data address and a first search field;
  • the search engine unit is configured to determine the data indicated by the data address and the program pointer indicated by the first search field according to the search instruction; send the data and the program pointer to the Thread unit.
  • the chip includes a thread unit and a search engine unit; the thread unit sends a search instruction to the search engine unit, where the search instruction includes a data address and a first search field, and then the thread unit switches from the RUN state to the WAIT state;
  • the search engine unit determines the data indicated by the data address and the program pointer indicated by the first search field according to the search instruction; the thread unit receives the data and the program pointer sent by the search engine unit, and then the thread unit switches from the WAIT state to the RUN state.
  • the thread unit because the thread unit only needs to initiate a search instruction, the data and program pointers required by the thread unit can be obtained, so that the thread unit only switches once from the RUN state to the WAIT state, reducing the thread unit switching to The number of times in the WAIT state, which can speed up the instruction processing process of the thread unit, speed up the operation efficiency of the chip core and the operation efficiency of the chip.
  • the chip further includes a tri-state content addressable memory TCAM unit, and the TCAM unit is provided in the search engine unit;
  • the search engine unit includes a request processing module and a result processing module, and the request processing module is connected to the result processing module;
  • the TCAM unit includes a receiving module, a determining module, and a sending module, the receiving module, and the sending module Connected to the determination module respectively;
  • the request processing module is configured to determine the data according to the data address
  • the result processing module is used to obtain the data and determine a search keyword based on the data and the first search field;
  • the receiving module is configured to receive the search keyword and the data sent by the result processing module
  • the determining module is configured to determine the program pointer according to the search keyword
  • the sending module is configured to send the data and the program pointer to the thread unit.
  • the chip further includes a tri-state content addressable memory TCAM unit, and the TCAM unit is connected to the search engine unit;
  • the search engine unit includes a request processing module and a result processing module, and the request processing module is connected to the result processing module;
  • the TCAM unit includes a receiving module, a determining module, and a sending module, the receiving module, and the sending module Connected to the determination module respectively;
  • the request processing module is configured to determine the data according to the data address
  • the result processing module is used to obtain the data and determine a search keyword based on the data and the first search field;
  • the receiving module is configured to receive the search keyword sent by the result processing module
  • the determining module is configured to determine the program pointer according to the search keyword
  • the sending module is used to send the program pointer to the result processing module
  • the result processing module is also used to send the data and the program pointer to the thread unit.
  • the chip further includes a memory unit, and the memory unit is respectively connected to the request processing module and the result processing module;
  • the request processing module is configured to send the data address to the memory unit
  • the memory unit is configured to determine the data indicated by the data address according to the data address, and send the data indicated by the data address to the result processing module.
  • the search instruction further includes a search identifier, and the search identifier is used to identify a second search field; the result processing module is specifically used to:
  • the search key includes the first search field, the priority of the first search field, the second search field, and the priority of the second search field.
  • the thread unit is also used for:
  • the arbitrary field is the destination address of the data.
  • the present application provides an instruction processing device, including at least one chip for performing any method of the above first aspect.
  • the present application provides a computer storage medium, the computer storage medium including instructions that, when run on a computer, cause the computer to perform the method described in the first aspect above.
  • the present application provides a computer program product that includes instructions that, when run on a computer, cause the computer to perform the method described in the first aspect above.
  • FIG. 1 is a schematic structural diagram of a router provided by an embodiment of this application.
  • FIG. 2 is a schematic structural diagram of a chip provided by an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of another chip provided by an embodiment of the present application.
  • FIG. 4 is a schematic flowchart of an instruction processing method provided by an embodiment of the present application.
  • FIG. 5 is a schematic flowchart of another instruction processing method provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a format of a search instruction provided by an embodiment of this application.
  • FIG. 7 is a schematic diagram of a format of a branch search instruction provided by an embodiment of this application.
  • FIG. 8 is a schematic block diagram of a chip provided by an embodiment of the present application.
  • FIG. 9 is a schematic block diagram of a chip provided by an embodiment of this application.
  • FIG. 10 is a schematic block diagram of another chip provided by an embodiment of the present application.
  • FIG. 11 is a schematic block diagram of an instruction processing device provided by an embodiment of the present application.
  • the embodiments of the present application may be applied to a chip or any device that can execute the embodiments of the present application. Some terms in the present application are explained below to facilitate understanding by those skilled in the art. It should be noted that when the solution of the embodiment of the present application is applied to a chip or any device that can execute the embodiment of the present application, the name of each unit or module may change, but this does not affect the solution of the embodiment of the present application Implementation.
  • the communication system may be, for example, a wireless local area network (wireless local area network, WLAN) system, a global mobile communication (global system) of mobile communication (GSM) system, a code division multiple access (code division multiple access, CDMA) system, and a broadband code division Multi-access (wideband code division multiple access, WCDMA) system, general packet radio service (general packet radio service (GPRS), long-term evolution (LTE) system, LTE frequency division duplex (FDD) system , LTE time division duplex (TDD), universal mobile communication system (universal mobile telecommunications system, UMTS), global interconnected microwave access (worldwide interoperability for microwave access, WiMAX) communication system, and future fifth-generation mobile Communication technology (the 5th Generation mobile (communication 5G) system or other systems that may appear in the future.
  • WLAN wireless local area network
  • GSM global mobile communication
  • CDMA code division multiple access
  • WCDMA broadband code division Multi-access
  • GPRS general packet radio service
  • LTE long-term evolution
  • a network processor can have multiple cores; multiple cores can execute their instructions in parallel.
  • Thread A core can be configured with multiple threads, and only one thread in a core can execute instructions at a time, that is, only one thread in a core can be running (RUN) at the same time.
  • PC Program pointer
  • TCAM mainly used to quickly find the program pointer.
  • Multiple means two or more, and other quantifiers are similar.
  • “And/or” describes the relationship of the related objects, indicating that there can be three relationships, for example, A and/or B, which can indicate: there are three conditions: A exists alone, A and B exist at the same time, and B exists alone.
  • the character "/” generally indicates that the related object is a "or” relationship.
  • Correspondence may refer to an association relationship or binding relationship, and A and B correspondingly refer to an association relationship or binding relationship between A and B.
  • the multi-core multi-threaded chip is an important device of the network equipment.
  • the multi-core multi-threaded chip is the core device of the data communication device forwarding plane.
  • the data throughput of chips has become larger and larger.
  • the data throughput of chips has increased from 100 gigabits per second (Gbps) to 1 terabits per second (terabits per second, Tbps), it can be seen that the throughput of the chip has increased by 10 times; as the data throughput of the chip becomes larger and larger, in order to ensure the performance of thread processing, the number of cores of the chip needs to be increased; but the number of cores of the chip increases, it will The chip area and power consumption are higher. If the efficiency in processing messages by the core can be improved, the number of processing cores can be reduced.
  • a chip has multiple cores, and multiple cores can execute their instructions in parallel; a core can have multiple threads. When the core processes the thread, it executes each instruction in turn.
  • the execution process of an instruction is divided into multiple stages, for example, the following six stages: instruction feeding (Instruction) feed stage, instruction decoding (Instruction Decode) stage, read register (Resister Read) stage, Data selection (Data) Select phase, execution (Execute) phase, write back (Write Back) phase; the execution of each phase requires 1 clock cycle.
  • instruction feeding Instruction
  • Instruction Decode Instruction Decode
  • Read Read register
  • Data Data selection
  • execution Executecute phase
  • write back phase write back
  • the execution of each phase requires 1 clock cycle.
  • HALT Pause (HALT) state: When the thread starts, the thread defaults to the HALT state, and the chip can switch the thread from the HALT state to the RUN state.
  • RUN state When a thread executes an instruction, the thread is in a RUN state. When the following conditions occur, the thread goes from RUN state to WAIT state: In the first case, the thread executes a jump instruction, at this time the thread will automatically jump to WAIT state, and the thread will then jump to the destination program pointer. Return to the RUN state; in the second case, the thread initiates an instruction to access memory, or the TCAM access waits for the result to return. At this time, the thread will enter the WAIT state, and then return to the RUN state when the result returns.
  • WAIT state When the thread waits for the memory access result to return, or the thread waits for the destination program pointer, the thread is in the WAIT state.
  • WAIT_NPKT Waiting for the new message to enter (WAIT_NPKT) state: when the thread is waiting for a new message, the thread is in the WAIT_NPKT state; after the thread has processed a message, the thread will enter the WAIT_NPKT state from the RUN state.
  • the chip includes 4 circuit units: a thread unit, a TCAM unit, a search engine unit, and a memory unit; wherein, the memory unit includes memory inside the chip and memory outside the chip, for example, the memory outside the chip is a memory module.
  • the thread unit sends a search instruction to the search engine unit, where the search instruction includes the specific address of the data.
  • the thread unit will enter the WAIT state from the RUN state; the search engine unit from the memory The data indicated by the specific address of the data is found in the unit, where the data includes multiple fields; then, the search engine unit returns the acquired data to the thread unit.
  • the thread unit enters the RUN state from the WAIT state; It can be seen that the search engine unit completes the interface conversion between the memory unit and the thread unit.
  • the search engine unit is actually a path; then, the thread unit sends the key for branch search to the TCAM unit.
  • the thread unit enters from RUN to WAIT state; the TCAM unit returns the program pointer corresponding to the determined key to the thread unit.
  • the thread unit enters the RUN state in the WAIT state.
  • the thread unit extracts the destination network protocol (IP) address from the packet header of the message, and then assigns the destination IP address to the field D.
  • IP network protocol
  • the thread unit is in the RUN state.
  • the engine unit returns table1, and the return of the waiting result is delayed, so that the thread unit will enter the WAIT state from the RUN state.
  • the search engine unit finds the table1 indicated by the specific address of the data from the memory unit, where table1 includes field A, field B, and field C; the search engine unit returns table1 to the thread unit, and at this time, the thread unit is in the WAIT state Enter the RUN state.
  • the thread unit sends a switch-case instruction to the TCAM unit.
  • the switch-case instruction includes the key for branch search.
  • the TCAM unit needs to obtain the corresponding program pointer according to the fields A, B, C, and D, There is also a delay in the search of the TCAM unit, so that the thread unit enters the WAIT state again from the RUN state.
  • the TCAM unit can determine that the program pointer corresponding to field A is PC1, the program pointer corresponding to field B is PC2, the program pointer corresponding to field C is PC3, and the program pointer corresponding to field D is PC4, and then the TCAM unit determines the key correspondence based on the above Program pointer; then, the TCAM unit returns the determined program pointer corresponding to the key to the thread unit. At this time, the thread unit enters the RUN state in the WAIT state.
  • the thread unit has completed two switching from RUN state to WAIT state; when the thread unit is interrupted, and the thread unit enters the RUN state again, the thread unit needs to repeatedly obtain some instructions, so the thread unit needs to be executed repeatedly The steps that have already been executed will result in a lower operating efficiency of the core of the chip.
  • the method provided in this application can be applied to a chip, or to a processor, or to a central processor, which is not limited in this application.
  • the chip can perform data search and branch search.
  • the forwarding engine ASIC application specific integrated circuit, ASIC
  • ASIC application specific integrated circuit
  • the chip provided in this application can be applied to a router, or to a terminal, or to a server, which is not limited in this application.
  • the chip can be used as a forwarding plane of the router, and then the chip is responsible for fast forwarding of data packets.
  • FIG. 1 is a schematic structural diagram of a router provided by an embodiment of this application.
  • the router includes a network processor 01, a media access control (MAC) unit 02, a central processing unit (CPU) 03, and a traffic manager (TM) 04;
  • the network processor is a chip involved in this application.
  • the MAC unit 02, CPU03, TM04 are connected to the network processor 01 respectively.
  • FIG. 2 is a schematic structural diagram of a chip provided by an embodiment of the present application
  • FIG. 3 is a structural schematic diagram of another chip provided by an embodiment of the present application.
  • the chip mainly includes a thread unit 05, a search Engine unit 06, TCAM unit 07 and memory unit 08.
  • the thread unit 05 is connected to the search engine unit 06
  • the search engine unit 06 is connected to the memory unit 08
  • the memory unit 08 is set in the TCAM unit 07
  • the thread unit 05 is connected to the search engine unit 06 is connected
  • the search engine unit 06 is connected to the memory unit 08
  • the search engine unit 06 is connected to the TCAM unit 07.
  • the search engine unit 06 may be an intelligent search engine.
  • FIG. 4 is a schematic flowchart of an instruction processing method provided by an embodiment of the present application. The method is applied to a chip, which includes a thread unit and a search engine unit. As shown in Figure 4, the method includes:
  • the thread unit sends a search instruction to the search engine unit, where the search instruction includes a data address and a first search field.
  • the thread unit of the chip generates a search instruction, wherein the search instruction includes a data address and a first search field, the data address may indicate the data that the thread unit needs to search, and the first search field is used to indicate the need of the thread unit The obtained program pointer; then, the thread unit sends the search instruction to the search engine unit. At this time, the thread unit enters the WAIT state from the RUN state.
  • the search engine unit determines the data indicated by the data address and the program pointer indicated by the first search field according to the search instruction.
  • the search engine unit receives the search instruction sent by the thread unit, and then the search engine unit may determine the data indicated by the data address, and the search engine unit may determine the program pointer indicated by the first search field.
  • the search engine unit sends the data and the program pointer to the thread unit.
  • the search engine unit sends the found data and program pointer to the thread unit. After the thread unit receives the data and program pointer returned by the search engine unit, the thread unit enters the RUN state from the WAIT state.
  • a search instruction is sent to the search engine unit of the chip through the thread unit of the chip, where the search instruction includes the data address and the first search field, and then the thread unit is switched from the RUN state to the WAIT state; the search engine unit according to the search instruction To determine the data indicated by the data address and the program pointer indicated by the first search field; the thread unit receives the data and program pointer sent by the search engine unit, and then the thread unit switches from the WAIT state to the RUN state.
  • the thread unit because the thread unit only needs to initiate a search instruction, the data and program pointers required by the thread unit can be obtained, so that the thread unit only switches once from the RUN state to the WAIT state, reducing the thread unit switching to The number of times in the WAIT state, which can speed up the instruction processing process of the thread unit, speed up the operation efficiency of the core of the chip and the operation efficiency of the chip.
  • FIG. 5 is a schematic flowchart of another instruction processing method provided by an embodiment of the present application.
  • the method is applied to a chip, which includes a thread unit, a search engine unit, a TCAM unit, and a memory unit. As shown in Figure 5, the method includes:
  • the thread unit obtains a message.
  • the thread unit obtains the message, for example, the central processor sends the message to the thread unit of the chip.
  • the destination address of the data is included in the packet to be processed.
  • the thread unit generates a first search field according to any field in the message.
  • the thread unit generates a first search field according to any field in the message.
  • the thread unit generates the first search field according to the destination address of the data in the message.
  • the central processor sends the message to the thread unit; the thread unit extracts the destination IP address from the packet header of the message, and then the thread unit assigns the destination IP address to a field.
  • the thread unit sends a search instruction to the search engine unit, where the search instruction includes a data address and a first search field.
  • the search instruction further includes a search identifier, and the search identifier is used to identify the second search field;
  • the thread unit generates a search instruction according to the data address of the data to be searched and the first search field; then, the thread unit sends the search instruction to the search engine unit of the chip.
  • the thread unit is pre-configured with a search identifier (profile id), and the search identifier is used to identify the second search field; thus, the thread unit puts the data address, the first search field, and the search identifier into the search instruction.
  • profile id search identifier
  • the search engine unit determines the data indicated by the data address according to the data address.
  • step 204 specifically includes:
  • the search engine unit sends the data address to the memory unit.
  • the memory unit determines the data indicated by the data address according to the data address, and sends the data indicated by the data address to the search engine unit.
  • the search engine unit first needs to determine the data indicated by the data address.
  • the search engine unit includes a request processing module and a result processing module; the request processing module of the search engine unit sends the data address to the memory unit of the chip, and the request processing module sends the first search field and the search identifier to the search
  • the result processing module of the engine unit the memory unit determines the data indicated by the data address, and then the memory unit sends the data indicated by the data address to the result processing module of the search engine unit.
  • the search engine unit determines search keywords based on the data and the first search field.
  • step 205 specifically includes:
  • the search engine unit determines the second search field in the data according to the search identifier.
  • the search engine unit generates a search keyword according to the first search field and the second search field.
  • the search key includes the first search field, the priority of the first search field, the second search field, and the priority of the second search field.
  • the search engine unit needs to generate a keyword for searching the program pointer. Specifically, because the request processing module sends the first search field and the search identifier to the result processing module of the search engine unit, and the result processing module receives the data returned by the memory unit, where the data has multiple fields; it can be seen that There are many fields in the data returned by the memory unit, but because the field searched by the TCAM unit may be only one or a few of them, the result processing module needs to determine these fields that need to be reserved; thus the result processing module can identify the search field , Determine the fields that need to be reserved, and then remove the fields that do not need to be reserved.
  • the result processing module determines the second search field indicated by the search identifier, and the second search field is the field that needs to be reserved; then, the result processing The module generates a search keyword based on the first search field and the second search field; furthermore; the result processing module obtains a field for branch search; and each search field has a corresponding priority.
  • the search engine unit sends the search key to the TCAM unit.
  • the TCAM unit is set in the search engine unit, and the result processing module of the search engine unit sends the search keyword and data to the TCAM unit together.
  • the TCAM unit multiplexes the TCAM unit in the prior art
  • the search engine unit is connected to the TCAM unit
  • the result processing module of the search engine unit sends the search keyword to the TCAM unit.
  • the TCAM unit determines the program pointer according to the search key.
  • the compiler of the TCAM unit delivers specific TCAM entries, and the compiler parses the microcode program to obtain the specific PC corresponding to the search keyword, that is, the input to the TCAM unit is the key, and the output of the TCAM unit is the PC.
  • the TCAM unit is set in the search engine unit, so that after the result processing module of the search engine unit sends the search key to the TCAM unit, the TCAM unit can determine the program pointer, Then the search engine unit determines the program pointer.
  • the TCAM unit multiplexes the TCAM unit in the prior art, and the search engine unit is connected to the TCAM unit, so that the result processing module of the search engine unit sends the search keyword to After the TCAM unit, the TCAM unit can determine the program pointer; then, the TCAM unit sends the program pointer to the result processing module of the search engine unit.
  • the program pointer corresponding to condition A is PC1, corresponding to execution code 1; the program pointer corresponding to condition B is PC2, corresponding to execution code 2; the program pointer corresponding to condition C is PC3, corresponding to execution code 3; and the program pointer corresponding to condition D For PC4, execute code 4 accordingly.
  • TCAM content of condition A is key is PC1
  • TCAM content of condition B is key is PC2
  • TCAM content of condition C is key is PC3
  • TCAM content of condition D is key is PC4. If the value of the content in the returned data of the memory unit search is exactly condition B, the program pointer determined by the TCAM unit is PC2.
  • the search engine unit sends the data and the program pointer to the thread unit.
  • the TCAM unit is set in the search engine unit. After the result processing module of the search engine unit receives the data returned by the memory unit, the result processing module sends the data to the TCAM unit; and, the TCAM unit The program pointer is determined; thus, the TCAM unit in the search engine unit can send the data and the program pointer to the thread unit.
  • the TCAM unit multiplexes the TCAM unit in the prior art
  • the search engine unit is connected to the TCAM unit
  • the result processing module of the search engine unit receives the data returned by the memory unit
  • the result processing module receives The program pointer returned by the TCAM unit; thus, the result processing module of the search engine unit can send the data and the program pointer to the thread unit.
  • the TCAM unit multiplexes the TCAM unit in the prior art
  • the search engine unit is connected to the TCAM unit
  • the result processing module of the search engine unit receives the data returned by the memory unit
  • the result processing module of the search engine unit The data can be sent to the thread unit; and, the TCAM unit determines the program pointer, and the TCAM unit can send the program pointer to the thread unit.
  • condition B the program pointer corresponding to condition B is PC2, and the program pointer determined by the TCAM unit is PC2; the thread unit executes the instruction corresponding to PC2.
  • FIG. 6 is a schematic diagram of the format of the search instruction provided by an embodiment of the present application, and the specific format of the search instruction As shown in Figure 6. Then, the request processing module of the search engine unit extracts the field D and the search identifier from the search instruction, and the request processing module sends the field D and the search identifier to the result processing module of the search engine unit; the request processing module extracts the physical from the search instruction Address, the request processing module sends the physical address to the memory unit.
  • the memory unit determines the data indicated by the physical address, where the data includes field A, field B, field C, field E, and field F; the memory unit sends the data to the result processing module of the search engine unit.
  • the result processing module sends a branch search instruction to the TCAM unit, and the branch search instruction includes key.
  • FIG. 7 is a schematic diagram of the format of a branch search instruction provided by an embodiment of the present application. The specific format of the branch search instruction is shown in FIG. 7.
  • the conditional sequence of the statement of the branch search instruction is Field A, Field B, Field C, Field D, Field A has a priority of 1, Field B has a priority of 2, Field C has a priority of 3, and Field D has a priority of 4; thus, the TCAM unit uses Field A to look up the table first, if it does not hit, Look up the table with field B, and so on; for example, if the value of field A is hit when condition A is met or not, condition A is, for example, 0 or 1; then the TCAM unit gets the program pointer.
  • the TCAM unit is set in the search engine unit; the result processing module of the search engine unit will send the field A, field B, and field C to the TCAM unit; since the TCAM unit determines the program pointer, The TCAM unit returns the program pointer, field A, field B, and field C to the thread unit. Then, the thread unit switches from the WAIT state to the RUN state, and the thread unit executes the instruction corresponding to the program pointer.
  • a search instruction is sent to the search engine unit of the chip through the thread unit of the chip, where the search instruction includes a data address, a first search field, and a search identifier, and the search identifier is used to identify the second search field.
  • the RUN state is switched to the WAIT state; the search engine unit determines the data indicated by the data address according to the search instruction; and, the search engine unit generates a search keyword, and the search engine unit sends a branch search instruction to the TCAM unit to find the program pointer and the branch search instruction
  • the search keyword is included; then, the search engine unit returns the determined data and program pointer to the thread unit; after the thread unit receives the data and program pointer sent by the search engine unit, the thread unit switches from the WAIT state to the RUN state, and the thread The unit executes the instruction corresponding to the program pointer.
  • the thread unit because the thread unit only needs to initiate a search instruction, the data and program pointers required by the thread unit can be obtained, so that the thread unit only switches the RUN state to the WAIT state once, that is, the thread unit only needs to execute Once the RUN state is switched to the WAIT state, the data search and branch search can be completed; further, the number of times the thread unit is switched to the WAIT state is reduced, the number of times the thread unit's instruction processing is interrupted is reduced, and the thread unit does not need to be much Repeating the steps that have already been executed at this time can speed up the instruction processing process of the thread unit, improve the instruction processing efficiency, and speed up the operation efficiency of the core of the chip and the operation efficiency of the chip. And, the search engine unit determines the fields that need to be kept in the data.
  • FIG. 8 is a schematic block diagram of a chip provided by an embodiment of the present application. As shown in FIG. 8, the chip includes: a thread unit 05 and a search engine unit 06, where the thread unit 05 and the search engine unit 06 connection;
  • the thread unit 05 is used to send a search instruction to the search engine unit 06, where the search instruction includes a data address and a first search field;
  • the search engine unit 06 is used to determine the data indicated by the data address and the program pointer indicated by the first search field according to the search instruction; and send the data and the program pointer to the thread unit 05.
  • the thread unit 05 can perform step 101 of the method shown in FIG. 4, and the search engine unit 06 can execute step 102 of the method shown in FIG. 4.
  • the chip of the embodiment shown in FIG. 8 may be used to execute the technical solution of the embodiment shown in FIG. 4 in the above method, and its implementation principle and technical effect are similar, and will not be repeated here.
  • the chip includes a thread unit and a search engine unit; the thread unit sends a search instruction to the search engine unit, where the search instruction includes a data address and a first search field, and then the thread unit switches from the RUN state To the WAIT state; the search engine unit determines the data indicated by the data address and the program pointer indicated by the first search field according to the search instruction; the thread unit receives the data and the program pointer sent by the search engine unit, and then the thread unit switches from the WAIT state To the RUN state.
  • the thread unit because the thread unit only needs to initiate a search instruction, the data and program pointers required by the thread unit can be obtained, so that the thread unit only switches once from the RUN state to the WAIT state, reducing the thread unit switching to The number of times in the WAIT state, which can speed up the instruction processing process of the thread unit, speed up the operation efficiency of the core of the chip and the operation efficiency of the chip.
  • FIG. 9 is a schematic block diagram of a chip provided by an embodiment of the present application
  • FIG. 10 is a schematic block diagram of another chip provided by an embodiment of the present application, as shown in FIGS. 9 and 10, at On the basis of the chip shown in FIG. 8, the chip further includes a TCAM unit 07; the search engine unit 06 includes a request processing module 061 and a result processing module 062, and the request processing module 061 is connected to the result processing module 062.
  • the TCAM unit 07 includes a receiving module 071, a determining module 072, and a sending module 073.
  • the receiving module 071 and the sending module 073 are respectively connected to the determining module 072; the receiving module 071 is connected to the result processing module 062; the sending module 073 is connected to the thread unit 05; the TCAM unit 07 is set in the search engine unit 06, and each module in the search engine unit 06 and the TCAM unit 07 perform the following processes:
  • the request processing module 061 is used to determine data according to the data address; wherein, the request processing module 061 can execute step 204 of the method shown in FIG. 5.
  • the result processing module 062 is used to obtain data and determine search keywords based on the data and the first search field; send the search keywords and data to the TCAM unit 07; wherein, the result processing module 062 can perform the steps of the method shown in FIG. 5 205 and 206.
  • the receiving module 071 is used to receive search keywords and data sent by the result processing module 062;
  • the determining module 072 is used to determine the program pointer according to the search keyword.
  • the determination module 072 may perform step 207 of the method shown in FIG. 5.
  • the sending module 073 is used to send the data and the program pointer to the thread unit 05.
  • the TCAM unit 07 includes a receiving module 071, a determining module 072, and a sending module 073, and the receiving module 071 and the sending module 073 are respectively connected to the determining module 072.
  • the TCAM unit 07 is connected to the search engine unit 06; the receiving module 071 and the sending module 073 are respectively connected to the result processing module 062; each module in the search engine unit 06 and the TCAM unit 07 perform the following processes:
  • the request processing module 061 is used to determine data according to the data address; wherein, the request processing module 061 can execute step 204 of the method shown in FIG. 5.
  • the result processing module 062 is used to obtain the data and determine the search key based on the data and the first search field; send the search key to the TCAM unit 07; wherein, the result processing module 062 can perform steps 205 and 206.
  • the receiving module 071 is used to receive the search keyword sent by the result processing module 062.
  • the determining module 072 is used to determine the program pointer according to the search keyword.
  • the determination module 072 may perform step 207 of the method shown in FIG. 5.
  • the sending module 073 is used to send the program pointer to the result processing module 062.
  • the sending module 073 can perform step 207 of the method shown in FIG. 5.
  • the result processing module 062 is also used to send data and program pointers to the thread unit 05.
  • the chip further includes a memory unit 08, which is connected to the request processing module 061 and the result processing module 062, respectively.
  • the request processing module 061 is used to send a data address to the memory unit 08; wherein, the request processing module 061 can execute step 2041 of the method shown in FIG. 5.
  • the memory unit 08 is used to determine the data indicated by the data address according to the data address, and send the data indicated by the data address to the result processing module 062. Among them, the memory unit 08 may perform step 2042 of the method shown in FIG. 5.
  • the search instruction further includes a search identifier, which is used to identify the second search field; the result processing module 062 is specifically used to: determine the second search field in the data according to the search identifier; according to the first search field and The second search field generates search keywords.
  • the result processing module 062 can execute step 205 of the method shown in FIG. 5.
  • the search key includes the first search field, the priority of the first search field, the second search field, and the priority of the second search field.
  • the thread unit 05 is also used to: obtain a message before sending a search instruction to the search engine unit 06, and generate a first search field according to any field in the message.
  • any field is the destination address of the data.
  • the thread unit 05 can execute steps 201 and 202 of the method shown in FIG. 5.
  • the chip of the embodiment shown in FIG. 9 and FIG. 10 may be used to execute the technical solution of the embodiment shown in FIG. 5 in the above method, and its implementation principle and technical effect are similar, and are not repeated here.
  • FIGS. 9 and 10 does not depend on whether the embodiment shown in FIG. 8 is implemented, and this embodiment can be implemented independently.
  • the chip includes a thread unit, a search engine unit, a TCAM unit, and a memory unit, wherein the TCAM unit is provided in the search engine unit, or the TCAM unit is connected to the search engine unit; the thread unit is directed to the search engine
  • the unit sends a search instruction, where the search instruction includes a data address, a first search field, and a search identifier.
  • the search identifier is used to identify the second search field.
  • the thread unit switches from the RUN state to the WAIT state; the search engine unit according to the search instruction, Determine the data indicated by the data address; and, the search engine unit generates a search keyword, and the search engine unit sends a branch search instruction to the TCAM unit to find the program pointer, and the branch search instruction includes the search keyword; then, the search engine unit will determine The data and program pointer are returned to the thread unit; after the thread unit receives the data and program pointer sent by the search engine unit, the thread unit switches from the WAIT state to the RUN state, and the thread unit executes the instruction corresponding to the program pointer.
  • the thread unit because the thread unit only needs to initiate a search instruction, the data and program pointers required by the thread unit can be obtained, so that the thread unit only switches the RUN state to the WAIT state once, that is, the thread unit only needs to execute Once the RUN state is switched to the WAIT state, the data search and branch search can be completed; further, the number of times the thread unit is switched to the WAIT state is reduced, the number of times the thread unit's instruction processing is interrupted is reduced, and the thread unit does not need to be much Repeating the steps that have already been executed at this time can speed up the instruction processing process of the thread unit, improve the instruction processing efficiency, and speed up the operation efficiency of the core of the chip and the operation efficiency of the chip. And, the search engine unit determines the fields that need to be kept in the data.
  • the instruction processing device includes a transmitter 261, a receiver 262, and a processor 263.
  • the processor 263 is used to execute the steps of FIG. 4 or the processor 263 is used to execute the steps of FIG. 5.
  • the processor 263 is used to implement the units and modules of FIGS. 8-10.
  • the processor 263 of the instruction processing device in the embodiment shown in FIG. 11 may be used to execute the technical solution of the above method embodiment, or the program of each unit and module in the embodiment shown in FIGS. 8-10.
  • the processor 263 calls the program and executes the above The operation of the method embodiment to realize the units and modules shown in FIGS. 8-10.
  • the processor 263 may also be a chip, which is represented as “chip/processor 263” in FIG. 11.
  • the transmitter 261 and the receiver 262 are used to support the transmission and reception of information between the instruction processing device and each device in the network environment in the above embodiment, and to support the instruction processing device and each device in the network environment in the above embodiment Communication.
  • the instruction processing device may further include a memory 264, and the memory 264 is used to store program codes and data of the instruction processing device. Further, the instruction processing device may further include a communication interface 265.
  • the processor 263 is, for example, a chip or an NPCPU, and may also be one or more integrated circuits configured to implement the above method, for example, one or more specific integrated circuits (Application Specific Integrated Circuit, ASIC), or, one or more A microprocessor (digital processor, DSP), or one or more field programmable gate arrays (Field Programmable Gate Array, FPGA), etc.
  • the memory 264 may be a single memory or a collective term for multiple storage elements.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a dedicated computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be from a website site, computer, server or data center Transmission to another website site, computer, server or data center via wired (for example, coaxial cable, optical fiber, Digital Subscriber Line (DSL)) or wireless (for example, infrared, wireless, microwave, etc.).
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device including a server, a data center, and the like integrated with one or more available media.
  • the available media may be magnetic media (eg, floppy disk, hard disk, magnetic tape), optical media (eg, DVD), or semiconductor media (eg, Solid State Disk (SSD)), or the like.
  • Computer-readable media includes computer storage media and communication media, where communication media includes any medium that facilitates transfer of a computer program from one place to another.
  • the storage medium may be any available medium that can be accessed by a general-purpose or special-purpose computer.

Abstract

一种指令处理方法和芯片，其中，该方法应用于芯片，芯片包括线程单元和查找引擎单元，该方法包括：线程单元向查找引擎单元发送查找指令，查找指令包括数据地址和第一查找字段，线程单元从RUN状态切换到WAIT状态；线程单元接收查找引擎单元发送的数据和程序指针，线程单元从WAIT状态切换到RUN状态。由于线程单元只需要发起一次查找指令，就可以获取到线程单元所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换；减少了线程单元切换到WAIT状态的次数，加快线程单元的指令处理过程，加快芯片的核的运行效率和芯片的运行效率。

Description

指令处理方法和芯片
本申请要求于2018年12月13日提交中国专利局、申请号为201811526986.0、申请名称为“指令处理方法和芯片”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术，尤其涉及一种指令处理方法和芯片。
背景技术
随着通信技术的不断发展，多核多线程的网络处理器(network processor，NP)已经广泛的应用到了通信设备中，其中，网络处理器也可以称为芯片。芯片中具有线程单元、查找引擎单元、内存单元和三态内容寻址存储器(ternary content addressable memory，TCAM)单元。
现有技术中，芯片中的线程单元在处理指令的过程中，线程单元向查找引擎单元发送查找指令，其中，查找指令中包括了数据的具体地址，此时，线程单元会从运行(RUN)状态进入到等待(WAIT)状态；查找引擎单元从内存单元中查找到数据的具体地址所指示的数据，其中，数据中包括多个字段；然后，查找引擎单元将获取到的数据返回给线程单元，此时，线程单元从WAIT状态进入到RUN状态；接着，线程单元向TCAM单元发送进行分支查找的关键字(key)，此时，线程单元又从RUN状态进入到WAIT状态；TCAM单元将确定出的key对应的程序指针返回给线程单元，此时，线程单元再WAIT状态进入到RUN状态。
然而现有技术中，在上述过程中，芯片中的线程单元进行了两次状态切换过程，每一次状态切换过程RUN状态与WAIT状态之间的切换；从而线程单元的指令处理过程，会因为线程单元进入到WAIT状态而两次被打断，而线程单元再次进入到RUN状态的时候，线程单元需要重复执行已经执行过的步骤，进而会导致线程单元的指令处理过程较慢，导致芯片的核的运行效率比较低，进一步的导致芯片的运行效率较低。
发明内容
本申请提供一种指令处理方法和芯片，以解决芯片的运行效率较低的问题。
第一方面，本申请提供一种指令处理方法，应用于芯片，所述芯片包括线程单元和查找引擎单元，包括：
所述线程单元向所述查找引擎单元发送查找指令，其中，所述查找指令包括数据地址和第一查找字段；
所述查找引擎单元根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针；
所述查找引擎单元将所述数据和所述程序指针，发送给所述线程单元。
通过芯片的线程单元向芯片的查找引擎单元发送查找指令，其中，查找指令包括数据地址和第一查找字段，然后，线程单元从RUN状态切换到WAIT状态；查找引擎单元根据查找指令，确定数据地址所指示的数据和第一查找字段所指示的程序指针；线程单元接收查找引擎单元发送的数据和程序指针，然后，线程单元从WAIT状态切换到RUN状态。在以上过程中，由于线程单元只需要发起一次查找指令，就可以获取到线程单元所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换，减少了线程单元切换到WAIT状态的次数，从而可以加快线程单元的指令处理过程，加快芯片的核的运行效率和芯片的运行效率。
在一种可能的设计中，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元设置在所述查找引擎单元中；所述查找引擎单元根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针，包括：
所述查找引擎单元根据所述数据地址，确定所述数据；
所述查找引擎单元根据所述数据和所述第一查找字段，确定查找关键字；
所述查找引擎单元向所述TCAM单元发送所述查找关键字和所述数据；
所述TCAM单元根据所述查找关键字确定所述程序指针。
在一种可能的设计中，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元与所述查找引擎单元连接；所述查找引擎单元根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针，包括：
所述查找引擎单元根据所述数据地址，确定所述数据；
所述查找引擎单元根据所述数据和所述第一查找字段，确定查找关键字；
所述查找引擎单元向所述TCAM单元发送所述查找关键字；
所述TCAM单元根据所述查找关键字确定所述程序指针，并将所述程序指针发送给所述查找引擎单元。
在一种可能的设计中，所述芯片还包括内存单元，所述查找引擎单元根据所述数据地址，确定所述数据，包括：
所述查找引擎单元向所述内存单元发送所述数据地址；
所述内存单元根据所述数据地址，确定所述数据地址所指示的数据，并将所述数据地址所指示的数据发送给所述查找引擎单元。
在一种可能的设计中，所述查找指令中还包括查找标识，所述查找标识用于标识第二查找字段；所述查找引擎单元根据所述数据和所述第一查找字段，确定查找关键字，包括：
所述查找引擎单元根据所述查找标识，确定所述数据中的所述第二查找字段；
所述查找引擎单元根据所述第一查找字段和所述第二查找字段，生成所述查找关键字。
在一种可能的设计中，所述查找关键字中包括所述第一查找字段、所述第一查找字段的优先级、所述第二查找字段以及所述第二查找字段的优先级。
在一种可能的设计中，在所述线程单元向所述查找引擎单元发送查找指令之前，还包括：
所述线程单元获取报文，并根据所述报文中的任意字段生成所述第一查找字段。
在一种可能的设计中，所述任意字段为所述数据的目的地址。
在一种可能的设计中，在所述线程单元向所述查找引擎单元发送查找指令之前，还包括：
所述线程单元获取报文，并根据所述报文生成所述第一查找字段。
第二方面，本申请提供一种芯片，所述芯片包括：线程单元和查找引擎单元，其中，所述线程单元与所述查找引擎单元连接；
所述线程单元，用于向所述查找引擎单元发送查找指令，其中，所述查找指令包括数据地址和第一查找字段；
所述查找引擎单元，用于根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针；将所述数据和所述程序指针，发送给所述线程单元。
通过提供一种芯片，芯片包括线程单元和查找引擎单元；线程单元向查找引擎单元发送查找指令，其中，查找指令包括数据地址和第一查找字段，然后，线程单元从RUN状态切换到WAIT状态；查找引擎单元根据查找指令，确定数据地址所指示的数据和第一查找字段所指示的程序指针；线程单元接收查找引擎单元发送的数据和程序指针，然后，线程单元从WAIT状态切换到RUN状态。在以上过程中，由于线程单元只需要发起一次查找指令，就可以获取到线程单元所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换，减少了线程单元切换到WAIT状态的次数，从而可以加快线程单元的指令处理过程，加快芯片的核的运行效率和芯片的运行效率。
在一种可能的设计中，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元设置在所述查找引擎单元中；
所述查找引擎单元包括请求处理模块和结果处理模块，所述请求处理模块与所述结果处理模块连接；所述TCAM单元包括接收模块、确定模块和发送模块，所述接收模块、所述发送模块分别与所述确定模块连接；
所述请求处理模块，用于根据所述数据地址，确定所述数据；
所述结果处理模块，用于获取所述数据，并根据所述数据和所述第一查找字段，确定查找关键字；
所述接收模块，用于接收所述结果处理模块发送的所述查找关键字和所述数据；
所述确定模块，用于根据所述查找关键字确定所述程序指针；
所述发送模块，用于将所述数据和所述程序指针，发送给所述线程单元。
在一种可能的设计中，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元与所述查找引擎单元连接；
所述查找引擎单元包括请求处理模块和结果处理模块，所述请求处理模块与所述结果处理模块连接；所述TCAM单元包括接收模块、确定模块和发送模块，所述接收模块、所述发送模块分别与所述确定模块连接；
所述请求处理模块，用于根据所述数据地址，确定所述数据；
所述结果处理模块，用于获取所述数据，并根据所述数据和所述第一查找字段，确定查找关键字；
所述接收模块，用于接收所述结果处理模块发送的所述查找关键字；
所述确定模块，用于根据所述查找关键字确定所述程序指针；
所述发送模块，用于将所述程序指针发送给所述结果处理模块；
所述结果处理模块，还用于将所述数据和所述程序指针，发送给所述线程单元。
在一种可能的设计中，所述芯片还包括内存单元，所述内存单元分别与所述请求处理模块、所述结果处理模块连接；
所述请求处理模块，用于向所述内存单元发送所述数据地址；
所述内存单元，用于根据所述数据地址，确定所述数据地址所指示的数据，并将所述数据地址所指示的数据发送给所述结果处理模块。
在一种可能的设计中，所述查找指令中还包括查找标识，所述查找标识用于标识第二查找字段；所述结果处理模块，具体用于：
根据所述查找标识，确定所述数据中的所述第二查找字段；
根据所述第一查找字段和所述第二查找字段，生成所述查找关键字。
在一种可能的设计中，所述查找关键字中包括所述第一查找字段、所述第一查找字段的优先级、所述第二查找字段以及所述第二查找字段的优先级。
在一种可能的设计中，所述线程单元，还用于：
在向所述查找引擎单元发送查找指令之前获取报文，并根据所述报文中的任意字段生成所述第一查找字段。
在一种可能的设计中，所述任意字段为所述数据的目的地址。
第三方面，本申请提供一种指令处理设备，包括用于执行以上第一方面的任一方法的至少一个芯片。
第四方面，本申请提供一种计算机存储介质，所述计算机存储介质包括指令，当其在计算机上运行时，使得计算机执行上述第一方面所述的方法。
第五方面，本申请提供一种包括指令的计算机程序产品，当其在计算机上运行时，使得计算机执行上述第一方面所述的方法。
附图说明
图1为本申请实施例提供的一种路由器的结构示意图；
图2为本申请实施例提供的一种芯片的结构示意图；
图3为本申请实施例提供的另一种芯片的结构示意图；
图4为本申请实施例提供的一种指令处理方法的流程示意图；
图5为本申请实施例提供的另一种指令处理方法的流程示意图；
图6为本申请实施例提供的查找指令的格式的示意图；
图7为本申请实施例提供的分支查找指令的格式的示意图；
图8为本申请实施例提供的一种芯片的示意性框图；
图9为本申请实施例提供的一种芯片的示意性框图；
图10为本申请实施例提供的另一种芯片的示意性框图；
图11为本申请实施例提供的一种指令处理设备的示意性框图。
具体实施方式
本申请实施例可以应用于芯片中、或者可以执行本申请实施例的任意设备中，以下对本申请中的部分用语进行解释说明，以便于本领域技术人员理解。需要说明的是，当本申请实施例的方案应用于芯片中、或者可以执行本申请实施例的任意设备中时，各个单元、模块名称可能发生变化，但这并不影响本申请实施例方案的实施。
应理解，本申请实施例的技术方案提供的芯片，可以应用到各类通信系统中。通信系统例如可以是：无线局域网通信(wireless local area network，WLAN)系统，全球移动通信(global system of mobile communication，GSM)系统、码分多址(code division multiple access，CDMA)系统、宽带码分多址(wideband code division multiple access，WCDMA)系统、通用分组无线业务(general packet radio service，GPRS)、长期演进(long term evolution，LTE)系统、LTE频分双工(frequency division duplex，FDD)系统、LTE时分双工(time division duplex，TDD)、通用移动通信系统(universal mobile telecommunication system，UMTS)、全球互联微波接入(worldwide interoperability for microwave access，WiMAX)通信系统、以及未来的第五代移动通信技术(the 5th Generation mobile communication technology，5G)系统或未来可能出现的其他系统。
本申请的实施方式部分使用的术语仅用于对本申请的具体实施例进行解释，而非旨在限定本申请。以下对本申请中的部分用语进行解释说明，以便于本领域技术人员理解。
1)核(Core)：一个网络处理器(network processor，NP)可以有多个核；多个核可以并行的执行各自的指令。
2)线程(Thread)：一个核可以被配置有多个线程，同一时间一个核内只能有一个线程在执行指令，即同一时间一个核内只能有一个线程在运行(RUN)状态。
3)程序指针(program counter，PC)：也称作程序计数器，用于指示计算机在其指令序列中的位置。
4)TCAM：主要用于快速查找程序指针。
5)“多个”是指两个或两个以上，其它量词与之类似。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系。
6)“对应”可以指的是一种关联关系或绑定关系，A与B相对应指的是A与B之间是一种关联关系或绑定关系。
需要指出的是，本申请实施例中涉及的名词或术语可以相互参考，不再赘述。
多核多线程的芯片是网络设备的重要器件，尤其的，多核多线程的芯片是数据通信设备转发平面的核心器件。随着芯片的发展，芯片的数据吞吐量越来越大，例如，芯片的数据吞吐量从100千兆位/秒(gigabit per second，Gbps)增长到1兆兆位/秒(terabits per second，Tbps)，可知，芯片的吞吐量增加了10倍；随着芯片的数据吞吐量越来越大，为了保证线程处理的性能，需要增加芯片的核的数量；但是芯片的核的数量增加，会造成芯片的面积、功耗等较高。如果可以提高核处理报文时的效率，可以减少处理核的数量。
一个芯片中具有多个核，多个核可以并行的执行各自的指令；一个核可以具有多个线程。核在处理线程的时候，是依次执行每一个指令。
一般情况下，一条指令的执行过程分为多个阶段，例如分为以下6个阶段：指令给进(Instruction Feed)阶段、指令译码(Instruction Decode)阶段、读取寄存器(Resister Read)阶段、数据选择(Data Select)阶段、执行(Execute)阶段、回写(Write Back)阶段；每一个阶段的执行需要1个时钟周期。线程在取指令的时候，会顺序的取多条地址连续的指令，例如读取4条连续的指令，然后，线程对指令进行流水线式的处理。
线程在处理指令的过程中，会出现以下几种状态：
暂停(HALT)状态：在线程启动时，线程默认为HALT状态，芯片可以把线程从HALT状态切换到运行(RUN)状态。
RUN状态：当线程执行指令的时候，线程处于RUN状态。当出现以下情况时，线程从RUN状态到等待(WAIT)状态：第一种情况，线程执行了跳转指令，此时线程会自动跳转到WAIT状态，当跳转到目的程序指针之后线程再回到RUN状态；第二种情况，线程发起了访问内存的指令、或者TCAM访问等待结果返回，此时线程会进入WAIT状态，然后当结果返回以后线程再回到RUN状态。
WAIT状态：当线程等待内存访问结果返回、或者线程等待目的程序指针的时候，线程处于WAIT状态。
等待新报文进入(WAIT_NPKT)状态：当线程等待新报文的时候，线程处于WAIT_NPKT状态；当线程处理完一个报文之后，线程会从RUN状态进入到WAIT_NPKT状态。
当需要进行跳转指令、或者访问内存、或者进行TCAM查找的时候，会导致线程需要等待，即线程从RUN状态变化到其他状态，此时指令流水线被打断；然后，当线程恢复运行状态的时候，线程需要重新取指令，进而导致线程的指令处理过程被减慢。当指令流水线被打断的次数越多的时候，指令的执行效率会越低；进一步的导致芯片的运行效率降低。
芯片中包括4个电路单元：线程单元、TCAM单元、查找引擎单元和内存单元；其中，内存单元包括芯片内的内存和芯片外的内存，例如，芯片外的内存为内存条。
线程单元在处理指令的过程中，线程单元向查找引擎单元发送查找指令，其中，查找指令中包括了数据的具体地址，此时，线程单元会从RUN状态进入到WAIT状态；查找引擎单元从内存单元中查找到数据的具体地址所指示的数据，其中，数据中包括多个字段；然后，查找引擎单元将获取到的数据返回给线程单元，此时，线程单元从WAIT状态进入到RUN状态；可知，查找引擎单元完成内存单元和线程单元之间的接口转换，查找引擎单元实际就是一个通路；接着，线程单元向TCAM单元发送进行分支查找的key，此时，线程单元又从RUN状态进入到WAIT状态；TCAM单元将确定出的key对应的程序指针返回给线程单元，此时，线程单元再WAIT状态进入到RUN状态。
举例来说，线程单元从报文的报文头中提取出目的网络协议(internet protocol，IP)地址，然后将目的IP地址赋值给字段D，此时，线程单元为RUN状态。线程单元向查找引擎单元发送查找指令，其中，查找指令中包括了数据的具体地址，查找指令用 于指示查找table1，其中，table1的索引值index＝2；此时，由于，线程单元需要等待查找引擎单元返回table1，而等待结果的返回是有延迟，从而线程单元会从RUN状态进入到WAIT状态。查找引擎单元从内存单元中查找到数据的具体地址所指示的table1，其中，table1中包括字段A、字段B和字段C；查找引擎单元将table1返回给线程单元，此时，线程单元从WAIT状态进入到RUN状态。接着，线程单元向TCAM单元发送一个switch-case指令，该switch-case指令中包括进行分支查找的key；此时，由于TCAM单元需要根据A、B、C、D这些字段得到对应的程序指针，TCAM单元的查找也有延迟，从而线程单元又从RUN状态进入到WAIT状态。TCAM单元可以确定字段A对应的程序指针为PC1、字段B对应的程序指针为PC2、字段C对应的程序指针为PC3、字段D对应的程序指针为PC4，进而TCAM单元根据以上内容确定出key对应的程序指针；然后，TCAM单元将确定出的key对应的程序指针返回给线程单元，此时，线程单元再WAIT状态进入到RUN状态。根据以上举例可知，线程单元完成了两次从RUN状态到WAIT状态的切换；线程单元被打断，线程单元又进入RUN状态的时候，线程单元需要重复获取一些指令，所以需要线程单元重复执行一些已经执行过的步骤，从而会导致芯片的核的运行效率比较低。
下面将结合附图，对本申请实施例的技术方案进行描述。
本申请提供的方法可以应用到芯片中、或者应用到处理器中、或者应用到中央处理器中，本申请对此不做限制。例如，当本申请提供的方法应用到芯片中的时候，芯片可以完成数据查找和分支查找。再例如，当本申请提供的芯片应用到其他的数据通信设备的时候，数据通信设备中的转发引擎ASIC(application specific integrated circuit，ASIC)也可以利用本申请提供的方法完成数据查找和分支查找。
本申请提供的芯片可以应用到路由器中、或者应用到终端中、或者应用到服务器中，本申请对此不做限制。例如，当本申请提供的芯片应用到路由器中的时候，芯片可以作为路由器的转发平面，进而芯片负责数据报文的快速转发处理。
图1为本申请实施例提供的一种路由器的结构示意图。如图1所示的路由器，路由器包括网络处理器01、媒体介入控制层(media access control，MAC)单元02、中央处理器(central processing unit，CPU)03和流量管理器(traffic manager，TM)04；其中，网络处理器为本申请涉及的芯片。其中，MAC单元02、CPU03、TM04分别与网络处理器01连接。
图2为本申请实施例提供的一种芯片的结构示意图，图3为本申请实施例提供的另一种芯片的结构示意图，如图2和图3所示，芯片主要包括线程单元05、查找引擎单元06、TCAM单元07和内存单元08。如图2所示，线程单元05与查找引擎单元06连接，查找引擎单元06与内存单元08连接，内存单元08设置在TCAM单元07中；或者，图3所示，线程单元05与查找引擎单元06连接，查找引擎单元06与内存单元08连接，查找引擎单元06与TCAM单元07连接。其中，查找引擎单元06可以是一种智能查找引擎。
图4为本申请实施例提供的一种指令处理方法的流程示意图。该方法应用于芯片，芯片包括线程单元和查找引擎单元。如图4所示，该方法包括：
101、线程单元向查找引擎单元发送查找指令，其中，查找指令包括数据地址和第 一查找字段。
示例性的，芯片的线程单元生成一个查找指令，其中，查找指令中包括数据地址和第一查找字段，数据地址可以指示出线程单元需要查找的数据，第一查找字段用于指示出线程单元需要获取的程序指针；然后，线程单元将查找指令发送给查找引擎单元。此时，此线程单元从RUN状态进入到WAIT状态。
102、查找引擎单元根据查找指令，确定数据地址所指示的数据和第一查找字段所指示的程序指针。
示例性的，查找引擎单元接收到线程单元发送的查找指令，然后，查找引擎单元可以确定出数据地址所指示的数据，并且，查找引擎单元可以确定出第一查找字段所指示的程序指针。
103、查找引擎单元将数据和程序指针，发送给线程单元。
示例性的，查找引擎单元将查找到的数据和程序指针，发送给线程单元。线程单元接收到查找引擎单元返回的数据和程序指针之后，此线程单元从WAIT状态进入到RUN状态。
本实施例，通过芯片的线程单元向芯片的查找引擎单元发送查找指令，其中，查找指令包括数据地址和第一查找字段，然后，线程单元从RUN状态切换到WAIT状态；查找引擎单元根据查找指令，确定数据地址所指示的数据和第一查找字段所指示的程序指针；线程单元接收查找引擎单元发送的数据和程序指针，然后，线程单元从WAIT状态切换到RUN状态。在以上过程中，由于线程单元只需要发起一次查找指令，就可以获取到线程单元所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换，减少了线程单元切换到WAIT状态的次数，从而可以加快线程单元的指令处理过程，加快芯片的核的运行效率和芯片的运行效率。
图5为本申请实施例提供的另一种指令处理方法的流程示意图。该方法应用于芯片，芯片包括线程单元、查找引擎单元、TCAM单元和内存单元。如图5所示，该方法包括：
201、线程单元获取报文。
示例性的，线程单元获取报文，例如，中央处理器将报文发送给芯片的线程单元。其中，待处理报文中包括数据的目的地址。
202、线程单元根据报文中的任意字段，生成第一查找字段。
示例性的，线程单元依据报文中的任意字段，生成一个第一查找字段。可选的，线程单元依据报文中的数据的目的地址，生成第一查找字段。
举例来说，中央处理器将报文发送给线程单元；线程单元从报文的报文头中提取出目的IP地址，然后，线程单元将目的IP地址赋值给一个字段。
203、线程单元向查找引擎单元发送查找指令，其中，查找指令包括数据地址和第一查找字段。
可选的，查找指令中还包括查找标识，查找标识用于标识第二查找字段；
示例性的，线程单元根据待查找的数据的数据地址和第一查找字段，生成一个查找指令；然后，线程单元将查找指令发送给芯片的查找引擎单元。
可选的，线程单元预先被配置了查找标识(profile id)，查找标识用于标识第二查找字段；从而，线程单元将数据地址、第一查找字段和查找标识都放到查找指令中。
204、查找引擎单元根据数据地址，确定数据地址所指示的数据。
可选的，步骤204具体包括：
2041、查找引擎单元向内存单元发送数据地址。
2042、内存单元根据数据地址，确定数据地址所指示的数据，并将数据地址所指示的数据发送给查找引擎单元。
示例性的，查找引擎单元首先需要确定出数据地址所指示的数据。具体来说，查找引擎单元包括请求处理模块和结果处理模块；查找引擎单元的请求处理模块将数据地址，发送给芯片的内存单元，并且，请求处理模块将第一查找字段和查找标识发送给查找引擎单元的结果处理模块；内存单元确定出数据地址所指示的数据，然后，内存单元将数据地址所指示的数据发送给查找引擎单元的结果处理模块。
205、查找引擎单元根据数据和第一查找字段，确定查找关键字。
可选的，步骤205具体包括：
2051、查找引擎单元根据查找标识，确定数据中的第二查找字段。
2052、查找引擎单元根据第一查找字段和第二查找字段，生成查找关键字。
可选的，查找关键字中包括第一查找字段、第一查找字段的优先级、第二查找字段以及第二查找字段的优先级。
示例性的，查找引擎单元需要生成用于查找程序指针的关键字。具体来说，由于请求处理模块将第一查找字段和查找标识发送给查找引擎单元的结果处理模块，并且，结果处理模块接收到了内存单元返回的数据，其中，数据中具有多个字段；可知，内存单元返回的数据中的字段有很多个，但是由于TCAM单元进行分支查找的字段可能只是其中的一个或者几个，结果处理模块需要确定出这些需要保留的字段；从而结果处理模块可以根据查找标识，确定出需要保留的字段，进而去除掉不需要保留的字段，此时，结果处理模块确定出查找标识所指示出的第二查找字段，第二查找字段为需要保留的字段；然后，结果处理模块根据第一查找字段和第二查找字段，生成查找关键字；进而；结果处理模块得到进行分支查找的字段；并且，每一个查找字段具有一个对应的优先级。
206、查找引擎单元向TCAM单元发送查找关键字。
示例性的，如图2所示，将TCAM单元设置在了查找引擎单元中，查找引擎单元的结果处理模块将查找关键字和数据，一起发送给TCAM单元。
或者，在本实施例中，如图3所示，TCAM单元复用了现有技术中的TCAM单元，查找引擎单元与TCAM单元连接，查找引擎单元的结果处理模块将查找关键字，发送给TCAM单元。
207、TCAM单元根据查找关键字确定程序指针。
示例性的，TCAM单元的编译器下发具体TCAM表项，编译器解析微码程序得到查找关键字对应的具体的PC，即向TCAM单元中输入是key，TCAM单元输出是PC。
在本实施例中，如图2所示，将TCAM单元设置在了查找引擎单元中，从而在查找引擎单元的结果处理模块将查找关键字发送给TCAM单元之后，TCAM单元可以确 定出程序指针，进而查找引擎单元确定出程序指针。
或者，在本实施例中，如图3所示，TCAM单元复用了现有技术中的TCAM单元，查找引擎单元与TCAM单元连接，从而，查找引擎单元的结果处理模块将查找关键字发送给TCAM单元之后，TCAM单元可以确定出程序指针；然后，TCAM单元将程序指针发送给查找引擎单元的结果处理模块。
举例来说，TCAM单元可以执行以下代码：Switch{case(A＝＝条件A)，PC1：执行代码1；case(B＝＝条件B)，PC2：执行代码2；case(C＝＝条件C)，PC3：执行代码3；case(D＝＝条件D)，PC4：执行代码4；}。其中，条件A对应的程序指针为PC1，对应执行代码1；条件B对应的程序指针为PC2，对应执行代码2；条件C对应的程序指针为PC3，对应执行代码3；条件D对应的程序指针为PC4，对应执行代码4。可知，条件A为key的TCAM内容是PC1，条件B为key的TCAM内容是PC2，条件C为key的TCAM内容是PC3，条件D为key的TCAM内容是PC4。如果内存单元查找返回的数据中的内容的值正好是条件B，TCAM单元确定出的程序指针是PC2。
208、查找引擎单元将数据和程序指针，发送给线程单元。
示例性的，图2所示，将TCAM单元设置在了查找引擎单元中，查找引擎单元的结果处理模块接收到内存单元返回的数据之后，结果处理模块将数据发送给TCAM单元；并且，TCAM单元确定出了程序指针；从而，查找引擎单元中的TCAM单元可以将数据和程序指针，发送给线程单元。
或者，图3所示，TCAM单元复用了现有技术中的TCAM单元，查找引擎单元与TCAM单元连接，查找引擎单元的结果处理模块接收到内存单元返回的数据，并且，结果处理模块接收到TCAM单元返回的将程序指针；从而，查找引擎单元的结果处理模块可以将数据和程序指针，发送给线程单元。
或者，图3所示，TCAM单元复用了现有技术中的TCAM单元，查找引擎单元与TCAM单元连接，查找引擎单元的结果处理模块接收到内存单元返回的数据，查找引擎单元的结果处理模块可以将数据发送给线程单元；并且，TCAM单元确定出了程序指针，TCAM单元可以将程序指针发送给线程单元。
举例来说，如果内存单元查找返回的数据中的内容的值正好是条件B，条件B对应的程序指针为PC2，TCAM单元确定出的程序指针是PC2；线程单元执行PC2对应的指令。
举例来说，线程单元从报文的报文头中提取出目的IP地址，然后将目的IP地址赋值给字段D；线程单元需要获取table1中的数据，线程单元需要从table1中获得字段A、字段B和字段C，加上字段D去做分支查找的字段；中央处理器向线程单元发送查找标识profile id＝1；线程单元将table1的索引值index为2的表项，转换为具体的物理地址，具体来说，线程单元根据table1的标识为1、index为2，计算得到物理地址；然后，线程单元将具体的物理地址、profile id＝1、字段D的值发放到查找指令中。线程单元向查找引擎单元发送查找指令，当查找指令发送出去之后，线程单元从RUN状态切换到WAIT状态；其中，图6为本申请实施例提供的查找指令的格式的示意图，查找指令的具体格式如图6所示。然后，查找引擎单元的请求处理模块从查找指令中提取出字段D和查找标识，请求处理模块将字段D和查找标识发送给查找引擎 单元的结果处理模块；请求处理模块从查找指令中提取出物理地址，请求处理模块将物理地址发送给内存单元。内存单元确定出物理地址所指示的数据，其中，数据中包括字段A、字段B、字段C、字段E和字段F；内存单元将数据发送给查找引擎单元的结果处理模块。查找引擎单元的结果处理模块根据profile id＝1，确定出需要保留字段A、字段B和字段C；然后，结果处理模块根据字段A、字段B、字段C和字段D，构造出查找关键字key；结果处理模块向TCAM单元发送一个分支查找指令，该分支查找指令中包括key。其中，图7为本申请实施例提供的分支查找指令的格式的示意图，分支查找指令的具体格式如图7所示，分支查找指令的语句的条件顺序依次是字段A、字段B、字段C、字段D，字段A的优先级为1，字段B的优先级为2，字段C的优先级为3，字段D的优先级为4；从而，TCAM单元先用字段A查表，若不命中再用字段B查表，以此类推；例如，字段A的值是条件A时命中，否不命中，条件A例如是0或1；进而TCAM单元得到程序指针。在图2所示的芯片结构中，TCAM单元设置在查找引擎单元中；查找引擎单元的结果处理模块会将字段A、字段B和字段C，发送给TCAM单元；由于TCAM单元确定出程序指针，TCAM单元将程序指针、字段A、字段B和字段C一起返回给线程单元。然后，线程单元从WAIT状态切换到RUN状态，线程单元执行程序指针对应的指令。
本实施例，通过芯片的线程单元向芯片的查找引擎单元发送查找指令，其中，查找指令包括数据地址、第一查找字段和查找标识，查找标识用于标识第二查找字段，然后，线程单元从RUN状态切换到WAIT状态；查找引擎单元根据查找指令，确定数据地址所指示的数据；并且，查找引擎单元生成查找关键字，查找引擎单元向TCAM单元发送分支查找指令去查找程序指针，分支查找指令中包括查找关键字；然后，查找引擎单元将确定出的数据和程序指针，返回给线程单元；线程单元接收查找引擎单元发送的数据和程序指针之后，线程单元从WAIT状态切换到RUN状态，线程单元执行程序指针对应的指令。在以上过程中，由于线程单元只需要发起一次查找指令，就可以获取到线程单元所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换，即线程单元只需要执行一次RUN状态到WAIT状态的切换，就可以完成数据的查找和分支查找；进而，减少了线程单元切换到WAIT状态的次数，线程单元的指令处理过程被打断的次数减少，线程单元不需要多次重复执行已经执行过的步骤，从而可以加快线程单元的指令处理过程，提升指令处理效率，加快芯片的核的运行效率和芯片的运行效率。并且，由查找引擎单元确定出数据中需要保留的字段。
上文中详细描述了根据本申请实施例的指令处理方法，下面将描述本申请实施例的网络芯片。
在一个示例中，图8为本申请实施例提供的一种芯片的示意性框图，如图8所示，该芯片包括：线程单元05和查找引擎单元06，其中，线程单元05与查找引擎单元06连接；
线程单元05，用于向查找引擎单元06发送查找指令，其中，查找指令包括数据地址和第一查找字段；
查找引擎单元06，用于根据查找指令，确定数据地址所指示的数据和第一查找字段所指示的程序指针；将数据和程序指针，发送给线程单元05。
其中，线程单元05可以执行图4所示方法的步骤101，查找引擎单元06可以执行图4所示方法的步骤102。
图8所示实施例的芯片可用于执行上述方法中图4所示实施例的技术方案，其实现原理和技术效果类似，此处不再赘述。
本实施例，通过提供一种芯片，芯片包括线程单元和查找引擎单元；线程单元向查找引擎单元发送查找指令，其中，查找指令包括数据地址和第一查找字段，然后，线程单元从RUN状态切换到WAIT状态；查找引擎单元根据查找指令，确定数据地址所指示的数据和第一查找字段所指示的程序指针；线程单元接收查找引擎单元发送的数据和程序指针，然后，线程单元从WAIT状态切换到RUN状态。在以上过程中，由于线程单元只需要发起一次查找指令，就可以获取到线程单元所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换，减少了线程单元切换到WAIT状态的次数，从而可以加快线程单元的指令处理过程，加快芯片的核的运行效率和芯片的运行效率。
在一个示例中，图9为本申请实施例提供的一种芯片的示意性框图，图10为本申请实施例提供的另一种芯片的示意性框图，如图9和图10所示，在图8所示芯片的基础上，芯片还包括TCAM单元07；查找引擎单元06包括请求处理模块061和结果处理模块062，请求处理模块061与结果处理模块062连接。
其中，如图9所示，TCAM单元07包括接收模块071、确定模块072和发送模块073，接收模块071、发送模块073分别与确定模块072连接；接收模块071与结果处理模块062连接；发送模块073与线程单元05连接；TCAM单元07设置在查找引擎单元06中，查找引擎单元06中的各模块和TCAM单元07执行以下过程：
请求处理模块061，用于根据数据地址，确定数据；其中，请求处理模块061可以执行图5所示方法的步骤204。
结果处理模块062，用于获取数据，并根据数据和第一查找字段，确定查找关键字；向TCAM单元07发送查找关键字和数据；其中，结果处理模块062可以执行图5所示方法的步骤205和206。
接收模块071，用于接收结果处理模块062发送的查找关键字和数据；
确定模块072，用于根据查找关键字确定程序指针。其中，确定模块072可以执行图5所示方法的步骤207。
发送模块073，用于将数据和程序指针，发送给线程单元05。
或者，如图10所示，TCAM单元07包括接收模块071、确定模块072和发送模块073，接收模块071、发送模块073分别与确定模块072连接。TCAM单元07与查找引擎单元06连接；接收模块071、发送模块073分别与结果处理模块062连接；查找引擎单元06中的各模块和TCAM单元07执行以下过程：
请求处理模块061，用于根据数据地址，确定数据；其中，请求处理模块061可以执行图5所示方法的步骤204。
结果处理模块062，用于获取数据，并根据数据和第一查找字段，确定查找关键字；向TCAM单元07发送查找关键字；其中，结果处理模块062可以执行图5所示方法的步骤205和206。
接收模块071，用于接收结果处理模块062发送的查找关键字。
确定模块072，用于根据查找关键字确定程序指针。其中，确定模块072可以执行图5所示方法的步骤207。
发送模块073，用于将程序指针发送给结果处理模块062。其中，发送模块073可以执行图5所示方法的步骤207。结果处理模块062，还用于将数据和程序指针，发送给线程单元05。
可选的，芯片还包括内存单元08，内存单元08分别与请求处理模块061、结果处理模块062连接。
请求处理模块061，用于向内存单元08发送数据地址；其中，请求处理模块061可以执行图5所示方法的步骤2041。
内存单元08，用于根据数据地址，确定数据地址所指示的数据，并将数据地址所指示的数据发送给结果处理模块062。其中，内存单元08可以执行图5所示方法的步骤2042。
可选的，查找指令中还包括查找标识，查找标识用于标识第二查找字段；结果处理模块062，具体用于：根据查找标识，确定数据中的第二查找字段；根据第一查找字段和第二查找字段，生成查找关键字。其中，结果处理模块062可以执行图5所示方法的步骤205。
查找关键字中包括第一查找字段、第一查找字段的优先级、第二查找字段以及第二查找字段的优先级。
可选的，线程单元05，还用于：在向查找引擎单元06发送查找指令之前获取报文，并根据报文中的任意字段，生成第一查找字段。可选的，任意字段为数据的目的地址。其中，线程单元05可以执行图5所示方法的步骤201和202。
图9和图10所示实施例的芯片可用于执行上述方法中图5所示实施例的技术方案，其实现原理和技术效果类似，此处不再赘述。
并且，图9和图10所示实施例的实施不依赖于图8所示的实施例是否实施，本实施例可以独立实施。
本实施例，通过提供一种芯片，芯片包括线程单元、查找引擎单元、TCAM单元和内存单元，其中，TCAM单元设置在查找引擎单元中，或者TCAM单元与查找引擎单元连接；线程单元向查找引擎单元发送查找指令，其中，查找指令包括数据地址、第一查找字段和查找标识，查找标识用于标识第二查找字段，然后，线程单元从RUN状态切换到WAIT状态；查找引擎单元根据查找指令，确定数据地址所指示的数据；并且，查找引擎单元生成查找关键字，查找引擎单元向TCAM单元发送分支查找指令去查找程序指针，分支查找指令中包括查找关键字；然后，查找引擎单元将确定出的数据和程序指针，返回给线程单元；线程单元接收查找引擎单元发送的数据和程序指针之后，线程单元从WAIT状态切换到RUN状态，线程单元执行程序指针对应的指令。在以上过程中，由于线程单元只需要发起一次查找指令，就可以获取到线程单元 所需要的数据和程序指针，从而线程单元只进行了一次RUN状态到WAIT状态的切换，即线程单元只需要执行一次RUN状态到WAIT状态的切换，就可以完成数据的查找和分支查找；进而，减少了线程单元切换到WAIT状态的次数，线程单元的指令处理过程被打断的次数减少，线程单元不需要多次重复执行已经执行过的步骤，从而可以加快线程单元的指令处理过程，提升指令处理效率，加快芯片的核的运行效率和芯片的运行效率。并且，由查找引擎单元确定出数据中需要保留的字段。
图11为本申请实施例提供的一种指令处理设备的示意性框图。如图11所示，该指令处理设备包括发送器261、接收器262和处理器263。
其中，处理器263用于执行图4的各步骤，或者，处理器263用于执行图5的各步骤。处理器263用于实现图8-10的各单元和模块。
图11所示实施例的指令处理设备的处理器263可用于执行上述方法实施例的技术方案，或者图8-10所示实施例各个单元和模块的程序，处理器263调用该程序，执行以上方法实施例的操作，以实现图8-10所示的各单元和模块。
其中，处理器263也可以为芯片，图11中表示为“芯片/处理器263”。发送器261和接收器262用于支持指令处理设备与上述实施例中的网络环境中的各设备之间收发信息，以及支持指令处理设备与上述实施例中的网络环境中的各设备之间进行通信。
进一步的，指令处理设备还可以包括存储器264，存储器264用于存储指令处理设备的程序代码和数据。进一步的，指令处理设备还可以包括通信接口265。
处理器263例如是芯片或NPCPU，还可以是被配置成实施以上方法的一个或多个集成电路，例如：一个或多个特定集成电路(Application Specific Integrated Circuit，ASIC)，或，一个或多个微处理器(digital singnal processor，DSP)，或，一个或者多个现场可编程门阵列(Field Programmable Gate Array，FPGA)等。存储器264可以是一个存储器，也可以是多个存储元件的统称。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如，同轴电缆、光纤、数字用户线(Digital Subscriber Line，DSL))或无线(例如，红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如，固态硬盘(Solid State Disk，SSD))等。
本领域技术人员应该可以意识到，在上述一个或多个示例中，本申请实施例所描述的功能可以用硬件、软件、固件或它们的任意组合来实现。当使用软件实现时，可以将这些功能存储在计算机可读介质中或者作为计算机可读介质上的一个或多个指令或代码进行传输。计算机可读介质包括计算机存储介质和通信介质，其中通信介质包括便于从一个地方向另一个地方传送计算机程序的任何介质。存储介质可以是通用或专用计算机能够存取的任何可用介质。

Claims (14)

  1. 一种指令处理方法，应用于芯片，所述芯片包括线程单元和查找引擎单元，其特征在于，包括：
    所述线程单元向所述查找引擎单元发送查找指令，其中，所述查找指令包括数据地址和第一查找字段；
    所述查找引擎单元根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针；
    所述查找引擎单元将所述数据和所述程序指针，发送给所述线程单元。
  2. 根据权利要求1所述的方法，其特征在于，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元设置在所述查找引擎单元中；所述查找引擎单元根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针，包括：
    所述查找引擎单元根据所述数据地址，确定所述数据；
    所述查找引擎单元根据所述数据和所述第一查找字段，确定查找关键字；
    所述查找引擎单元向所述TCAM单元发送所述查找关键字和所述数据；
    所述TCAM单元根据所述查找关键字确定所述程序指针。
  3. 根据权利要求1所述的方法，其特征在于，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元与所述查找引擎单元连接；所述查找引擎单元根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针，包括：
    所述查找引擎单元根据所述数据地址，确定所述数据；
    所述查找引擎单元根据所述数据和所述第一查找字段，确定查找关键字；
    所述查找引擎单元向所述TCAM单元发送所述查找关键字；
    所述TCAM单元根据所述查找关键字确定所述程序指针，并将所述程序指针发送给所述查找引擎单元。
  4. 根据权利要求2或3所述的方法，其特征在于，所述芯片还包括内存单元，所述查找引擎单元根据所述数据地址，确定所述数据，包括：
    所述查找引擎单元向所述内存单元发送所述数据地址；
    所述内存单元根据所述数据地址，确定所述数据地址所指示的数据，并将所述数据地址所指示的数据发送给所述查找引擎单元。
  5. 根据权利要求2-4任一项所述的方法，其特征在于，所述查找指令中还包括查找标识，所述查找标识用于标识第二查找字段；所述查找引擎单元根据所述数据和所述第一查找字段，确定查找关键字，包括：
    所述查找引擎单元根据所述查找标识，确定所述数据中的所述第二查找字段；
    所述查找引擎单元根据所述第一查找字段和所述第二查找字段，生成所述查找关键字。
  6. 根据权利要求5所述的方法，其特征在于，所述查找关键字中包括所述第一查找字段、所述第一查找字段的优先级、所述第二查找字段以及所述第二查找字段的优 先级。
  7. 根据权利要求1-6任一项所述的方法，其特征在于，在所述线程单元向所述查找引擎单元发送查找指令之前，还包括：
    所述线程单元获取报文，其中，所述报文中包括所述数据的目的地址；
    所述线程单元根据所述数据的目的地址，生成所述第一查找字段。
  8. 一种芯片，其特征在于，所述芯片包括：线程单元和查找引擎单元，其中，所述线程单元与所述查找引擎单元连接；
    所述线程单元，用于向所述查找引擎单元发送查找指令，其中，所述查找指令包括数据地址和第一查找字段；
    所述查找引擎单元，用于根据所述查找指令，确定所述数据地址所指示的数据和所述第一查找字段所指示的程序指针；将所述数据和所述程序指针，发送给所述线程单元。
  9. 根据权利要求8所述的芯片，其特征在于，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元设置在所述查找引擎单元中；
    所述查找引擎单元包括请求处理模块和结果处理模块，所述请求处理模块与所述结果处理模块连接；所述TCAM单元包括接收模块、确定模块和发送模块，所述接收模块、所述发送模块分别与所述确定模块连接；
    所述请求处理模块，用于根据所述数据地址，确定所述数据；
    所述结果处理模块，用于获取所述数据，并根据所述数据和所述第一查找字段，确定查找关键字；
    所述接收模块，用于接收所述结果处理模块发送的所述查找关键字和所述数据；
    所述确定模块，用于根据所述查找关键字确定所述程序指针；
    所述发送模块，用于将所述数据和所述程序指针，发送给所述线程单元。
  10. 根据权利要求8所述的芯片，其特征在于，所述芯片还包括三态内容寻址存储器TCAM单元，所述TCAM单元与所述查找引擎单元连接；
    所述查找引擎单元包括请求处理模块和结果处理模块，所述请求处理模块与所述结果处理模块连接；所述TCAM单元包括接收模块、确定模块和发送模块，所述接收模块、所述发送模块分别与所述确定模块连接；
    所述请求处理模块，用于根据所述数据地址，确定所述数据；
    所述结果处理模块，用于获取所述数据，并根据所述数据和所述第一查找字段，确定查找关键字；
    所述接收模块，用于接收所述结果处理模块发送的所述查找关键字；
    所述确定模块，用于根据所述查找关键字确定所述程序指针；
    所述发送模块，用于将所述程序指针发送给所述结果处理模块；
    所述结果处理模块，还用于将所述数据和所述程序指针，发送给所述线程单元。
  11. 根据权利要求9或10所述的芯片，其特征在于，所述芯片还包括内存单元，所述内存单元分别与所述请求处理模块、所述结果处理模块连接；
    所述请求处理模块，用于向所述内存单元发送所述数据地址；
    所述内存单元，用于根据所述数据地址，确定所述数据地址所指示的数据，并将 所述数据地址所指示的数据发送给所述结果处理模块。
  12. 根据权利要求9-11任一项所述的芯片，其特征在于，所述查找指令中还包括查找标识，所述查找标识用于标识第二查找字段；所述结果处理模块，具体用于：
    根据所述查找标识，确定所述数据中的所述第二查找字段；
    根据所述第一查找字段和所述第二查找字段，生成所述查找关键字。
  13. 根据权利要求12所述的芯片，其特征在于，所述查找关键字中包括所述第一查找字段、所述第一查找字段的优先级、所述第二查找字段以及所述第二查找字段的优先级。
  14. 根据权利要求8-13任一项所述的芯片，其特征在于，所述线程单元，还用于：
    在向所述查找引擎单元发送查找指令之前获取报文，其中，所述报文中包括所述数据的目的地址；
    根据所述数据的目的地址，生成所述第一查找字段。
PCT/CN2019/125296 2018-12-13 2019-12-13 指令处理方法和芯片 WO2020119796A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP19894659.2A EP3723330A4 (en) 2018-12-13 2019-12-13 PROCEDURE AND CHIP FOR COMMAND PROCESSING
US16/922,457 US11442735B2 (en) 2018-12-13 2020-07-07 Search instruction to access a TCAM and memory to return a program counter value from the TCAM

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811526986.0 2018-12-13
CN201811526986.0A CN111324382B (zh) 2018-12-13 2018-12-13 指令处理方法和芯片

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US16/922,457 Continuation US11442735B2 (en) 2018-12-13 2020-07-07 Search instruction to access a TCAM and memory to return a program counter value from the TCAM

Publications (1)

Publication Number Publication Date
WO2020119796A1 true WO2020119796A1 (zh) 2020-06-18

Family

ID=71075590

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/125296 WO2020119796A1 (zh) 2018-12-13 2019-12-13 指令处理方法和芯片

Country Status (4)

Country Link
US (1) US11442735B2 (zh)
EP (1) EP3723330A4 (zh)
CN (1) CN111324382B (zh)
WO (1) WO2020119796A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113419989B (zh) * 2021-06-11 2023-01-20 上海壁仞智能科技有限公司 人工智能芯片及其操作方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102216909A (zh) * 2011-05-27 2011-10-12 华为技术有限公司 一种网络处理器和网络处理器所存程序的诊断方法
US20120159132A1 (en) * 2010-12-16 2012-06-21 International Business Machines Corporation Accelerating Data Packet Parsing
CN103973571A (zh) * 2013-02-05 2014-08-06 中兴通讯股份有限公司 网络处理器及其路由查找方法
CN105791126A (zh) * 2014-12-26 2016-07-20 中兴通讯股份有限公司 一种三态内容可寻址存储器tcam查表方法及装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6731652B2 (en) * 2001-02-14 2004-05-04 Metro Packet Systems Inc. Dynamic packet processor architecture
KR100864888B1 (ko) * 2007-02-12 2008-10-22 삼성전자주식회사 라우팅 시스템 및 라우팅 시스템의 룰 엔트리 관리 방법
CN101267331A (zh) * 2008-04-23 2008-09-17 华为技术有限公司 一种组播转发表查找方法和装置
CN101834802B (zh) * 2010-05-26 2012-08-08 华为技术有限公司 转发数据包的方法及装置
CN107800627B (zh) * 2016-09-06 2021-04-06 中兴通讯股份有限公司 三态内容寻址存储器tcam表的写入方法及装置
CN108737278A (zh) * 2017-04-21 2018-11-02 中兴通讯股份有限公司 一种查表方法及装置
US11218574B2 (en) * 2018-06-08 2022-01-04 Fungible, Inc. Directed graph traversal using content-addressable memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120159132A1 (en) * 2010-12-16 2012-06-21 International Business Machines Corporation Accelerating Data Packet Parsing
CN102216909A (zh) * 2011-05-27 2011-10-12 华为技术有限公司 一种网络处理器和网络处理器所存程序的诊断方法
CN103973571A (zh) * 2013-02-05 2014-08-06 中兴通讯股份有限公司 网络处理器及其路由查找方法
CN105791126A (zh) * 2014-12-26 2016-07-20 中兴通讯股份有限公司 一种三态内容可寻址存储器tcam查表方法及装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3723330A4

Also Published As

Publication number Publication date
EP3723330A4 (en) 2021-03-24
EP3723330A1 (en) 2020-10-14
CN111324382A (zh) 2020-06-23
CN111324382B (zh) 2023-03-03
US20200334040A1 (en) 2020-10-22
US11442735B2 (en) 2022-09-13

Similar Documents

Publication Publication Date Title
EP2721770B1 (en) Integrated circuit device and method of performing cut-through forwarding of packet data
WO2021226948A1 (zh) 基于开放虚拟软交换机ovs的数据包处理方法及设备
US11847091B2 (en) Data transmission method and device for network on chip and electronic apparatus
CN113746749A (zh) 网络连接设备
US11398981B2 (en) Path creation method and device for network on chip and electronic apparatus
KR20150076118A (ko) 패킷 포워딩 방법 및 시스템
US9479438B2 (en) Link aggregation based on virtual interfaces of VLANs
WO2020119796A1 (zh) 指令处理方法和芯片
CN113691466A (zh) 一种数据的传输方法、智能网卡、计算设备及存储介质
WO2022037571A1 (zh) 报文转发方法及装置，和计算机可读存储介质
JP5674179B1 (ja) 効率的なネットワークアドレス変換およびアプリケーションレベルゲートウェイ処理のための装置および方法
CN114490458B (zh) 数据传输方法、芯片、服务器以及存储介质
CN116032837A (zh) 一种流表卸载方法及装置
WO2016197607A1 (zh) 一种实现路由查找的方法及装置
CN105704023B (zh) 一种堆叠系统的报文转发方法、装置及堆叠设备
US20230336643A1 (en) Packet modification method and apparatus, computer device, and storage medium
US9336172B2 (en) Parallel computer system, data transfer device, and method for controlling parallel computer system for performing arbitration
WO2021128221A1 (zh) 交换芯片
WO2017024542A1 (zh) 一种数据传输的方法、设备及系统
WO2023173912A1 (zh) 一种处理单元pe阵列的配置方法和相关设备
US20230367596A1 (en) Instruction prediction method and apparatus, system, and computer-readable storage medium
US20240118890A1 (en) Data Processing Method and Apparatus, Processor, and Network Device
WO2023098530A1 (zh) 一种事务的处理方法及设备
WO2020132838A1 (zh) 一种网络处理器及报文处理方法
CN115866094A (zh) 一种数据传输系统、方法及电子设备

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2019894659

Country of ref document: EP

Effective date: 20200709

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19894659

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE