WO2016197607A1 - 一种实现路由查找的方法及装置 - Google Patents

一种实现路由查找的方法及装置 Download PDF

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Publication number
WO2016197607A1
WO2016197607A1 PCT/CN2016/071221 CN2016071221W WO2016197607A1 WO 2016197607 A1 WO2016197607 A1 WO 2016197607A1 CN 2016071221 W CN2016071221 W CN 2016071221W WO 2016197607 A1 WO2016197607 A1 WO 2016197607A1
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Prior art keywords
route lookup
command
route
processor
stored
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PCT/CN2016/071221
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English (en)
French (fr)
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刘伟佳
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中兴通讯股份有限公司
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Publication of WO2016197607A1 publication Critical patent/WO2016197607A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H04L45/745—Address table lookup; Address filtering
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H04L45/745—Address table lookup; Address filtering
    • H04L45/74591—Address table lookup; Address filtering using content-addressable memories [CAM]

Definitions

  • the present application relates to, but is not limited to, the field of data communications, and more particularly to a method and apparatus for implementing route lookup.
  • router routing lookups are based on different needs and are implemented in a variety of ways.
  • High-end routers use a high-speed route lookup method based on Ternary Content Addressable Memory (TCAM).
  • TCAM Ternary Content Addressable Memory
  • the processor accesses the TCAM chip in a one-to-one manner, searches for the corresponding index (INDEX) through a route lookup command containing a key (KEY), and the processor synchronizes the dynamic random access memory (DDR, Double Data) from the double rate according to the index. In Rate), the data (DATA) required for route lookup is obtained to complete the route lookup.
  • a high-end router consists of a network with multiple processors. In a one-to-one manner, multiple TCAM chips with the same number of processors are required for route lookup, and the corresponding bandwidth resources are allocated for route lookup for each processor. .
  • the existing high-end routers use multiple TCAM chips for route lookup, which wastes the working performance of TCAM.
  • Each processor needs to allocate corresponding network bandwidth, which causes waste of bandwidth resources.
  • the introduction of multiple TCAM chips causes devices. Too many pins affect industrial production, and the use of multiple TCAM chips also poses a costly problem.
  • the embodiment of the invention provides a method and a device for implementing route lookup, which can reasonably utilize the performance of the TCAM chip and save network bandwidth.
  • an embodiment of the present invention provides a method for implementing route lookup.
  • the read route lookup command accesses the shared Ternary Content Addressable Memory (TCAM) chip through the effective bandwidth of the preset route lookup for route lookup.
  • TCAM Ternary Content Addressable Memory
  • receiving and storing a route lookup command for each processor including:
  • the received route lookup commands from each processor are stored in a queue on the storage medium of the FPGA.
  • the preset interfaces are: a quad data rate static random access memory (QDR) interface, a double rate synchronous dynamic random access memory (DDR) interface, or a TCAM interface.
  • QDR quad data rate static random access memory
  • DDR double rate synchronous dynamic random access memory
  • TCAM TCAM interface
  • receiving and storing route lookup commands from each processor including:
  • the stored route search command is obtained after the valid route data is extracted from the cached route lookup command.
  • the method further includes:
  • Determining whether the stored route lookup command is an integer multiple of the effective bandwidth of the route lookup Determining whether the stored route lookup command is an integer multiple of the effective bandwidth of the route lookup, and performing zero padding on the part that is not an integer multiple of the effective bandwidth of the route lookup.
  • the stored route lookup command is read, including:
  • the stored route lookup command is read from the high to the low in units of the effective bandwidth of the route lookup to the upper and lower bits of the data bit width of one or more data buses.
  • the method further includes:
  • the reading continues from the high to the low in the effective bandwidth of the route lookup.
  • the read route lookup command accesses the shared TCAM chip, including:
  • the route lookup command to be read accesses the shared TCAM chip through the TCAM chip interface.
  • the method further includes:
  • the route lookup commands that complete the route lookup are differentiated according to the processor, and are respectively stored in corresponding preset command storage queues.
  • an embodiment of the present invention further provides an apparatus for implementing a route search, including: a receiving storage unit, a reading unit, and a shared access unit;
  • Receiving a storage unit configured to receive and store a route lookup command from each processor
  • the reading unit is configured to read the stored route search command one by one according to the preset priority
  • the shared access unit is configured to access the shared TCAM chip by using the read route search command through the preset bandwidth of the preset route to perform route lookup.
  • the receiving storage unit is set to:
  • the received route lookup commands from each processor are stored in the form of queues on the storage medium of the FPGA.
  • the shared access unit is configured to: access the read route lookup command, and access the shared TCAM chip through the TCAM chip interface.
  • the receiving storage unit is set to:
  • the route lookup is received through the pre-configured interface on the FPGA. make;
  • the cached route lookup command is effectively extracted, and then stored in the form of a queue on the storage medium of the FPGA to obtain the stored route search command.
  • the receiving storage unit is further configured to: determine whether the stored route lookup command is an integer multiple of the effective bandwidth of the route lookup, and perform zero padding on the part that is not an integer multiple of the effective bandwidth of the route lookup.
  • the reading unit is set to:
  • the stored route lookup command is read from the upper bit to the lower bit in units of the effective priority of the route lookup to the upper and lower bits of the data bit width of one or more data buses, according to a preset priority.
  • the reading unit is further configured to:
  • the next route lookup command is read according to the preset priority, and the next route lookup command to be read is read.
  • the highest bit is spliced by reading the low-order portion of the data bit width of the data bus in units of the effective bandwidth of the route lookup;
  • the reading continues from the high to the low in the effective bandwidth of the route lookup.
  • the device further includes a storage unit, where the storage unit is configured to: after the route lookup command for completing the route lookup is distinguished by the processor, stored in a corresponding preset command storage queue.
  • an embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, the method for implementing route lookup being implemented when the computer executable instructions are executed.
  • the technical solution of the present application includes: receiving and storing a route lookup command from each processor; reading the stored route lookup command one by one according to a preset priority; and passing the read route lookup command through the pre Set the effective bandwidth of the route lookup to access the shared TCAM chip for route lookup.
  • the method of the embodiment of the present invention reads one by one according to the priority, and accesses the shared TCAM chip to implement the route check. Looking for, avoiding the waste of bandwidth resources and cost caused by route lookup in a single-to-one manner.
  • the splicing of route lookup commands improves the utilization of bandwidth resources.
  • FIG. 1 is a flowchart of a method for implementing route lookup according to Embodiment 1 of the present invention
  • FIG. 2 is a structural diagram of an apparatus for implementing route lookup according to Embodiment 1 of the present invention
  • FIG. 3 is a flowchart of a method for implementing route lookup according to Embodiment 2 of the present invention.
  • FIG. 4 is a flow chart of feedback of a route lookup command according to Embodiment 2 of the present invention.
  • FIG. 1 is a flowchart of a method for implementing route lookup according to Embodiment 1 of the present invention. As shown in FIG. 1 , the method for implementing route lookup provided by this embodiment includes the following steps:
  • Step 100 Receive and store a route lookup command from each processor.
  • receiving and storing a route lookup command for each processor including:
  • the received route lookup commands from each processor are stored in the form of queues on the storage medium of the FPGA.
  • the preset interface is: quad data rate static random access memory (QDR, Quad Data Rate) interface, Double Rate Synchronous Dynamic Random Access Memory (DDR) interface or TCAM interface.
  • QDR quad data rate static random access memory
  • DDR Double Rate Synchronous Dynamic Random Access Memory
  • TCAM TCAM interface
  • the effective bandwidth of the route lookup is mainly set according to a preset interface.
  • the specific size of the effective bandwidth of the route lookup is a common technical means for those skilled in the art.
  • the pre-set interface can be extended by the FPGA according to the number of processors, and the FPGA performance can be used to implement the routing lookup command receiving and searching processing, and also facilitate the subsequent processing of the splicing. If there are other ways to meet the performance requirements of receiving, storing, reading and splicing of route lookup commands in terms of scalability and processing capability, relevant methods can also be used for processing.
  • the selection of the preset interface is mainly set according to the extended interface owned by the processor. Generally, if the processor includes an available QDR interface or a DDR interface, the QDR interface or the DDR interface is generally selected for connection, if not When it is included, you can select any of the above three interfaces.
  • receiving and storing route lookup commands from each processor including:
  • the stored route search command is obtained after the valid route data is extracted from the cached route lookup command.
  • receiving the route lookup command through the preset interface mainly refers to determining the bandwidth of receiving the route lookup command according to the interface type of the preset interface.
  • the check digit is generally added. After the reception is completed, the check digit is removed.
  • the data bus has a data bit width of 36 bits.
  • the pre-configured interface is a QDR interface. Each pin supports 18-bit data transmission.
  • the route lookup command received according to the QDR interface is 36 bits. Here, it can be set to include 4-bit check digit.
  • the preset multiple is set according to the experience of a person skilled in the art, and the general value is 8.
  • the method further includes:
  • Determining whether the stored route lookup command is an integer multiple of the effective bandwidth of the route lookup Determining whether the stored route lookup command is an integer multiple of the effective bandwidth of the route lookup, and performing zero padding on the part that is not an integer multiple of the effective bandwidth of the route lookup.
  • Step 101 Read the stored route search command one by one according to a preset priority.
  • the preset priority is the priority of the read route lookup command determined by a technician in the field according to experience, for example, according to the number of route lookup commands of each processor, the route stored by each processor.
  • the search command occupies the percentage of all stored route lookup commands.
  • the route lookup command corresponding to the processor with a larger percentage is used as the route lookup command with a higher priority.
  • the percentage can be updated in real time or periodically.
  • the technician performs priority setting according to the importance degree of the processor.
  • the route lookup of a processor is related to a critical event of the system, and priority reading should be performed, and the route lookup command corresponding to the processor may be set first. The highest level, as long as there is a route lookup command for the processor, the read processing is performed immediately.
  • the read route search command specifically includes:
  • the stored route lookup command is read from the high to the low in units of the effective bandwidth of the route lookup to the upper and lower bits of the data bit width of one or more data buses.
  • the method further includes:
  • the reading continues from the high to the low in the effective bandwidth of the route lookup.
  • the splicing of the route lookup command fully utilizes the preset network bandwidth, thereby improving the resource utilization of the network bandwidth.
  • the "next" here is relatively speaking.
  • Step 102 The read route lookup command accesses a shared Ternary Content Addressable Memory (TCAM) chip through the effective bandwidth of the preset route search to perform route search; here, the shared TCAM chip is Refers to the TCAM chip shared by all processors on the same high-end router.
  • TCAM Ternary Content Addressable Memory
  • the read route lookup command accesses the shared TCAM chip, including:
  • the read route lookup command will be accessed through the TCAM chip interface to access the shared TCAM chip.
  • the method further includes:
  • the route lookup command that completes the route lookup is differentiated according to the processor, it is stored in the corresponding preset command storage queue.
  • the method in this embodiment After receiving and storing the route lookup command of each processor, the method in this embodiment reads one by one according to the priority, and accesses the shared TCAM chip to implement route search, thereby avoiding the broadband caused by the route lookup in the single-to-one mode. Resource waste and cost issues. Moreover, the splicing of route lookup commands improves the utilization of bandwidth resources.
  • the apparatus for implementing route lookup includes: a receiving storage unit, a reading unit, and a shared access unit; wherein
  • a receive storage unit configured to receive and store a route lookup command from each processor.
  • the receiving storage unit is set to:
  • the received route lookup commands from each processor are stored in the form of queues on the storage medium of the FPGA.
  • the receiving storage unit is set to:
  • the cached route lookup command is effectively extracted, and then stored in the form of a queue on the storage medium of the FPGA to obtain the stored route search command.
  • the receiving storage unit is further configured to: determine whether the stored route lookup command is an integer multiple of the effective bandwidth of the route lookup, and perform zero padding on the part that is not an integer multiple of the effective bandwidth of the route lookup.
  • the reading unit is configured to read the stored route lookup commands one by one according to the preset priority.
  • the reading unit is set to:
  • the reading unit is further configured to:
  • the next route lookup command is read according to the preset priority, and the next route lookup command to be read is read.
  • the highest bit is spliced by reading the low-order portion of the data bit width of the data bus in units of the effective bandwidth of the route lookup;
  • the reading continues from the high to the low in the effective bandwidth of the route lookup.
  • the shared access unit is configured to: access the read route lookup command to access the shared TCAM chip through the effective bandwidth of the preset route search, to perform route lookup.
  • the shared TCAM chip is a TCAM chip shared by all processors.
  • the shared access unit is configured to: access the shared route search command, access the shared TCAM chip through the interface of the shared TCAM chip.
  • the device provided by the embodiment of the present invention further includes a storage unit, configured to: after the route lookup command for completing the route lookup is differentiated according to the processor, stored in a corresponding preset command storage queue.
  • each processor on the high-end router is respectively connected to the QDR interface, the DDR interface or the TCAM interface on the FPGA.
  • FIG. 3 is a flowchart of a method for implementing route lookup according to Embodiment 2 of the present invention. As shown in FIG. 3, the method for implementing route lookup provided in this embodiment includes the following steps:
  • Step 300 Receive a route lookup command for each processor on the high-end router through an interface preset on the FPGA.
  • Step 301 Store the received route lookup commands in the form of a command queue according to different processors.
  • the general route lookup commands are stored in the command queue in the relevant order.
  • Step 302 Read a route lookup command according to a preset priority. This step specifically includes:
  • the stored route lookup command is read from the upper bit to the lower bit in units of the effective priority of the route lookup to the upper and lower bits of the data bit width of one or more data buses, according to a preset priority.
  • the next route lookup command is read according to the preset priority, and the next route lookup command to be read is read.
  • the highest bit is spliced by reading the low-order portion of the data bit width of the data bus in units of the effective bandwidth of the route lookup;
  • the reading continues from the high to the low in the effective bandwidth of the route lookup.
  • Step 303 The read route lookup command accesses the shared TCAM chip through the effective bandwidth of the preset route search, to perform route lookup.
  • the route lookup command is sent according to the TCAM standard command format.
  • Step 304 The route lookup commands that complete the route lookup are differentiated according to the processor, and are respectively stored in corresponding preset command storage queues.
  • FIG. 4 is a flow chart of feedback of a route lookup command according to Embodiment 2 of the present invention. As shown in FIG. 4, in this embodiment, the feedback process of the route lookup command includes the following steps:
  • Step 400 Receive a route search result of a route lookup command.
  • Step 401 Match the route lookup command to return a route search result of different channels.
  • Step 402 Feed the route search result to the processor according to different channels returned by the matching.
  • an embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, the method for implementing route lookup being implemented when the computer executable instructions are executed.
  • each module/unit in the foregoing embodiment may be implemented in the form of hardware, for example, by implementing an integrated circuit to implement its corresponding function, or may be implemented in the form of a software function module, for example, being executed by a processor and stored in a memory. Programs/instructions to implement their respective functions.
  • the invention is not limited to any specific form of combination of hardware and software.
  • An embodiment of the present invention provides a method and a device for implementing route lookup. After receiving and storing a route lookup command for each processor, the method is performed one by one according to the priority, and accesses the shared TCAM chip to implement route search, thereby avoiding Broadband resource waste and cost caused by route lookup in a single-to-one mode. Moreover, the splicing of route lookup commands improves the utilization of bandwidth resources.

Abstract

一种实现路由查找的方法，包括：接收并存储来自每个处理器的路由查找命令；根据预设的优先级逐个读取存储的路由查找命令；将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的三态内容寻址存储器(TCAM)芯片，以进行路由查找。该方法通过对每个处理器的路由查找命令进行接收存储后，按照优先级进行逐个读取，以访问共用的TCAM芯片实现路由查找，避免了以单对单方式进行路由查找造成的宽带资源浪费和成本问题。而且，通过路由查找命令的拼接，提高了带宽资源的利用率。

Description

一种实现路由查找的方法及装置 技术领域
本申请涉及但不限于数据通信领域，尤指一种实现路由查找的方法及装置。
背景技术
在数据通信领域，随着应用场景越来越复杂，路由器的路由查找基于不同的需求，实现种类多样。
高端路由器多采用基于三态内容寻址存储器(TCAM，Ternary Content Addressable Memory)的高速路由查找方法。处理器采用单对单的方式访问TCAM芯片，通过包含有关键字(KEY)的路由查找命令查找命中相应的索引(INDEX)，处理器根据索引从双倍速率同步动态随机存储器(DDR，Double Data Rate)中获得路由查找所需要的数据(DATA)，以完成路由查找。高端路由器包含有多个处理器的网络，按照单对单的方式需要为路由查找配置与处理器个数相同的多个TCAM芯片，且针对每个处理器的路由查找均需分配相应的带宽资源。
现有的高端路由器的路由查找采用多个TCAM芯片，浪费了TCAM的工作性能，每一个处理器均需要分配相应的网络带宽，造成了带宽资源的浪费；另外，多个TCAM芯片的引入造成设备引脚过多，影响工业生产，而且，采用多个TCAM芯片也带来成本过高的问题。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本发明实施例提供一种实现路由查找的方法及装置，能够合理利用TCAM芯片性能，节省网络带宽。
为了达到本申请的目的，本发明实施例提供了一种实现路由查找的方法， 包括：
接收并存储来自每个处理器的路由查找命令；
根据预设的优先级逐个读取存储的路由查找命令；
将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的三态内容寻址存储器(TCAM，Ternary Content Addressable Memory)芯片，以进行路由查找。
可选地，接收并存储每个处理器的路由查找命令，包括：
通过现场可编程门阵列(FPGA，Field Programmable Gate Array)上预先设置的接口分别与高端路由器上每个处理器连接后，接收每个处理器的所述路由查找命令；
对接收的来自每个处理器的所述路由查找命令，以队列的形式在FPGA的存储介质上分别存储。
可选地，预先设置的接口为：四倍数据速率静态随机存取存储器(QDR)接口、双倍速率同步动态随机存储器(DDR)接口或TCAM接口。
可选地，接收并存储来自每个处理器的路由查找命令，包括：
对每个处理器，分别通过所述预先设置的接口接收路由查找命令；
按照预设倍数缓存接收的路由查找命令后，对缓存的路由查找命令进行有效数据提取后，得到所述存储的路由查找命令。
可选地，所述接收并存储来自每个处理器的路由查找命令之后，该方法还包括：
判断所述存储的路由查找命令是否是路由查找的有效带宽的整数倍，对不是路由查找的有效带宽的整数倍的部分进行补零处理。
可选地，读取存储的路由查找命令，包括：
以路由查找的有效带宽为单位从高位到低位读取所述存储的路由查找命令至一个或一个以上的数据总线的数据位宽的高位和低位。
可选地，当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，该方法还包括：
按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
可选地，将读取的路由查找命令访问共用的TCAM芯片，包括：
将读取的所述路由查找命令，通过所述TCAM芯片接口访问所述共用的TCAM芯片。
可选地，所述将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的TCAM芯片之后，该方法还包括：
将完成路由查找的所述路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
另一方面，本发明实施例还提供一种实现路由查找的装置，包括：接收存储单元、读取单元及共用访问单元；其中，
接收存储单元，设置为接收并存储来自每个处理器的路由查找命令；
读取单元，设置为根据预设的优先级逐个读取存储的路由查找命令；
共用访问单元，设置为将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的TCAM芯片，以进行路由查找。
可选地，接收存储单元是设置为：
通过FPGA上预先设置的接口分别与高端路由器上每个处理器连接后，接收每个处理器的所述路由查找命令；
对接收的来自每个处理器的路由查找命令，以队列的形式在FPGA的存储介质上分别存储。
可选地，共用访问单元是设置为：将读取的路由查找命令，通过TCAM芯片接口访问所述共用的TCAM芯片。
可选地，接收存储单元是设置为：
对每个处理器，分别通过FPGA上所述预先设置的接口接收路由查找命 令；
按照预设倍数缓存接收的路由查找命令后，对缓存的路由查找命令进行有效数据提取后，以队列的形式在FPGA的存储介质上分别存储，得到所述存储的路由查找命令。
可选地，接收存储单元还设置为：判断所述存储的路由查找命令是否是路由查找的有效带宽的整数倍，对不是路由查找的有效带宽的整数倍的部分进行补零处理。
可选地，读取单元是设置为：
根据预设的优先级逐个，以路由查找的有效带宽为单位从高位到低位读取所述存储的路由查找命令至一个或一个以上的数据总线的数据位宽的高位和低位。
可选地，读取单元还设置为：
当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
可选地，该装置还包括存储单元，所述存储单元设置为：将完成路由查找的所述路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
此外，本发明实施例还提供一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令被执行时实现所述实现路由查找的方法。
与现有技术相比，本申请技术方案包括：接收并存储来自每个处理器的路由查找命令；根据预设的优先级逐个读取存储的路由查找命令；将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的TCAM芯片，以进行路由查找。本发明实施例的方法通过对每个处理器的路由查找命令进行接收存储后，按照优先级进行逐个读取，以访问共用的TCAM芯片实现路由查 找，避免了以单对单方式进行路由查找造成的宽带资源浪费和成本问题。而且，通过路由查找命令的拼接，提高了带宽资源的利用率。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
此处所说明的附图用来提供对本申请的进一步理解，构成本申请的一部分，本申请的示意性实施例及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1为本发明实施例一提供的实现路由查找的方法的流程图；
图2为本发明实施例一提供的实现路由查找的装置的结构程图；
图3为本发明实施例二提供的实现路由查找的方法的流程图；
图4为本发明实施例二中路由查找命令的反馈流程图。
本发明的实施方式
下文中将结合附图对本发明实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
实施例一
图1为本发明实施例一提供的实现路由查找的方法的流程图。如图1所示，本实施例提供的实现路由查找的方法包括以下步骤：
步骤100、接收并存储来自每个处理器的路由查找命令；
可选地，接收并存储每个处理器的路由查找命令，包括：
通过现场可编程门阵列(FPGA，Field Programmable Gate Array)上预先设置的接口与高端路由器上每个处理器分别连接后，接收每个处理器的路由查找命令；
对接收的来自每个处理器的路由查找命令，以队列的形式在FPGA的存储介质上分别存储。
可选地，预先设置的接口为：四倍数据速率静态随机存取存储器(QDR， Quad Data Rate)接口、双倍速率同步动态随机存储器(DDR，Double Data Rate)接口或TCAM接口。
需要说明的是，路由查找的有效带宽主要根据预先设置的接口进行设置，针对不同的接口，路由查找的有效带宽的具体大小的设置为本领域技术人员的惯用技术手段。
通过FPGA可以实现预先设置的接口根据处理器个数进行扩展，利用FPGA性能可以实现路由查找命令的接收及查找处理，也便于后续的读取拼接的处理。如果存在其他方式可以在扩展性和处理能力上均满足路由查找命令的接收、存储、读取及拼接等性能要求，则也可采用相关方法进行处理。另外，预先设置的接口的选择主要根据处理器上所拥有的扩展接口进行设置，一般地，如果处理器上包含可用的QDR接口或DDR接口，则一般选择QDR接口或DDR接口进行连接，如果不包含时，则选择上述三种接口中任意之一即可。
可选地，接收并存储来自每个处理器的路由查找命令，包括：
对每个处理器，分别通过所述预先设置的接口接收路由查找命令；
按照预设倍数缓存接收的路由查找命令后，对缓存的路由查找命令进行有效数据提取后，得到所述存储的路由查找命令。
需要说明的是，通过预先设置的接口接收路由查找命令主要是指根据预先设置的接口的接口类型确定接收路由查找命令的带宽。在进行路由查找命令接收时，一般会添加校验位，接收完成后，再去除校验位。假设，数据总线的数据位宽为36比特，预先设置的接口为QDR接口，每个管脚支持18比特的数据传输，则根据QDR接口接收的路由查找命令为36比特，这里，可以设置包含有4个比特的校验位。预设倍数根据本领域技术人员经验进行设定，一般的取值为8。
步骤100之后，上述方法还包括：
判断所述存储的路由查找命令是否是路由查找的有效带宽的整数倍，对不是路由查找的有效带宽的整数倍的部分进行补零处理。
步骤101、根据预设的优先级逐个读取存储的路由查找命令；
需要说明的是，预设的优先级为本领域技术人员根据经验确定的读取路由查找命令的优先级，例如：根据每个处理器的路由查找命令的数目，以每个处理器存储的路由查找命令占所有存储的路由查找命令的百分比大小，确定百分比较大的处理器对应的路由查找命令作为优先级较大的路由查找命令进行读取，百分比大小可以实时更新也可以周期性更新。又或者，技术人员根据处理器的重要程度进行优先级设定，例如：某处理器的路由查找与系统关键事件相关，应该进行优先读取，则可以设置该处理器对应的路由查找命令的优先级最高，只要有该处理器的路由查找命令就立即进行读取处理。
本步骤中，读取存储的路由查找命令具体包括：
以路由查找的有效带宽为单位从高位到低位读取所述存储的路由查找命令至一个或一个以上的数据总线的数据位宽的高位和低位。
当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，上述方法还包括：
按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
需要说明的是，通过路由查找命令的拼接，对预先设置的网络带宽进行充分的利用，提高了网络带宽的资源利用率。另外，这里的“下一个”是相对而言的，一旦读取路由查找命令完成，下一次读取的路由查找命令就应该进行更新。
步骤102、将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的三态内容寻址存储器(TCAM，Ternary Content Addressable Memory)芯片，以进行路由查找；这里，共用的TCAM芯片是指同一高端路由器上所有处理器共用的TCAM芯片。
本步骤中，将读取的路由查找命令访问共用的TCAM芯片，包括：
将读取的路由查找命令，通过TCAM芯片接口访问共用的TCAM芯片。
步骤102之后，上述方法还包括：
将完成路由查找的路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
本实施例方法通过对每个处理器的路由查找命令进行接收存储后，按照优先级进行逐个读取，以访问共用的TCAM芯片实现路由查找，避免了以单对单方式进行路由查找造成的宽带资源浪费和成本问题。而且，通过路由查找命令的拼接，提高了带宽资源的利用率。
图2为本发明实施例一提供的实现路由查找的装置的结构程图。如图2所示，本实施例提供的实现路由查找的装置，包括：接收存储单元、读取单元及共用访问单元；其中，
接收存储单元，设置为接收并存储来自每个处理器的路由查找命令。
可选地，接收存储单元，是设置为：
通过FPGA上预先设置的接口分别与高端路由器上每个处理器连接后，接收每个处理器的路由查找命令；
对接收的来自每个处理器的路由查找命令，以队列的形式在FPGA的存储介质上分别存储。
可选地，接收存储单元是设置为：
对每个处理器，分别通过FPGA所述预先设置的接口接收路由查找命令；
按照预设倍数缓存接收的路由查找命令后，对缓存的路由查找命令进行有效数据提取后，以队列的形式在FPGA的存储介质上分别存储，得到所述存储的路由查找命令。
可选地，接收存储单元还设置为：判断所述存储的路由查找命令是否是路由查找的有效带宽的整数倍，对不是路由查找的有效带宽的整数倍的部分进行补零处理。
读取单元，设置为根据预设的优先级逐个读取存储的路由查找命令。
可选地，读取单元是设置为：
根据预设的优先级逐个，以路由查找的有效带宽为单位从高位到低位读 取所述存储的路由查找命令至一个或一个以上的数据总线的数据位宽的高位和低位。
可选地，读取单元还设置为：
当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
共用访问单元，设置为：将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的TCAM芯片，以进行路由查找。
其中，共用的TCAM芯片为所有处理器共用的TCAM芯片。
可选地，共用访问单元是设置为：将读取的路由查找命令，通过共用的TCAM芯片的接口访问共用的TCAM芯片。
本发明实施例提供的装置还包括存储单元，设置为：将完成路由查找的路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
实施例二
本实施例在实施之前需要进行接口扩展和设置，将高端路由器上的每个处理器分别连接FPGA上的QDR接口、DDR接口或TCAM接口。
图3为本发明实施例二提供的实现路由查找的方法流程图。如图3所示，本实施例提供的实现路由查找的方法包括以下步骤：
步骤300、通过FPGA上预先设置的接口，接收高端路由器上每个处理器的路由查找命令。
步骤301、将接收的路由查找命令按照处理器不同，分别以命令队列的形式进行存储。一般的路由查找命令按照相关顺序存储在命令队列中。
步骤302、按照预先设置的优先级读取路由查找命令。本步骤具体包括：
根据预设的优先级逐个，以路由查找的有效带宽为单位从高位到低位读取所述存储的路由查找命令至一个或一个以上的数据总线的数据位宽的高位和低位。
当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
步骤303、将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的TCAM芯片，以进行路由查找。
需要说明的是，访问TCAM芯片时，路由查找命令按照TCAM标准命令格式发送。
步骤304、将完成路由查找的路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
图4为本发明实施例二中路由查找命令的反馈流程图。如图4所示，本实施例中，路由查找命令的反馈过程包括以下步骤：
步骤400、接收路由查找命令的路由查找结果；
步骤401、将路由查找命令匹配返回不同通道的路由查找结果；
步骤402、按照匹配返回的不同通道，将路由查找结果反馈给处理器。
此外，本发明实施例还提供一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令被执行时实现所述实现路由查找的方法。
本领域普通技术人员可以理解上述方法中的全部或部分步骤可通过程序来指令相关硬件(例如处理器)完成，所述程序可以存储于计算机可读存储介质中，如只读存储器、磁盘或光盘等。可选地，上述实施例的全部或部分步骤也可以使用一个或多个集成电路来实现。相应地，上述实施例中的各模块/单元可以采用硬件的形式实现，例如通过集成电路来实现其相应功能，也可以采用软件功能模块的形式实现，例如通过处理器执行存储于存储器中的 程序/指令来实现其相应功能。本发明不限制于任何特定形式的硬件和软件的结合。
虽然本申请所揭露的实施方式如上，但所述的内容仅为便于理解本申请而采用的实施方式，并非用以限定本申请。任何本发明所属领域内的技术人员，在不脱离本发明所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。
工业实用性
本发明实施例提供一种实现路由查找的方法及装置，通过对每个处理器的路由查找命令进行接收存储后，按照优先级进行逐个读取，以访问共用的TCAM芯片实现路由查找，避免了以单对单方式进行路由查找造成的宽带资源浪费和成本问题。而且，通过路由查找命令的拼接，提高了带宽资源的利用率。

Claims (17)

  1. 一种实现路由查找的方法，包括：
    接收并存储来自每个处理器的路由查找命令；
    根据预设的优先级逐个读取存储的路由查找命令；
    将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的三态内容寻址存储器TCAM芯片，以进行路由查找。
  2. 根据权利要求1所述的方法，其中，所述接收并存储每个处理器的路由查找命令，包括：
    通过现场可编程门阵列FPGA上预先设置的接口分别与高端路由器上每个所述处理器连接后，接收每个所述处理器的所述路由查找命令；
    对接收的来自每个处理器的所述路由查找命令，以队列的形式在FPGA的存储介质上分别存储。
  3. 根据权利要求2所述的方法，其中，所述预先设置的接口为：四倍数据速率静态随机存取存储器QDR接口、双倍速率同步动态随机存储器DDR接口或TCAM接口。
  4. 根据权利要求3所述的方法，其中，所述接收并存储来自每个处理器的路由查找命令，包括：
    对每个处理器，分别通过所述预先设置的接口接收路由查找命令；
    按照预设倍数缓存接收的路由查找命令后，对缓存的路由查找命令进行有效数据提取后，得到所述存储的路由查找命令。
  5. 根据权利要求4所述的方法，所述接收并存储来自每个处理器的路由查找命令之后，该方法还包括：
    判断所述存储的路由查找命令是否是路由查找的有效带宽的整数倍，对不是路由查找的有效带宽的整数倍的部分进行补零处理。
  6. 根据权利要求5所述的方法，其中，所述读取存储的路由查找命令，包括：
    以路由查找的有效带宽为单位从高位到低位读取所述存储的路由查找命 令至一个或一个以上的数据总线的数据位宽的高位和低位。
  7. 根据权利要求6所述的方法，当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，该方法还包括：
    按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
    对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
  8. 根据权利要求1～7任一项所述的方法，其中，所述将读取的路由查找命令访问共用的TCAM芯片，包括：
    将读取的所述路由查找命令，通过所述TCAM芯片接口访问所述共用的TCAM芯片。
  9. 根据权利要求1所述的方法，所述将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的TCAM芯片之后，该方法还包括：
    将完成路由查找的所述路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
  10. 一种实现路由查找的装置，包括：接收存储单元、读取单元及共用访问单元；其中，
    接收存储单元，设置为接收并存储来自每个处理器的路由查找命令；
    读取单元，设置为根据预设的优先级逐个读取存储的路由查找命令；
    共用访问单元，设置为将读取的路由查找命令通过预设的路由查找的有效带宽访问共用的三态内容寻址存储器TCAM芯片，以进行路由查找。
  11. 根据权利要求10所述的装置，其中，所述接收存储单元是设置为：
    通过现场可编程门阵列FPGA上预先设置的接口分别与高端路由器上每个处理器分别连接后，接收每个处理器的所述路由查找命令；
    对接收的来自每个处理器的路由查找命令，以队列的形式在FPGA的存储介质上分别存储。
  12. 根据权利要求10或11所述的装置，其中，所述共用访问单元是设置为：将读取的路由查找命令，通过TCAM芯片接口访问所述共用的TCAM芯片。
  13. 根据权利要求10或11所述的装置，其中，所述接收存储单元是设置为：
    对每个处理器，分别通过FPGA所述预先设置的接口接收路由查找命令；
    按照预设倍数缓存接收的路由查找命令后，对缓存的路由查找命令进行有效数据提取后，以队列的形式在FPGA的存储介质上分别存储，得到所述存储的路由查找命令。
  14. 根据权利要求13所述的装置，其中，所述接收存储单元还设置为：判断所述存储的路由查找命令是否是路由查找的有效带宽的整数倍，对不是路由查找的有效带宽的整数倍的部分进行补零处理。
  15. 根据权利要求14所述的装置，其中，所述读取单元是设置为：
    根据预设的优先级逐个，以路由查找的有效带宽为单位从高位到低位读取所述存储的路由查找命令至一个或一个以上的数据总线的数据位宽的高位和低位。
  16. 根据权利要求15所述的装置，其中，所述读取单元还设置为：
    当所述存储的路由查找命令的最低位被读取至数据总线的数据位宽的高位时，按照所述预设的优先级读取下一个路由查找命令，将读取的下一个路由查找命令的最高位，以路由查找的有效带宽的大小为单位读取至数据总线的数据位宽的低位部分进行拼接；
    对未读取的部分，继续以路由查找的有效带宽为单位从高位到低位进行读取。
  17. 根据权利要求10或11所述的装置，该装置还包括存储单元，设置为：将完成路由查找的所述路由查找命令按照处理器进行区分后，分别存储在相应的预先设置的命令存储队列中。
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