WO2020102923A1 - 一种具有干扰抑制的低噪声放大器电路 - Google Patents

一种具有干扰抑制的低噪声放大器电路

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Publication number
WO2020102923A1
WO2020102923A1 PCT/CN2018/000394 CN2018000394W WO2020102923A1 WO 2020102923 A1 WO2020102923 A1 WO 2020102923A1 CN 2018000394 W CN2018000394 W CN 2018000394W WO 2020102923 A1 WO2020102923 A1 WO 2020102923A1
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WO
WIPO (PCT)
Prior art keywords
inductor
noise amplifier
amplifier circuit
interference suppression
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/000394
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English (en)
French (fr)
Inventor
张有明
黄风义
张凌晗
姜楠
唐旭升
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broad Chip Nanjing Communication Technology Co Ltd
S-TEK (SHANGHAI) HIGH-FREQUENCY COMMUNICATION TECHNOLOGY Co Ltd
Southeast University
Original Assignee
Broad Chip Nanjing Communication Technology Co Ltd
S-TEK (SHANGHAI) HIGH-FREQUENCY COMMUNICATION TECHNOLOGY Co Ltd
Southeast University
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Application filed by Broad Chip Nanjing Communication Technology Co Ltd, S-TEK (SHANGHAI) HIGH-FREQUENCY COMMUNICATION TECHNOLOGY Co Ltd, Southeast University filed Critical Broad Chip Nanjing Communication Technology Co Ltd
Priority to PCT/CN2018/000394 priority Critical patent/WO2020102923A1/zh
Publication of WO2020102923A1 publication Critical patent/WO2020102923A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements

Definitions

  • the present invention relates to a low-noise amplifier circuit with interference suppression, which belongs to the technical field of radio frequency and analog integrated circuits of microelectronics and solid-state electronics.
  • Background Art In recent years, wireless communication technology has developed rapidly, and portable terminals such as smartphones and tablet computers have gradually become indispensable tools in people's daily lives. The design of wireless transceivers with low power consumption and high integration has become very important. In wireless transceivers, the design of the receiver is often critical.
  • interference signals outside the operating frequency band of the receiving system will change the working state of the RF receiving system circuit, causing adverse effects on the RF receiving system's gain, noise, bandwidth, linearity, etc. It may even cause the receiving system to not work properly.
  • interference signals located near the useful signal within the operating frequency band referred to as "in-band” for short
  • in-band will generate regenerated spectrum, which may directly overwhelm the useful signal in the adjacent frequency band and deteriorate
  • the performance of the RF receiving system such as noise and linearity reduces the sensitivity of the receiver system.
  • Suppressing the interference signal in the low-noise amplifier closest to the antenna is of great significance to attenuating the deterioration of the performance of the subsequent module circuits of the receiver due to the interference signal, as well as ensuring the normal operation and performance improvement of the RF receiver.
  • Low noise amplifier circuits with interference suppression commonly used methods to achieve interference suppression are filtering methods or feedback cancellation methods.
  • the filtering method is to connect a filter in series at the input or output of the low noise amplifier circuit to filter out the interference signal.
  • the filter at the input introduces a noise source at the input of the low-noise amplifier, which will deteriorate the noise figure of the low-noise amplifier and the input impedance.
  • the filter at the output will affect the gain of the low-noise amplifier.
  • the feedback cancellation method is to use a feedback circuit to feed back the interference signal amplified by the low-noise amplifier to the input terminal of the low-noise amplifier to cancel the disturbance signal.
  • the feedback circuit will deteriorate the noise figure, input impedance matching and gain of the low noise amplifier, and the active feedback circuit will also increase Add overall DC power consumption.
  • Literature J. R Chang and YS Lin
  • 3.2-9.7 GHz ultra-wideband low-noise amplifier with excellent stop-band rejection "in Electronics Letters, vol. 48, no. 1, pp. 44-45, January 5 2012 "uses a filtering method to implement a low-noise amplifier circuit with interference suppression.
  • a passive filter is connected in series at the input of the low-noise amplifier, and an active band-notch filter is connected in series at the output.
  • interference signal suppression greater than 25 dB can be achieved, the noise figure is high, the average noise figure is greater than 6 dB, and the gain is low, and the power gain is less than 10 dB.
  • the literature “I. Kwon and D. Oh,” Blocker cancelling LNA with integrated bandpass feedback stage, "in Electronics Letter, vol. 48, no. 14, pp. 850-851, July 5 2012” uses a feedback cancellation method to achieve Low noise amplifier circuit for interference suppression.
  • the feedback circuit forms an active band-pass filter, which filters out the useful signal output by the low-noise amplifier, passes the interference signal output by the low-noise amplifier, and feeds back to the input terminal of the low-noise amplifier to cancel the interference signal.
  • This circuit can achieve 37 dB interference signal suppression, but the active filter introduces additional noise, so this circuit also has a higher noise figure, which also increases the power consumption of the circuit.
  • the added circuit unit for suppressing the interference signal will deteriorate the performance of the low-noise amplifier noise coefficient, gain, input impedance matching, etc. And increased DC power consumption.
  • the technical problem to be solved by the present invention is to provide a low-noise amplifier circuit with interference suppression, which can effectively suppress interference signals without deteriorating the noise figure, gain, input impedance matching of the low-noise amplifier, or increasing the DC Power consumption.
  • a low-noise amplifier circuit with interference suppression includes a low-noise amplifier circuit and a degraded network with interference suppression;
  • the low-noise amplifier circuit includes a common source amplifier, a gate of the common source amplifier is connected to an input end of the low-noise amplifier circuit, The drain of the common source amplifier is connected to the output of the low noise amplifier circuit
  • the power supply terminal the degraded network with interference suppression is composed of inductance and capacitance, and one end of the degraded network with interference suppression is connected to the source of the common source amplifier, and the other end is connected to the DC voltage terminal;
  • the degraded network with interference suppression Resonance occurs at a specific frequency, reducing the gain of the low-noise amplifier circuit at the resonance frequency, thereby suppressing the interference signal at a specific frequency, which is the frequency of the disturbance signal.
  • the degradation network with interference suppression includes first to second adjustable capacitors and first to third inductors; one end of the first inductor is connected to one end of the first adjustable capacitor, The other end of the first inductor is grounded, the other end of the first adjustable capacitor, one end of the second inductor and one end of the second adjustable capacitor are connected, and one end of the second inductor is connected to the low noise amplifier circuit, the second inductor The other end of the second adjustable capacitor is connected to one end of the third adjustable capacitor, and the other end of the second adjustable capacitor is connected to the low noise amplifier circuit, and the other end of the third inductor is connected to the DC voltage terminal Pick up.
  • the degradation network with interference suppression includes third to fifth adjustable capacitors and fourth to fifth inductors; one end of the third adjustable capacitor and one end of the fourth inductor are equal to the first One end of the fifth adjustable capacitor is connected, and one end of the fifth adjustable capacitor is connected to the low noise amplifier circuit, the other end of the third adjustable capacitor is grounded, the other end of the fourth inductor is grounded, one end of the fifth inductor, the first One end of the four adjustable capacitors is connected to the other end of the fifth adjustable capacitor, and the other end of the fifth adjustable capacitor is connected to the low noise amplifier circuit, and the other end of the fifth inductor is connected to the DC voltage terminal. The other end of the four adjustable capacitors is grounded.
  • the adjustable capacitor is an on-chip capacitor or a chip capacitor
  • the inductance is an on-chip inductor, a bond wire inductor or a chip inductor.
  • the low noise amplifier circuit includes a first common-gate transistor, third and fourth common-source transistors, second and fifth cascode transistors, first and second bias resistors, Sixth and seventh inductors, variable load capacitors, load center tapped inductors, first and second DC blocking capacitors;
  • the source of the first cascode transistor is connected to one end of the sixth inductor, one end of the seventh inductor and the first At one end of the DC blocking capacitor, the gate of the first cascode transistor is connected to one end of the second bias resistor and one end of the second DC blocking capacitor, and the drain of the first cascode transistor is connected to the source of the second cascode transistor;
  • the gate of the second cascode transistor is connected to the power supply terminal, the drain of the second cascode transistor is connected to one end of the load variable capacitor, one end of the load center tap inductor and the positive output terminal;
  • the gates of the third and fourth common source transistors are both Connected to the other end of the first DC blocking capacitor, the drains of the third and fourth common
  • the present invention adopts the above technical solutions and has the following technical effects:
  • the present invention provides a low-noise amplifier circuit with interference suppression, which solves the problem that the circuit unit used to suppress interference signals in the prior art will deteriorate the noise figure, gain, input impedance matching of the low-noise amplifier, and increase the DC power consumption. Effectively suppress interference signals.
  • FIG. 1 is a structural block diagram of a low-noise circuit with interference suppression according to the present invention.
  • FIG. 2 is a circuit diagram of an embodiment of a low-noise amplifier circuit with interference suppression according to the present invention.
  • 3 is a circuit diagram of a second embodiment of a low-noise amplifier circuit with interference suppression according to the present invention.
  • 4 is a schematic diagram of gain characteristics of a low noise amplifier with interference suppression according to the present invention.
  • the circuit with interference suppression deteriorates the noise figure, gain, input impedance matching, and increases the DC power consumption of the low-noise amplifier.
  • the degenerated network with interference suppression is used to generate the frequency of the interference signal. Resonance, showing higher impedance; In the useful signal frequency band, the degraded network with interference suppression is not resonant, showing lower impedance;
  • the degraded network with interference suppression is connected to the source of the common source amplifier, forming source negative feedback, making the low
  • the gain characteristic of the noise amplifier exhibits a band-notch filter characteristic, forming a notch characteristic at the frequency of the interference signal and a pass-band characteristic at the frequency of the useful signal, thereby suppressing the interference signal while amplifying the useful signal.
  • a low-noise amplifier circuit with interference suppression includes a low-noise amplifier Larger circuits and degraded networks with interference suppression.
  • the low noise amplifier circuit includes a common source amplifier.
  • the degraded network with interference suppression consists of inductance and capacitance. One end of the degraded network with interference suppression is connected to the source stage of the common source amplifier in the low noise amplifier circuit, and the other end is connected to the DC voltage, which is equivalent to an AC small signal to ground.
  • the degraded network with interference suppression can generate resonance at a specific frequency, which is called the “resonance frequency”.
  • the value of the resonance frequency is determined by the inductance and capacitance of the degraded network with interference suppression, and the parasitic parameters of the common source amplifier.
  • the resonance frequency is equal to the frequency of the interference signal.
  • the degraded network with interference suppression forms a very large impedance at the resonance frequency, reducing the gain of the low-noise amplifier circuit at the resonance frequency, thereby suppressing the interference signal at the resonance frequency.
  • the degenerate network with interference suppression has a non-resonant frequency at its non-resonant frequency.
  • the non-resonant frequency contains the useful signal frequency and forms a small impedance, thereby making the gain at the useful signal frequency higher and the useful signal amplified.
  • the low-noise amplifier circuit with interference suppression proposed by the present invention has a small impact on the low-noise amplifier circuit because it forms a small impedance at the useful signal frequency, and does not deteriorate the noise figure, gain,
  • the input impedance is matched, and at the same time, the degraded network with interference suppression is composed of inductance and capacitance without increasing DC power consumption.
  • the inductance value and the capacitance value of the capacitor in the degraded network with interference suppression are adjustable, so that the resonance frequency is adjustable, so that the low noise amplifier circuit with interference suppression can suppress interference signals of different frequencies.
  • the inductor in the degraded network with interference suppression can use on-chip inductors, bond wire inductors or chip inductors, and the capacitor in the degraded network with interference suppression can use on-chip capacitors or chip capacitors.
  • FIG. 2 A specific implementation circuit of a low-noise amplifier circuit with interference suppression is shown in FIG. 2, which includes a low-noise amplifier circuit and a degradation network with interference suppression.
  • the low-noise amplifier circuit uses a noise-cancelling low-noise amplifier structure, which includes a common-gate transistor M1, a common-source transistor M3 and M4, a cascode transistor M2 and M5, bias resistors Rbl and Rb2, inductance Lg and Ls, load can Variable capacitance Cload, load center tap inductance Lload, DC blocking capacitors Cbl and Cb2; M3 and M4 are common source amplifiers in the low noise amplifier circuit; the source of Ml is connected to port 2 of Lg, port 1 of Ls and port 1 of CM , The gate of Ml is connected to the port 1 of Rb2 and the port 1 of Cb2, the drain of Ml is connected to the source of M2; the gate of M2 is connected to the power supply VDD, the drain of M2
  • the degradation network with interference suppression includes adjustable capacitors C1 and C2, inductors L1 ⁇ L3; L1 port 1 and C1 port 1 are connected, L1 port 2 is grounded, L2 port 1 is connected to C1 port 2, C2 port 1 and the source stage of M3 in the low noise amplifier circuit, port 2 of L2 is grounded, port 1 of L3 is connected to port 2 of C2 and the source stage of M4 in the low noise amplifier circuit, port 2 of L3 is connected to the power supply VDD.
  • a low-noise amplifier circuit with interference suppression another specific implementation circuit is shown in FIG. 3, including a low-noise amplifier circuit and a degraded network with interference suppression.
  • the low-noise amplifier circuit uses a noise-cancelling low-noise amplifier structure, which includes a common-gate transistor M1, a common-source transistor M3 and M4, a cascode transistor M2 and M5, bias resistors Rbl and Rb2, inductance Lg and Ls, load can be Variable capacitance Cload, load center tap inductance Lload, DC blocking capacitors Cbl and Cb2; M3 and M4 are common source amplifiers in a low noise amplifier circuit; the source of Ml is connected to port 2 of Lg, port 1 of Ls and port 1 of Cbl , The gate of Ml is connected to the port 1 of Rb2 and the port 1 of Cb2, the drain of Ml is connected to the source of M2; the gate of M2 is connected to the power supply VDD, the drain of M
  • the degradation network with interference suppression includes adjustable capacitors C3 ⁇ C5, inductors L4 and L5; port 1 of L4 is connected to port 1 of C3, port 1 of C5 and the source stage of M3 in the low noise amplifier circuit, port 2 of L4 is grounded , Port 2 of C3 is grounded, Port 1 of L5 is connected to Port 1 of C4, Port 2 of C5 and the source stage of M4 in the low noise amplifier circuit, Port 2 of L5 is connected to the power supply VDD, and Port 2 of C4 is grounded.
  • FIG. 4 it is a schematic diagram of gain characteristics of a low noise amplifier with interference suppression according to the present invention. It can be seen from the figure that the gain at the frequency of the useful signal is higher, the useful signal is amplified, and the gain at the frequency of the interference signal is lower, the disturbing signal will be suppressed.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

一种具有干扰抑制的低噪声放大器电路，包括低噪声放大器电路和具有干扰抑制的退化网络。低噪声放大器电路包含共源放大器。具有干扰抑制的退化网络由电感和电容组成，具有干扰抑制的退化网络的一端连接共源放大器的源级，另一端连接直流电压。具有干扰抑制的退化网络能够在特定频率产生谐振，称为"谐振频率"。谐振频率由具有干扰抑制的退化网络的电感和电容、共源放大器寄生参数共同决定。具有干扰抑制的退化网络能够在谐振频率处形成极大的阻抗，降低谐振频率处的低噪声放大器电路的增益，从而抑制谐振频率处的干扰信号。该低噪声放大器电路能够有效抑制干扰信号，不会恶化低噪声放大器的噪声系数、增益、输入阻抗匹配，也不会增加直流功耗。

Description

一种具有干扰抑制的低噪声放大器电路 技术领域 本发明涉及一种具有干扰抑制的低噪声放大器电路，属于微电子与固体电子 学的射频与模拟集成电路技术领域。 背景技术 近年来无线通信技术发展迅速， 智能手机、平板电脑等便携式终端逐渐成为 人们日常生活中不可或缺的工具， 低功耗、高集成度的无线收发机设计变得非常 重要。 无线收发机中， 接收机的设计往往非常关键。
接收射频小信号时， 接收系统的工作频段以外 （简称“带外”） 千扰信号会 改变射频接收系统电路的工作状态， 对射频接收系统的增益、 噪声、 带宽、 线性 度等性能造成不良的影响， 甚至导致接收系统无法正常工作。 此外， 由于射频接 收系统电路本身存在非线性， 位于工作频段以内 （简称“带内” ）的有用信号附 近的干扰信号会产生再生频谱，这些再生频谱可能直接煙没临近频段内的有用信 号， 恶化射频接收系统的噪声和线性度等性能， 降低接收机系统的灵敏度。在距 离天线最近的低噪声放大器中抑制干扰信号，对减弱接收机后续各级模块电路因 干扰信号产生的性能恶化，以及保证射频接收机正常工作和提升性能具有重要意 义。
具有千扰抑制的低噪声放大器电路实现千扰抑制常用的方法是滤波方法或 反馈抵消方法。滤波方法是在低噪声放大器电路的输入端或者输出端串联一个滤 波器， 滤除干扰信号。但是， 输入端的滤波器在低噪声放大器的输入端引入了噪 声源， 将恶化低噪声放大器的噪声系数和输入阻抗匹配， 输出端的滤波器将影响 低噪声放大器的增益。反馈抵消方法是在利用反馈电路， 将经低噪声放大器放大 后的干扰信号反馈到低噪声放大器的输入端， 抵消千扰信号。 但是， 反馈电路将 恶化低噪声放大器的噪声系数、输入阻抗匹配和增益， 同时有源反馈电路也将增 加整体直流功耗。
文献“J. R Chang and Y. S. Lin, "3.2-9.7 GHz ultra-wideband low-noise amplifier with excellent stop-band rejection," in Electronics Letters, vol. 48, no. 1, pp. 44-45, January 5 2012”采用了滤波方法实现具有干扰抑制的低噪声放大器电路， 在低噪声放大器的输入端串联了一个无源滤波器，并且在输出端串联了一个有源 带陷滤波器。 虽然可以实现大于 25 dB的干扰信号抑制， 但是其噪声系数较高， 平均噪声系数大于 6 dB， 并且增益较低， 功率增益小于 10 dB。可见， 该电路中， 因为输入端和输出端增加了滤波器单元，引入的噪声极大地恶化了低噪声放大器 的噪声性能， 同时， 增加的滤波器单元会带来额外的损耗， 从而降低了低噪声放 大器的增益。
文献“I. Kwon and D. Oh, "Blocker cancelling LNA with integrated bandpass feedback stage," in Electronics Letter, vol. 48, no. 14, pp. 850-851, July 5 2012”采用 了反馈抵消方法实现具有干扰抑制的低噪声放大器电路。其中反馈电路形成有源 带通滤波器， 滤除低噪声放大器输出的有用信号， 使低噪声放大器输出的干扰信 号通过，并反馈到低噪声放大器的输入端，抵消干扰信号。该电路可以实现 37 dB 的干扰信号抑制， 但是有源滤波器引入了额外的噪声， 所以该电路同样具有较高 的噪声系数， 也增加了电路的功耗。
综合上述，传统的采用滤波方法或反馈抵消方法的具有干扰抑制的低噪声放 大器电路中， 增加的用于抑制干扰信号的电路单元， 将恶化低噪声放大器噪声系 数、 增益、 输入阻抗匹配等性能， 并增加了直流功耗。 发明内容 本发明所要解决的技术问题是： 提供一种具有干扰抑制的低噪声放大器电 路， 能够有效抑制干扰信号， 不会恶化低噪声放大器的噪声系数、 增益、 输入阻 抗匹配， 也不会增加直流功耗。
本发明为解决上述技术问题采用以下技术方案：
一种具有干扰抑制的低噪声放大器电路， 包括低噪声放大器电路、具有干扰 抑制的退化网络； 所述低噪声放大器电路包括共源放大器， 共源放大器的栅极连 接低噪声放大器电路的输入端，共源放大器的漏极连接低噪声放大器电路的输出 端、 电源端； 所述具有干扰抑制的退化网络由电感和电容组成， 且具有千扰抑制 的退化网络的一端连接共源放大器的源极， 另一端连接直流电压端； 具有干扰抑 制的退化网络在特定频率下产生谐振， 降低谐振频率处低噪声放大器电路的增 益， 从而抑制特定频率处的干扰信号， 该特定频率即为千扰信号的频率。
作为本发明的一种优选方案，所述具有干扰抑制的退化网络包括第一至第二 可调电容、 第一至第三电感； 第一电感的一端和第一可调电容的一端相接， 第一 电感的另一端接地， 第一可调电容的另一端、第二电感的一端和第二可调电容的 一端相接，且第二电感的一端和低噪声放大器电路相接，第二电感的另一端接地， 第二可调电容的另一端和第三电感的一端相接，且第二可调电容的另一端和低噪 声放大器电路相接， 第三电感的另一端和直流电压端相接。
作为本发明的一种优选方案，所述具有干扰抑制的退化网络包括第三至第五 可调电容、 第四至第五电感； 第三可调电容的一端、第四电感的一端均和第五可 调电容的一端相接， 且第五可调电容的一端和低噪声放大器电路相接， 第三可调 电容的另一端接地， 第四电感的另一端接地， 第五电感的一端、第四可调电容的 一端均和第五可调电容的另一端相接，且第五可调电容的另一端和低噪声放大器 电路相接， 第五电感的另一端和直流电压端相接， 第四可调电容的另一端接地。
作为本发明的一种优选方案，所述可调电容采用片上电容或者贴片电容， 电 感采用片上电感、 键合线电感或者贴片电感。
作为本发明的一种优选方案， 所述低噪声放大器电路包括第一共栅级晶体 管、 第三和第四共源级晶体管、 第二和第五 cascode晶体管、 第一和第二偏置电 阻、第六和第七电感、负载可变电容、负载中心抽头电感、第一和第二隔直电容； 第一共栅级晶体管的源极连接第六电感的一端、第七电感的一端和第一隔直电容 的一端，第一共栅级晶体管的栅极连接第二偏置电阻的一端和第二隔直电容的一 端， 第一共栅级晶体管的漏极连接第二 cascode晶体管的源极； 第二 cascode晶 体管的栅极连接电源端， 第二 cascode晶体管的漏极连接负载可变电容的一端、 负载中心抽头电感的一端和正极输出端；第三和第四共源级晶体管的栅极均连接 第一隔直电容的另一端，第三和第四共源级晶体管的漏极均连接第二隔直电容的 另一端和第五 cascode晶体管的源极； 第五 cascode晶体管的栅极连接电源端， 第五 cascode晶体管的漏极连接负载可变电容的另一端、 负载中心抽头电感的另 - -端和负极输出端； 第六电感的另一端连接输入端， 第七电感的另一端接地， 负 载中心抽头电感的中心抽头端连接电源端；第一偏置电阻的一端连接第三共源级 晶体管的栅极， 另一端连接第一直流偏置电压； 第二偏置电阻的一端连接第一共 栅级晶体管的栅极， 另一端连接第二直流偏置电压。
本发明采用以上技术方案与现有技术相比， 具有以下技术效果：
1、 本发明一种具有干扰抑制的低噪声放大器电路， 解决了现有技术用于抑 制干扰信号的电路单元会恶化低噪声放大器的噪声系数、 增益、 输入阻抗匹配， 增加直流功耗的问题， 有效抑制干扰信号。
2、 本发明一种具有干扰抑制的低噪声放大器电路， 用于具有干扰抑制的接 收机中， 具有新颖性和通用性。 附图说明 图 1是本发明一种具有千扰抑制的低噪声电路的结构框图。
图 2是本发明一种具有干扰抑制的低噪声放大器电路的实施例一电路图。 图 3是本发明一种具有千扰抑制的低噪声放大器电路的实施例二电路图。 图 4是本发明一种具有千扰抑制的低噪声放大器的增益特性示意图。 具体实施方式 下面详细描述本发明的实施方式，所述实施方式的示例在附图中示出。下面 通过参考附图描述的实施方式是示例性的， 仅用于解释本发明，而不能解释为对 本发明的限制。
本发明为了改进传统的结构中，具有干扰抑制的电路恶化低噪声放大器的噪 声系数、增益、输入阻抗匹配以及增加直流功耗的问题， 利用具有千扰抑制的退 化网络在干扰信号的频率点产生谐振， 呈现较高阻抗； 在有用信号频段， 具有干 扰抑制的退化网络不谐振， 呈现较低阻抗； 具有千扰抑制的退化网络接在共源放 大器的源极，构成源极负反馈，使低噪声放大器的增益特性呈现带陷滤波器特性， 在干扰信号频率形成陷波特性， 在有用信号频率形成通带特性， 从而在放大有用 信号的同时， 抑制干扰信号。
如图 1所示， 本发明一种具有干扰抑制的低噪声放大器电路， 包括低噪声放 大器电路和具有干扰抑制的退化网络。 所述的低噪声放大器电路包含共源放大 器。所述的具有干扰抑制的退化网络由电感和电容组成。具有干扰抑制的退化网 络的一端连接低噪声放大器电路中的共源放大器的源级， 另一端连接直流电压， 从而等效为交流小信号到地。
具有千扰抑制的退化网络能够在特定频率产生谐振， 该频率称为“谐振频 率” ， 谐振频率的数值由具有干扰抑制的退化网络的电感和电容， 以及共源放大 器寄生参数共同决定。谐振频率等于干扰信号的频率。具有干扰抑制的退化网络 在谐振频率处形成极大的阻抗， 降低谐振频率处的低噪声放大器电路的增益， 从 而抑制谐振频率处的干扰信号。
具有干扰抑制的退化网络在其非谐振频率， 非谐振频率包含有用信号频率， 形成较小的阻抗， 从而使有用信号频率处的增益较高， 有用信号得到放大。本发 明提出的一种具有千扰抑制的低噪声放大器电路， 由于在有用信号频率， 形成较 小的阻抗，对低噪声放大器电路的影响很小，不会恶化低噪声放大器的噪声系数、 增益、 输入阻抗匹配， 同时， 具有干扰抑制的退化网络由电感电容构成， 不增加 直流功耗。
具有干扰抑制的退化网络中的电感的感值和电容的容值可调，从而其谐振频 率可调，使得所述的具有干扰抑制的低噪声放大器电路可以抑制不同频率的干扰 信号。
具有干扰抑制的退化网络中的电感可以采用片上电感、键合线电感或者贴片 电感， 具有干扰抑制的退化网络中的电容可以采用片上电容、 或者贴片电容。
具有干扰抑制的低噪声放大器电路， 一种具体的实施电路如图 2所示， 包括 低噪声放大器电路和具有干扰抑制的退化网络。其中， 低噪声放大器电路采用噪 声抵消低噪声放大器结构， 其包括共栅级晶体管 Ml、 共源级晶体管 M3和 M4、 cascode晶体管 M2和 M5、 偏置电阻 Rbl和 Rb2、 电感 Lg和 Ls、 负载可变电容 Cload、 负载中心抽头电感 Lload、 隔直电容 Cbl和 Cb2; M3和 M4为低噪声放 大器电路中的共源放大器； Ml的源级连接 Lg的端口 2、 Ls的端口 1和 CM的 端口 1， Ml的栅极连接 Rb2的端口 1和 Cb2的端口 1， Ml的漏极连接 M2的源 级； M2的栅极连接电源 VDD， M2的漏极连接 Cload的端口 1、 Lload的端口 1 和正极输出端 OUTP; M3和 M4的栅极都连接 Cbl的端口 2, M3和 M4的漏极 都连接 Cb2的端口 2和 M5的源级； M5的栅极连接电源 VDD, M5的漏极连接 Cload的端口 2、 Lload的端口 2和负极输出端 OUTN; Lg的端口 1和输入端 IN 相接， Ls的端口 2接地， Rbl的端口 2连接直流偏置电压 VBIAS1 , Rb2的端口 2连接直流偏置电压 VBIAS2， Lload的中心抽头端口连接电源 VDD。 具有干扰 抑制的退化网络包括可调电容 C1和 C2、电感 L1〜L3 ; L1的端口 1和 C1的端口 1相接， L1的端口 2接地， L2的端口 1连接 C1的端口 2、 C2的端口 1和低噪 声放大器电路中的 M3的源级， L2的端口 2接地， L3的端口 1连接 C2的端口 2 和低噪声放大器电路中的 M4的源级， L3的端口 2和电源 VDD相接。
具有干扰抑制的低噪声放大器电路， 另一种具体的实施电路如图 3所示， 包 括低噪声放大器电路和具有干扰抑制的退化网络。其中， 低噪声放大器电路采用 噪声抵消低噪声放大器结构， 其包括共栅级晶体管 Ml、 共源级晶体管 M3 和 M4、 cascode晶体管 M2和 M5、 偏置电阻 Rbl和 Rb2、 电感 Lg和 Ls、 负载可 变电容 Cload、 负载中心抽头电感 Lload、 隔直电容 Cbl和 Cb2; M3和 M4为低 噪声放大器电路中的共源放大器； Ml的源级连接 Lg的端口 2、 Ls的端口 1和 Cbl的端口 1， Ml的栅极连接 Rb2的端口 1和 Cb2的端口 1， Ml的漏极连接 M2的源级； M2的栅极连接电源 VDD， M2的漏极连接 Cload的端口 1、 Lload 的端口 1和正极输出端 OUTP; M3和 M4的栅极都连接 Cbl 的端口 2， M3和 M4的漏极都连接 Cb2的端口 2和 M5的源级； M5的栅极连接电源 VDD， M5 的漏极连接 Cload的端口 2、 Lload的端口 2和负极输出端 OUTN； Lg的端口 1 和输入端 IN相接， Ls的端口 2接地， Rbl的端口 2连接直流偏置电压 VBIAS1 , Rb2的端口 2连接直流偏置电压 VBIAS2, Lload的中心抽头端口连接电源 VDD。 具有干扰抑制的退化网络包括可调电容 C3〜 C5、 电感 L4和 L5 ; L4的端口 1连 接 C3的端口 1、 C5的端口 1和低噪声放大器电路中的 M3的源级， L4的端口 2 接地， C3的端口 2接地， L5的端口 1连接 C4的端口 1、 C5的端口 2和低噪声 放大器电路中的 M4的源级， L5的端口 2和电源 VDD相接， C4的端口 2接地。
如图 4 所示， 是本发明一种具有干扰抑制的低噪声放大器的增益特性示意 图。 从图中可以看出， 有用信号频率处的增益较高， 有用信号得到放大， 而干扰 信号频率处的增益较低， 千扰信号将被抑制。
以上实施例仅为说明本发明的技术思想， 不能以此限定本发明的保护范围， 凡是按照本发明提出的技术思想， 在技术方案基础上所做的任何改动， 均落入本 发明保护范围之内。

Claims

权 利 要 求 书
1. 一种具有干扰抑制的低噪声放大器电路， 其特征在于， 包括低噪声放大 器电路、 具有干扰抑制的退化网络； 所述低噪声放大器电路包括共源放大器， 共 源放大器的栅极连接低噪声放大器电路的输入端，共源放大器的漏极连接低噪声 放大器电路的输出端、电源端；所述具有干扰抑制的退化网络由电感和电容组成， 且具有干扰抑制的退化网络的一端连接共源放大器的源极，另一端连接直流电压 端； 具有干扰抑制的退化网络在特定频率下产生谐振， 降低谐振频率处低噪声放 大器电路的增益， 从而抑制特定频率处的干扰信号， 该特定频率即为千扰信号的 频率。
2. 根据权利要求 1 所述具有干扰抑制的低噪声放大器电路， 其特征在于， 所述具有干扰抑制的退化网络包括第一至第二可调电容、第一至第三电感； 第一 电感的一端和第一可调电容的一端相接，第一电感的另一端接地， 第一可调电容 的另一端、第二电感的一端和第二可调电容的一端相接， 且第二电感的一端和低 噪声放大器电路相接，第二电感的另一端接地，第二可调电容的另一端和第三电 感的一端相接， 且第二可调电容的另一端和低噪声放大器电路相接，第三电感的 另一端和直流电压端相接。
3. 根据权利要求 1 所述具有干扰抑制的低噪声放大器电路， 其特征在于， 所述具有干扰抑制的退化网络包括第三至第五可调电容、第四至第五电感； 第三 可调电容的一端、第四电感的一端均和第五可调电容的一端相接， 且第五可调电 容的一端和低噪声放大器电路相接，第三可调电容的另一端接地， 第四电感的另 一端接地， 第五电感的一端、第四可调电容的一端均和第五可调电容的另一端相 接， 且第五可调电容的另一端和低噪声放大器电路相接， 第五电感的另一端和直 流电压端相接， 第四可调电容的另一端接地。
4. 根据权利要求 2或 3所述具有干扰抑制的低噪声放大器电路， 其特征在 于， 所述可调电容采用片上电容或者贴片电容， 电感采用片上电感、键合线电感 或者贴片电感。
5. 根据权利要求 1所述具有千扰抑制的低噪声放大器电路， 其特征在于， 所述低噪声放大器电路包括第一共栅级晶体管、第三和第四共源级晶体管、第二 和第五 cascode晶体管、第一和第二偏置电阻、第六和第七电感、 负载可变电容、 负载中心抽头电感、第一和第二隔直电容； 第一共栅级晶体管的源极连接第六电 感的一端、第七电感的一端和第一隔直电容的一端， 第一共栅级晶体管的栅极连 接第二偏置电阻的一端和第二隔直电容的一端，第一共栅级晶体管的漏极连接第 二 cascode晶体管的源极； 第二 cascode晶体管的栅极连接电源端， 第二 cascode 晶体管的漏极连接负载可变电容的一端、 负载中心抽头电感的一端和正极输出 端； 第三和第四共源级晶体管的栅极均连接第一隔直电容的另一端，第三和第四 共源级晶体管的漏极均连接第二隔直电容的另一端和第五 cascode 晶体管的源 极； 第五 cascode晶体管的栅极连接电源端， 第五 cascode晶体管的漏极连接负 载可变电容的另一端、负载中心抽头电感的另一端和负极输出端； 第六电感的另 一端连接输入端， 第七电感的另一端接地， 负载中心抽头电感的中心抽头端连接 电源端； 第一偏置电阻的一端连接第三共源级晶体管的栅极， 另一端连接第一直 流偏置电压； 第二偏置电阻的一端连接第一共栅级晶体管的栅极， 另一端连接第
Figure imgf000010_0001
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