WO2020098056A1 - 显示面板的补偿电路、显示装置 - Google Patents
显示面板的补偿电路、显示装置 Download PDFInfo
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- WO2020098056A1 WO2020098056A1 PCT/CN2018/121787 CN2018121787W WO2020098056A1 WO 2020098056 A1 WO2020098056 A1 WO 2020098056A1 CN 2018121787 W CN2018121787 W CN 2018121787W WO 2020098056 A1 WO2020098056 A1 WO 2020098056A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Definitions
- the present application relates to the field of display technology, in particular to a compensation circuit and a display panel of a display panel.
- the liquid crystal panel is divided into the lower array layer and the upper common electrode.
- the driving voltage of the upper common electrode is called the common voltage. The larger, at the same time, due to the presence of the internal impedance of the compensation circuit of the display panel, the greater the current, the more the output common voltage will drop.
- the common voltage is also affected by the array layer.
- the array layer is used to transfer the data of the display screen. With the difference of the display screen, the common voltage will also have a certain degree of deviation.
- An embodiment of the present application provides a compensation circuit for a display panel, including:
- the output circuit is used to output the first digital voltage
- a digital-to-analog conversion circuit is connected to the output circuit, an input of the digital-to-analog conversion circuit receives the first digital voltage, and outputs a first analog voltage through the output of the digital-to-analog conversion circuit
- the analog voltage is used to provide a common voltage to the display panel
- An analog-to-digital conversion circuit is connected to the digital-to-analog conversion circuit, an input terminal of the analog-to-digital conversion circuit receives the first analog voltage, and outputs a second digital voltage through an output terminal of the analog-to-digital conversion circuit;
- a compensation circuit the input end of the compensation circuit is connected to the output end of the output circuit and the analog-to-digital conversion circuit, and the output end of the compensation circuit is connected to the input end of the digital-to-analog conversion circuit for The first digital voltage and the second digital voltage output a compensation control signal, and the compensation control signal is the first digital voltage compensated and corrected.
- the compensation circuit includes:
- a difference circuit an input terminal of the difference circuit is connected to the output circuit and the output terminal of the analog-to-digital conversion circuit, and is used to obtain the first digital voltage output by the output circuit and the analog-to-digital conversion circuit A voltage difference value of the second digital voltage output from the output terminal, and output the voltage difference value through the output terminal of the difference circuit;
- a summing circuit an input terminal of the summing circuit is connected to the output terminal of the output circuit and the difference circuit, an output terminal of the summing circuit is connected to the input terminal of the digital-analog conversion circuit, the summation The circuit is used to superimpose the first digital voltage output by the output circuit and the voltage difference output from the output terminal of the difference circuit to obtain a third digital voltage, and output it through the output terminal of the summation circuit The third digital voltage.
- it also includes:
- a drive circuit the input end of the drive circuit is connected to the output end of the digital-to-analog conversion circuit, the input end of the drive circuit is used to receive the first analog voltage, and the output end of the drive circuit outputs a second analog Voltage, the second analog voltage is used to provide a common voltage to the display panel;
- the output terminal of the driving circuit is connected to the input terminal of the analog-to-digital conversion circuit.
- the driving circuit includes a current amplifier.
- the compensation circuit further includes a voltage amplifying circuit, the voltage amplifying circuit is connected to the driving circuit, and is configured to amplify the second analog voltage.
- the output circuit includes:
- the memory is used to store the first digital voltage.
- the memory is a non-volatile memory.
- the output circuit further includes:
- the controller is configured to output a control signal, the control signal including the first digital voltage.
- the controller is a microprocessor.
- the microprocessor is used to output a control signal, and the control signal includes a clock signal and a first digital voltage.
- the microprocessor and the digital-to-analog conversion circuit are connected by an intermediary bus.
- the difference circuit includes a first amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor, and an input terminal of the summation circuit is connected to the output circuit and the first An output terminal of an amplifier, an output terminal of the summing circuit is connected to an input terminal of the digital-analog conversion circuit.
- the first terminal of the first resistor is connected to the output terminal of the analog-to-digital conversion circuit, and the second terminal of the first resistor is connected to the negative phase input terminal of the first amplifier;
- the first end of the second resistor is connected to the output circuit, and the second end of the second resistor is connected to the non-inverting input end of the first amplifier;
- the first terminal of the third resistor is connected to the non-inverting input terminal of the first amplifier, and the second terminal of the third resistor is grounded;
- the first terminal of the fourth resistor is connected to the negative phase input terminal of the first amplifier, and the second terminal of the fourth resistor is connected to the output terminal of the first amplifier.
- the summing circuit includes a second amplifier, a fifth resistor, a sixth resistor, and a seventh resistor, and the output terminal of the second amplifier is connected to the input terminal of the digital-analog conversion circuit.
- the first terminal of the fifth resistor is connected to the output circuit, and the second terminal of the fifth resistor is connected to the negative phase input terminal of the second amplifier;
- the first terminal of the sixth resistor is connected to the output terminal of the first amplifier, and the second terminal of the sixth resistor is connected to the negative phase input terminal of the second amplifier;
- the first end of the seventh resistor is connected to the negative phase input end of the second amplifier, and the second end of the seventh resistor is connected to the output end of the second amplifier;
- the non-inverting input terminal of the second amplifier is grounded.
- the summing circuit further includes an eighth resistor
- the first end of the fifth resistor is connected to the output circuit, and the second end of the fifth resistor is connected to the non-inverting input end of the second amplifier;
- the first end of the sixth resistor is connected to the output of the first amplifier, and the second end of the sixth resistor is connected to the non-inverting input of the second amplifier;
- the first end of the seventh resistor is connected to the negative phase input end of the second amplifier, and the second end of the seventh resistor is connected to the output end of the second amplifier;
- the first terminal of the eighth resistor is connected to the negative phase input terminal of the second amplifier, and the second terminal of the eighth resistor is grounded.
- An embodiment of the present application further provides a compensation circuit for a display panel, including:
- a digital-to-analog conversion circuit is connected to the storage circuit, an input terminal of the digital-to-analog conversion circuit receives the first digital voltage, and outputs a first analog voltage through an output terminal of the digital-to-analog conversion circuit;
- a drive circuit the input end of the drive circuit is connected to the output end of the digital-to-analog conversion circuit, the input end of the drive circuit is used to receive the first analog voltage, and the output end of the drive circuit outputs a second analog Voltage, the second analog voltage is used to provide a common voltage to the display panel;
- An analog-to-digital conversion circuit is connected to the driving circuit, an input terminal of the analog-to-digital conversion circuit receives the second analog voltage, and outputs a second digital voltage through an output terminal of the analog-to-digital conversion circuit;
- a difference circuit an input terminal of the difference circuit is connected to the output terminal of the storage circuit and the analog-to-digital conversion circuit, and is used to obtain the first digital voltage output by the storage circuit and the analog-to-digital conversion circuit A voltage difference value of the second digital voltage output from the output terminal, and output the voltage difference value through the output terminal of the difference circuit;
- a summing circuit an input terminal of the summing circuit is connected to the output terminal of the storage circuit and the difference circuit, an output terminal of the summing circuit is connected to the input terminal of the digital-analog conversion circuit, and the summation
- the circuit is configured to superimpose the first digital voltage output from the storage circuit and the voltage difference output from the output terminal of the difference circuit to obtain a third digital voltage, and output the third digital voltage through the output terminal of the summation circuit The third digital voltage.
- An embodiment of the present application further provides a display device, including a display panel and the compensation circuit for the display panel as described above.
- the above-mentioned compensation circuit of the display panel solves the first digital voltage output by the output circuit in the compensation circuit of the exemplary display panel, and outputs the first analog voltage through the digital-analog conversion circuit.
- the voltage (common voltage) drops, and at the same time, because of the higher resolution and larger size of the current display panel, the current load of the compensation circuit of the display panel becomes larger, resulting in a problem that the common voltage drops faster.
- 1 is a schematic structural diagram of a compensation circuit of a display panel in an embodiment
- FIG. 2 is a schematic structural diagram of a compensation circuit in an embodiment
- FIG. 3 is a schematic structural diagram of a compensation circuit of a display panel in another embodiment
- FIG. 4 is a circuit schematic diagram of a difference circuit in an embodiment
- FIG. 5 is a schematic circuit diagram of a summing circuit in an embodiment
- FIG. 6 is a schematic circuit diagram of a summing circuit in another embodiment
- FIG. 7 is a schematic structural diagram of a compensation circuit of a display panel in another embodiment.
- FIG. 1 is a schematic structural diagram of a compensation circuit of a display panel in an embodiment.
- a compensation circuit 10 for a display panel including:
- the output circuit 100 is used to output the first digital voltage U1;
- the digital-to-analog conversion circuit 120 is connected to the output circuit 100.
- the input terminal of the digital-to-analog conversion circuit 120 receives the first digital voltage U1, and outputs the first analog voltage V1 through the output terminal of the digital-to-analog conversion circuit.
- the first analog voltage V1 is used for Provide a common voltage to the display panel 20;
- the analog-to-digital conversion circuit 130 is connected to the digital-to-analog conversion circuit 120, the input terminal of the analog-to-digital conversion circuit 130 receives the first analog voltage V1, and outputs the second digital voltage U2 through the output terminal of the analog-to-digital conversion circuit;
- the compensation circuit 110 the input terminal of the compensation circuit 110 is connected to the output terminal of the output circuit 100 and the analog-to-digital conversion circuit 130, and the output terminal of the compensation circuit 100 is connected to the input terminal of the digital-to-analog conversion circuit 120 for
- the second digital voltage U2 outputs a compensation control signal U3, and the compensation control signal U3 is the compensated and corrected first digital voltage U1.
- the above-mentioned compensation circuit 10 of the display panel adds an analog-to-digital conversion circuit 130 and a compensation circuit 110 on the basis of the exemplary display panel compensation circuit 10, wherein the analog-to-digital conversion circuit 130 will provide the first analog to the display panel 20
- the voltage V1 is converted into a second digital voltage U2.
- the analog-to-digital conversion circuit 130 may be an analog-to-digital converter; the input terminal of the compensation circuit 110 is connected to the output terminal of the output circuit 100 and the analog-to-digital conversion circuit 130, and the output terminal of the compensation circuit 110 is
- the input terminal of the digital-to-analog conversion circuit 120 is connected to output a compensation control signal U3 according to the first digital voltage U1 and the second digital voltage U2.
- the compensation control signal U3 is the first digital voltage U1 after the compensation correction. After a digital voltage U1 passes through the digital-to-analog conversion circuit 120, the common voltage drop caused by the back end can be corrected back to the set value, thereby solving the first digital voltage U1 output by the output circuit 100 in the compensation circuit 10 of the exemplary display panel
- the first analog voltage V1 is output through the digital-to-analog conversion circuit 120. Due to the internal impedance of the circuit, the output first analog voltage V1 (common voltage) decreases. At the same time, because the resolution of the display panel 20 is currently higher, the size The larger the current load of the compensation circuit 10 of the display panel becomes, the more the common voltage drops faster.
- FIG. 2 is a schematic structural diagram of a compensation circuit 110 in an embodiment.
- the compensation circuit 110 includes:
- the difference circuit 1101, the input terminal of the difference circuit 1101 is connected to the output terminal of the output circuit 100 and the analog-to-digital conversion circuit 130, and is used to obtain the first digital voltage U1 output by the output circuit 100 and the output terminal of the output terminal of the analog-to-digital conversion circuit 130.
- the voltage difference ⁇ U of the two digital voltages U2, and the voltage difference ⁇ U is output through the output terminal of the difference circuit 11;
- Summing circuit 1102 the input of summing circuit 1102 is connected to the output of output circuit 100 and difference circuit 1101, the output of summing circuit 1102 is connected to the input of digital-to-analog conversion circuit 120, and summing circuit 1102 is used to output
- the first digital voltage U1 output by the circuit 100 is superimposed on the voltage difference ⁇ U output from the output terminal of the difference circuit 1101 to obtain a third digital voltage U3, and the third digital voltage U3 is output through the output terminal of the summation circuit 1102.
- the compensation circuit 110 includes a difference circuit 1101 and a sum circuit 1102, wherein the difference circuit 1101 may be a subtractor, and the sum circuit 1102 may be an adder, and its working principle is:
- the first digital voltage U1 passes through a digital-to-analog conversion circuit 120.
- the digital-to-analog conversion circuit 120 converts the first digital voltage U1 to a first analog voltage V1.
- the present invention uses an analog-to-digital conversion circuit 130 to convert the first analog voltage V1 to a second digital Voltage U2, through the difference circuit 1101, the difference between the first digital voltage U1 and the second digital voltage U2 collected to obtain a voltage difference ⁇ U, through the summation circuit 1102, the collected first digital voltage U1 and the voltage The difference ⁇ U is summed to obtain the third digital voltage U3.
- the third digital voltage U3 is the compensated and corrected first digital voltage U1.
- the corrected first digital voltage U1 passes through the digital-to-analog conversion circuit 120, and then the The common voltage drop caused by the terminal is corrected back to the set value, and the digital-to-analog conversion circuit 120 may be a digital-to-analog converter.
- FIG. 3 is a schematic structural diagram of a compensation circuit 10 of a display panel in another embodiment.
- the compensation circuit 10 of the display panel further includes:
- the driving circuit 140 the input terminal of the driving circuit 140 is connected to the output terminal of the digital-to-analog conversion circuit 120, the input terminal of the driving circuit 140 is used to receive the first analog voltage V1, and the output terminal of the driving circuit 140 outputs the second analog voltage V2.
- Two analog voltage V2 is used to provide a common voltage to the display panel 20;
- the output terminal of the driving circuit 140 is connected to the input terminal of the analog-to-digital conversion circuit 130.
- the first analog voltage V1 generated by the digital-to-analog conversion circuit 120 is a common voltage provided to the display panel 20, the common voltage driving capability is very small, and the newly added driving circuit, including a current amplifier, guarantees to output a current of more than 100mA. Enhance the output capability of public voltage.
- the compensation circuit 10 further includes a voltage amplifying circuit 150 connected to the driving circuit 140 for amplifying the second analog voltage V2. Since the first digital voltage U1 output by the output circuit 100 is processed by the digital-to-analog conversion circuit 120 and the driving circuit 140 and outputs the second analog voltage V2, due to the existence of the internal impedance of the circuit, the output second analog voltage V2 (common voltage) will be Therefore, the voltage amplifying circuit 150 can amplify the reduced second analog voltage V2, and then fine-tune the amplified second analog voltage V2 through the difference circuit 1101 and the summing circuit 1102 in the compensation circuit 110, thereby Revise back to the set value.
- a voltage amplifying circuit 150 connected to the driving circuit 140 for amplifying the second analog voltage V2. Since the first digital voltage U1 output by the output circuit 100 is processed by the digital-to-analog conversion circuit 120 and the driving circuit 140 and outputs the second analog voltage V2, due to the existence of the internal impedance of the circuit, the output second analog voltage V2
- the output circuit 100 includes: a memory for storing the first digital voltage U1, and the memory may be a non-volatile memory, wherein data stored in the non-volatile memory in a power-off state will not be lost .
- the output circuit 100 further includes:
- the controller is used to output a control signal, and the control signal includes a first digital voltage U1.
- the controller is a microprocessor
- the control signal includes a clock signal and the first digital voltage
- the microprocessor and the digital-to-analog conversion circuit 120 are connected by an intermediary bus.
- the above-mentioned output circuit 100 includes a memory or a controller.
- the first digital voltage U1 needs to be stored in the memory.
- the common voltage V1 needs to be provided to the display panel 20 for its normal operation, it needs to be recalled.
- the first digital voltage U1 in the memory is converted into the first analog voltage V1 by the digital-to-analog conversion circuit 120 to provide the common voltage V1 for the display panel 20; when the output circuit 100 includes a controller, the controller and the digital-to-analog conversion circuit 120 pass through
- the media bus is connected to provide a control signal to the digital-to-analog conversion circuit 120.
- the control signal includes a clock signal and a first digital voltage U1 signal.
- the controller may be a microprocessor, including a clock terminal and a data terminal, the clock terminal is used to send a clock signal; the data terminal is used to send a first digital voltage U1 signal, and the medium bus is a two-wire serial bus, including the clock terminal and data To achieve synchronous data communication.
- FIG. 4 is a circuit schematic diagram of a difference circuit 1101 in an embodiment.
- the difference circuit 1101 includes a first amplifier A1, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4, the input terminal of the summing circuit 1102 is connected to the output terminal of the output circuit 100 and the first amplifier A1, and the output terminal of the summing circuit 1102 is connected to the input terminal of the digital-analog conversion circuit 120.
- the first terminal of the first resistor R1 is connected to the output terminal of the analog-to-digital conversion circuit 130, and the second terminal of the first resistor R1 is connected to the negative phase input terminal of the first amplifier A1;
- the first end of the second resistor R2 is connected to the output circuit 100, and the second end of the second resistor R2 is connected to the non-inverting input end of the first amplifier A1;
- the first terminal of the third resistor R3 is connected to the non-inverting input terminal of the first amplifier A1, and the second terminal of the third resistor R3 is grounded;
- the first terminal of the fourth resistor R4 is connected to the negative-phase input terminal of the first amplifier A1, and the second terminal of the fourth resistor R4 is connected to the output terminal of the first amplifier A1.
- FIG. 5 is a schematic circuit diagram of a summing circuit 1102 in an embodiment.
- the summing circuit 1102 includes a second amplifier A2, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7;
- the first terminal of the fifth resistor R5 is connected to the output circuit 100
- the second terminal of the fifth resistor R5 is connected to the negative-phase input terminal of the second amplifier A2
- the first terminal of the sixth resistor R6 is connected to the output terminal of the first amplifier A1, and the second terminal of the sixth resistor R6 is connected to the negative phase input terminal of the second amplifier A2;
- the first terminal of the seventh resistor R7 is connected to the negative phase input terminal of the second amplifier A2, and the second terminal of the seventh resistor R7 is connected to the output terminal of the second amplifier A2;
- the non-inverting input terminal of the second amplifier A2 is grounded.
- FIG. 6 is a schematic circuit diagram of a summing circuit 1102 in another embodiment.
- the summing circuit 1102 further includes an eighth resistor R8, a first end of the fifth resistor R5 is connected to the output circuit 100, and a fifth resistor The second terminal of R5 is connected to the positive input terminal of the second amplifier A2;
- the first terminal of the sixth resistor R6 is connected to the output terminal of the first amplifier A1, and the second terminal of the sixth resistor R6 is connected to the non-inverting input terminal of the second amplifier A2;
- the first terminal of the seventh resistor R7 is connected to the negative phase input terminal of the second amplifier A2, and the second terminal of the seventh resistor R7 is connected to the output terminal of the second amplifier A2;
- the first terminal of the eighth resistor R8 is connected to the negative phase input terminal of the second amplifier A2, and the second terminal of the eighth resistor R8 is grounded.
- FIG. 7 is a schematic structural diagram of a compensation circuit 10 for a display panel in another embodiment, including:
- the storage circuit 101 is used to store the first digital voltage U1;
- the digital-to-analog conversion circuit 120 is connected to the storage circuit 101, the input terminal of the digital-to-analog conversion circuit 120 receives the first digital voltage U1, and outputs the first analog voltage V1 through the output terminal of the digital-to-analog conversion circuit 120;
- the driving circuit 140 the input terminal of the driving circuit 140 is connected to the output terminal of the digital-analog conversion circuit 120, the input terminal of the driving circuit 140 is used to receive the first analog voltage V1, the output terminal of the driving circuit 140 outputs the second analog voltage V2 Two analog voltage V2 is used to provide a common voltage to the display panel 20;
- the analog-to-digital conversion circuit 130 is connected to the driving circuit 140, the input terminal of the analog-to-digital conversion circuit 130 receives the second analog voltage V2, and outputs the second digital voltage U2 through the output terminal of the analog-to-digital conversion circuit 130;
- the input terminal of the difference circuit 1101 is connected to the output terminals of the storage circuit 101 and the analog-to-digital conversion circuit 130, and is used to obtain the first digital voltage U1 output from the storage circuit 101 and the output terminal of the output terminal of the analog-to-digital conversion circuit 130.
- the voltage difference ⁇ U of the two digital voltage U2, and the voltage difference ⁇ U is output through the output terminal of the difference circuit 1101;
- Summing circuit 1102 the input of summing circuit 1102 is connected to the output of storage circuit 101 and difference circuit 1101, the output of summing circuit 1102 is connected to the input of digital-to-analog conversion circuit 120, and summing circuit 1102 is used to store The first digital voltage U1 output from the circuit 101 and the voltage difference ⁇ U output from the output terminal of the difference circuit 1101 are superimposed to obtain a third digital voltage U3, and the third digital voltage U3 is output through the output terminal of the summation circuit 1102.
- the above-mentioned compensation circuit 10 of the display panel adds an analog-to-digital conversion circuit 130, a difference circuit 1101, and a summing circuit 1102 on the basis of the compensation circuit 10 of the exemplary display panel, and its working principle is as follows:
- a digital voltage U1 passes through a digital-to-analog conversion circuit 120.
- the digital-to-analog conversion circuit 120 converts the first digital voltage U1 to a first analog voltage V1.
- the first analog voltage V1 outputs a second analog voltage V2 through the driving circuit 140.
- the analog-to-digital conversion circuit 130 converts the first analog voltage V2 to the second digital voltage U2, through the difference circuit 1101, the difference between the first digital voltage U1 and the second digital voltage U2 collected to obtain the voltage difference ⁇ U, through the summation circuit 1102 ,
- the third digital voltage U3 is obtained by summing the collected first digital voltage U1 and the voltage difference ⁇ U, and the third digital voltage U3 is the compensated and corrected first digital voltage U1, and the corrected first digital voltage U1
- the common voltage drop caused by the back end can be corrected back to the set value, thereby solving the first digital voltage U1 output by the storage circuit 101 in the compensation circuit 10 of the exemplary display panel, after passing through the digital-to-analog
- the conversion circuit 120 outputs the first analog voltage V1.
- the output first analog voltage V1 (common voltage) decreases.
- the resolution of the display panel 20 is currently made higher, the size is larger.
- the current drain of the compensation circuit 10 of the display panel becomes larger, which causes a problem that the common voltage drops faster.
- a display device includes a display panel 20 and a compensation circuit 10 for the display panel as described above.
- the above display device including the display panel 20 and the compensation circuit 10 of the display panel as described above, effectively ensures that the common voltage provided by the compensation circuit 10 of the display panel to the display panel 20 remains unchanged, eliminating the exemplary display panel
- the common voltage output in the compensation circuit of the system is affected by the drop in internal impedance and the LCD screen.
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Abstract
一种显示面板的补偿电路、显示装置，补偿电路包括：输出电路（100），用于输出第一数字电压（U1）；数模转换电路（120），与输出电路（100）相连，用于接收第一数字电压（U1）并输出第一模拟电压（V1），第一模拟电压（V1）用于给显示面板（20）提供公共电压；模数转换电路（130）用于接收第一模拟电压（V1）并输出第二数字电压（U2）；补偿电路（110）用于根据第一数字电压（U1）和第二数字电压（U2）输出补偿控制信号（U3），补偿控制信号（U3）为补偿修正后的第一数字电压（U1）。
Description
本申请要求于2018年11月13日提交中国专利局，申请号为2018113470037，申请名称为“显示面板的补偿电路、显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
本申请涉及显示技术领域，特别涉及一种显示面板的补偿电路、显示面板。
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
液晶面板分为下层的阵列层和上层的共电极，上层共电极的驱动电压叫做公共电压，随着液晶面板的解析度越来越高，尺寸越来越大，共电极的电流抽载越来越大，同时由于显示面板的补偿电路内部阻抗的存在，电流越大，其输出的公共电压下降就会越多。
公共电压也会受到阵列层的影响，阵列层是用来传递显示画面的数据，随着显示画面的不同，公共电压也会有一定程度的偏移状况发生。
申请内容
本申请实施例提供一种显示面板的补偿电路，包括：
输出电路，用于输出第一数字电压；
数模转换电路，与所述输出电路相连，所述数模转换电路的输入端接收 所述第一数字电压，并通过所述数模转换电路的输出端输出第一模拟电压，所述第一模拟电压用于给所述显示面板提供公共电压；
模数转换电路，与所述数模转换电路相连，所述模数转换电路的输入端接收所述第一模拟电压，并通过所述模数转换电路的输出端输出第二数字电压；
补偿电路，所述补偿电路的输入端连接所述输出电路和所述模数转换电路的输出端，所述补偿电路的输出端与所述数模转换电路的输入端相连，用于根据所述第一数字电压和所述第二数字电压输出补偿控制信号，所述补偿控制信号为补偿修正的所述第一数字电压。
在其中一个实施例中，所述补偿电路包括：
求差电路，所述求差电路的输入端连接所述输出电路和所述模数转换电路的输出端，用于获取所述输出电路输出的所述第一数字电压与所述模数转换电路输出端输出的所述第二数字电压的电压差值，并通过所述求差电路的输出端输出所述电压差值；
求和电路，所述求和电路的输入端连接所述输出电路和所述求差电路的输出端，所述求和电路的输出端连接所述数模转换电路的输入端，所述求和电路用于将所述输出电路输出的所述第一数字电压与所述求差电路输出端输出的所述电压差值进行叠加得到第三数字电压，并通过所述求和电路的输出端输出所述第三数字电压。
在其中一个实施例中，还包括：
驱动电路，所述驱动电路的输入端与所述数模转换电路的输出端相连，所述驱动电路的输入端用于接收所述第一模拟电压，所述驱动电路的输出端输出第二模拟电压，所述第二模拟电压用于给所述显示面板提供公共电压；
所述驱动电路的输出端与所述模数转换电路的输入端相连。
在其中一个实施例中，所述驱动电路包括电流放大器。
在其中一个实施例中，所述补偿电路还包括电压放大电路，所述电压放大电路与所述驱动电路相连，用于将所述第二模拟电压放大。
在其中一个实施例中，所述输出电路包括：
存储器，用于存储所述第一数字电压。
在其中一个实施例中，所述存储器为非易失性存储器。
在其中一个实施例中，所述输出电路还包括：
控制器，用于输出控制信号，所述控制信号包括所述第一数字电压。
在其中一个实施例中，所述控制器为微处理器。
在其中一个实施例中，所述微处理器用于输出控制信号，所述控制信号包括时钟信号和第一数字电压。
在其中一个实施例中，所述微处理器与所述数模转换电路采用介总线相连。
在其中一个实施例中，所述求差电路包括第一放大器、第一电阻、第二电阻、第三电阻和第四电阻，所述求和电路的输入端连接所述输出电路和所述第一放大器的输出端，所述求和电路的输出端连接所述数模转换电路的输入端相连。
在其中一个实施例中，所述第一电阻的第一端连接所述模数转换电路的输出端，所述第一电阻的第二端连接所述第一放大器的负相输入端；
所述第二电阻的第一端连接所述输出电路，所述第二电阻的第二端连接所述第一放大器的正相输入端；
所述第三电阻的第一端连接所述第一放大器的正相输入端，所述第三电 阻的第二端接地；
所述第四电阻的第一端连接所述第一放大器的负相输入端，所述第四电阻的第二端连接所述第一放大器的输出端。
在其中一个实施例中，所述求和电路包括第二放大器、第五电阻、第六电阻和第七电阻，所述第二放大器的输出端与所述数模转换电路的输入端相连。
在其中一个实施例中，所述第五电阻的第一端连接所述输出电路，所述第五电阻的第二端连接所述第二放大器的负相输入端；
所述第六电阻的第一端连接所述第一放大器的输出端，所述第六电阻的第二端连接所述第二放大器的负相输入端；
所述第七电阻的第一端连接所述第二放大器的负相输入端，所述第七电阻的第二端与连接所述第二放大器的输出端；
所述第二放大器的正相输入端接地。
在其中一个实施例中，所述求和电路还包括第八电阻，
所述第五电阻的第一端连接所述输出电路，所述第五电阻的第二端连接所述第二放大器的正相输入端；
所述第六电阻的第一端连接所述第一放大器的输出端，所述第六电阻的第二端连接所述第二放大器的正相输入端；
所述第七电阻的第一端连接所述第二放大器的负相输入端，所述第七电阻的第二端与连接所述第二放大器的输出端；
所述第八电阻的第一端连接所述第二放大器的负相输入端，所述第八电阻的第二端接地。
本申请实施例还提供一种显示面板的补偿电路，包括：
存储电路，用于存储第一数字电压；
数模转换电路，与所述存储电路相连，所述数模转换电路的输入端接收所述第一数字电压，并通过所述数模转换电路的输出端输出第一模拟电压；
驱动电路，所述驱动电路的输入端与所述数模转换电路的输出端相连，所述驱动电路的输入端用于接收所述第一模拟电压，所述驱动电路的输出端输出第二模拟电压，所述第二模拟电压用于给所述显示面板提供公共电压；
模数转换电路，与所述驱动电路相连，所述模数转换电路的输入端接收所述第二模拟电压，并通过所述模数转换电路的输出端输出第二数字电压；
求差电路，所述求差电路的输入端连接所述存储电路和所述模数转换电路的输出端，用于获取所述存储电路输出的所述第一数字电压与所述模数转换电路输出端输出的所述第二数字电压的电压差值，并通过所述求差电路的输出端输出所述电压差值；
求和电路，所述求和电路的输入端连接所述存储电路和所述求差电路的输出端，所述求和电路的输出端连接所述数模转换电路的输入端，所述求和电路用于将所述存储电路输出的所述第一数字电压与所述求差电路输出端输出的所述电压差值进行叠加得到第三数字电压，并通过所述求和电路的输出端输出所述第三数字电压。
本申请实施例还提供一种显示装置，包括显示面板和如上所述的显示面板的补偿电路。
上述的显示面板的补偿电路，解决示范性显示面板的补偿电路中的输出电路输出的第一数字电压，经过数模转换电路输出第一模拟电压，由于电路内部阻抗的存在，输出的第一模拟电压(公共电压)下降，同时又因为目前显示面板的解析度做的较高，尺寸较大，从而显示面板的补偿电路的电流抽载 变大，导致公共电压下降更快的问题。
为了更清楚地说明本申请实施例或示范性技术中的技术方案，下面将对实施例或示范性技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为一实施例中显示面板的补偿电路的结构示意图；
图2为一实施例中补偿电路的结构示意图；
图3为另一实施例中显示面板的补偿电路的结构示意图；
图4为一实施例中求差电路的电路示意图；
图5为一实施例中求和电路的电路示意图；
图6为另一实施例中求和电路的电路示意图；
图7为又一实施例中显示面板的补偿电路的结构示意图。
当一个元件被认为与另一个元件“相连”时，它可以是直接连接到另一个元件或者可能同时存在居中元件。除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。
参见图1，图1为一实施例中显示面板的补偿电路的结构示意图。
一种显示面板的补偿电路10，包括：
输出电路100，用于输出第一数字电压U1；
数模转换电路120，与输出电路100相连，数模转换电路120的输入端接收第一数字电压U1，并通过数模转换电路的输出端输出第一模拟电压V1，第一模拟电压V1用于给显示面板20提供公共电压；
模数转换电路130，与数模转换电路120相连，模数转换电路130的输入端接收第一模拟电压V1，并通过模数转换电路的输出端输出第二数字电压U2；
补偿电路110，补偿电路110的输入端连接输出电路100和模数转换电路130的输出端，补偿电路100的输出端与数模转换电路120的输入端相连，用于根据第一数字电压U1和第二数字电压U2输出补偿控制信号U3，补偿控制信号U3为补偿修正的第一数字电压U1。
上述的显示面板的补偿电路10，在示范性显示面板的补偿电路10的基础上增加了模数转换电路130和补偿电路110，其中，模数转换电路130将提供给显示面板20的第一模拟电压V1转换成第二数字电压U2，该模数转换电路130可以是模数转换器；补偿电路110的输入端连接输出电路100和模数转换电路130的输出端，补偿电路110的输出端与数模转换电路120的输入端相连，用于根据第一数字电压U1和第二数字电压U2输出补偿控制信号U3，补偿控制信号U3即为补偿修正后的第一数字电压U1，补偿后的第一数字电压U1再经过数模转换电路120，便可将后端造成的公共电压下降修正回设定值，从而解决示范性显示面板的补偿电路10中的输出电路100输出的第一数字电压U1，经过数模转换电路120输出第一模拟电压V1，由于电路内部阻抗的存在，输出的第一模拟电压V1(公共电压)下降，同时又因为目前显 示面板20的解析度做的较高，尺寸较大，从而显示面板的补偿电路10的电流抽载变大，导致公共电压下降更快的问题。
在本实施例中，参见图2，图2为一实施例中补偿电路110的结构示意图，补偿电路110包括：
求差电路1101，求差电路1101的输入端连接输出电路100和模数转换电路130的输出端，用于获取输出电路100输出的第一数字电压U1与模数转换电路130输出端输出的第二数字电压U2的电压差值ΔU，并通过求差电路11的输出端输出电压差值ΔU；
求和电路1102，求和电路1102的输入端连接输出电路100和求差电路1101的输出端，求和电路1102的输出端连接数模转换电路120的输入端，求和电路1102用于将输出电路100输出的第一数字电压U1与求差电路1101输出端输出的电压差值ΔU进行叠加得到第三数字电压U3，并通过求和电路1102的输出端输出第三数字电压U3。
在本实施例中，补偿电路110包括求差电路1101和求和电路1102，其中，求差电路1101可以是减法器，求和电路1102可以是加法器，其工作原理为：输出电路100输出的第一数字电压U1经过数模转换电路120，数模转换电路120将第一数字电压U1转换为第一模拟电压V1，本发明采用模数转换电路130将第一模拟电压V1转换为第二数字电压U2，通过求差电路1101，将采集到的第一数字电压U1和第二数字电压U2求差，得到电压差值ΔU，通过求和电路1102，将采集到的第一数字电压U1和电压差值ΔU求和得到第三数字电压U3，第三数字电压U3即为补偿修正后的第一数字电压U1，该修正后的第一数字电压U1再经过数模转换电路120，便可将后端造成的公共电压下降修正回设定值，该数模转换电路120可以是数模转换器。
进一步地，参见图3，图3为另一实施例中显示面板的补偿电路10的结构示意图，显示面板的补偿电路10还包括：
驱动电路140，驱动电路140的输入端与数模转换电路120的输出端相连，驱动电路140的输入端用于接收第一模拟电压V1，驱动电路140的输出端输出第二模拟电压V2，第二模拟电压V2用于给显示面板20提供公共电压；
驱动电路140的输出端与模数转换电路130的输入端相连。
由于数模转换电路120产生的第一模拟电压V1，即为给显示面板20提供的公共电压，该公共电压驱动能力很小，新增的驱动电路，包括电流放大器，保证输出100mA以上的电流，增强公共电压的输出能力。
进一步地，补偿电路10还包括电压放大电路150，电压放大电路150与驱动电路140相连，用于将第二模拟电压V2放大。由于输出电路100输出的第一数字电压U1经过数模转换电路120、驱动电路140处理后输出第二模拟电压V2，由于电路内部阻抗的存在，输出的第二模拟电压V2(公共电压)会有所下降，电压放大电路150可以对降低的第二模拟电压V2进行放大，再通过补偿电路110中的求差电路1101、求和电路1102对进行放大处理过的第二模拟电压V2进行微调，从而修订回设定值。
在一个实施例中，输出电路100包括：存储器，用于存储第一数字电压U1，存储器可以为非易失性存储器，其中，非易失性存储器在断电状态下所存储的数据不会丢失。
进一步地，输出电路100还包括：
控制器，用于输出控制信号，控制信号包括第一数字电压U1。
具体地，控制器为微处理器，控制信号包括时钟信号和第一数字电压，且微处理器与数模转换电路120采用介总线相连。
上述的输出电路100包括存储器或控制器，当输出电路100包括存储器时，需将第一数字电压U1存储在存储器内，当需要给显示面板20提供公共电压V1供其正常工作时，需调取存储器里面的第一数字电压U1，经过数模转换电路120转换成第一模拟电压V1，为显示面板20提供公共电压V1；当输出电路100包括控制器时，控制器与数模转换电路120经由介总线相连，用于向数模转换电路120提供控制信号，控制信号包括时钟信号和第一数字电压U1信号。控制器可以是微处理器，包括时钟端和数据端，时钟端用于发送时钟信号；数据端用于发送第一数字电压U1信号，介总线为两线式串行总线，包括时钟端和数据端，从而实现同步数据的通信。
进一步地，参见图4，图4为一实施例中求差电路1101的电路示意图，求差电路1101包括第一放大器A1、第一电阻R1、第二电阻R2、第三电阻R3和第四电阻R4，求和电路1102的输入端连接输出电路100和第一放大器A1的输出端，求和电路1102的输出端连接数模转换电路120的输入端相连。
具体地，第一电阻R1的第一端连接模数转换电路130的输出端，第一电阻R1的第二端连接第一放大器A1的负相输入端；
第二电阻R2的第一端连接输出电路100，第二电阻R2的第二端连接第一放大器A1的正相输入端；
第三电阻R3的第一端连接第一放大器A1的正相输入端，第三电阻R3的第二端接地；
第四电阻R4的第一端连接第一放大器A1的负相输入端，第四电阻R4的第二端连接第一放大器A1的输出端。
进一步地，参见图5，图5为一实施例中求和电路1102的电路示意图，求和电路1102包括第二放大器A2、第五电阻R5、第六电阻R6和第七电阻 R7；
具体地，第五电阻R5的第一端连接输出电路100，第五电阻R5的第二端连接第二放大器A2的负相输入端，第二放大器A2的输出端与数模转换电路120的输入端相连。
第六电阻R6的第一端连接第一放大器A1的输出端，第六电阻R6的第二端连接第二放大器A2的负相输入端；
第七电阻R7的第一端连接第二放大器A2的负相输入端，第七电阻R7的第二端与连接第二放大器A2的输出端；
第二放大器A2的正相输入端接地。
进一步地，参见图6，图6为另一实施例中求和电路1102的电路示意图，求和电路1102还包括第八电阻R8，第五电阻R5的第一端连接输出电路100，第五电阻R5的第二端连接第二放大器A2的正相输入端；
第六电阻R6的第一端连接第一放大器A1的输出端，第六电阻R6的第二端连接第二放大器A2的正相输入端；
第七电阻R7的第一端连接第二放大器A2的负相输入端，第七电阻R7的第二端与连接第二放大器A2的输出端；
第八电阻R8的第一端连接第二放大器A2的负相输入端，第八电阻R8的第二端接地。
一种显示面板的补偿电路10，参见图4，图7为又一实施例中显示面板的补偿电路10的结构示意图，包括：
存储电路101，用于存储第一数字电压U1；
数模转换电路120，与存储电路101相连，数模转换电路120的输入端接收第一数字电压U1，并通过数模转换电路120的输出端输出第一模拟电压 V1；
驱动电路140，驱动电路140的输入端与数模转换电路120的输出端相连，驱动电路140的输入端用于接收第一模拟电压V1，驱动电路140的输出端输出第二模拟电压V2，第二模拟电压V2用于给显示面板20提供公共电压；
模数转换电路130，与驱动电路140相连，模数转换电路130的输入端接收第二模拟电压V2，并通过模数转换电路130的输出端输出第二数字电压U2；
求差电路1101，求差电路1101的输入端连接存储电路101和模数转换电路130的输出端，用于获取存储电路101输出的第一数字电压U1与模数转换电路130输出端输出的第二数字电压U2的电压差值ΔU，并通过求差电路1101的输出端输出电压差值ΔU；
求和电路1102，求和电路1102的输入端连接存储电路101和求差电路1101的输出端，求和电路1102的输出端连接数模转换电路120的输入端，求和电路1102用于将存储电路101输出的第一数字电压U1与求差电路1101输出端输出的电压差值ΔU进行叠加得到第三数字电压U3，并通过求和电路1102的输出端输出第三数字电压U3。
上述的显示面板的补偿电路10，在示范性显示面板的补偿电路10的基础上增加了模数转换电路130、求差电路1101和求和电路1102，其工作原理为：存储电路101输出的第一数字电压U1经过数模转换电路120，数模转换电路120将第一数字电压U1转换为第一模拟电压V1，第一模拟电压V1通过驱动电路140输出第二模拟电压V2，模数转换电路130将第一模拟电压V2转换为第二数字电压U2，通过求差电路1101，将采集到的第一数字电压U1和第二数字电压U2求差，得到电压差值ΔU，通过求和电路1102，将采 集到的第一数字电压U1和电压差值ΔU求和得到第三数字电压U3，第三数字电压U3即为补偿修正后的第一数字电压U1，该修正后的第一数字电压U1再经过数模转换电路120，便可将后端造成的公共电压下降修正回设定值，从而解决示范性显示面板的补偿电路10中的存储电路101输出的第一数字电压U1，经过数模转换电路120输出第一模拟电压V1，由于电路内部阻抗的存在，输出的第一模拟电压V1(公共电压)下降，同时又因为目前显示面板20的解析度做的较高，尺寸较大，从而显示面板的补偿电路10的电流抽载变大，导致公共电压下降更快的问题。
一种显示装置，包括显示面板20和如上述的显示面板的补偿电路10。
上述的显示装置，包括显示面板20和如上述的显示面板的补偿电路10，有效地保证了显示面板的补偿电路10提供给显示面板20的公共电压是保持不变的，消除了示范性显示面板的补偿电路中输出的公共电压因内部阻抗、液晶显示画面不同导致其下降的影响。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。
Claims (18)
- 一种显示面板的补偿电路，其中，包括：输出电路，用于输出第一数字电压；数模转换电路，与所述输出电路相连，所述数模转换电路的输入端接收所述第一数字电压，并通过所述数模转换电路的输出端输出第一模拟电压，所述第一模拟电压用于给所述显示面板提供公共电压；模数转换电路，与所述数模转换电路相连，所述模数转换电路的输入端接收所述第一模拟电压，并通过所述模数转换电路的输出端输出第二数字电压；补偿电路，所述补偿电路的输入端连接所述输出电路和所述模数转换电路的输出端，所述补偿电路的输出端与所述数模转换电路的输入端相连，用于根据所述第一数字电压和所述第二数字电压输出补偿控制信号，所述补偿控制信号为补偿修正的所述第一数字电压。
- 根据权利要求1所述的显示面板的补偿电路，其中，所述补偿电路包括：求差电路，所述求差电路的输入端连接所述输出电路和所述模数转换电路的输出端，用于获取所述输出电路输出的所述第一数字电压与所述模数转换电路输出端输出的所述第二数字电压的电压差值，并通过所述求差电路的输出端输出所述电压差值；求和电路，所述求和电路的输入端连接所述输出电路和所述求差电路的输出端，所述求和电路的输出端连接所述数模转换电路的输入端，所述求和电路用于将所述输出电路输出的所述第一数字电压与所述求差电路输出端输出的所述电压差值进行叠加得到第三数字电压，并通过所述求和电路的输出 端输出所述第三数字电压。
- 根据权利要求1所述的显示面板的补偿电路，其中，还包括：驱动电路，所述驱动电路的输入端与所述数模转换电路的输出端相连，所述驱动电路的输入端用于接收所述第一模拟电压，所述驱动电路的输出端输出第二模拟电压，所述第二模拟电压用于给所述显示面板提供公共电压；所述驱动电路的输出端与所述模数转换电路的输入端相连。
- 根据权利要求3所述的显示面板的补偿电路，其中，所述驱动电路包括电流放大器。
- 根据权利要求3所述的显示面板的补偿电路，其中，所述补偿电路还包括电压放大电路，所述电压放大电路与所述驱动电路相连，用于将所述第二模拟电压放大。
- 根据权利要求1所述的显示面板的补偿电路，其中，所述输出电路包括：存储器，用于存储所述第一数字电压。
- 根据权利要求6所述的显示面板的补偿电路，其中，所述存储器为非易失性存储器。
- 根据权利要求6所述的显示面板的补偿电路，其中，所述输出电路还包括：控制器，用于输出控制信号，所述控制信号包括所述第一数字电压。
- 根据权利要求8所述的显示面板的补偿电路，其中，所述控制器为微处理器。
- 根据权利要求9所述的显示面板的补偿电路，其中，所述微处理器用于输出控制信号，所述控制信号包括时钟信号和第一数字电压。
- 根据权利要求10所述的显示面板的补偿电路，其中，所述微处理器与所述数模转换电路采用介总线相连。
- 根据权利要求2所述的显示面板的补偿电路，其中，所述求差电路包括第一放大器、第一电阻、第二电阻、第三电阻和第四电阻，所述求和电路的输入端连接所述输出电路和所述第一放大器的输出端，所述求和电路的输出端连接所述数模转换电路的输入端相连。
- 根据权利要求12所述的显示面板的补偿电路，其中，所述第一电阻的第一端连接所述模数转换电路的输出端，所述第一电阻的第二端连接所述第一放大器的负相输入端；所述第二电阻的第一端连接所述输出电路，所述第二电阻的第二端连接所述第一放大器的正相输入端；所述第三电阻的第一端连接所述第一放大器的正相输入端，所述第三电阻的第二端接地；所述第四电阻的第一端连接所述第一放大器的负相输入端，所述第四电阻的第二端连接所述第一放大器的输出端。
- 根据权利要求12所述的显示面板的补偿电路，其中，所述求和电路包括第二放大器、第五电阻、第六电阻和第七电阻，所述第二放大器的输出端与所述数模转换电路的输入端相连。
- 根据权利要求14所述的显示面板的补偿电路，其中，所述第五电阻的第一端连接所述输出电路，所述第五电阻的第二端连接所述第二放大器的负相输入端；所述第六电阻的第一端连接所述第一放大器的输出端，所述第六电阻的第二端连接所述第二放大器的负相输入端；所述第七电阻的第一端连接所述第二放大器的负相输入端，所述第七电阻的第二端与连接所述第二放大器的输出端；所述第二放大器的正相输入端接地。
- 根据权利要求14所述的显示面板的补偿电路，其中，所述求和电路还包括第八电阻，所述第五电阻的第一端连接所述输出电路，所述第五电阻的第二端连接所述第二放大器的正相输入端；所述第六电阻的第一端连接所述第一放大器的输出端，所述第六电阻的第二端连接所述第二放大器的正相输入端；所述第七电阻的第一端连接所述第二放大器的负相输入端，所述第七电阻的第二端与连接所述第二放大器的输出端；所述第八电阻的第一端连接所述第二放大器的负相输入端，所述第八电阻的第二端接地。
- 一种显示面板的补偿电路，其中，包括：存储电路，用于存储第一数字电压；数模转换电路，与所述存储电路相连，所述数模转换电路的输入端接收所述第一数字电压，并通过所述数模转换电路的输出端输出第一模拟电压；驱动电路，所述驱动电路的输入端与所述数模转换电路的输出端相连，所述驱动电路的输入端用于接收所述第一模拟电压，所述驱动电路的输出端输出第二模拟电压，所述第二模拟电压用于给所述显示面板提供公共电压；模数转换电路，与所述驱动电路相连，所述模数转换电路的输入端接收所述第二模拟电压，并通过所述模数转换电路的输出端输出第二数字电压；求差电路，所述求差电路的输入端连接所述存储电路和所述模数转换电 路的输出端，用于获取所述存储电路输出的所述第一数字电压与所述模数转换电路输出端输出的所述第二数字电压的电压差值，并通过所述求差电路的输出端输出所述电压差值；求和电路，所述求和电路的输入端连接所述存储电路和所述求差电路的输出端，所述求和电路的输出端连接所述数模转换电路的输入端，所述求和电路用于将所述存储电路输出的所述第一数字电压与所述求差电路输出端输出的所述电压差值进行叠加得到第三数字电压，并通过所述求和电路的输出端输出所述第三数字电压。
- 一种显示装置，其中，包括显示面板和补偿电路，所述补偿电路包括：输出电路，用于输出第一数字电压；数模转换电路，与所述输出电路相连，所述数模转换电路的输入端接收所述第一数字电压，并通过所述数模转换电路的输出端输出第一模拟电压，所述第一模拟电压用于给所述显示面板提供公共电压；模数转换电路，与所述数模转换电路相连，所述模数转换电路的输入端接收所述第一模拟电压，并通过所述模数转换电路的输出端输出第二数字电压；补偿电路，所述补偿电路的输入端连接所述输出电路和所述模数转换电路的输出端，所述补偿电路的输出端与所述数模转换电路的输入端相连，用于根据所述第一数字电压和所述第二数字电压输出补偿控制信号，所述补偿控制信号为补偿修正的所述第一数字电压。
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