WO2020087569A1 - 驱动电路、显示模组的驱动方法及显示模组 - Google Patents

驱动电路、显示模组的驱动方法及显示模组 Download PDF

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Publication number
WO2020087569A1
WO2020087569A1 PCT/CN2018/115210 CN2018115210W WO2020087569A1 WO 2020087569 A1 WO2020087569 A1 WO 2020087569A1 CN 2018115210 W CN2018115210 W CN 2018115210W WO 2020087569 A1 WO2020087569 A1 WO 2020087569A1
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Prior art keywords
signal
mos tube
level signal
control chip
timing control
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PCT/CN2018/115210
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English (en)
French (fr)
Inventor
王明良
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HKC Co Ltd
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HKC Co Ltd
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Priority to US16/331,150 priority Critical patent/US11430401B2/en
Publication of WO2020087569A1 publication Critical patent/WO2020087569A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/026—Arrangements or methods related to booting a display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only

Definitions

  • the present application relates to the field of display technology, in particular to a driving circuit, a driving method of a display module, and a display module.
  • liquid crystal display which include a liquid crystal panel and a backlight module.
  • the working principle of the liquid crystal panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage on the two glass substrates to control the rotation direction of the liquid crystal molecules, so as to refract the light of the backlight module to generate a picture.
  • TCON IC Timing Controller Integrated Circuit
  • the purpose of this application is to provide a driving circuit, a driving method of a display module, and a display module, so as to solve the abnormality of the startup screen of the display panel.
  • This application provides a driving circuit, including:
  • the timing control chip detects whether the initial configuration work is all completed, and outputs a status signal if all are completed;
  • the control circuit receives the status signal and outputs a preparation signal according to the status signal
  • the gate drive circuit receives the preparation signal and controls whether the display screen displays a picture according to the preparation signal.
  • control circuit includes a third resistor, a third MOS tube, and a fourth MOS tube, the fourth MOS tube is an N-type MOS tube, and the third MOS tube is a P-type MOS tube;
  • the control circuit further includes a first level signal, a second level signal and a logic level signal;
  • the gate terminal of the third MOS tube is connected to the state signal, the source terminal is connected to the logic level voltage signal, and the drain is connected to the first level signal through the third resistor;
  • the gate terminal of the fourth MOS tube is connected between the drain terminal and the third resistor of the third MOS tube, the source terminal is connected to the first level signal, and the drain is connected to the display panel;
  • the third MOS tube When the state signal is the first level signal, the third MOS tube is turned on; the gate terminal of the fourth MSO tube is pulled up to the second level signal by the logic level signal and turned on;
  • the ready signal outputs the first level signal as the output signal of the control circuit to the gate drive circuit.
  • control circuit further includes a first resistor, a second resistor, a first MOS tube, and a second MOS tube;
  • first MOS tube is an N-type MOS tube, and the second MOS tube is a P-type MOS tube tube;
  • the gate terminal of the first MOS tube is connected to the state signal and the gate terminal of the third MOS tube, the source terminal is connected to the ground terminal, and the drain is sequentially connected to the second through the second resistor and the first resistor Level signal
  • the gate terminal of the second MOS tube is connected to the drain terminal of the first MOS tube through the second resistor, the source terminal is connected to the second level signal, and the drain terminal is connected to the display panel;
  • the third MOS tube When the status signal outputs a second level signal, the third MOS tube is turned off; meanwhile, the first MOS tube is turned on, and the gate terminal of the second MOS tube is pulled down by the ground terminal and When turned on, the ready signal outputs a second level signal as a control signal of the control circuit to the gate drive circuit.
  • the application also discloses a driving method of the display module, which includes:
  • the timing control chip detects whether the initial configuration work is completed, and outputs a status signal after the completion;
  • the backlight module and the timing control chip of the display module are simultaneously turned on to perform initial configuration steps, thereby further saving time.
  • the timing control chip outputs a status signal to the gate drive circuit of the display screen of the display panel to control whether the display screen of the display panel displays a picture.
  • the display panel further includes a control circuit that detects the state of the timing control chip and outputs the preparation signal to the display screen;
  • the steps of the timing control chip outputting status signals include:
  • the timing control chip controls to output the status signal of the first level signal to the control circuit
  • the timing control chip After the timing control chip completes all code configurations, the timing control chip outputs a state signal of a second level signal to the control circuit;
  • the step of controlling whether the display screen of the display panel displays a picture includes:
  • the timing control chip When it is detected that the status signal output by the timing control chip is the first level signal, the first level signal is output to the display screen;
  • the control circuit When the status signal received by the control circuit is a second level signal, the control circuit outputs the second level signal.
  • the step of the timing control chip outputting a status signal to the control circuit according to the status of the initial configuration includes:
  • the timing control chip When the timing control chip does not complete the configuration, the timing control chip outputs the first level signal as a status signal and sends it to the control circuit;
  • the timing control chip When the timing control chip has completed all configurations, the timing control chip outputs the second level signal as a status signal and sends it to the control circuit.
  • the present application also discloses a display module using the above-mentioned driving method, including:
  • the driving circuit is electrically connected with the display screen
  • a backlight module providing a backlight source to the display screen
  • the driving circuit includes:
  • the control circuit is electrically connected to the timing control chip, and outputs a status signal to the display screen whether to display a picture according to the initial configuration state of the timing control chip.
  • the backlight module includes a backlight source and a light source driving circuit.
  • the timing control chip performs initial configuration while turning on the light source driving circuit.
  • the display screen includes a gate drive circuit, and the control circuit outputs a status signal to the gate drive circuit of the display screen to control the screen display of the display panel;
  • the timing control chip reads the initialization code and configures the initialization code; and outputs a status signal according to the configuration state of the initialization code.
  • the timing control chip (Timing Controller Integrated Circuit, TCON IC) is not stable when the backlight is unstable, but waits until the TCON IC stabilizes the output and then turns on the backlight.
  • TCON IC Timing Controller Integrated Circuit
  • the timing control chip performs initial configuration, and at the same time, the backlight module is turned on, and a status signal is output in the timing control chip to control the screen display of the display panel according to the status signal;
  • a status signal is output in the timing control chip to control the screen display of the display panel according to the status signal;
  • FIG. 1 is a circuit schematic diagram of a control circuit according to one embodiment of the present application.
  • FIG. 2 is a circuit schematic diagram of a working state of a control circuit according to one embodiment of the present application
  • FIG. 3 is a circuit schematic diagram of another working state of a control circuit according to one embodiment of the present application.
  • FIG. 4 is a schematic diagram of a display module according to one embodiment of the present application.
  • FIG. 5 is a schematic flowchart of a method for driving a display module according to one embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • installation should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • an embodiment of the present application discloses a driving circuit 200, including: a timing control chip 210, which detects whether the initial configuration work is all completed, and outputs a status signal if all are completed; the control circuit 230, the receiving status The signal outputs a preparation signal according to the status signal; the gate drive circuit 220 receives the preparation signal and controls whether the display screen 111 displays a picture according to the preparation signal.
  • the timing control chip 210 when the display panel 110 is turned on, the timing control chip 210 performs initial configuration, and at the same time, the backlight module 120 turns on, outputs a status signal in the timing control chip 210, and controls the screen display of the display panel 110 according to the status signal; therefore
  • the timing control chip 210 When the timing control chip 210 is initialized, it can control the screen display of the display panel 110 to prevent the screen from being opened when the timing control chip 210 has not completed all the configurations, so that the screen is abnormal.
  • the control circuit 230 includes a third resistor 231, a third MOS tube 232, and a fourth MOS tube 233, the fourth MOS tube 233 is an N-type MOS tube, and the third MOS tube 232 is P-type MOS tube; the control circuit 230 further includes a first level signal 238, a second level signal 239 and a logic level signal 240; the gate terminal of the third MOS tube is connected to the state signal, the source terminal Connected to the logic level voltage signal, the drain is connected to the first level signal through the third resistor; the gate terminal of the fourth MOS tube is connected to the drain terminal and the third terminal of the third MOS tube Between the three resistors 231, the source terminal is connected to the first level signal 238, and the drain is connected to the display panel 110; when the status signal is the first level signal 238, the third MOS tube 232 is turned on ; The gate terminal of the fourth MSO tube 233 is pulled up by the logic level signal 240 to the second level signal 239 and turned on; the ready
  • the fourth MOS tube 233 is an N-type MOS tube
  • the third MOS tube 232 is a P-type MOS tube
  • the N-type MOS tube turns off after receiving the first level signal 238, and the P-type MOS tube receives the first
  • the first level signal 238 will be turned on; in the control circuit 230, the third MOS tube 232 will first receive the status signal.
  • the timing control chip 210 sends out the status signal of the first level signal 238, the third MOS tube 232 After receiving the status signal of the first level signal 238, the gate terminal will be turned on, so that the logic level signal 240 is transmitted to the gate terminal of the fourth MOS transistor 233, and the logic level signal 240 is the second level signal 239 Therefore, the fourth MOS transistor 233 is turned on, so the first level signal 238 connected to the source of the fourth MOS transistor 233 is transmitted to the gate driving circuit 220, and the gate driving circuit 220 controls the display panel 110 not to display.
  • the control circuit 230 further includes a first resistor 234, a second resistor 235, a first MOS tube 236, and a second MOS tube 237;
  • the first MOS tube 236 is an N-type MOS tube, the The second MOS tube 237 is a P-type MOS tube;
  • the gate terminal of the first MOS tube 236 is connected to the state signal and the gate terminal of the third MOS tube 232, the source terminal is connected to the ground terminal, and the drain sequentially passes through the The second resistor 235 and the first resistor 234 are connected to the second level signal 239;
  • the gate terminal of the second MOS tube 237 is connected to the drain terminal of the first MOS tube 236 through the second resistor 235,
  • the source terminal is connected to the second level signal 239, and the drain terminal is connected to the display panel 110; when the status signal outputs the second level signal 239, the third MOS tube 232 is turned off;
  • the first MOS tube 236 is turned on, the gate terminal of the second
  • the first MOS tube 236 is an N-type MOS tube
  • the second MOS tube 237 is a P-type MOS tube
  • the N-type MOS tube will be connected after receiving the second level signal 239
  • the P-type MOS tube receives
  • the second level signal 239 is reached, it will be turned off; in the control circuit 230, the first MOS tube 236 and the third MOS tube 232 will receive the status signal first, when the timing control chip 210 sends out the status signal of the second level signal 239
  • the gate terminal of the first MOS transistor 236 receives the status signal of the second level signal 239, it will turn on, so that the ground signal is transmitted to the gate terminal of the second MOS transistor 237, and the ground signal is Level signal 238, the second MOS transistor 237 is turned on, so the second level signal 239 connected to the source of the second MOS transistor 237 will be transmitted to the gate driving circuit 220, and the gate driving circuit 220 receives the first level After the signal 238, the display panel 110 starts to
  • a driving method of the display module 100 including: the display panel 110 is turned on, the backlight module 120 of the display module 100 is turned on, and the timing control chip 210 Perform the initial configuration; the timing control chip 210 detects whether the initial configuration work is all completed, and outputs a status signal after the completion; and controls whether the display screen of the display panel 110 displays a screen according to the status signal.
  • the timing control chip 210 When the display panel 110 is turned on, the timing control chip 210 performs initial configuration, and at the same time, the backlight module 120 turns on, outputs a status signal in the timing control chip 210, and controls the screen display of the display panel 110 according to the status signal;
  • the screen display of the display panel 110 can be controlled to prevent the screen from being opened when the timing control chip 210 has not completed all configurations, thus causing the screen to be abnormal.
  • the backlight module 120 of the display module 100 and the timing control chip 210 are simultaneously turned on for initial configuration, which further saves time.
  • the backlight module 120 of the display module 100 and the timing control chip 210 are simultaneously initialized and configured.
  • the two steps can be performed at the same time, which does not interfere with the operation of other programs.
  • the time for opening the display screen can be further reduced, which is convenient for users to use and saves the time for users to wait for booting.
  • the timing control chip 210 outputs a status signal to the gate driving circuit of the display screen of the display panel 110 to control whether the display screen of the display panel 110 displays a picture.
  • the timing control chip 210 outputs a status signal to the driving circuit 200 of the display screen of the display panel 110, and can control whether the display screen of the display panel 110 displays a picture according to the status signal, preventing the timing control chip from being turned on when the display panel 110 is turned on.
  • the configuration of 210 has not been completed, and the timing control chip 210 is unstable, resulting in an abnormal display of the screen of the display screen.
  • the display panel 110 further includes a control circuit 230 that detects the state of the timing control chip 210 and outputs the preparation signal to the gate driving circuit; the timing control The step of the chip 210 outputting the status signal includes: when the timing control chip 210 is in the process of reading and configuring code, the timing control chip 210 controls to output the status signal of the first level signal 238 to the control circuit 230; After the timing control chip 210 completes all code configurations, the timing control chip 210 outputs the status signal of the second level signal 239 to the control circuit 230.
  • the timing control chip 210 can output the status signal of the first level signal 238 after the power is turned on and before the configuration is completed according to its own configuration; and the second level signal 239 can be output after all the configurations are completed.
  • the status signal, the status of the status signal will inform the control circuit 230 of the configuration of the timing control chip 210, so that you can control the display panel 110 to display differently according to different states, so as to avoid the backlight being turned on in advance but you will see The start-up screen is abnormal.
  • the step of controlling whether the display screen of the display panel 110 displays a picture includes: when it is detected that the state signal output by the timing control chip 210 is the first level signal 238, the first level signal is output The preparation signal of 238 is given to the display screen; when the status signal received by the control circuit 230 is the second level signal 239, the control circuit 230 outputs the status signal of the second level signal 239.
  • the first level signal is high level
  • the second level signal is low level
  • the first level signal of the status signal is high level RH
  • the second level signal is RL.
  • the level signal is VGH
  • the second level signal of the preparation signal is VGL.
  • the control circuit 230 when the status signal received by the control circuit 230 is the first level signal 238, the control circuit 230 outputs the first level signal 238 ready to be signaled; and the status signal received by the control circuit 230 is the second level signal 239 At this time, the control circuit 230 outputs the preparation signal of the second level signal 239; in this way, the control circuit 230 can know the configuration state of the timing control chip 210 according to the state of the status signal.
  • the step of the timing control chip 210 outputting a status signal to the control circuit 230 according to the status of the initial configuration includes: when the timing control chip 210 has not completed the configuration, the timing control chip 210 outputs the first level signal 238 as Status signal is sent to the control circuit 230.
  • the timing control chip 210 when the display panel 110 is turned on, the timing control chip 210 does not complete the initial configuration, and at the same time, the timing control chip 210 will output the first level signal 238 as a status signal according to the configuration incomplete initialization status, and then send it to the control
  • the circuit 230 is judged by the MOS tube in the control circuit 230 and outputs the first level signal 238 to the display panel 110. After the display panel 110 receives the first level signal 238, the liquid crystal panel cannot be charged and the display panel 110 remains black The screen is displayed.
  • the step of the timing control chip outputting a status signal to the control circuit 230 according to the status of the initial configuration includes: when the timing control chip 210 has completed all configurations, the timing control chip 210 outputs the second level signal 239 as Status signal is sent to the control circuit 230.
  • the timing control chip 210 when the timing control chip 210 detects the configuration initialization code to complete the configuration, the timing control chip 210 will output a second level signal 239 as a status signal according to the status of the configuration initialization completion, and then send it to the control circuit 230, by The MOS tube in the control circuit 230 determines and outputs the second level signal 239 to the display panel 110. After the gate driving circuit 220 receives the preparation signal of the second level signal 239, the liquid crystal panel is charged and the display panel starts to display normally Screen.
  • a driving method of the display panel 110 including the steps of:
  • the timing control chip 210 detects that the configuration state of the initialization code is not completed, and the timing control chip 210 outputs the status signal of the first level signal 238 to the control circuit 230;
  • S53-1 The gate terminal of the third MOS transistor 232 is connected to the state signal, the source terminal is connected to the logic level signal 240, and the drain is connected to the first level signal 238 through the third resistor 141 ;
  • S54-1 The gate terminal of the fourth MOS tube 233 is connected between the drain terminal of the third MOS tube 232 and the third resistor 141, the source terminal is connected to the first level signal 238, and the drain terminal is connected On the display panel 110;
  • the gate drive circuit 220 receives the preparation signal of the first level signal, and the gate drive circuit 220 controls the display panel 110 to display a black screen;
  • timing control chip 210 When the timing control chip 210 detects that the configuration state of the initialization code is completed, the timing control chip 210 outputs the state signal of the second level signal 239 to the control circuit 230;
  • the gate terminal of the first MOS tube 236 is connected to the state signal and the gate terminal of the third MOS tube 232, the source terminal is connected to the ground terminal, and the drain sequentially passes through the second resistor 145 and the first resistor 144 Connected to the second level signal 239;
  • S54-2 The gate terminal of the second MOS tube 237 is connected to the drain terminal of the first MOS tube 236 through the second resistor 145, the source terminal is connected to the second level signal 239, and the drain terminal is connected At the gate drive circuit 220;
  • the gate driving circuit 220 receives the preparation signal of the second level signal, and the gate driving circuit 220 controls the display panel 110 to resume display.
  • the first MOS tube 236 and the fourth MOS tube 233 are N-type MOS tubes
  • the second MOS tube 237 and the third MOS tube 232 are P-type MOS tubes
  • the N-type MOS tube receives the first level signal 238 Turn off, and the P-type MOS tube will turn on after receiving the first level signal 238;
  • the third MOS tube 232 in the control circuit 230 will first receive the status signal, when the display panel 110 is turned on, the timing control chip 210
  • the initialization code is read through the protocol and external memory, and the initialization configuration is performed.
  • the timing control chip 210 detects that the configuration state of the initialization code is not completed, when the status signal of the first level signal 238 is issued, the gate terminal of the third MOS tube 232 After receiving the status signal of the first level signal 238, it will be turned on, so that the logic level signal 240 is transmitted to the gate terminal of the fourth MOS transistor 233, and the logic level signal 240 is the second level signal 239, so The fourth MOS tube 233 is turned on, so the first level signal 238 connected to the source of the fourth MOS tube 233 is transmitted to the gate driving circuit 220. After the gate driving circuit 220 receives the first level signal 238, the display panel No display; first MOS 236 and third MOS in control circuit 230 232 will receive the status signal first.
  • the timing control chip 210 When the display panel 110 is turned on, the timing control chip 210 reads the initialization code through the protocol and the external storage and performs initialization configuration. When the timing control chip 210 detects that the configuration status of the initialization code is completed, it issues a The state signal of the two-level signal 239, the gate terminal of the first MOS tube 236 will be turned on after receiving the state signal of the second level signal 239, so that the ground signal is transmitted to the gate terminal of the second MOS tube 237, and The ground signal is the first level signal 238, so the second MOS tube 237 is turned on, so the second level signal 239 connected to the source of the second MOS tube 237 is transmitted to the gate driving circuit 220, and the gate driving circuit 220 After receiving the first level signal 238, the display panel starts displaying.
  • a display module 100 using the driving method described above including:
  • Display screen ; drive circuit 200, electrically connected to the display screen; backlight module 120, providing backlight to the display screen; wherein, the drive circuit 200 includes: a timing control chip 210, and a control circuit 230, and The timing control chip 210 is electrically connected, and according to the initial configuration state of the timing control chip 210, outputs a preparation signal to whether the display screen displays a picture.
  • the timing control chip 210 when the display panel 110 is turned on, the timing control chip 210 performs initial configuration, and at the same time outputs a status signal in the timing control chip 210 and transmits it to the control circuit 230.
  • the control circuit 230 outputs a preparation signal to the display screen through internal control
  • the gate drive circuit controls the screen display of the display panel 110.
  • the backlight module 120 includes a backlight source and a light source driving circuit.
  • the timing control chip 210 performs initial configuration while turning on the light source driving circuit.
  • the backlight of the display module 100 and the timing control chip 210 are simultaneously turned on to perform the initial configuration steps.
  • the two steps can be performed at the same time, which does not interfere with the operation of other programs, and can further It reduces the time to open the display screen, which is convenient for users to use and saves users the time to wait for booting.
  • the display screen includes a gate drive circuit, and the control circuit 230 outputs a preparation signal to the gate drive circuit of the display screen to control the screen display of the display panel 110;
  • the timing control chip 210 reads the initialization code with the external storage when the display panel 110 is turned on, and configures the initialization code; and outputs a preparation signal according to the configuration state of the initialization code
  • the display screen has a gate drive circuit that receives the preparation signal output by the control circuit 230. After the gate drive circuit receives the preparation signal, it controls the screen display of the display panel 110, so that the display panel 110 can be controlled when it is turned on. When the timing control chip 210 performs initial configuration, an abnormal screen appears.
  • the panel of this application may be a TN panel (full name Twisted Nematic, namely twisted nematic panel), IPS panel (In-Pane Switching, plane switching), VA panel (Multi-domain Vertical Alignment, multi-quadrant vertical alignment technology), Of course, other types of panels can also be used.
  • TN panel full name Twisted Nematic, namely twisted nematic panel
  • IPS panel In-Pane Switching, plane switching
  • VA panel Multi-domain Vertical Alignment, multi-quadrant vertical alignment technology

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Abstract

一种驱动电路（200）、显示模组（100）的驱动方法及显示模组（100），驱动电路（200）包括：时序控制芯片（210），检测初始化配置工作是否全部完成，若全部完成则输出状态信号；控制电路（230），接收状态信号并输出准备信号；门极驱动电路（220），根据准备信号控制显示屏（111）是否显示画面。

Description

驱动电路、显示模组的驱动方法及显示模组
本申请要求于2018年10月31日提交中国专利局、申请号为CN201811282987.5、发明名称为“一种驱动电路、显示模组的驱动方法及显示模组”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种驱动电路、显示模组的驱动方法及显示模组。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然的构成现有技术。
随着科技的发展和进步，液晶显示器由于具备机身薄、省电和辐射低等热点而成为显示器的主流产品，得到了广泛应用。发明人知晓的一种液晶显示器大部分为背光型液晶显示器，其包括液晶面板及背光模组(Backlight module)。液晶面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
在液晶面板刚开机时，由于时序控制芯片(Timing Controller Integrated Circuit，TCON IC)花费一定的时间去读取外部的代码(code)并完成IC内部的寄存器的初始化配置设定，那么在这段时间内其实TCON IC的输出处于不稳定状态，比较容易出现开机画面异常的情况；主要通过在刚开机时，将背光的打开时间调整滞后一些，即TCON IC不稳定时先不打开背光，而等到TCON IC稳定输出后再打开背光，但是这样的方式会带来开机时间过长的情况，引发用户的抱怨。
技术解决方案
本申请的目的在于提供一种驱动电路、显示模组的驱动方法及显示模组，以解决显示面板开机画面异常。
本申请提供一种驱动电路，包括：
时序控制芯片，检测初始化配置工作是否全部完成，若全部完成则输出状态信号；
控制电路，接收状态信号，根据状态信号输出准备信号；
门极驱动电路，接收所述准备信号，并根据所述准备信号控制显示屏是否显示画面。
可选的，所述控制电路包括第三电阻、第三MOS管和第四MOS管，所述第四MOS管是N型MOS管，所述第三MOS管是P型MOS管；
所述控制电路还包括第一电平信号、第二电平信号和逻辑电平信号；
所述第三MOS管的栅极端连接于所述状态信号，源极端连接于所述逻辑电平电压信号，漏极通过所述第三电阻连接于所述第一电平信号；
所述第四MOS管的栅极端连接于所述第三MOS管的漏极端和第三电阻之间，源极端连接于所述第一电平信号，漏极连接于所述显示面板；
当状态信号为第一电平信号时，所述第三MOS管导通；所述第四MSO管的栅极端被所述逻辑电平信号拉高为第二电平信号并导通；所述准备信号输出第一电平信号作为所述控制电路的输出信号输出到所述门极驱动电路。
可选的，所述控制电路还包括第一电阻、第二电阻、第一MOS管和第二MOS管；所述第一MOS管是N型MOS管，所述第二MOS管是P型MOS管；
所述第一MOS管的栅极端连接于所述状态信号和第三MOS管的栅极端，源极端连接于接地端，漏极依次通过所述第二电阻和第一电阻连接于所述第二电平信号；
所述第二MOS管的栅极端通过所述第二电阻连接于所述第一MOS管的漏极端，源极端连接于所述第二电平信号，漏极端连接于所述显示面板；
当所述状态信号输出第二电平信号时，所述第三MOS管关断；同时，所述第一MOS管导通，所述第二MOS管的栅极端被所述接地端拉低并导通，所述准备信号输出第二电平信号作为所述控制电路的控制信号输出到所述门极驱动电路。
本申请还公开一种显示模组的驱动方法，包括：
时序控制芯片进行初始化配置；
时序控制芯片检测初始化配置工作是否全部完成，全部完成后输出状态信号；
根据状态信号控制所述显示面板的显示屏是否显示画面。
可选的，所述显示面板开机后，同时执行打开显示模组的背光模组及时序控制芯片进行初始化配置的步骤，进一步节省时间。
可选的，所述时序控制芯片输出状态信号给所述显示面板的显示屏的门极驱动电路，控制所述显示面板的显示屏是否显示画面。
可选的,所述显示面板还包括一控制电路，所述控制电路检测所述时序控制芯片状态，并输出所述准备信号给所述显示屏；
所述时序控制芯片输出状态信号的步骤包括：
当时序控制芯片处于读取和配置代码(code)过程时，所述时序控制芯片控制输出第一电平信号的状态信号给所述控制电路；
当时序控制芯片完成所有code配置完成之后，所述时序控制芯片输出第二电平信号的状态信号给所述控制电路；
所述控制所述显示面板的显示屏是否显示画面的步骤包括：
当检测到时序控制芯片输出的状态信号为第一电平信号时，输出第一电平信号给显示屏；
当所述控制电路接收的状态信号为第二电平信号时，控制电路输出第二电平信号。
可选的，所述时序控制芯片根据初始化配置的状态输出状态信号给控制电路的步骤包括：
当时序控制芯片未完成配置时，时序控制芯片输出第一电平信号作为状态信号发送给控制电路；
当时序控制芯片已完成所有配置时，时序控制芯片输出第二电平信号作为状态信号发送给控制电路。
本申请还公开一种使用上述所述的驱动方法的显示模组，包括：
显示屏；
驱动电路，与所述显示屏电性连接；
背光模组，提供背光源给所述显示屏；
其中，所述驱动电路包括：
时序控制芯片，和
控制电路，与所述时序控制芯片电性连接，根据所述时序控制芯片的初始化配置状态，输出状态信号给所述显示屏是否显示画面。
可选的，所述背光模组包括背光源和光源驱动电路，所述显示面板开机时，打开所述光源驱动电路的同时，所述时序控制芯片进行初始化配置。
可选的，所述显示屏包括门极驱动电路，所述控制电路输出状态信号给所述显示屏的门极驱动电路，控制显示面板的画面显示；
所述时序控制芯片读取初始化code，并进行配置初始化code；并根据初始化code的配置状态输出状态信号。
相对于在刚开机时，将背光的打开时间调整滞后一些，即时序控制芯片(Timing Controller Integrated Circuit，TCON IC)不稳定时先不打开背光，而等到TCON IC稳定输出后再打开背光的方案来说，本申请在显示面板开机时，时序控制芯片进行初始化配置，同时，背光模组打开，在时序控制芯片中输出一个状态信号，根据状态信号控制显示面板的画面显示；因此实现时序控制芯片在进行初始化时，可以控制显示面板的画面显示，防止在时序控制芯片未完成所有配置时，画面已经打开，因而出现画面异常的情况。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请的其中一个实施例的一种控制电路的电路示意图；
图2是本申请的其中一个实施例的一种控制电路的工作状态的电路示意图；
图3是本申请的其中一个实施例的一种控制电路的另一工作状态的电路示意图；
图4是本申请的其中一个实施例的一种显示模组的示意图；
图5是本申请的其中一个实施例的一种显示模组的驱动方法的流程示意图。
本申请的实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本 申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
下面结合附图和较佳的实施例对本申请作进一步说明。
如图1至图4所示，本申请实施例公布了一种驱动电路200，包括：时序控制芯片210，检测初始化配置工作是否全部完成，若全部完成则输出状态信号；控制电路230，接收状态信号，根据状态信号输出准备信号；门极驱动电路220，接收所述准备信号，并根据所述准备信号控制显示屏111是否显示画面。
本方案中，在显示面板110开机时，时序控制芯片210进行初始化配置，同时，背光模组120打开，在时序控制芯片210中输出一个状态信号，根据状态信号控制显示面板110的画面显示；因此实现时序控制芯片210在进行初始化时，可以控制显示面板110的画面显示，防止在时序控制芯片210未完成所有配置时，画面已经打开，因而出现画面异常的情况。
在一实施例中，所述控制电路230包括第三电阻231、第三MOS管232和第四MOS管233，所述第四MOS管233是N型MOS管，所述第三MOS管232是P型MOS管；所述控制电路230还包括第一电平信号238、第二电平信号239和逻辑电平信号240；所述第三MOS管的栅极端连接于所述状态信号，源极端连接于所述逻辑电平电压信号，漏极 通过所述第三电阻连接于所述第一电平信号；所述第四MOS管的栅极端连接于所述第三MOS管的漏极端和第三电阻231之间，源极端连接于所述第一电平信号238，漏极连接于所述显示面板110；当状态信号为第一电平信号238时，所述第三MOS管232导通；所述第四MSO管233的栅极端被所述逻辑电平信号240拉高为第二电平信号239并导通；所述准备信号输出第一电平信号238作为所述控制电路230的输出信号输出到所述显示面板110。
本方案中，第四MOS管233为N型MOS管，第三MOS管232为P形MOS管，N型MOS管接收到第一电平信号238后关断，而P型MOS管接收到第一电平信号238后会导通；在控制电路230中第三MOS管232会先接收到状态信号，当时序控制芯片210发出第一电平信号238的状态信号时，第三MOS管232的栅极端接收到第一电平信号238的状态信号后，会到导通，使逻辑电平信号240传输到第四MOS管233的栅极端，而逻辑电平信号240为第二电平信号239，因此第四MOS管233导通，因此连接第四MOS管233源极的第一电平信号238会传输到门极驱动电路220，门极驱动电路220控制显示面板110不会显示。
在一实施例中，所述控制电路230还包括第一电阻234、第二电阻235、第一MOS管236和第二MOS管237；所述第一MOS管236是N型MOS管，所述第二MOS管237是P型MOS管；所述第一MOS管236的栅极端连接于所述状态信号和第三MOS管232的栅极端，源极端连接于接地端，漏极依次通过所述第二电阻235和第一电阻234连接于所述第二电平信号239；所述第二MOS管237的栅极端通过所述第二电阻235连接于所述第一MOS管236的漏极端，源极端连接于所述第二电平信号239，漏极端连接于所述显示面板110；当所述状态信号输出第二电平信号239时，所述第三MOS管232关断；同时，所述第一MOS管236导通，所述第二MOS管237的栅极端被所述接地端拉低并导通，所述准备信号输出第二电平信号239作为所述控制电路230的控制信号输出到所述门极驱动电路220。
本方案中，第一MOS管236为N型MOS管，第二MOS管237为P形MOS管，N型MOS管接收到第二电平信号239后会导通接，而P型MOS管接收到第二电平信号239后会关断；在控制电路230中第一MOS管236和第三MOS管232会先接收到状态信号，当时序控制芯片210发出第二电平信号239的状态信号时，第一MOS管236的栅极端接收到第二电平信号239的状态信号后会到导通，使接地端信号传输到第二MOS管237的栅极端， 而接地端信号为第一电平信号238，因此第二MOS管237导通，因此连接第二MOS管237源极的第二电平信号239会会传输到门极驱动电路220，门极驱动电路220接收到第一电平信号238后显示面板110开始显示。
作为本申请的另一实施例，参考图1至图4，公开了一种显示模组100的驱动方法，包括：显示面板110开机，打开显示模组100的背光模组120；时序控制芯片210进行初始化配置；时序控制芯片210检测初始化配置工作是否全部完成，全部完成后输出状态信号；根据状态信号控制所述显示面板110的显示屏是否显示画面。
在显示面板110开机时，时序控制芯片210进行初始化配置，同时，背光模组120打开，在时序控制芯片210中输出一个状态信号，根据状态信号控制显示面板110的画面显示；因此实现时序控制芯片210在进行初始化时，可以控制显示面板110的画面显示，防止在时序控制芯片210未完成所有配置时，画面已经打开，因而出现画面异常的情况。
在一实施例中，所述显示面板110开机后，同时执行打开显示模组100的背光模组120及时序控制芯片210进行初始化配置的步骤，进一步节省时间。
本方案中，在显示面板110开机时，同时执行打开显示模组100的背光模组120及时序控制芯片210进行初始化配置的步骤，两个步骤同时进行可以，既不会干扰其他程序的运行，还可以进一步的减少打开显示屏的时间，方便使用者使用，节省使用者等待开机的时间。
在一实施例中，所述时序控制芯片210输出状态信号给所述显示面板110的显示屏的门极驱动电路，控制所述显示面板110的显示屏是否显示画面。
本方案中，时序控制芯片210输出状态信号给显示面板110的显示屏的驱动电路200，可以根据状态信号的控制显示面板110的显示屏是否显示画面，防止在显示面板110开机时，时序控制芯片210的配置还未完成，时序控制芯片210不稳定，导致显示屏的画面显示异常的情况。
在一实施例中，所述显示面板110还包括一控制电路230，所述控制电路230检测所述时序控制芯片210状态，并输出所述准备信号给所述门极驱动电路；所述时序控制芯片210输出状态信号的步骤包括：当时序控制芯片210处于读取和配置代码(code)过程时，所述时序控制芯片210控制输出第一电平信号238的状态信号给所述控制电路230；当时序控制芯片210完成所有code配置完成之后，所述时序控制芯片210输出第 二电平信号239的状态信号给所述控制电路230。
本方案中，该时序控制芯片210根据自身的配置情况，在开机之后，配置完成之前便可以输出第一电平信号238的状态信号；而完成所有的配置之后又可以输出第二电平信号239的状态信号，状态信号的状态，将告知该控制电路230该时序控制芯片210的配置情况，如此，便可以根据状态的不同控制显示面板110进行不同的显示，从而避免背光提前打开但会看到开机画面异常等情况。
在一实施例中，所述控制所述显示面板110的显示屏是否显示画面的步骤包括：当检测到时序控制芯片210输出的状态信号为第一电平信号238时，输出第一电平信号238的准备信号给显示屏；当所述控制电路230接收的状态信号为第二电平信号239时，控制电路230输出第二电平信号239的状态信号。本方案中第一电平信号为高电平，第二电平信号为低电平，状态信号的第一电平信号为高电平RH，第二电平信号为RL,准备信号的第一电平信号为VGH,准备信号的第二电平信号为VGL.
本方案中，控制电路230接收的状态信号为第一电平信号238时，控制电路230输出第一电平信号238准备被信号；而在控制电路230接收的状态信号为第二电平信号239时，控制电路230输出第二电平信号239的准备信号；如此，控制电路230便可以根据该状态信号的状态知道该时序控制芯片210的配置状态，若处于配置状态且没有完成所有配置之前，关断数据驱动芯片的工作，那么因为液晶两端的压差为0，无法控制光的穿透而呈现黑画面，以此即使背光提前打开，也不会造成用户看到开机画面异常；而当该时序控制芯片210完成配置时，由于该背光模组120早已打开准备完成，因而，只需要该控制电路230恢复数据驱动芯片的输出端口，便可以马上进行画面显示，节省了开机时间。
在一实施例中，所述时序控制芯片210根据初始化配置的状态输出状态信号给控制电路230的步骤包括：当时序控制芯片210未完成配置时，时序控制芯片210输出第一电平信号238作为状态信号发送给控制电路230。
本方案中，在显示面板110开机时，时序控制芯片210未完成初始化配置，同时时序控制芯片210会根据配置初始化未完成的状态相应的输出第一电平信号238作为状态信号，然后发送到控制电路230，由控制电路230中的MOS管来判断后输出第一电平信号238给显示面板110，显示面板110接收到第一电平信号238后，液晶面板无法被充电，显示面板110维持黑画面显示。
在一实施例中，所述时序控制芯片根据初始化配置的状态输出状态信号给控制电路230的步骤包括：当时序控制芯片210已完成所有配置时，时序控制芯片210输出第二电平信号239作为状态信号发送给控制电路230。
本方案中，当时序控制芯片210检测到配置初始化代码完成配置后，时序控制芯片210会根据配置初始化完成的状态相应的输出第二电平信号239作为状态信号，然后发送到控制电路230，由控制电路230中的MOS管来判断后输出第二电平信号239给显示面板110，门极驱动电路220接收到第二电平信号239的准备信号后，液晶面板被充电，显示面板开始正常显示画面。
作为本申请的另一实施例，参考图1至图5所示，公开了一种显示面板110的驱动方法，包括步骤：
S51：显示面板110开机，则时序控制芯片210与外部储存器读取初始化code，并进行配置初始化code；
S52-1：时序控制芯片210检测到初始化code的配置状态未完成，时序控制芯片210输出第一电平信号238的状态信号给控制电路230；
S53-1：所述第三MOS管232的栅极端连接于状态信号，源极端连接于所述逻辑电平信号240，漏极通过所述第三电阻141连接于所述第一电平信号238；
S54-1:所述第四MOS管233的栅极端连接于所述第三MOS管232的漏极端和第三电阻141之间，源极端连接于所述第一电平信号238，漏极连接于所述显示面板110；
S55-1：当状态信号为第一电平信号238时，所述第三MOS管232导通；所述第四MSO管的栅极端被所述逻辑电平信号240拉高为第二电平信号239并导通；状态信号输出第一电平信号238作为所述控制电路230的准备信号输出到所述门极驱动电路220；
S56-1：门极驱动电路220接收第一电平信号的准备信号，门极驱动电路220控制显示面板110显示黑画面；
S52-2：时序控制芯片210检测到初始化code的配置状态完成时，时序控制芯片210输出第二电平信号239的状态信号给控制电路230；
S53-2：所述第一MOS管236的栅极端连接于状态信号和第三MOS管232的栅极端，源极端连接于接地端，漏极依次通过所述第二电阻145和第一电阻144连接于所述第二电平信号239；
S54-2：所述第二MOS管237的栅极端通过所述第二电阻145连接于所述第一MOS 管236的漏极端，源极端连接于所述第二电平信号239，漏极端连接于所述门极驱动电路220；
S55-2：当状态信号输出第二电平信号239时，所述第三MOS管232关断；同时，所述第一MOS管236导通，所述第二MOS管237的栅极端被所述接地端拉低并导通，状态信号输出第二电平信号239作为所述控制电路230的控制信号输出到所述门极驱动电路220控制显示面板；
S56-2：门极驱动电路220接收第第二电平信号的准备信号，门极驱动电路220控制显示面板110恢复显示。
本方案中，第一MOS管236和第四MOS管233为N型MOS管，第二MOS管237和第三MOS管232为P形MOS管，N型MOS管接收到第一电平信号238后关断，而P型MOS管接收到第一电平信号238后会导通；在控制电路230中第三MOS管232会先接收到状态信号，当显示面板110开机时，时序控制芯片210通过协议与外部储存器读取初始化code，并进行初始化配置，时序控制芯片210检测初始化code的配置状态未完成时，发出第一电平信号238的状态信号时，第三MOS管232的栅极端接收到第一电平信号238的状态信号后，会到导通，使逻辑电平信号240传输到第四MOS管233的栅极端，而逻辑电平信号240为第二电平信号239，因此第四MOS管233导通，因此连接第四MOS管233源极的第一电平信号238会传输到门极驱动电路220，门极驱动电路220接收到第一电平信号238后显示面板就不会显示；在控制电路230中第一MOS管236和第三MOS管232会先接收到状态信号，当显示面板110开机时，时序控制芯片210通过协议与外部储存器读取初始化code，并进行初始化配置，时序控制芯片210检测初始化code的配置状态完成时，发出第二电平信号239的状态信号，第一MOS管236的栅极端接收到第二电平信号239的状态信号后会到导通，使接地端信号传输到第二MOS管237的栅极端，而接地端信号为第一电平信号238，因此第二MOS管237导通，因此连接第二MOS管237源极的第二电平信号239会传输到门极驱动电路220，门极驱动电路220接收到第一电平信号238后显示面板开始显示。
作为本申请的另一实施例，参考图1至图4所示，公开了一种使用如以上所述的驱动方法的显示模组100，包括：
显示屏；驱动电路200，与所述显示屏电性连接；背光模组120，提供背光源给所述显示屏；其中，所述驱动电路200包括：时序控制芯片210，和控制电路230，与所 述时序控制芯片210电性连接，根据所述时序控制芯片210的初始化配置状态，输出准备信号给所述显示屏是否显示画面。
本方案中，在显示面板110开机时，时序控制芯片210进行初始化配置，同时在时序控制芯片210中输出状态信号，传输到控制电路230，控制电路230通过内部控制，输出准备信号到显示屏的门极驱动电路上，从而控制显示面板110的画面显示。
在一实施例中，所述背光模组120包括背光源和光源驱动电路，所述显示面板110开机时，打开所述光源驱动电路的同时，所述时序控制芯片210进行初始化配置。
本方案中，在显示面板110开机时，同时打开显示模组100的背光源及时序控制芯片210进行初始化配置的步骤，两个步骤同时进行可以，既不会干扰其他程序的运行，还可以进一步的减少打开显示屏的时间，方便使用者使用，节省使用者等待开机的时间。
在一实施例中，所述显示屏包括门极驱动电路，所述控制电路230输出准备信号给所述显示屏的门极驱动电路，控制显示面板110的画面显示；
所述时序控制芯片210在显示面板110开机时，与外部储存器读取初始化code，并进行配置初始化code；并根据初始化code的配置状态输出准备信号
本方案中，显示屏有一门极驱动电路，接收控制电路230输出的准备信号，门极驱动电路接收到准备信号后，控制显示面板110的画面显示，从而可以控制显示面板110在开机时，由于时序控制芯片210在进行初始化配置时出现异常画面。
需要说明的是，本方案中涉及到的各步骤的限定，在不影响具体方案实施的前提下，并不认定为对步骤先后顺序做出限定，写在前面的步骤可以是在先执行的，也可以是在后执行的，甚至也可以是同时执行的，只要能实施本方案，都应当视为属于本申请的保护范围。
本申请的面板可以是TN面板(全称为Twisted Nematic，即扭曲向列型面板)、IPS面板(In-Pane Switching，平面转换)、VA面板(Multi-domain Vertical Alignment，多象限垂直配向技术)，当然，也可以是其他类型的面板，适用即可。
以上内容是结合具体的可选实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种驱动电路，包括：
    时序控制芯片，检测初始化配置工作是否全部完成，若全部完成则输出状态信号；
    控制电路，接收状态信号，根据状态信号输出准备信号；以及
    门极驱动电路，接收所述准备信号，并根据所述准备信号控制显示屏是否显示画面。
  2. 如权利要求1所述的一种驱动电路，其中，所述控制电路包括第三电阻、第三MOS管和第四MOS管，所述第四MOS管是N型MOS管，所述第三MOS管是P型MOS管；
    所述控制电路还包括第一电平信号、第二电平信号和逻辑电平信号；
    所述第三MOS管的栅极端连接于所述状态信号，源极端连接于所述逻辑电平电压信号，漏极通过所述第三电阻连接于所述第一电平信号；
    所述第四MOS管的栅极端连接于所述第三MOS管的漏极端和第三电阻之间，源极端连接于所述第一电平信号，漏极连接于所述显示面板；
    当状态信号为第一电平信号时，所述第三MOS管导通；所述第四MSO管的栅极端被所述逻辑电平信号拉高为第二电平信号并导通；所述准备信号输出第一电平信号作为所述控制电路的输出信号输出到所述门极驱动电路。
  3. 如权利要求2所述的一种驱动电路，其中，所述控制电路还包括第一电阻、第二电阻、第一MOS管和第二MOS管；所述第一MOS管是N型MOS管，所述第二MOS管是P型MOS管；
    所述第一MOS管的栅极端连接于所述状态信号和第三MOS管的栅极端，源极端连接于接地端，漏极依次通过所述第二电阻和第一电阻连接于所述第二电平信号；
    所述第二MOS管的栅极端通过所述第二电阻连接于所述第一MOS管的漏极端，源极端连接于所述第二电平信号，漏极端连接于所述显示面板；
    当所述状态信号输出第二电平信号时，所述第三MOS管关断；同时，所述第一MOS管导通，所述第二MOS管的栅极端被所述接地端拉低并导通，所述准备信号输出第二电平信号作为所述控制电路的控制信号输出到所述显示面板。
  4. 一种显示模组的驱动方法，包括：
    时序控制芯片进行初始化配置；
    时序控制芯片检测初始化配置工作是否全部完成，全部完成后输出状态信号；以及
    根据状态信号控制所述显示面板的显示屏是否显示画面。
  5. 如权利要求4所述的一种显示模组的驱动方法，其中，所述显示面板开机后，同时执行打开显示模组的背光模组及时序控制芯片进行初始化配置的步骤。
  6. 如权利要求4所述的一种显示模组的驱动方法，其中，所述时序控制芯片输出状态信号给所述显示面板的显示屏的门极驱动电路，控制所述显示面板的显示屏是否显示画面。
  7. 如权利要求6所述的一种显示模组的驱动方法，其中，所述显示面板还包括一控制电路，所述控制电路接收状态信号，并根据状态信号输出准备信号给所述门极驱动电路。
  8. 如权利要求7所述的一种显示模组的驱动方法，其中，所述时序控制芯片输出状态信号的步骤包括：
    当时序控制芯片处于读取和配置代码过程时，所述时序控制芯片控制输出第一电平信号的状态信号给所述控制电路。
  9. 如权利要求7所述的一种显示模组的驱动方法，其中，所述时序控制芯片输出状态信号的步骤包括：
    当时序控制芯片完成所有代码配置完成之后，所述时序控制芯片输出第二电平信号的状态信号给所述控制电路。
  10. 如权利要求6所述的一种显示模组的驱动方法，其中，控制所述显示面板的显示屏是否显示画面的步骤包括：
    当检测到时序控制芯片输出的状态信号为第一电平信号时，输出第一电平信号给门极驱动电路以驱动显示屏；
    当所述控制电路接收的状态信号为第二电平信号时，控制电路输出第二电平信号给门极驱动电路以驱动显示屏。
  11. 如权利要求4所述的显示模组的驱动方法，其中，所述时序控制芯片根据初始化配置的状态输出状态信号给控制电路的步骤包括：
    当时序控制芯片未完成配置时，时序控制芯片输出第一电平信号作为状态信号发送给控制电路.
  12. 如权利要求4所述的显示模组的驱动方法，其中，所述时序控制芯片根据初始化配置的状态输出状态信号给控制电路的步骤包括：
    当时序控制芯片已完成所有配置时，时序控制芯片输出第二电平信号作为状态信号发送给控制电路。
  13. 一种显示模组，使用显示模组的驱动方法进行驱动，显示模组包括：
    显示屏；
    驱动电路，与所述显示屏电性连接；以及
    背光模组，提供背光源给所述显示屏；
    其中，所述驱动电路包括：
    时序控制芯片，以及
    控制电路，与所述时序控制芯片电性连接，根据所述时序控制芯片的初始化配置状态，输出准备信号给所述显示屏是否显示画面。
  14. 如权利要求13所述的显示模组，其中，所述背光模组包括背光源和光源驱动电路，所述显示面板开机时，打开所述光源驱动电路的同时，所述时序控制芯片进行初始化配置。
  15. 如权利要求13所述的显示模组，其中，所述显示屏包括门极驱动电路，所述控制电路输出准备信号给所述显示屏的门极驱动电路，控制显示面板的画面显示；
    所述时序控制芯片读取初始化代码，并进行配置初始化代码；并根据初始化代码的配置状态输出状态信号。
  16. 如权利要求13所述的显示模组，其中，所述控制电路包括第三电阻、第三MOS管和第四MOS管，所述第四MOS管是N型MOS管，所述第三MOS管是P型MOS管；
    所述控制电路还包括第一电平信号、第二电平信号和逻辑电平信号；
    所述第三MOS管的栅极端连接于所述状态信号，源极端连接于所述逻辑电平电压信号，漏极通过所述第三电阻连接于所述第一电平信号；
    所述第四MOS管的栅极端连接于所述第三MOS管的漏极端和第三电阻之间，源极端连接于所述第一电平信号，漏极连接于所述显示面板；
    当状态信号为第一电平信号时，所述第三MOS管导通；所述第四MSO管的栅极端被所述逻辑电平信号拉高为第二电平信号并导通；所述准备信号输出第一电平信号作为所述控制电路的输出信号输出到所述门极驱动电路。
  17. 如权利要求13所述的显示模组，其中，所述控制电路还包括第一电阻、第二电阻、第一MOS管和第二MOS管；所述第一MOS管是N型MOS管，所述第二MOS管是P型MOS管；
    所述第一MOS管的栅极端连接于所述状态信号和第三MOS管的栅极端，源极端连接于接地端，漏极依次通过所述第二电阻和第一电阻连接于所述第二电平信号；
    所述第二MOS管的栅极端通过所述第二电阻连接于所述第一MOS管的漏极端，源极端连接于所述第二电平信号，漏极端连接于所述显示面板；
    当所述状态信号输出第二电平信号时，所述第三MOS管关断；同时，所述第一MOS管导通，所述第二MOS管的栅极端被所述接地端拉低并导通，所述准备信号输出第二电平信号作为所述控制电路的控制信号输出到所述显示面板。
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