WO2020087567A1 - 阵列基板以及显示面板 - Google Patents

阵列基板以及显示面板 Download PDF

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Publication number
WO2020087567A1
WO2020087567A1 PCT/CN2018/115179 CN2018115179W WO2020087567A1 WO 2020087567 A1 WO2020087567 A1 WO 2020087567A1 CN 2018115179 W CN2018115179 W CN 2018115179W WO 2020087567 A1 WO2020087567 A1 WO 2020087567A1
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Prior art keywords
array substrate
plate
frame
branch
substrate according
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Ceased
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PCT/CN2018/115179
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English (en)
French (fr)
Inventor
刘忠念
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HKC Co Ltd
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HKC Co Ltd
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Priority to US17/044,019 priority Critical patent/US11422416B2/en
Publication of WO2020087567A1 publication Critical patent/WO2020087567A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136218—Shield electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines

Definitions

  • the present application relates to the field of display technology, in particular to an array substrate and a display panel.
  • the display panel usually includes an array substrate and a color filter substrate disposed oppositely. Liquid crystal molecules are filled between the array substrate and the color filter substrate.
  • the array substrate is provided with a pixel electrode located inside the sub-pixel and a first common electrode located at the edge of the sub-pixel.
  • the color filter substrate is provided with a second common electrode having the same potential as the first common electrode.
  • the pixel electrode is configured to supply power to the sub-pixel light-emitting display.
  • the first common electrode includes a shielding electrode plate, and there is no voltage difference between the shielding electrode plate and the second common electrode, so that all liquid crystal molecules between the two stand up to block the light source, thereby making the edge of the subpixel appear dark.
  • the electric field on the pixel electrode is easily affected by the electric field on the first common electrode (shield plate), and dark lines are formed at the edges of the sub-pixels, thereby affecting the panel transmittance.
  • an array substrate and a display panel that can improve the dark edge of each sub-pixel.
  • An array substrate including:
  • the pixel electrode includes a frame and a branch connected to the frame, and the frame surrounds the branch;
  • the first common electrode is insulated from the pixel electrode, and includes a side plate disposed opposite to the frame, the side plate includes a shielding electrode plate, the shielding electrode plate surrounds an orthographic projection of the frame, and the side plate There is a groove on the side facing the branch.
  • the groove is opposite to the orthographic projection of the branch.
  • one of the grooves is opposite to the orthographic projection of one of the branches.
  • one of the grooves is opposed to the orthographic projections of the plurality of branches.
  • a plurality of the grooves are opposed to an orthographic projection of one of the branches.
  • the side plate further includes a capacitor plate, the capacitor plate and the shield plate are connected to each other, and the capacitor plate and the frame form a storage capacitor.
  • the groove is formed in the capacitor plate.
  • the groove is provided through the capacitor plate and the shield plate.
  • one of the grooves is disposed opposite to the orthographic projection of one of the branches.
  • the notch area of the groove is larger than the area of the surface of the side of the branch facing the groove.
  • a cross-sectional shape of the groove on a cross-section perpendicular to the thickness direction of the side plate is polygonal.
  • the polygon is a quadrilateral.
  • the quadrilateral is a rectangle, square, parallelogram, diamond or trapezoid.
  • the polygon is a triangle, pentagon or hexagon.
  • the pixel electrode further includes a trunk, the branches are connected to both sides of the trunk, the trunk divides the internal area of the pixel electrode into a plurality of domains, adjacent to the domain The length directions of the branches are different, and the side plate corresponding to the domain has the groove.
  • the main stem includes a first stem and a second stem.
  • the first stem crosses the second stem and divides the internal area of the pixel electrode into four domains of equal size.
  • the central panel connects opposite sides of the side panel.
  • An array substrate including:
  • the pixel electrode includes a frame, a trunk, and a branch; the frame connects and surrounds the trunk and the branch; the trunk includes a first trunk and a second trunk, and the first trunk crosses the second trunk and connects
  • the internal area of the pixel electrode is divided into four domains of equal size; the branches are distributed in each of the domains and connect the trunk and the frame, and the length directions of the branches in the adjacent domains are different ;
  • the first common electrode is insulated from the pixel electrode, and includes a side plate opposite to the frame, the side plate includes a shielding electrode plate and a capacitor electrode plate, the shielding electrode plate surrounds the front projection of the frame, The capacitor plate and the frame form a storage capacitor; the side plate has a groove opposite to the orthographic projection of the branch on a side facing the branch.
  • a display panel includes a liquid crystal molecule, a color filter substrate and an array substrate.
  • the array substrate is disposed opposite to the color filter substrate.
  • the liquid crystal is located between the color filter substrate and the array substrate.
  • the array substrate includes:
  • the pixel electrode includes a frame and a branch connected to the frame, and the frame surrounds the branch;
  • the first common electrode is insulated from the pixel electrode, and includes a side plate disposed opposite to the frame, the side plate includes a shielding electrode plate, the shielding electrode plate surrounds an orthographic projection of the frame, and the side plate Having a groove on the side facing the branch;
  • the color filter substrate includes a second common electrode, and the second common electrode is equipotential with the first common electrode.
  • the side plate of the first common electrode includes a shielding electrode plate, which has a groove on the side facing the branch.
  • the distance between the shield pole plate corresponding to the groove and the side of the frame connecting branch is extended. Therefore, the influence of the electric field on the shield electrode plate on the branch that makes the liquid crystal molecules transmit light is weakened, thereby improving the dark streak phenomenon at the edge of the sub-pixel.
  • FIG. 1 is a schematic diagram of a display panel in an embodiment
  • FIG. 2 is a schematic diagram of an array substrate in an embodiment
  • FIG. 3 is a schematic diagram of an array substrate in another embodiment.
  • the array substrate and the display panel provided by the present application can be applied to liquid crystal display devices such as liquid crystal televisions.
  • a display panel which includes an array substrate 100, a color filter substrate 200 and liquid crystal molecules 300.
  • the array substrate 100 is opposite to the color filter substrate 200.
  • the liquid crystal molecules 300 are located between the array substrate 100 and the color filter substrate 200.
  • the array substrate 100 includes a first common electrode 110, a pixel electrode 120, an insulating layer 130, and the like.
  • the first common electrode 110 and the pixel electrode 120 are insulated from each other by the insulating layer 130 therebetween.
  • the color filter substrate 200 includes a second common electrode 210.
  • the second common electrode 210 and the first common electrode 110 have the same potential.
  • the display panel includes a plurality of pixel units.
  • Each pixel unit has multiple sub-pixels, for example, a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B.
  • the color filter substrate 200 may have a color resist layer, and the color resist layer may include color resists of different colors. The color of each sub-pixel can be realized by color blocks of different colors.
  • Each pixel electrode 120 is opposite to a part of the second common electrode 210.
  • Each sub-pixel corresponds to a pixel electrode 120.
  • a plurality of sub-pixels may share a second common electrode 210.
  • the sub-pixel may include a pixel electrode 120, a second common electrode 210 opposite to the pixel electrode 120, and liquid crystal molecules 300 therebetween.
  • the liquid crystal molecules 300 in each sub-pixel may be deflected when the pixel electrode 120 and the second common electrode 210 form a voltage difference, thereby allowing each sub-pixel to transmit light.
  • the array substrate 100 may further include thin film transistors.
  • the pixel electrode 120 is electrically connected to the drain electrode of the thin film transistor to charge the sub-pixel.
  • the second common electrode 210 is equipotentially electrically connected to the first common electrode 110, so that the second common electrode 210 can be powered by the first common electrode 110.
  • the pixel electrode 120 includes a frame 121 and a branch 122.
  • the frame 121 surrounds the branch 122.
  • the branch 122 is connected to the frame 121.
  • the first common electrode 110 includes a side plate 111 disposed opposite to the frame 121.
  • the side plate 111 includes a shield electrode 111a.
  • the side plate 111 may be disposed opposite to a part of the frame 121 (refer to FIGS. 2 and 3), or may be disposed relative to all the frames 121 (not shown), which is not limited in this application.
  • the shielding electrode plate 111a is located between each sub-pixel, and is opposed to the second common electrode 210 between each sub-pixel.
  • the first common electrode 110 is equipotential with the second common electrode 210, and the shield electrode 111a is a part of the first common electrode 110. Therefore, the second common electrode 210 between the shielding electrode 111a and each sub-pixel has the same potential, that is, there is no voltage difference between the two.
  • the liquid crystal molecules 300 between the shielding electrode 111a and the second common electrode 210 between each sub-pixel stand along the equipotential line, thereby blocking the light source, so that each sub-pixel is displayed in a dark state.
  • the mutual influence between the electric fields also causes the electric field effect on the shield electrode 111a to affect the electric field on the pixel electrode 120 in the vicinity thereof.
  • the electric field generated by the voltage on the branch 122 guides between the branch 122 and its surrounding area (for example, the area between each branch when there are multiple branches 122) and the second common electrode 210
  • the liquid crystal molecules 300 deflect and transmit light.
  • the field strength between the branch 122 and the second common electrode 210 is E 1
  • the field strength between the surrounding area of the branch 122 and the second common electrode 210 is E 2 . Since there is no voltage on the surrounding area, E 2 is weaker than E 1 .
  • the side plate 111 of the first common electrode 110 is disposed opposite to the frame 121 of the pixel electrode 120.
  • the frame 121 of the pixel electrode 120 surrounds the branch 122.
  • the side plate 111 has a groove 111b on the side facing the branch 122. The distance between the shield plate 111 corresponding to the groove 111b and the inside of the frame 121 (the side connected to the branch 122) is extended. Therefore, the influence of the electric field on the shielding plate 111 on the branch 122 that makes the liquid crystal molecules transmit light is weakened, thereby improving the dark phenomenon at the edge of the subpixel.
  • the groove 111b on the first common electrode 110 is opposite to the orthographic projection of the branch 122 on the pixel electrode. Specifically, it may be that one groove 111b is opposed to the orthographic projection of one branch 122, or that one groove 111b is opposed to the orthographic projection of multiple branches 122, or it may be the orthographic projection of multiple grooves 111b and one branch 122 Relatively equal.
  • the dark streak phenomenon at the edge of the sub-pixel is mainly caused by the electric field on the branch 122 being affected by the electric field on the shielding plate 111a. Therefore, by setting the groove 111b and the front projection of the branch 122 relatively, the distance between the branch 122 and the shield plate 111a can be directly extended, so as to better resist the influence of the electric field on the shield plate 111a and more effectively suppress dark lines.
  • the groove 111b may not be set opposite to the orthographic projection of the branch 122 or to the orthographic projection of part of the branch 122, which is not limited in this application.
  • the side plate 111 further includes a capacitor plate 111c.
  • the capacitor plate 111c and the shield plate 111a are connected to each other.
  • the capacitor plate 111c and the frame 121 form a storage capacitor.
  • the storage capacitor can maintain the voltage on the pixel electrode 120 during the display process.
  • the pixel electrode 120 has a continuous voltage supply to effectively avoid display abnormalities.
  • the groove 111b is formed in the capacitor plate 111c. That is, the capacitor plate 111c has a groove 111b, and the circumference of the groove 111b is the capacitor plate 111c, thereby ensuring that the capacity on the storage capacitor is large enough to keep the voltage on the pixel electrode 120 continuous.
  • the groove 111b may also be provided through the capacitor plate 111c and the shield plate 111a, and is not limited to being formed only in the capacitor plate 111c.
  • one groove 111b is disposed opposite to the orthographic projection of one branch 122. Further, on the premise of effectively reducing the influence of the shield plate 111 a on the electric field on the branch 122, the portion between the grooves 111 b can also be used to form a storage capacitor, thereby increasing the capacitance.
  • the notch area of the groove 111b is larger than the area of the surface of the side of the branch 122 facing the groove 111b.
  • the groove 111b sufficiently protects the branch 122 and reduces the influence of the electric field on the shield electrode 111a.
  • the cross-sectional shape of the groove 111b on the cross-section perpendicular to the thickness direction of the side plate 111 is a quadrangle to facilitate the patterning process of the groove 111b.
  • the quadrilateral may be rectangular, square, parallelogram, diamond, trapezoid, and so on.
  • the above-mentioned quadrilaterals can also be replaced with any other polygons, such as triangles, pentagons, and hexagons.
  • the above-mentioned quadrilateral can also be replaced by a non-polygon (such as a circular arc).
  • the pixel electrode 120 further includes a stem 123.
  • Branches 122 are connected on both sides of the trunk 123.
  • the trunk 123 divides the pixel electrode 120 into a plurality of domains, so that there are a plurality of domains within one sub-pixel.
  • the length directions of the branches 122 in adjacent domains are different. Therefore, when a voltage is applied, the tilt directions of the liquid crystal molecules 300 in the respective domains are different. Therefore, the liquid crystal molecules 300 in one sub-pixel have multiple tilt directions. In this way, it is more conducive to the wide viewing angle display of the display panel.
  • the side plate 111 corresponding to the domain has a groove 111b, which can extend the distance between the inside of the frame 121 corresponding to the domain and the shielding plate 111a, thereby effectively improving the dark line phenomenon in the sub-pixel domain.
  • the dark pattern phenomenon can be effectively improved in each domain, thereby effectively suppressing the edge dark pattern in the entire sub-pixel.
  • the array substrate 100 includes a first common electrode 110 and a pixel electrode 120.
  • the pixel electrode 120 includes a frame 121, a trunk 123, and a branch 122.
  • the frame 121 connects and surrounds the trunk 123 and the branch 122.
  • the trunk 123 includes a first trunk 1231 and a second trunk 1232.
  • the first stem 1231 and the second stem 1232 cross and divide the inner area of the pixel electrode 120 into four domains of equal size.
  • the branches 122 are distributed in the domains and connect the trunk 123 and the frame 121.
  • the length directions of the branches 122 in adjacent domains are different.
  • the angle between the extension direction of the branch 122 in the four domains and a trunk 123 (for example, the first trunk 1231) may be ⁇ 45 ° and ⁇ 135 °, respectively.
  • the tilt directions of the liquid crystal molecules 300 in the four domains are all different.
  • the liquid crystal molecules 300 in one sub-pixel have four tilt directions.
  • the first common electrode 110 includes a side plate 111 disposed opposite to the frame 121.
  • the side plate 111 includes a shield plate 111 and a capacitor plate 112 connected to each other.
  • the shielding plate 111 is opposed to the second common electrode 210 between each sub-pixel, so that the liquid crystal molecules 300 before the two are shielded from light and display a dark state.
  • the capacitor plate 112 and the frame 121 form a storage capacitor. The storage capacitor maintains the voltage on the pixel electrode 120 during display.
  • the first common electrode 110 may further have a central plate 112, and the central plate 112 may be connected to opposite sides of the side plate 111, and thus be easily equipotentially connected to the side plate 111.
  • the central board 112 may be disposed opposite to a trunk 123 (such as the first trunk 1231) to form a storage capacitor.
  • the side plate 111 has a groove 111b opposite to the orthographic projection of the branch 122 on the side facing the branch 122.
  • the groove 111b extends the distance between the branch 122 and the shield plate 111a, thereby effectively reducing the influence of the electric field on the shield plate 111a on the electric field on the branch 122. Therefore, the dark lines at the edges of the sub-pixels can be effectively suppressed.
  • the side plate of the first common electrode includes the shielding electrode plate, which has a groove on the side facing the branch.
  • the distance between the shield pole plate corresponding to the groove and the side of the frame connecting branch is extended. Therefore, the influence of the electric field on the shield electrode plate on the branch that makes the liquid crystal molecules transmit light is weakened, thereby improving the dark streak phenomenon at the edge of the sub-pixel.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)

Abstract

本申请的阵列基板包括像素电极以及第一公共电极。像素电极包括边框与分支。第一公共电极的边板包括屏蔽极板，屏蔽极板围绕边框的正投影，边板在朝向分支的一侧具有凹槽。

Description

阵列基板以及显示面板
本申请要求于2018年10月29日提交中国专利局、申请号为201811269419.1、发明名称为“阵列基板以及显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别是涉及一种阵列基板以及显示面板。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着显示技术的发展，各种液晶显示装置(如液晶电视等)被广泛应用。其显示面板通常包括相对设置的阵列基板和彩膜基板。阵列基板和彩膜基板之间填充有液晶分子。
阵列基板中设置有位于子像素内部的像素电极以及位于子像素边缘的第一公共电极。彩膜基板上设置有与第一公共电极等电位的第二公共电极。像素电极设置为为子像素出光显示供电。第一公共电极包括屏蔽极板，屏蔽极板与第二公共电极间没有电压差，使得二者之间的液晶分子全部站立而遮住光源，进而使得子像素边缘显示为暗态。
显示面板工作时，像素电极上的电场容易受到第一公共电极(屏蔽极板)上的电场影响，而在子像素边缘形成暗纹，从而影响面板的穿透率。
申请内容
根据本申请的各种实施例，提供一种能够改善各子像素的边缘暗纹的阵列基板以及显示面板。
一种阵列基板，包括：
像素电极，包括边框与连接所述边框的分支，所述边框包围所述分支；
第一公共电极，与所述像素电极相互绝缘，包括与所述边框相对设置的边板，所述边板包括屏蔽极板，所述屏蔽极板围绕所述边框的正投影，所述边板在朝向所述分支的一侧具有凹槽。
在其中一个实施例中，所述凹槽与所述分支的正投影相对。
在其中一个实施例中，一个所述凹槽与一个所述分支的正投影相对。
在其中一个实施例中，一个所述凹槽与多个所述分支的正投影相对。
在其中一个实施例中，多个所述凹槽与一个所述分支的正投影相对。
在其中一个实施例中，所述边板还包括电容极板，所述电容极板与所述屏蔽极板相互连接，且所述电容极板与所述边框形成存储电 容。
在其中一个实施例中，所述凹槽形成于所述电容极板。
在其中一个实施例中，所述凹槽贯穿所述电容极板与所述屏蔽极板设置。
在其中一个实施例中，一个所述凹槽与一个所述分支的正投影相对设置。
在其中一个实施例中，所述凹槽的槽口面积大于所述分支朝向所述凹槽的一侧的表面的面积。
在其中一个实施例中，所述凹槽在垂直于所述边板厚度方向的截面上的截面形状为多边形。
在其中一个实施例中，所述多边形为四边形。
在其中一个实施例中，所述四边形为矩形、正方形、平行四边形、菱形或梯形。
在其中一个实施例中，所述多边形为三角形、五边形或六边形。
在其中一个实施例中，所述像素电极还包括主干，所述主干两侧连接有所述分支，所述主干将所述像素电极的内部区域分为多个畴，相邻所述畴中的所述分支的长度方向不同，所述畴对应的所述边板中具有所述凹槽。
在其中一个实施例中，所述主干包括第一干与第二干，所述第一干与所述第二干交叉且将所述像素电极的内部区域分为四个大小相等的畴。
在其中一个实施例中，所述还包括中央板，所述第一干与所述中 央板形成存储电容。
在其中一个实施例中，所述中央板连接所述边板的相对的两侧。
一种阵列基板，包括：
像素电极，包括边框、主干以及分支；所述边框连接并包围所述主干与所述分支；所述主干包括第一干与第二干，所述第一干与所述第二干交叉且将所述像素电极的内部区域分为四个大小相等的畴；所述分支分布于各所述畴中并连接所述主干与所述边框，相邻所述畴中的所述分支的长度方向不同；
第一公共电极，与所述像素电极相互绝缘，包括与所述边框相对设置的边板，所述边板包括屏蔽极板与电容极板，所述屏蔽极板围绕所述边框的正投影，所述电容极板与所述边框形成存储电容；所述边板在朝向所述分支的一侧具有与所述分支的正投影相对的凹槽。
一种显示面板，包括液晶分子、彩膜基板以及阵列基板，所述阵列基板与所述彩膜基板相对设置，所述液晶位于所述彩膜基板与所述阵列基板之间，
所述阵列基板，包括：
像素电极，包括边框与连接所述边框的分支，所述边框包围所述分支；
第一公共电极，与所述像素电极相互绝缘，包括与所述边框相对设置的边板，所述边板包括屏蔽极板，所述屏蔽极板围绕所述边框的正投影，所述边板在朝向所述分支的一侧具有凹槽；
所述彩膜基板，包括第二公共电极，所述第二公共电极与所述第 一公共电极等电位。
上述阵列基板，第一公共电极的边板包括屏蔽极板，其在朝向分支的一侧具有凹槽。凹槽对应的屏蔽极板与边框连接分支的一侧的距离被拉远。因此，屏蔽极板上的电场对使得液晶分子透光的分支上的电场的影响减弱，进而改善子像素边缘的暗纹现象。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更好地描述和说明这里公开的那些发明的实施例或示例，可以参考一幅或多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的发明、目前描述的实施例或示例以及目前理解的这些发明的最佳模式中的任何一者的范围的限制。
图1为一个实施例中的显示面板示意图；
图2为一个实施例中的阵列基板示意图；
图3为另一个实施例中的阵列基板示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
本申请提供的阵列基板以及显示面板，可以应用于液晶电视等液晶显示装置之中。
在一个实施例中，如图1所示，提供了一种显示面板，包括阵列基板100、彩膜基板200以及液晶分子300。阵列基板100与彩膜基板200相对设置。液晶分子300位于阵列基板100和彩膜基板200之间。阵列基板100包括第一公共电极110、像素电极120以及绝缘层130等。第一公共电极110与像素电极120通过二者之间的绝缘层130相互绝缘。彩膜基板200包括第二公共电极210。第二公共电极210与第一公共电极110等电位。
具体地，显示面板包括多个像素单元。每个像素单元中具有多个子像素，例如：红色子像素R、绿色子像素G、蓝色子像素B。彩膜基板200上可以具有色阻层，色阻层可以包括不同颜色色阻。各子像素的颜色可通过不同颜色的色阻实现。
每个像素电极120均与部分第二公共电极210相对设置。每个子像素均对应一个像素电极120。多个子像素可以共用一个第二公共电极210。子像素可以包括像素电极120、与像素电极120相对的第二公共电极210以及二者之间的液晶分子300。各子像素中的液晶分子300可以在像素电极120与第二公共电极210形成电压差的情况下偏转，进而使得各子像素透光显示。
阵列基板100中还可以具有薄膜晶体管。像素电极120通过与薄膜晶体管的漏极电极电连接，进而对子像素进行充电。而第二公共电极210与第一公共电极110等电位电连接，进而可以通过第一公共电 极110对第二公共电极210进行供电。
参考图2，像素电极120包括边框121与分支122。边框121包围在分支122的四周。分支122连接边框121。
第一公共电极110包括与边框121相对设置的边板111。边板111包括屏蔽极板111a。屏蔽极板111a围绕边框121的正投影。本申请实施例中，边板111可以与部分边框121相对设置(参考图2以及图3)，也可以与全部的边框121(未图示)相对设置，本申请对此不做限制。
屏蔽极板111a位于各子像素之间，其与各子像素之间的第二公共电极210相对。第一公共电极110与第二公共电极210等电位，而屏蔽极板111a是第一公共电极110的一部分。因此，屏蔽极板111a与各子像素之间的第二公共电极210等电位，即二者之间没有电压差。屏蔽极板111a与各子像素之间的第二公共电极210之间的液晶分子300沿着等势线站立，进而遮住光源，使得各子像素之间显示为暗态。但是，电场之间的相互影响，也使得屏蔽极板111a上的电场作用影响其附近的像素电极120上的电场。
显示面板在进行正常显示时，分支122上的电压产生的电场引导分支122及其周围区域(例如，分支122数量为多个时，各分支之间的区域)与第二公共电极210之间的液晶分子300偏转而透光。分支122与第二公共电极210之间场强为E 1，分支122的周围区域与第二公共电极210之间场强为E 2。由于周围区域上没有电压，因此E 2相对E 1较弱。因此，当分支122靠近屏蔽极板111a处的电压产生的电 场受到屏蔽极板111a上的电压产生的电场的影响而变弱时，此处的周围区域与第二公共电极210之间场强为E 2变得更弱，导致对应的液晶分子300容易偏转混乱而不能正常透光，而使得子像素边缘容易产生暗纹，影响面板的穿透率。
本申请实施例中，第一公共电极110的边板111与像素电极120的边框121相对设置。像素电极120的边框121包围分支122。边板111在朝向分支122的一侧具有凹槽111b。凹槽111b对应的屏蔽极板111与边框121内侧(连接分支122的一侧)的距离被拉远。因此，屏蔽极板111上的电场对使得液晶分子透光的分支122上的电场的影响减弱，进而改善子像素边缘的暗纹现象。
参考图2以及图3，在一个实施例中，第一公共电极110上凹槽111b与像素电极上的分支122的正投影相对。具体地，可以是一个凹槽111b与一个分支122的正投影相对，也可以是一个凹槽111b与多个分支122的正投影相对，也可以是多个凹槽111b与一个分支122的正投影相对等。
由于子像素边缘的暗纹现象主要是由于分支122上的电场受到屏蔽极板111a上的电场影响导致。所以，将凹槽111b与分支122的正投影相对设置，可以直接拉远分支122与屏蔽极板111a的距离，进而更好抵抗屏蔽极板111a上的电场的影响，更加有效地抑制暗纹。
当然，本申请实施例中，凹槽111b也可以不与分支122的正投影相对设置，或者与部分分支122的正投影相对设置，本申请对此均不做限制。
在一个实施例中，边板111还包括电容极板111c。电容极板111c与屏蔽极板111a相互连接。并且，电容极板111c与边框121形成存储电容。存储电容在显示过程中，可以保持像素电极120上的电压持续。使得像素电极120上具有持续的电压供给，以有效避免显示异常。
在一个实施例中，凹槽111b形成于电容极板111c。即电容极板111c上具有凹槽111b，凹槽111b的周围均是电容极板111c，进而可以保证存储电容上的容量足够大，以保持像素电极120上的电压持续。
本申请实施例中，也可以将凹槽111b贯穿电容极板111c与屏蔽极板111a设置等，而并不限于只形成与电容极板111c中。
在一个实施例中，凹槽111b形成于电容极板111c的同时，一个凹槽111b与一个分支122的正投影相对设置。进而使得有效降低屏蔽极板111a对分支122上的电场影响的前提下，凹槽111b之间的部分也可以用来形成存储电容，进而增加电容的容量。
在一个实施例中，在上面实施例的基础上，设置凹槽111b的槽口面积大于分支122朝向凹槽111b的一侧的表面的面积。进而使得凹槽111b充分保护分支122，降低其受到的屏蔽极板111a上的电场的影响。
在一个实施例中，凹槽111b在垂直于边板111厚度方向的截面上的截面形状为四边形，以便于凹槽111b的图形化工艺制作。具体地，四边形可以为矩形、正方形、平行四边形、菱形、梯形等等。当然，本申请实施例中，上述四边形也可以用其他任意其他多边形代替， 如三角形、五边形、六边形等。或者，上述四边形也可以用非多边形(如圆弧形)代替。
参考图3，在一个实施例中，像素电极120还包括主干123。主干123两侧连接有分支122。主干123将像素电极120分为多个畴，使得一个子像素内具有多个畴。相邻畴中的分支122的长度方向不同。因此，当施加了电压时，各个畴内的液晶分子300的倾斜方向不同。所以，一个子像素内液晶分子300具有多种倾斜方向。这样，更加有利于显示面板的广视野角显示。
畴对应的边板111中具有凹槽111b，可以将该畴对应的边框121内侧与屏蔽极板111a之间的距离拉远，进而使得子像素的畴中可有效改善暗纹现象。每个畴对应的边板111中均具有凹槽111b时，各个畴中均可有效改善暗纹现象，进而使得整个子像素中的边缘暗纹得到有效抑制。
在一个实施例中，如图1以及图3所示，阵列基板100包括第一公共电极110以及像素电极120。
像素电极120包括边框121、主干123以及分支122。边框121连接且包围主干123与分支122。主干123包括第一干1231与第二干1232。第一干1231与第二干1232交叉并将像素电极120的内部区域分为四个大小相等的畴。分支122分布于各畴中且连接主干123与边框121。相邻畴中的分支122的长度方向均不同。四个畴中的分支122的延伸方向与一主干123(例如第一干1231)的夹角可分别为±45°、±135°。此时，当施加了电压时，四个畴内的液晶分子300 的倾斜方向均不同。一个子像素内液晶分子300具有四种倾斜方向。各个畴中可以具有多个分支122，一个畴中的多个分支122之间可以具有固定的间隔。
第一公共电极110包括与边框121相对设置的边板111。边板111包括相互连接的屏蔽极板111与电容极板112。屏蔽极板111围绕边框121的正投影。并且屏蔽极板111与各子像素之间的第二公共电极210相对，进而使得二者之前的液晶分子300遮光而显示暗态。电容极板112与边框121形成存储电容。存储电容在显示过程中，保持像素电极120上的电压持续。为了增加存储电容的容量，第一公共电极110还可以具有中央板112，中央板112可以连接边板111的相对的两侧，进而与边板111方便地进行等电位连接。中央板112可与一主干123(如第一干1231)相对设置而形成存储电容。
边板111在朝向分支122的一侧具有与分支122的正投影相对的凹槽111b。凹槽111b拉远分支122与屏蔽极板111a的距离，进而有效降低蔽极板111a上的电场对分支122上的电场影响。因此，子像素边缘的暗纹得以有效抑制。
综上所述，本申请提供的阵列基板，第一公共电极的边板包括屏蔽极板，其在朝向分支的一侧具有凹槽。凹槽对应的屏蔽极板与边框连接分支的一侧的距离被拉远。因此，屏蔽极板上的电场对使得液晶分子透光的分支上的电场的影响减弱，进而改善子像素边缘的暗纹现象。
以上实施例的各技术特征可以进行任意的组合，为使描述简洁， 未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种阵列基板，包括：
    像素电极，包括边框与连接所述边框的分支，所述边框包围所述分支；
    第一公共电极，与所述像素电极相互绝缘，包括与所述边框相对设置的边板，所述边板包括屏蔽极板，所述屏蔽极板围绕所述边框的正投影，所述边板在朝向所述分支的一侧具有凹槽。
  2. 根据权利要求1所述的阵列基板，其中，所述凹槽与所述分支的正投影相对。
  3. 根据权利要求2所述的阵列基板，其中，一个所述凹槽与一个所述分支的正投影相对。
  4. 根据权利要求2所述的阵列基板，其中，一个所述凹槽与多个所述分支的正投影相对。
  5. 根据权利要求2所述的阵列基板，其中，多个所述凹槽与一个所述分支的正投影相对。
  6. 根据权利要求1所述的阵列基板，其中，所述边板还包括电容极板，所述电容极板与所述屏蔽极板相互连接，且所述电容极板与所述边框形成存储电容。
  7. 根据权利要求6所述的阵列基板，其中，所述凹槽形成于所述电容极板。
  8. 根据权利要求6所述的阵列基板，其中，所述凹槽贯穿所述电容极板与所述屏蔽极板设置。
  9. 根据权利要求7所述的阵列基板，其中，一个所述凹槽与一个所述分支的正投影相对设置。
  10. 根据权利要求9所述的阵列基板，其中，所述凹槽的槽口面积大于所述分支朝向所述凹槽的一侧的表面的面积。
  11. 根据权利要求1所述的阵列基板，其中，所述凹槽在垂直于所述边板厚度方向的截面上的截面形状为多边形。
  12. 根据权利要求11所述的阵列基板，其中，所述多边形为四边形。
  13. 根据权利要求12所述的阵列基板，其中，所述四边形为矩形、正方形、平行四边形、菱形或梯形。
  14. 根据权利要求11所述的阵列基板，其中，所述多边形为三角形、五边形或六边形。
  15. 根据权利要求1所述的阵列基板，其中，所述像素电极还包括主干，所述主干两侧连接有所述分支，所述主干将所述像素电极的内部区域分为多个畴，相邻所述畴中的所述分支的长度方向不同，所述畴对应的所述边板中具有所述凹槽。
  16. 根据权利要求15所述的阵列基板，其中，所述主干包括第一干与第二干，所述第一干与所述第二干交叉且将所述像素电极的内部区域分为四个大小相等的畴。
  17. 根据权利要求16所述的阵列基板，其中，所述还包括中央板，所述第一干与所述中央板形成存储电容。
  18. 根据权利要求17所述的阵列基板，其中，所述中央板连接所 述边板的相对的两侧。
  19. 一种阵列基板，包括：
    像素电极，包括边框、主干以及分支；所述边框连接并包围所述主干与所述分支；所述主干包括第一干与第二干，所述第一干与所述第二干交叉且将所述像素电极的内部区域分为四个大小相等的畴；所述分支分布于各所述畴中并连接所述主干与所述边框，相邻所述畴中的所述分支的长度方向不同；
    第一公共电极，与所述像素电极相互绝缘，包括与所述边框相对设置的边板，所述边板包括屏蔽极板与电容极板，所述屏蔽极板围绕所述边框的正投影，所述电容极板与所述边框形成存储电容；所述边板在朝向所述分支的一侧具有与所述分支的正投影相对的凹槽。
  20. 一种显示面板，包括液晶分子、彩膜基板以及阵列基板，所述阵列基板与所述彩膜基板相对设置，所述液晶位于所述彩膜基板与所述阵列基板之间，
    所述阵列基板，包括：
    像素电极，包括边框与连接所述边框的分支，所述边框包围所述分支；
    第一公共电极，与所述像素电极相互绝缘，包括与所述边框相对设置的边板，所述边板包括屏蔽极板，所述屏蔽极板围绕所述边框的正投影，所述边板在朝向所述分支的一侧具有凹槽；
    所述彩膜基板，包括第二公共电极，所述第二公共电极与所述第一公共电极等电位。
PCT/CN2018/115179 2018-10-29 2018-11-13 阵列基板以及显示面板 Ceased WO2020087567A1 (zh)

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CN109859705A (zh) * 2019-01-30 2019-06-07 惠科股份有限公司 一种驱动方法、显示面板和驱动模块
CN113900305B (zh) * 2021-10-11 2023-10-20 厦门天马微电子有限公司 一种显示面板及显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103901663A (zh) * 2014-03-28 2014-07-02 南京中电熊猫液晶显示科技有限公司 一种液晶显示器的彩膜基板
CN104199224A (zh) * 2014-09-18 2014-12-10 深圳市华星光电技术有限公司 一种液晶显示面板
US20160062200A1 (en) * 2014-09-03 2016-03-03 Samsung Display Co., Ltd. Thin film transistor array substrate, method for manufacturing the same, and liquid crystal display including the same
CN208848020U (zh) * 2018-10-29 2019-05-10 惠科股份有限公司 阵列基板以及显示面板

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002040456A (ja) * 2000-07-28 2002-02-06 Nec Corp 液晶表示装置
US8045104B2 (en) * 2005-08-31 2011-10-25 Lg Display Co., Ltd. In-plane switching mode liquid crystal display and method for manufacturing the same, comprising first and second black matrix lines
CN104216180B (zh) * 2009-08-24 2017-05-03 夏普株式会社 液晶显示装置
JP5552457B2 (ja) * 2011-03-31 2014-07-16 株式会社ジャパンディスプレイ 液晶表示装置
CN203941365U (zh) * 2014-07-09 2014-11-12 京东方科技集团股份有限公司 阵列基板、显示面板及显示装置
CN106094368B (zh) * 2016-08-26 2019-04-30 深圳市华星光电技术有限公司 像素电极
CN107367873B (zh) * 2017-09-15 2020-09-08 深圳市华星光电半导体显示技术有限公司 一种液晶显示面板及其像素单元

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103901663A (zh) * 2014-03-28 2014-07-02 南京中电熊猫液晶显示科技有限公司 一种液晶显示器的彩膜基板
US20160062200A1 (en) * 2014-09-03 2016-03-03 Samsung Display Co., Ltd. Thin film transistor array substrate, method for manufacturing the same, and liquid crystal display including the same
CN104199224A (zh) * 2014-09-18 2014-12-10 深圳市华星光电技术有限公司 一种液晶显示面板
CN208848020U (zh) * 2018-10-29 2019-05-10 惠科股份有限公司 阵列基板以及显示面板

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