WO2020062605A1 - Driving voltage control system and display device - Google Patents

Abstract

A driving voltage control system, comprising a timing control chip (10) and a gamma voltage chip (20); wherein the timing control chip (10) is configured to detect the current charging area of a display panel (102); the gamma voltage chip (20) is connected to the timing control chip (10), and the timing control chip (10) is further configured to transmit a voltage difference data code corresponding to the current charging area to the gamma voltage chip (20); and the gamma voltage chip (20) is configured to output a gamma voltage according to the voltage difference data code and a reference voltage data code, so as to charge the display panel (102).

Description

Driving voltage control system and display device

Related applications

This application claims priority from a Chinese patent application filed on September 28, 2018 with an application number of 201811141676.7, entitled "Drive Voltage Control System and Display Device", which is hereby incorporated by reference in its entirety.

Technical field

The present application relates to the field of display technology, and in particular, to a driving voltage control system and a display device.

Background technique

The statements herein merely provide background information related to the present application and do not necessarily constitute prior art.

As the size of the display screen becomes larger and the resolution becomes higher and higher, when the data cable is charging the display panel, the charging difference between the near-end area of the display panel close to the drive board and the far-end area far from the drive board becomes larger. It is more and more obvious that the near-end area of the display panel near the driving board has better charging effect and higher brightness, and the far-end area of the display panel far from the driving board has poor charging effect and lower brightness.

At present, larger display screens are usually charged by bilateral drive of data lines to reduce the difference in charging, but this method requires double the data line, which is costly.

Summary of the Invention

According to various embodiments of the present application, a driving voltage control system and a display device are provided.

A driving voltage control system includes:

A timing control chip for detecting a current charging area of the display panel; and

A gamma voltage chip connected to the timing control chip,

The timing control chip is further configured to transmit a voltage difference data code corresponding to the current charging area to the gamma voltage chip;

The gamma voltage chip is configured to output a gamma voltage according to the voltage difference data code and the reference voltage data code to charge the display panel.

A driving voltage control system includes:

A timing control chip for detecting a current charging area of the display panel; and

A gamma voltage chip connected to the timing control chip,

The timing control chip is further configured to transmit a voltage difference data code corresponding to the current charging area to the gamma voltage chip;

The gamma voltage chip is configured to output a gamma voltage according to the voltage difference data code and the reference voltage data code to charge the display panel;

The timing control chip includes a counter, a controller, and a first memory; the counter is configured to count a current charging area of the display panel; the controller is configured to identify a value obtained by counting by the counter and output a corresponding value according to the value The voltage difference data code; the first memory is configured to store the voltage difference data code.

A display device includes a driving board, a display panel, and a data line disposed on the same side of the display panel and connected to the display panel and the driving board, and the driving voltage control system; the driving board is used for The gamma voltage output by the driving voltage control system charges the display panel line by line through a data line.

Details of one or more embodiments of the present application are set forth in the accompanying drawings and description below. Other features, objects, and advantages of the application will become apparent from the description, the drawings, and the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to explain the technical solutions of the embodiments of the present application more clearly, the drawings used in the description of the embodiments are briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. Those of ordinary skill in the art can also obtain drawings of other embodiments according to these drawings without paying creative labor.

FIG. 1 is a connection diagram of a driving voltage control system and a display panel according to an embodiment; FIG.

2 is a schematic block diagram of a driving voltage control system according to an embodiment;

3 is a functional block diagram of a driving voltage control system according to an embodiment;

4 is a functional block diagram of a driving voltage control system according to another embodiment;

5 is a schematic diagram of a liquid crystal driving structure in a display panel according to an embodiment;

6 is a schematic diagram of a sub-pixel structure shown in FIG. 5;

FIG. 7 is a connection schematic diagram of a driving board, a display panel, and a data line of a display device according to an embodiment.

detailed description

Referring to FIG. 1, the driving voltage control system includes a timing control chip 10 and a gamma voltage chip 20. The timing control chip 10 is connected to the gamma voltage chip 20. The timing control chip 10 is configured to detect a current charging area of the display panel 102 and transmit a corresponding voltage difference data code to the gamma voltage chip 20 according to the detected current charging area. The gamma voltage chip 20 is configured to output a gamma voltage according to the voltage difference data code and the reference voltage data code to charge the display panel 102. The display panel 102 is connected to the timing control chip 10 and the gamma voltage chip 20.

The timing control chip 10 and the gamma voltage chip 20 are connected through a serial bus. In this embodiment, the timing control chip 10 and the gamma voltage chip 20 are connected through an I2C (Inter-Integrated Circuit) bus. In the communication process of the I2C protocol, only two wires are needed to transfer information between the devices connected to the bus. The structure is simple, the flexibility is good, and it is easy to develop.

Please refer to FIG. 7, the voltage difference data code is a code of a difference between a gamma voltage actually output by the gamma voltage chip 20 and a theoretical gamma voltage. The timing control chip 10 is further configured to obtain the voltage difference data code through a prior debugging process before implementing the embodiments of the present application. The voltage difference data code is set according to the display requirements of the display panel 102. The reference voltage data code is a code that generates a reference gamma voltage. The driving board 101 uses the gamma voltage output from the gamma voltage chip 20 to perform progressive scanning and charging on the display panel 102 through the data line 103. The current charging area is an area where a row currently being charged by the display panel 102 is located.

In one embodiment, the voltage difference data code can be obtained in real time by the timing control chip 10. Obtaining the voltage difference data code in real time can greatly reduce the storage space of the timing control chip 10.

Please refer to FIG. 5, which is a schematic diagram of a liquid crystal driving structure in the display panel 102. In the liquid crystal driving structure, a plurality of sub-pixel structures are arranged in an array. A scanning signal Si (1 ≦ i ≦ m) is input in each row, and a data signal Dj (1 ≦ j ≦ n) is input in each column. Generally, the scanning signal Si is input line by line, that is, S1 to Sm are sequentially inputted with a high level in a fixed period, so that the sub-pixels in the line input a data signal. When the input of the scanning signal is completed, one frame of graphics is displayed. Generally, one frame scan time is 1/60 second, that is, the refresh frequency is 60 Hz.

Please refer to FIG. 6, which is a schematic diagram of a sub-pixel structure. The sub-pixel structure includes a three-terminal switching device T1, which is generally a thin film transistor. A scanning signal Si is input to a gate thereof, a data signal Dj is input to a source thereof, and two parallel capacitors Cs and Clc are connected to a drain. The capacitor Cs is an energy storage capacitor, and the capacitor Clc is a liquid crystal capacitor. The other end of the parallel capacitor can be connected to a common voltage Vcom.

When the scanning signal Si is input to a high level, the thin film transistor T1 is turned on and receives an input data signal Dj (voltage signal). The voltage difference between the data signal Dj and the common voltage Vcom charges the capacitors Cs and Clc, where the voltage between Clc deflects the liquid crystal molecules located therein, so that the backlight transmits a corresponding degree of light according to the degree of deflection of the liquid crystal molecules, so that The sub-pixel exhibits corresponding brightness. The capacitor Cs is used to maintain this voltage until the next scan.

The voltage of the data signal Dj may be higher than the common voltage Vcom or lower than the common voltage Vcom. When the absolute value of the voltage difference between the two is the same, but the signs are opposite, the brightness of the driving sub-pixel is the same. When the voltage of the data signal Dj is higher than the common voltage Vcom, it is called a positive polarity drive, otherwise it is called a negative polarity drive.

For each sub-pixel structure, it is used to drive and display one sub-pixel. For example, for a three-color pixel unit, the sub-pixels are red sub-pixel (R), green sub-pixel (G), and blue sub-pixel (B); for a four-color pixel unit, the sub-pixel is a red sub-pixel ( R), green subpixel (G), blue subpixel (B), and white subpixel (W).

Each line area corresponds to a different voltage difference data code, and the size of the voltage difference value corresponding to each line area can be set according to actual needs.

Please refer to FIG. 2 and FIG. 3 again. In the first embodiment, the timing control chip 10 includes a counter 11, a controller 12, and a first memory 13. The counter 11 is configured to count the current charging area of the display panel 102 so that the timing control chip 10 obtains the current number of charging lines of the display panel 102. In this embodiment, the counter 11 is a line counter, which is used to count the charging lines of the display panel 102. The counter 11 may be a binary counter, a decimal counter, or other counters. Each time the display panel 102 completes one line of charging, the count of the counter 11 is increased by one accordingly.

The controller 12 is configured to identify the value counted by the counter 11 and output a corresponding voltage difference data code according to the value, so that the timing control chip 10 adjusts the display panel 102 in real time according to the charging area of the display panel 102 Charging voltage. In this embodiment, the controller 12 may be a microcontroller or a microcontroller. In other embodiments, the controller 12 may also be other chips or functional modules with data processing capabilities, such as a CPU (Central Processing Unit).

The first memory 13 is configured to store the voltage difference data code, so that the controller 12 can call the voltage difference data code at any time to ensure the stability of the voltage difference data code. In this embodiment, the first memory 13 is a read-only-memory. Under normal operating conditions, the controller 12 can only read data from the first memory 13 and cannot quickly modify it. Or rewrite the data. The advantage of ROM is that the circuit structure is simple, and the data will not be lost after power off. Read-only memory includes mask ROM, programmable ROM, and erasable ROM.

In an embodiment, the display panel 102 is divided into 400 rows for charging, and the number of rows is set to X, and X is divided into four orders: when X≤100, the voltage difference data code is △ V1; when 100 <X≤200, The voltage difference data code is △ V2; when 200 <X≤300, the voltage difference data code is △ V3; when 300 <X≤400, the voltage difference data code is △ V4. Among them, ΔV1 <△ V2 <△ V3 <△ V4. When the charging area of the display panel 102 is X ≦ 100, the controller 12 transmits ΔV1 to the gamma voltage chip 20; when the charging area of the display panel 102 is 100 <X ≦ 200, the controller 12 Transmitting △ V2 to the gamma voltage chip 20; when the charging area of the display panel 102 is 200 <X≤300, the controller 12 transmits △ V3 to the gamma voltage chip 20; when charging the display panel 102 When the area is 300 <X ≦ 400, the controller 12 transmits ΔV4 to the gamma voltage chip 20. The ΔV1, ΔV2, ΔV3, and ΔV4 are stored in the first memory 13. In practical applications, the number of rows can be graded according to the number of rows of the display panel 102 and the voltage difference data code corresponding to each stage can be set as required.

The gamma voltage chip 20 includes a second memory 21, an adder 22 and a digital-to-analog converter 23. The second memory 21 is configured to store a reference voltage data code, so that the gamma voltage chip 20 can call the reference voltage data code at any time. In this embodiment, the second memory 21 is a read-only-memory (ROM). Under normal operating conditions, the adder 22 reads a reference voltage data code from the second memory 21, and cannot Quickly modify or rewrite the reference voltage data code. Using ROM as the memory can simplify the circuit structure of the gamma voltage chip 20, and the reference voltage data code will not be lost after the power is turned off.

The adder 22 is configured to add a voltage difference data code and a reference voltage data code, so that the gamma voltage chip 20 can obtain a sum of the voltage difference data code and the reference voltage data code.

The digital-to-analog converter 23 is configured to convert a sum of a voltage difference data code and a reference voltage data code into an analog gamma voltage from a digital code and output the analog gamma voltage, so that the gamma voltage chip 20 can output an analog voltage according to a digital signal. . The digital-to-analog converter 23 includes a weighted resistor network, an operational amplifier, a reference power source, and an analog switch. The analog switch includes a MOS tube.

In this embodiment, storing the voltage difference data code in the timing control chip 10 and storing the reference voltage data code in the gamma voltage chip 20 are beneficial to saving the storage space of the timing control chip 10.

Please refer to FIG. 4 again. In the second embodiment, the timing control chip 10 includes a counter 11, a controller 12, and a first memory 13. The counter 11 is used for counting the current charging area of the display panel 102. Each time the display panel 102 completes one line of charging, the count of the counter 11 is increased by one accordingly. The controller 12 is configured to identify a value counted by the counter 11 and output a corresponding voltage difference data code and a reference voltage data code according to the value. The first memory 13 is configured to store the voltage difference data code and the reference voltage data code.

The gamma voltage chip 20 includes an adder 22 and a digital-to-analog converter 23. The adder 22 is configured to add a voltage difference data code and a reference voltage data code. The digital-to-analog converter 23 is configured to convert a sum of a voltage difference data code and a reference voltage data code from a digital code into an analog gamma voltage and output the same. In this embodiment, storing the voltage difference data code and the reference voltage data code in the timing control chip 10 is beneficial to saving the storage space of the gamma voltage chip 20.

The present application further provides a display device including the driving voltage control system, a driving board 101, a display panel 102, and a data line 103 disposed on the same side of the display panel 102 and connected to the display panel 102 and the driving board 101 . The driving board 101 is configured to charge the display panel 102 line by line through the data line 103 by the gamma voltage output by the driving voltage control system.

The display panel 102 of the present application may be, for example, a liquid crystal display panel, but it is not limited thereto, and may also be an OLED display panel, a W-OLED display panel, a QLED display panel, a plasma display panel, a curved display panel, or other types. Display panel.

The driving voltage control system and display device of the present application store the voltage difference data code in the timing control chip 10, and the timing control chip 10 detects the current charging area of the display panel 102, and transmits the corresponding voltage according to the detected current charging area. The difference data code is sent to the gamma voltage chip 20, and the gamma voltage chip 20 outputs a gamma voltage according to the voltage difference data code and the reference voltage data code, thereby achieving a charging effect of dynamically matching the display panel 102 with low cost.

The technical features of the embodiments described above can be arbitrarily combined. In order to simplify the description, all possible combinations of the technical features in the above embodiments have not been described. However, as long as there is no contradiction in the combination of these technical features, It should be considered as the scope described in this specification.

The above-mentioned embodiments only express several implementation manners of the present application, and their descriptions are more specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be noted that, for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can be made, which all belong to the protection scope of the present application. Therefore, the protection scope of this application patent shall be subject to the appended claims.

Claims (18)

1. A driving voltage control system includes:

   A timing control chip configured to detect a current charging area of the display panel; and

   A gamma voltage chip connected to the timing control chip,

   The timing control chip is further configured to transmit a voltage difference data code corresponding to the current charging area to the gamma voltage chip;

   The gamma voltage chip is configured to output a gamma voltage according to the voltage difference data code and the reference voltage data code to charge the display panel.
2. The driving voltage control system according to claim 1, wherein the timing control chip includes a counter configured to count a current charging area of the display panel.
3. The driving voltage control system according to claim 2, wherein the timing control chip further comprises a controller, the controller is configured to recognize a value obtained by counting by the counter and output corresponding voltage difference data according to the value Code.
4. The driving voltage control system according to claim 3, wherein the timing control chip further comprises a first memory configured to store the voltage difference data code.
5. The driving voltage control system according to claim 4, wherein the gamma voltage chip includes a second memory configured to store a reference voltage data code.
6. The driving voltage control system according to claim 3, wherein the timing control chip further comprises a first memory configured to store the voltage difference data code and the reference voltage data code.
7. The driving voltage control system according to claim 5, wherein the gamma voltage chip further comprises an adder configured to add a voltage difference data code and a reference voltage data code.
8. The driving voltage control system according to claim 7, wherein the gamma voltage chip further comprises a digital-to-analog converter, the digital-to-analog converter is configured to sum a voltage difference data code and a reference voltage data code by a number The code is converted into an analog gamma voltage and output.
9. The driving voltage control system according to claim 1, wherein the timing control chip and the gamma voltage chip are connected through a serial bus.
10. The driving voltage control system according to claim 1, wherein the voltage difference data code is a code of a difference between a gamma voltage actually output by the gamma voltage chip and a theoretical gamma voltage, and the timing control chip It is also configured to obtain the voltage difference data code through a prior debugging process.
11. The driving voltage control system according to claim 1, wherein the timing control chip is further configured to acquire the voltage difference data code in real time.
12. The driving voltage control system according to claim 3, wherein the controller is a microcontroller.
13. The driving voltage control system according to claim 1, wherein the controller is a microcontroller.
14. The driving voltage control system according to claim 1, wherein the first memory is a read-only memory.
15. The driving voltage control system according to claim 1, wherein the second memory is a read-only memory.
16. A driving voltage control system includes:

    A timing control chip configured to detect a current charging area of the display panel; and

    A gamma voltage chip connected to the timing control chip,

    The timing control chip is further configured to transmit a voltage difference data code corresponding to the current charging area to the gamma voltage chip;

    The gamma voltage chip is configured to output a gamma voltage according to the voltage difference data code and the reference voltage data code to charge the display panel;

    The timing control chip includes a counter, a controller, and a first memory; the counter is configured to count a current charging area of the display panel; and the controller is configured to recognize a value counted by the counter and output according to the value A corresponding voltage difference data code; the first memory is configured to store the voltage difference data code.
17. A display device comprising a driving board, a display panel, a data line provided on the same side of the display panel and connected to both the display panel and the driving board, and the driving voltage control system according to claim 1; the driving board The display panel is configured to charge the display panel line by line through the data line through the gamma voltage output by the driving voltage control system.
18. The display device according to claim 17, wherein the display panel is a liquid crystal display panel.

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