WO2020062263A1

WO2020062263A1 - Box device, method, and system for use in image recognition, and storage medium

Info

Publication number: WO2020062263A1
Application number: PCT/CN2018/109143
Authority: WO
Inventors: 崔志良; 彭浩; 汪润桂
Original assignee: 北京比特大陆科技有限公司
Priority date: 2018-09-30
Filing date: 2018-09-30
Publication date: 2020-04-02
Also published as: CN109328357A

Abstract

A box device (20), method, and system for use in image recognition, and a storage medium. The device (20) comprises a housing (200). Provided within the housing are a first Ethernet port (210), a processor (220) used for neural network operations, and a high-speed memory (230), where the processor (220) comprises an Ethernet data receiving circuit (221), the high-speed memory (230) is connected to the processor (220) and used for storing data of the processor (220), the first Ethernet port (210) is connected to the Ethernet data receiving circuit (221) of the processor (220), and the first Ethernet port (210) transmits directly to the processor (220) via the Ethernet data receiving circuit (221) an image captured by an image capturing device for image recognition processing. The box device (20) is compact in size, is convenient to carry, and has high image recognition efficiency and great accuracy.

Description

Box device, method, system and storage medium for image recognition

Technical field

The present application relates to the field of image recognition technology, for example, to a box device, method, system, and storage medium for image recognition.

Background technique

Most of the existing solutions for image recognition processing are servers. The server consists of a large number of boards to form a complete machine, which is large in size, large in power consumption, high in cost, and difficult to handle. And most of the servers currently used for image recognition processing use graphics processors (Graphics Processing Uni, referred to as GPU). GPU is not a special processor for image recognition. Its image recognition efficiency is low and accuracy is poor. Moreover, the wiring of the GPU in the server is more complicated, requiring more physical space, resulting in a large server volume.

The above background art content is only used to help understand this application, and does not represent an acknowledgement or approval that any of the content mentioned is part of the common general knowledge relative to this application.

Summary of the Invention

The present application provides a box device, method, system, and storage medium for image recognition, which are used to reduce the size and cost of the image recognition device, while improving the efficiency and accuracy of image recognition and reducing energy consumption.

A first aspect of the embodiments of the present application provides a box device for image recognition, including:

A housing, which is provided with a first Ethernet port, a processor for neural network operations, and a high-speed memory, wherein the processor includes an Ethernet data receiving circuit;

The high-speed memory is connected to the processor and is used to store data of the processor, the first Ethernet port is connected to an Ethernet data receiving circuit in the processor, and the first Ethernet The port directly transmits the image acquired by the image acquisition device to the processor for image recognition processing through the Ethernet data receiving circuit.

A second aspect of the embodiments of the present application provides an image recognition system, including: one or more image acquisition devices, a router, and the box device according to the first aspect;

Wherein, the one or more image acquisition devices transmit the acquired images to the router, and the router transmits the received images to the box device, so that the box device can The image is subjected to image recognition processing.

A third aspect of the embodiments of the present application provides an image recognition method for a box device. The box device includes a casing, and a first Ethernet port is provided in the casing for neural network operations. And a high-speed memory; wherein the processor includes an Ethernet data receiving circuit, the high-speed memory is connected to the processor, and is configured to store data of the processor, and the first Ethernet port is connected to all The Ethernet data receiving circuit connection in the processor is described. The method includes:

The first Ethernet port acquires an image acquired by an image acquisition device, and sends the image to an Ethernet data receiving circuit in the processor to transmit the image to the Ethernet through the Ethernet data receiving circuit. processor;

The processor performs image recognition processing on the received image based on a preset neural network model to obtain a recognition result.

A fourth aspect of the embodiments of the present application provides a computer-readable storage medium storing computer-executable instructions, where the computer-executable instructions are configured to execute the method of the third aspect.

An embodiment of the present application further provides a computer program product. The computer program product includes a computer program stored on a computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, The computer executes the method of the third aspect described above.

BRIEF DESCRIPTION OF THE DRAWINGS

One or more embodiments are exemplarily described by corresponding drawings. These exemplary descriptions and drawings do not limit the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. The drawings do not constitute a scale limitation, and among them:

FIG. 1 is a schematic diagram of an image recognition scene provided by the prior art; FIG.

2 is a schematic structural diagram of a box device for image recognition according to an embodiment of the present application;

3 is a schematic structural diagram of another box device for image recognition according to an embodiment of the present application;

4 is a schematic structural diagram of still another box device for image recognition according to an embodiment of the present application;

5 is a schematic structural diagram of another box device for image recognition according to an embodiment of the present application;

6 is a schematic structural diagram of still another box device for image recognition according to an embodiment of the present application;

7 is a schematic structural diagram of an image recognition system according to an embodiment of the present application;

8 is a flowchart of an implementation manner of step 102 according to an embodiment of the present application;

FIG. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

detailed description

In order to understand the features and technical contents of the embodiments of the present application in more detail, the implementation of the embodiments of the present application will be described in detail with reference to the accompanying drawings. The attached drawings are for reference only and are not intended to limit the embodiments of the present application. In the following technical description, for convenience of explanation, various details are provided to provide a full understanding of the disclosed embodiments. However, without these details, one or more embodiments can still be implemented. In other cases, to simplify the drawings, well-known structures and devices may simplify the display.

FIG. 1 is a schematic diagram of an image recognition scene provided by the prior art. FIG. 1 includes an image acquisition device 10 and a server 11 that can be used to perform image recognition processing. The server 11 includes multiple boards 111, and one or more boards may be provided in the multiple boards 111. There is GPU112 for image processing (only the scene where the GPU is set on one board is shown in Figure 1), and the processors set on the other boards are used to implement other preset functions, which makes the internal design comparison of server 11 Redundant, bulky and difficult to handle.

When performing the image recognition processing operation, the image acquisition device 10 transmits the acquired image data to the network card 113, and the network card 113 forwards the image data to the bus interface (PCIE) 114, and then the PCIE 114 forwards the image data to the GPU 112 for processing. In this process, since the network card 113 and PCIE 114 are required to forward the image data, the data transmission path is longer, which results in a longer data processing delay and higher cost. In addition, GPU112 is a general-purpose processor with weak data processing capability. When performing a large number of ALU operations, GPU112 needs to access memory 115 to read and save intermediate calculation results, and it takes more energy to access memory 115. At the same time, because of the complicated wiring layout, the GPU 112 occupies the internal physical space of the server, which is also one of the important factors that cause the server 11 to be bulky.

In view of the foregoing defects in the prior art, an embodiment of the present application provides a box device for image recognition processing. The box device is provided with an integrated circuit (ASIC) processor dedicated to artificial intelligence (AI) acceleration. This processor is not a general-purpose processor, but a processor dedicated to neural network operations. It can provide a large number of multiplication and addition operations for neural networks. At the same time, it has fast processing speed, high accuracy, low energy consumption, and occupied physics. The space is also relatively small, and the image recognition processing is integrated on a single board through a combination of a processor dedicated to neural network operations and a high-speed memory. The single board has a low cost and a small size, which makes the above box The device can be miniaturized and easy to carry, and by using a mode combining a processor and a high-speed memory, the data throughput capacity of the box device can be increased, and the efficiency and accuracy of image recognition of the box device can be improved.

The technical solution of the present application is described in detail below with reference to exemplary embodiments.

FIG. 2 is a schematic structural diagram of a box device for image recognition according to an embodiment of the present application. As shown in FIG. 2, the box device 20 includes a housing 200, and a first Ethernet is provided in the housing 200. Port 210, a processor 220 for a neural network operation (such as a tensor computing processor or a matrix processor, but not limited to a tensor computing processor or a matrix processor), and a high-speed memory 230 (such as DDR, but not limited to DDR).

The processor 220 includes an Ethernet data receiving circuit 221. The high-speed memory 230 is connected to the processor 220 for storing data of the processor 220. The first Ethernet port 210 is connected to the Ethernet data receiving circuit 221. The first Ethernet The network port 210 directly transmits the image acquired by the image acquisition device (not shown in FIG. 2) to the processor 220 through the Ethernet data receiving circuit 221 for image recognition processing. In addition, in another possible implementation manner, the housing 200 may also include a network card, and the processor may further include a circuit having a PCIE function. The first Ethernet port 210 may transmit data to the processor through the network card and the PCIE circuit. 220.

Specifically, in order to minimize the box device 20, the box device 20 in this embodiment includes only one board (not shown in FIG. 2), and the processor 220 and the high-speed memory 230 are provided on the board. However, in other possible scenarios, according to the needs of specific image recognition processing tasks, the box device 20 may also include multiple boards, and each board may use the same or similar device setting mode as the above setting mode. At this time, The first Ethernet port is respectively connected to a processor on each board card, so that the processors on multiple board cards cooperate to perform image recognition processing, so as to meet a higher image recognition processing rate requirement.

In a possible design, the high-speed memory 230 in this embodiment may be specifically DDR4, and in a possible implementation manner, the housing 200 may further include one or more of the following memories: SPI flash , EMMC, SD card. For example, FIG. 3 is a schematic structural diagram of another box device for image recognition provided in the embodiment of the present application. As shown in FIG. 3, based on FIG. 2, the housing 200 also includes SPI flash 231, EMMC 232, DDR4 233 and SD card 234. Among them, SPI flash 231 can provide storage support for the initialization data of the box device 20, EMMC 232 can be used to provide storage support for driving the bottom service of the box device 20, and DDR4 233 can be used to provide storage space for the image data that the processor 220 needs to process The SD card 234 can be used to store structured data required by the user, and to upgrade and restore the system of the box device 20.

In another possible design, a micro-control unit (MCU) for monitoring the processor 220 may also be provided in the box device 20, and the MCU also controls the power-on and power-off sequence of the system power in the box device 20 . As shown in FIG. 4, FIG. 4 is a schematic structural diagram of still another box device for image recognition according to an embodiment of the present application. FIG. 4 further includes an MCU 240 on the basis of the embodiment in FIG. 3. The MCU 240 is connected to the processor 220 and is used to control the startup or shutdown of the processor 220 and monitor the temperature of the processor 220. For example, in a possible implementation manner, the temperature of the processor 220 may be monitored in real time through the MCU 240. When the temperature of the matrix 220 is detected to exceed the dangerous temperature preset threshold, or the time exceeding the dangerous temperature preset threshold exceeds the preset time If the time is set, the control processor 220 is turned off to avoid danger. When the temperature of the processor falls below a preset threshold of the dangerous temperature, the control processor 220 is started. Of course, this is only an example and not the only limitation of the embodiments of the present application. In fact, in some scenarios, the MCU 240 can also perform fault detection on the processor 220 such as overvoltage, undervoltage, overtemperature, and overcurrent, and detect An alarm is issued when a failure occurs.

In yet another possible design, a heat sink may be further provided in the box device 20, and the processor 220 is radiated through an active heat sink (such as a fan) and / or a passive heat sink (such as a liquid cooling member) on the heat sink. Specifically, FIG. 5 is a schematic structural diagram of another box device for image recognition according to an embodiment of the present application. As shown in FIG. 5, based on the embodiment of FIG. 4, the radiator 250 is connected to the MCU 240. The MCU 240 controls the rotation speed of the fan on the heat sink 250 according to the temperature of the processor 220. The implementation manner of controlling the fan speed according to the temperature of the processor 220 can be set as required, which is not specifically limited in this embodiment.

In another possible design, in order to reduce the input power requirement of the box device 20 and improve the universality of the box device 20, a special step-down or boost circuit may be provided in the box device 20 so that the input After being processed by the step-down or step-up circuit, the power supply can supply power to the devices in the box device 20. For example, FIG. 6 is a schematic structural diagram of another box device for image recognition according to an embodiment of the present application. As shown in FIG. 6, based on the embodiment of FIG. 5, the box device 20 includes a low-pressure linear The voltage regulator (LDO) circuit 260 and the DC-DC circuit 270, the input power of the box device 20 is subjected to the step-down processing of the LDO circuit 260 to be the MCU 240, the clock module of the box device 20 (Figure 6) (Not shown), the PLL module supplies power, and the LDO circuit 260 can ensure the stability of the power supply, preventing a voltage drop in the power supply due to excessive power consumption during neural network operations, which affects power supply stability. The input power of the box device 20 supplies power to the processor 220 and other devices in the box device after the voltage reduction processing of the DC-DC circuit 270. The DC-DC circuit 270 provided in this embodiment includes an LC filter constructed by a large-capacity capacitor having a capacity larger than a preset threshold and a high-impedance anti-magnetic bead having an impedance higher than a preset impedance. When the processor 220 executes a nerve The power consumption during network operations will be very large, which will cause a voltage drop (ie, undershoot) in the core voltage that powers the processor 220 and the voltage that powers the high-speed memory. The DC-DC circuit 270 will provide the processor 220 and the high-speed memory. Power supply can alleviate undershoot and improve power supply stability.

In addition, as shown in FIG. 6, an external expansion button and / or an indicator light 280 may be provided on the box device 20 to perform human-computer interaction and improve the user's interactive experience.

Further, in order to meet remote monitoring requirements, in this embodiment, after the processor 220 obtains the recognition result, it may also transmit the recognition result to the first Ethernet port 210, and send the recognition result to the remote via the first Ethernet port 210. Terminal devices 60 (such as mobile phones and other electronic devices, APPs, web pages, cloud platforms, etc.) to implement remote monitoring of recognition results.

The box device 20 in this embodiment can be applied to scenarios such as gate face recognition, face payment, concert effect feedback, suspect investigation, traffic accident judgment, unmanned sales, flow statistics, AI anti-theft, and attendance And realize image-based face recognition, expression recognition, age recognition, vehicle recognition, location information recognition, license plate number recognition, color recognition, product recognition and other functions. It has the advantages of small and convenient, diverse use scenarios, powerful functions and so on.

In the box device provided in this embodiment, a processor dedicated to neural network operations is used in the box device to replace the existing GPU with poor image recognition efficiency and accuracy, and a high-speed memory is used to replace the currently generally low throughput. Memory, so that the cooperation between the processor and the high-speed memory can improve the throughput of the box device to the image data, and even realize the efficient processing of the box device to the image data input from the multi-channel image acquisition device, and for image recognition In other words, the processor has stronger processing efficiency and accuracy than the GPU, so that this embodiment can also improve the image recognition efficiency and accuracy of the box device. In addition, because the processor in the box device provided in this embodiment includes an Ethernet data receiving circuit, the image acquisition device outside the box can directly receive the data through the first Ethernet port and the Ethernet data receiving circuit in the processor. The acquired image is passed to the processor without being forwarded by the network card, so the power consumption caused by the network card part can be reduced, the volume of the box device is reduced, and the box device is more lightweight and compact.

FIG. 7 is a schematic structural diagram of an image recognition system according to an embodiment of the present application. As shown in FIG. 7, the system includes one or more image acquisition devices 70, a router 71, and the box device 20 according to the foregoing embodiment. Among them, one or more image acquisition devices 70 transmit the acquired images to the router 71, and the router 71 transmits the received images to the box device 20, so that the box device 20 images the images The recognition process, and after obtaining the recognition result, sends the recognition result to the router 71 through the first Ethernet port, and the router 71 sends the recognition result to the remote terminal device 60 in a wired or wireless manner.

The implementation manner and beneficial effects of the system provided by this embodiment are similar to those of the foregoing embodiment, and are not repeated here.

An embodiment of the present application provides an image recognition method. The method is applicable to the box device described in the foregoing embodiment. The method includes:

Step 101: The first Ethernet port acquires an image acquired by an image acquisition device, and sends the image to an Ethernet data receiving circuit in the processor, so as to transmit the image through the Ethernet data receiving circuit. To the processor.

Step 102: The processor performs image recognition processing on the received image based on a preset neural network model to obtain a recognition result.

For example, FIG. 8 is a flowchart of an implementation manner of step 102 provided in the embodiment of the present application. As shown in FIG. 8, in an exemplary embodiment, step 102 may include the following steps:

Step 1021: The processor performs decoding processing on the received image, and performs a preset image preprocessing operation on the image obtained after the decoding processing to obtain a standard image.

The image pre-processing operation involved in this embodiment may be preset according to requirements. For example, in some possible embodiments, at least one of the following processing operations may be performed on the decoded image: normalization processing, geometry Correction processing, histogram equalization processing, light compensation processing, gray-scale transformation processing, filtering processing, sharpening processing.

Step 1022: The processor performs image recognition processing on the standard image based on a preset neural network model to obtain a recognition result.

The neural network model involved in this embodiment is obtained by training in advance according to a specific recognition scenario. When performing a recognition process on a standard image, first perform a feature extraction process on the standard image based on the neural network model to obtain the feature information of the standard image, and further, obtain a recognition result through feature comparison or feature analysis, that is, the above recognition process An exemplary expression is that the processor performs feature extraction processing on a standard image based on a preset neural network model to obtain feature information of the standard image; and performs image recognition processing on the standard image based on the feature information of the standard image to obtain a recognition result. For example, in a face recognition scene, after obtaining a standard image, the processor needs to extract the facial feature information of the task in the image based on a preset neural network model. Further, the extracted facial feature information and The pre-selected stored task facial feature information is matched to determine the identity of the person in the image. Of course, the explanation is only based on the face recognition scene as an example, and is not the only limitation on this application.

Further, in order to meet the requirements of remote monitoring, after the processor obtains the processing result in this embodiment, the processor may also send the recognition result to the remote terminal device through the first Ethernet port, thereby remotely monitoring the recognition result.

The beneficial effects of this embodiment are similar to the foregoing embodiments, and are not repeated here.

An embodiment of the present application further provides a computer-readable storage medium storing computer-executable instructions, where the computer-executable instructions are configured to execute the method performed by the foregoing embodiments.

An embodiment of the present application further provides a computer program product. The computer program product includes a computer program stored on a computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, The computer executes the method performed by the above embodiment.

The computer-readable storage medium described above may be a transitory computer-readable storage medium or a non-transitory computer-readable storage medium.

An embodiment of the present application further provides an electronic device, whose structure is shown in FIG. 9. The electronic device includes:

At least one processor 100, and one processor 100 is taken as an example in FIG. 10; and the memory 101 may further include a communication interface 102 and a bus 103. Among them, the processor 100, the communication interface 102, and the memory 101 can complete communication with each other through the bus 103. The communication interface 102 may be used for information transmission. The processor 100 may call a logic instruction in the memory 101 to execute the method performed by the foregoing embodiment.

In addition, the logic instructions in the memory 101 can be implemented in the form of software functional units and sold or used as an independent product, and can be stored in a computer-readable storage medium.

The memory 101 is a computer-readable storage medium and can be used to store software programs and computer-executable programs, such as program instructions / modules corresponding to the methods in the embodiments of the present application. The processor 100 executes functional applications and data processing by running software programs, instructions, and modules stored in the memory 101, that is, implementing the image recognition method in the foregoing method embodiment.

The memory 101 may include a storage program area and a storage data area, where the storage program area may store an operating system and application programs required for at least one function; the storage data area may store data created according to the use of the terminal device, and the like. In addition, the memory 101 may include a high-speed random access memory, and may further include a non-volatile memory.

The technical solution in the embodiment of the present application may be embodied in the form of a software product. The computer software product is stored in a storage medium and includes one or more instructions for making a computer device (which may be a personal computer, a server, or a network). Equipment, etc.) perform all or part of the steps of the method described in the embodiments of the present application. The foregoing storage medium may be a non-transitory storage medium, including: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk, etc. A medium that can store program code, or a transient storage medium.

When used in this application, although the terms "first", "second", etc. may be used in this application to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without changing the meaning of the description, the first element may be called the second element, and likewise, the second element may be called the first element, as long as all occurrences of the "first element" are renamed consistently and all occurrences of The "second component" can be renamed consistently. The first element and the second element are both elements, but may not be the same element.

The words used in this application are used to describe embodiments only and not to limit the claims. As used in the description of the embodiments and claims, the singular forms "a" (a), "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise . Similarly, the term "and / or" as used in this application means including any and all possible combinations of one or more associated listings. In addition, the terms "comprise" and variations thereof "comprises" and / or "comprising" when used in this application refer to stated features, wholes, steps, operations, elements, and / or The presence of a component does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or groups of these.

The aspects, implementations, implementations or features in the described embodiments can be used individually or in any combination. Various aspects in the described embodiments may be implemented by software, hardware, or a combination of software and hardware. The described embodiments may also be embodied by a computer-readable medium storing computer-readable code, the computer-readable code including instructions executable by at least one computing device. The computer-readable medium can be associated with any data storage device capable of storing data, which can be read by a computer system. Computer-readable media for example may include read-only memory, random-access memory, CD-ROM, HDD, DVD, magnetic tape, and optical data storage devices. The computer-readable medium may also be distributed among computer systems connected through a network, so that the computer-readable code can be stored and executed in a distributed manner.

The above technical description can be referred to the accompanying drawings, which form a part of the present application, and show in the drawings an implementation according to the described embodiments. Although the embodiments are described in sufficient detail to enable those skilled in the art to implement the embodiments, the embodiments are non-limiting; thus, other embodiments can be used without departing from the scope of the described embodiments. Situations can also make changes. For example, the sequence of operations described in the flowchart is non-limiting, so the sequence of two or more operations explained in the flowchart and described according to the flowchart can be changed according to several embodiments. As another example, in several embodiments, one or more operations explained in the flowchart and described in accordance with the flowchart are optional or deleteable. In addition, certain steps or functions may be added to the disclosed embodiments, or two or more steps may be sequentially replaced. All of these variations are considered to be included in the disclosed embodiments and the claims.

In addition, terminology is used in the foregoing technical description to provide a thorough understanding of the described embodiments. However, too detailed details are not required to implement the described embodiments. Therefore, the foregoing description of the embodiments has been presented for the purposes of illustration and description. The embodiments presented in the above description and the examples disclosed based on these embodiments are provided separately to add context and help to understand the described embodiments. The above description is not intended to be exhaustive or to limit the described embodiments to the precise form of this application. Based on the above teachings, several modifications, alternatives, and variations are possible. In some cases, well-known process steps have not been described in detail to avoid unnecessarily affecting the described embodiments.

Claims

A box device for image recognition is characterized in that it includes:

A housing, which is provided with a first Ethernet port, a processor for neural network operations, and a high-speed memory, wherein the processor includes an Ethernet data receiving circuit;

The high-speed memory is connected to the processor and is used to store data of the processor, the first Ethernet port is connected to an Ethernet data receiving circuit in the processor, and the first Ethernet The port directly transmits the image acquired by the image acquisition device to the processor for image recognition processing through the Ethernet data receiving circuit.
The box device according to claim 1, wherein a card is provided in the box device;

The first Ethernet port, the processor, and the high-speed memory are disposed on the board card.
The box device according to claim 1, wherein the processor comprises a tensor calculation processor.
The box device according to claim 1, wherein the first Ethernet port is further configured to send an image recognition result of the processor to the terminal device.
The box device according to claim 1, wherein the high-speed memory includes DDR.
The box device according to claim 5, wherein the box device further comprises a micro control unit (MCU), and the MCU is connected to the processor;

The MCU is configured to control the processor to be turned on or off.
The box device according to claim 6, wherein the box device further comprises a heat sink, and the heat sink is connected to the MCU;

The MCU is further configured to obtain temperature information of the processor, and control a rotation speed of a fan of the radiator based on the temperature information.
The box device according to claim 7, wherein the box device further comprises a low-dropout linear regulator (LDO) circuit and a direct current-to-direct current (DC-DC) circuit;

The power input of the box device is supplied to the MCU after step-down processing of the LDO circuit;

After the power input of the box device is subjected to the step-down processing of the DC-DC circuit, power is supplied to other devices in the box device.
The box device according to claim 8, wherein the DC-DC circuit comprises an LC filter constructed by a capacitor having a capacity greater than a preset threshold and an antimagnetic bead having an impedance value greater than a preset impedance value, so that The DC-DC circuit can provide a stable voltage to the devices in the box device.
An image recognition system, comprising: one or more image acquisition devices, a router, and the box device according to any one of claims 1-9;

Wherein, the one or more image acquisition devices transmit the acquired images to the router, and the router transmits the received images to the box device, so that the box device can The image is subjected to image recognition processing.
An image recognition method, which is characterized in that the method is applicable to a box device, the box device includes: a casing, a first Ethernet port is provided in the casing, and a processor for neural network operations And a high-speed memory; wherein the processor includes an Ethernet data receiving circuit, the high-speed memory is connected to the processor and is used to store data of the processor, and the first Ethernet port is connected to the processor Ethernet data receiving circuit connection in the method, the method includes:

The first Ethernet port acquires an image acquired by an image acquisition device, and sends the image to an Ethernet data receiving circuit in the processor to transmit the image to the Ethernet through the Ethernet data receiving circuit. processor;

The processor performs image recognition processing on the received image based on a preset neural network model to obtain a recognition result.
The method according to claim 11, wherein the processor performs image recognition processing on the received image based on a preset neural network model, and obtains a recognition result, comprising:

The processor performs a decoding process on the received image, and performs a preset image preprocessing operation on the image obtained after the decoding process to obtain a standard image;

The processor performs image recognition processing on the standard image based on a preset neural network model to obtain a recognition result.
The method according to claim 12, wherein the processor performs image recognition processing on the standard image based on a preset neural network model, and obtains a recognition result, comprising:

Performing, by the processor, feature extraction processing on the standard image based on a preset neural network model to obtain feature information of the standard image;

Image recognition processing is performed on the standard image based on the feature information of the standard image to obtain a recognition result.
The method according to any one of claims 11-13, wherein the method further comprises:

After obtaining the recognition result, the processor sends the recognition result to the first Ethernet port, so that the first Ethernet port sends the recognition result to a remote terminal device.
A computer-readable storage medium, characterized in that computer-executable instructions are stored, and the computer-executable instructions are configured to execute the method according to any one of claims 11-14.