WO2020055595A1 - Système de conception assistée par ordinateur pour la représentation basée sur un programme de structures en treillis - Google Patents

Système de conception assistée par ordinateur pour la représentation basée sur un programme de structures en treillis Download PDF

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Publication number
WO2020055595A1
WO2020055595A1 PCT/US2019/048696 US2019048696W WO2020055595A1 WO 2020055595 A1 WO2020055595 A1 WO 2020055595A1 US 2019048696 W US2019048696 W US 2019048696W WO 2020055595 A1 WO2020055595 A1 WO 2020055595A1
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Prior art keywords
query
lattice structure
virtual lattice
program
design
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PCT/US2019/048696
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English (en)
Inventor
Pranav Srinivas KUMAR
Reed Williams
Suraj Ravi MUSUVATHY
Mark R. BURHOP
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Siemens Corporation
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Publication of WO2020055595A1 publication Critical patent/WO2020055595A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/17—Mechanical parametric or variational design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2113/00—Details relating to the application field
    • G06F2113/10—Additive manufacturing, e.g. 3D printing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/18—Manufacturability analysis or optimisation for manufacturability
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Definitions

  • This application relates to computer aided design. More particularly, this application relates to designing complex lattice structures using program-based representations.
  • CAD Computer aided design
  • B-Reps boundary representations
  • B-Reps provide geometrically accurate data for representing all types of products (e.g. automobiles, airplanes, blenders, furniture).
  • highly complex geometry such as lattices, woven materials, or cellular materials have great demands on memory and computer processing resources to be represented using B-Reps by the enormous computer file sizes produced. Consequently, practical design applications have become infeasible.
  • faceted models polygonal meshes
  • STL file format is commonly used as a descriptive representation of the surface geometry of a three-dimensional object to be fabricated by additive manufacturing.
  • Faceted models are a particular type of discretized B-Rep, however, they are not a solution to the data size problem. While increasingly more advanced computer hardware helps to address this problem, a fundamental change in how geometry for complex three-dimensional objects is modeled by CAD systems is needed.
  • Methods and systems are disclosed for a computer aided design system that creates and analyzes a program-based representation of a complex lattice structure using a modeling engine, a synthesis engine and an analysis engine.
  • the modeling engine generates an original construct program that defines a lattice structure as a set of descriptive codes including an initial kernel, a starting point in space, and a series of transformations for a repetitive reproduction of the initial kernel into a virtual lattice structure.
  • the modeling engine edits a construct program via a three-dimensional graphical user interface and hypertext editor.
  • the synthesis engine performs design space exploration to generate an optimized design by optimization of the initial design via query programs using various analysis algorithms that interrogate the model.
  • the optimized design is sent back to the modeling engine for a next iteration of editing and analysis.
  • the analysis engine executes one or more analytic query programs that analyze the virtual lattice structure without a full geometric representation of the entire lattice structure being instantiated.
  • FIG. 1 shows a flowchart diagram for an example of a computer aided design system according to embodiments of this disclosure
  • FIG. 2 shows an example of an interface scheme for the CAD system programs according to embodiments of this disclosure
  • FIG. 3 shows a diagram that illustrates relative resource usage by explicit analysis compared to the program-based modeling according to embodiments of this disclosure
  • FIGs. 4 and 5 show examples of a user interface for the construct program and rendered visualization of a virtual lattice design model according to embodiments of this disclosure
  • FIG. 6 shows an example of a computing environment within which embodiments of this disclosure may be implemented.
  • Methods and systems are disclosed for a computer aided design system that uses construct programs for optimized modeling and analysis of complex lattice structures in place of full-scale geometric construction and analysis, which allows significant savings in computing resource consumption.
  • the system exposes lattice and kernel types and a transformation function to a user-friendly server at a user interface to enable simple program construction written in a high-level language (HLL) (e.g., Python) to design a virtual lattice kernel with morph instructions to construct a virtual lattice structure.
  • HLL high-level language
  • Virtual lattice design can be further advanced using design space exploration by a synthesis engine, which can optimize an initial design by iterations of analyses and model revisions via automated queries and responses with an analysis engine and a modeling engine.
  • the types of analyses can include geometric (e.g., whether a point X is on the lattice structure), material, visualization, mass properties, multi-physics, and manufacturability.
  • the iterative process finds progressively fitter candidates for kernels and morphs (i.e. , kernels which provide successively better target property approximations) until a virtual lattice with desired properties is successfully modeled.
  • kernels and morphs i.e. , kernels which provide successively better target property approximations
  • FIG. 1 shows a flowchart diagram for an example of a computer aided design system according to embodiments of this disclosure.
  • CAD system 100 includes a modeling engine 1 10, a synthesis engine 120 and analysis engine 130.
  • the design of a model lattice structure may be achieved by an iterative loop formed by constructing a modeled design 1 15 by modeling engine 1 10, sending the modeled design 1 15 to synthesis engine 120, which may send one or more queries 128 to analysis engine 130.
  • the synthesis engine 120 may modify one or more parameters of the modeled design 1 15, forming an optimized design 125 (or several candidates of an optimized design) for modeling engine 1 10 to reconstruct a next iteration of the design for the model lattice.
  • a current model lattice structure constructed by modeling engine 1 10 may be edited by modeling engine 1 10 in response to a direct query to analysis engine 130 and receiving the analysis results.
  • the modeling engine 1 10 includes an SoS program constructor module 1 1 1 and an SoS program editor module 1 12.
  • the constructor module 1 1 1 may implement instructions in a high level language (HLL) (e.g. , Python) to create a construct program having instructions for constructing a lattice kernel according to node spatial definitions, connections, and one or more morph operations.
  • HLL high level language
  • Node spatial definitions may include spatial coordinates for kernel nodes and connections between nodes.
  • Each morph operation may be defined in different dimensions for potentially translating a single kernel into a cluster of kernels to form a lattice structure, where each translation may include scaling and/or rotating, growing the lattice with each addition of a translated kernel connected to a previous kernel.
  • the construct program represents the lattice structure implicitly by the kernel definition and expressions of morph operations.
  • the modeling engine 1 10 does not instantiate a full geometric representation of the model lattice structure unless queried to do so, which allows the CAD system to conserve computer resources.
  • the SoS program editor module 1 12 allows a designer to perform edits to an existing model of a lattice structure, stored as a construct program, using a 3D GUI and hypertext editor. After the modeling iterations are completed and a final design is achieved, the fabrication interface 113 allows queries to monitor, evaluate and control the fabrication process for the additive manufacturing of the modeled lattice structure.
  • the synthesis engine 120 includes an optimization module 121 for generating one or more optimized designs 125 for the model lattice structure following one or more query results related to a modeled design 1 15.
  • the optimization module 121 may perform a design space exploration (DSE) of the modeled lattice.
  • DSE is an activity performed to systematically analyze several design points on the lattice representation and then select one or more optimized design(s) based on parameters of interest and design requirements, which may be established through a set of query programs of analysis engine 130.
  • a designer may use a graphical user interface to select from a set of predefined set of query programs for the purpose of optimizing an initial modeled design 1 15 using multiple parameters.
  • the optimization module 121 is configured to receive a modeled design 1 15 and to generate one or more queries useful for optimizing the modeled design in response to user input.
  • Each query 128 is sent to the analysis engine 130, which stores the query programs. Because the model is an abstract program-based representation, the optimization process is compact (e.g. , the optimized design may involve changing a single value in the construct program as opposed to 50 or so parameters that would be revised using conventional full-scale geometry-based CAD analysis).
  • the optimization module 121 receives query results 129, and in response, may vary design parameters and evaluate metrics used in computing an objective function of an optimization problem.
  • a query 128 and result 129 exchange between synthesis engine 120 may include the following.
  • a query 128 may initially be a statement such as “what is your volume?” for a lattice.
  • the query may originate from a user via a GUI device, and may be translated by optimization module 121 using textual recognition to trigger a volume function within a library, which may trigger a query 128 message that includes a targeted query program in analysis engine 130.
  • the result 129 from the query program may be a value, such as“319.71 cubic centimeters”.
  • the optimization module 121 may include volume as a part of some objective function and may use the result 129 value in computing the current value of the objective function, which is the function being minimized as part of the optimization procedure.
  • the optimization module 121 may determine that the radius of one or more particular nodes in the kernel of the lattice should be reduced and that one or more particular connections within the kernel nodes should be removed to optimize the kernel. These changes may cause the next volume query 128 to return a result value 129 that moves the value of the objective function closer to a minimum and therefore produces a better result.
  • the modified program code for the optimized design 125 structure is the output of the synthesis engine 120 and can be modeled in the modeling engine 1 10 to render the structure itself.
  • the analysis engine 130 includes various query programs that interrogate the model of the lattice structure using a translation of the construct program representation.
  • each query program implements efficient algorithms including lazy evaluation, local variable evaluation, parallelization, or a combination of these to reduce computational cost. Processing by a graphical processing unit may be also be implemented for enhanced processing of the query programs.
  • the query programs may be written in a lower level language (e.g., C, C++) for additional computational efficiency, and may include interfaces for interpreting the HLL construct programs.
  • a query program of the analysis engine 130 queries the modeling module 110 using an interrogation 1 17 to access the design loaded in memory.
  • the analysis engine 130 may operate only on the internal representation of the design, without having to read the design construct program itself.
  • the analysis engine 130 may execute one or more of the query programs that analyze the virtual lattice structure in response to a received query 1 18 from the modeling engine or query 128 from the synthesis engine without a full geometric representation of the entire lattice structure being instantiated.
  • the analysis engine 130 may include various query programs, such as geometric module 131 , material module 132, visualization module 133, mass properties module 134, multi-physics module 135, and manufacturability module 136.
  • the query programs may be triggered according to a lazy evaluation algorithm, responsive to query 118 received from the modeling engine 1 10 or query 128 received from the synthesis engine 120.
  • Query program analysis results are returned to the modeling engine 1 10 via result 1 19 in response to query 1 18, and to the synthesis engine via result 129 in response to query 128.
  • the analysis modules shown in FIG. 1 are included as examples of useful queries about a lattice model. Additional query modules may be added to the analysis engine 130 by a designer, such as custom query program 138, for other specific analysis necessary for optimizing the lattice design.
  • a custom query program may be developed using the same HLL as used for the construct program.
  • the geometric module 131 may be configured to answer a query about a single point within external boundaries of the virtual lattice structure.
  • the result of the single point query can include whether a single point X is on the lattice structure, or instead located in a void space inside the lattice structure boundary, or external to the lattice structure boundary.
  • the geometric module 131 may analyze the distance between the single point and one of the external boundaries of the lattice structure.
  • the material module 132 includes algorithms that solve queries about material distribution throughout the virtual lattice structure.
  • a material- related query may be:“What is the electrical conductivity between point X and point Y based on the material(s) of which the lattice instances between those points are made?”
  • the visualization module 133 is configured to render a portion of the virtual lattice structure using a rendering engine in response to a query via user request for a visualization of the lattice model.
  • the mass property module 134 is configured to solve a query about integral properties of the virtual lattice structure (i.e. , properties that require numerical integration computation, such as volume or center of mass). For example, in response to a query for optimizing the lattice to strive for the lightest possible weight for the fabricated lattice structure, the mass property module 134 analyzes the model kernel and lattice to determine where thinning of elements is possible or where density of connections can be decreased for reducing the weight. The mass property optimization can also be constrained by other factors, such as achieving minimal weight while meeting minimum requirements for structure strength or other properties.
  • a mass property query program may, for example, solve for the center point of gravity in the virtual lattice.
  • the multi-physics module 135 is configured to solve a query about predicting test results for simulation of one or more physical tests of the virtual lattice structure, such as simulating forces on one or more stress points for estimating physical responses and estimated measurements of various material properties (e.g., stiffness, tensile strength, and the like).
  • the manufacturability module 136 includes algorithms that solve queries about whether the current design is manufacturable for a given set of fabrication constraints. For example, given a fabrication limit for resolution of a 3D printer (i.e. , minimum thickness of a fabricated lattice beam), the manufacturability module 136 analyzes the geometry of the model lattice, without instantiating the entire lattice, and returns a result that indicates which areas of the lattice (e.g., by morph sequence) have features that are smaller than the resolution limit. Such features prevent the lattice fabrication to be entirely manufacturable by the 3D printer in question. Where problem areas are identified candidate solutions may be presented by module 136, such as one or more refinements to the model kernel or lattice, which could be ranked according to certain parameters (e.g., cost, weight, etc.).
  • the fabrication module 137 includes algorithms that setup, monitor, evaluate and control the fabrication of the virtual lattice structure in conjunction with the fabrication interface 1 13.
  • queries 1 18 from modeling engine 1 10 may be useful for a designer to quickly inquire whether a current design satisfies any number of requirements, such as: total mass, total volume, intersection with some mesh describing another part or model, or lack of intersection with some mesh.
  • a query 1 18 may include a request for normalized density of the modeled structure where, given the structure of a defined kernel and morphs over a particular number of morph instances, (i.e., what is the total volume of lattice as a percent of the total convex bounded volume of space occupied by the lattice?), which is useful to determine whether the design can float in water.
  • FIG. 2 shows an example of an interface scheme for the CAD system programs according to embodiments of this disclosure.
  • a geometry core program 210 is coded in a lower level language (e.g., C, C++) with interface 221 to interpret the HLL (e.g., Python) construct programs.
  • the HLL can be extended by a developer who is capable of programming in the lower level language.
  • the core library becomes an extension module that can be directly imported in the HLL. This provides advantages such as implementing new built-in object types and using core library functions and system calls. Domain classes for the core 210 (e.g., Lattice, Morph etc.) are exposed to the HLL using interface 222.
  • the interface 222 may work with a Boost Python library.
  • Boost Python Python
  • a CAD engineer can write construct programs with the HLL and import Geometry classes and algorithms like any other HLL module.
  • Complex lattice structures can be constructed with loops, conditional statements, and libraries (e.g. , numpy). This provides a powerful rapid-prototyping modeling interface for engineers and enables a very concise representation for the virtual lattice.
  • the HLL may be embedded in the core program 210.
  • Embedding is similar to the extension described above, but with one key difference.
  • the core program is still the interpreter. But when embedding, the core program may have nothing to do with HLL. Instead, some parts of the application occasionally call the HLL interpreter to run some HLL code.
  • Embedding HLL in the core program enables us to read HLL-based construct programs and reconstruct the lattice object in the lower level language. For example, extracting a C++ lattice object from its HLL counterpart is similarly done using interface 221 (e.g., including a Boost Python library). The core geometry lattice object is then used for triangulation, rendering and advanced queries.
  • a CAD engineer can use the GUI 250 to program the lattice structure in HLL and visualize the lattice using a rendering engine 231 based in the lower level language (e.g., C++) for better efficiency, all within the same tool.
  • FIG. 3 shows a diagram that illustrates relative resource usage by explicit analysis compared to the program-based modeling according to embodiments of this disclosure.
  • Conventional CAD geometries 312 consist of B-Reps and point-by-point coordinates of object elements. Such representations of complex three-dimensional objects are very resource hungry, particularly when design analysis is to be performed on the representation. Analysis of lattices modeled by conventional CAD tools (e.g., STL file format typically of file size greater than 1 GB) could take several minutes to several hours. In contrast, analysis processing of the program-based model representations described in this disclosure can be completed instantly.
  • conventional CAD tools e.g., STL file format typically of file size greater than 1 GB
  • any analysis queries 310 (e.g., what is the volume or weight of a long lattice structure, or a modification to make a particular element thicker) will consume a large portion of the CAD system processing and memory resources and capacity due to the large file size (e.g., STL file format) to be analyzed.
  • the analysis operation may crash the CAD system application.
  • the construct programs 31 1 such as ones previously described in reference to the modeling engine 1 10, minimize instantiation of the three-dimensional object to a portion of interest.
  • the construct program representation can identify a portion of the model lattice by a particular morph sequence or set of sequences of the lattice construction. Consequently, computer processing and memory resource utilization is significantly reduced.
  • FIGs. 4 and 5 show examples of a user interface for the construct program and rendered visualization of a virtual lattice design model according to embodiments of this disclosure.
  • an example of an HLL construct program 410 is shown for defining a design model for a lattice kernel and a lattice structure.
  • the rendered visualization 400 illustrates an example of a screenshot for GUI 250, which includes the rendered kernel 401 and lattice structure 402.
  • the lattice kernel definition 41 1 in construct program 410 includes space coordinates for node points 11 1 -118 and each of the node connections.
  • morph definitions 412 are defined as nested translations, rotations and mutations for connecting each generated kernel to the next generated kernel in succession.
  • the model lattice structure definition 413 is defined according to the lattice kernel definition 411 and the morph definitions 412.
  • FIG. 5 shows an example of a construct program 510 for modeling a complex woven ring lattice in which the rings can move freely as linked chains (i.e. , the rings do not intersect).
  • the HLL construct program 510 defines a design model for a lattice kernel comprising two interlaced rings that do not intersect and a corresponding lattice structure.
  • a similar lattice kernel is comprised of three or more interlaced rings.
  • the rendered visualization 500 illustrates an example of a screenshot for the GUI 250, which includes the rendered kernel 501 and lattice structure 502.
  • the lattice kernel definition 51 1 in construct program 510 includes space coordinates for node points n and tilt angles for the kernel rings, and each of the node connections.
  • morph definitions 512 are defined as nested translations, rotations and mutations for connecting each generated kernel to the next generated kernel in succession.
  • the model lattice structure definition 513 is defined according to the lattice kernel definition 51 1 and the morph definitions 512.
  • the CAD system 100 utilizes construct programs to define and represent ultra-complex lattice SoS.
  • the structures can be visualized, measured, simulated, optimized and manufactured with a collection of query programs.
  • FIG. 6 illustrates an example of a computing environment within which embodiments of the present disclosure may be implemented.
  • a computing environment 600 includes a computer system 610 that may include a communication mechanism such as a system bus 621 or other communication mechanism for communicating information within the computer system 610.
  • the computer system 610 further includes one or more processors 620 coupled with the system bus 621 for processing the information.
  • computing environment 600 corresponds to a CAD system, in which the computer system 610 relates to a computer described below in greater detail.
  • the processors 620 may include one or more central processing units (CPUs), graphical processing units (GPUs), or any other processor known in the art. More generally, a processor as described herein is a device for executing machine- readable instructions stored on a computer readable medium, for performing tasks and may comprise any one or combination of, hardware and firmware. A processor may also comprise memory storing machine-readable instructions executable for performing tasks. A processor acts upon information by manipulating, analyzing, modifying, converting or transmitting information for use by an executable procedure or an information device, and/or by routing the information to an output device.
  • CPUs central processing units
  • GPUs graphical processing units
  • a processor may use or comprise the capabilities of a computer, controller or microprocessor, for example, and be conditioned using executable instructions to perform special purpose functions not performed by a general purpose computer.
  • a processor may include any type of suitable processing unit including, but not limited to, a central processing unit, a microprocessor, a Reduced Instruction Set Computer (RISC) microprocessor, a Complex Instruction Set Computer (CISC) microprocessor, a microcontroller, an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), a System-on-a-Chip (SoC), a digital signal processor (DSP), and so forth.
  • RISC Reduced Instruction Set Computer
  • CISC Complex Instruction Set Computer
  • ASIC Application Specific Integrated Circuit
  • FPGA Field-Programmable Gate Array
  • SoC System-on-a-Chip
  • DSP digital signal processor
  • processor(s) 620 may have any suitable microarchitecture design that includes any number of constituent components such as, for example, registers, multiplexers, arithmetic logic units, cache controllers for controlling read/write operations to cache memory, branch predictors, or the like.
  • the microarchitecture design of the processor may be capable of supporting any of a variety of instruction sets.
  • a processor may be coupled (electrically and/or as comprising executable components) with any other processor enabling interaction and/or communication there-between.
  • a user interface processor or generator is a known element comprising electronic circuitry or software or a combination of both for generating display images or portions thereof.
  • a user interface comprises one or more display images enabling user interaction with a processor or other device.
  • the system bus 621 may include at least one of a system bus, a memory bus, an address bus, or a message bus, and may permit exchange of information (e.g., data (including computer-executable code), signaling, etc.) between various components of the computer system 610.
  • the system bus 621 may include, without limitation, a memory bus or a memory controller, a peripheral bus, an accelerated graphics port, and so forth.
  • the system bus 621 may be associated with any suitable bus architecture including, without limitation, an Industry Standard Architecture (ISA), a Micro Channel Architecture (MCA), an Enhanced ISA (EISA), a Video Electronics Standards Association (VESA) architecture, an Accelerated Graphics Port (AGP) architecture, a Peripheral Component Interconnects (PCI) architecture, a PCI-Express architecture, a Personal Computer Memory Card International Association (PCMCIA) architecture, a Universal Serial Bus (USB) architecture, and so forth.
  • ISA Industry Standard Architecture
  • MCA Micro Channel Architecture
  • EISA Enhanced ISA
  • VESA Video Electronics Standards Association
  • AGP Accelerated Graphics Port
  • PCI Peripheral Component Interconnects
  • PCMCIA Personal Computer Memory Card International Association
  • USB Universal Serial Bus
  • the computer system 610 may also include a system memory 630 coupled to the system bus 621 for storing information and instructions to be executed by processors 620.
  • the system memory 630 may include computer readable storage media in the form of volatile and/or nonvolatile memory, such as read only memory (ROM) 631 and/or random access memory (RAM) 632.
  • the RAM 632 may include other dynamic storage device(s) (e.g., dynamic RAM, static RAM, and synchronous DRAM).
  • the ROM 631 may include other static storage device(s) (e.g. , programmable ROM, erasable PROM, and electrically erasable PROM).
  • system memory 630 may be used for storing temporary variables or other intermediate information during the execution of instructions by the processors 620.
  • a basic input/output system 633 (BIOS) containing the basic routines that help to transfer information between elements within computer system 610, such as during start-up, may be stored in the ROM 631 .
  • RAM 632 may contain data and/or program modules that are immediately accessible to and/or presently being operated on by the processors 620.
  • System memory 630 may additionally include, for example, operating system 634, application modules 635, and other program modules 636.
  • Application modules 635 may include aforementioned modules described for FIG. 1 and may also include a user portal for development of the application program, allowing input parameters to be entered and modified as necessary.
  • the operating system 634 may be loaded into the memory 630 and may provide an interface between other application software executing on the computer system 610 and hardware resources of the computer system 610. More specifically, the operating system 634 may include a set of computer-executable instructions for managing hardware resources of the computer system 610 and for providing common services to other application programs (e.g., managing memory allocation among various application programs). In certain example embodiments, the operating system 634 may control execution of one or more of the program modules depicted as being stored in the data storage 640.
  • the operating system 634 may include any operating system now known or which may be developed in the future including, but not limited to, any server operating system, any mainframe operating system, or any other proprietary or non-proprietary operating system.
  • the computer system 610 may also include a disk/media controller 643 coupled to the system bus 621 to control one or more storage devices for storing information and instructions, such as a magnetic hard disk 641 and/or a removable media drive 642 (e.g., floppy disk drive, compact disc drive, tape drive, flash drive, and/or solid state drive).
  • Storage devices 640 may be added to the computer system 610 using an appropriate device interface (e.g., a small computer system interface (SCSI), integrated device electronics (IDE), Universal Serial Bus (USB), or FireWire).
  • Storage devices 641 , 642 may be external to the computer system 610.
  • the computer system 610 may include a user input interface or graphical user interface (GUI) 661 , which may comprise one or more input devices, such as a keyboard, touchscreen, tablet and/or a pointing device, for interacting with a computer user and providing information to the processors 620.
  • GUI graphical user interface
  • the computer system 610 may perform a portion or all of the processing steps of embodiments of the invention in response to the processors 620 executing one or more sequences of one or more instructions contained in a memory, such as the system memory 630. Such instructions may be read into the system memory 630 from another computer readable medium of storage 640, such as the magnetic hard disk 641 or the removable media drive 642.
  • the magnetic hard disk 641 and/or removable media drive 642 may contain one or more data stores and data files used by embodiments of the present disclosure.
  • the data store 640 may include, but are not limited to, databases (e.g., relational, object-oriented, etc.), file systems, flat files, distributed data stores in which data is stored on more than one node of a computer network, peer-to-peer network data stores, or the like. Data store contents and data files may be encrypted to improve security.
  • the processors 620 may also be employed in a multi-processing arrangement to execute the one or more sequences of instructions contained in system memory 630.
  • hard-wired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.
  • the computer system 610 may include at least one computer readable medium or memory for holding instructions programmed according to embodiments of the invention and for containing data structures, tables, records, or other data described herein.
  • the term“computer readable medium” as used herein refers to any medium that participates in providing instructions to the processors 620 for execution.
  • a computer readable medium may take many forms including, but not limited to, non-transitory, non-volatile media, volatile media, and transmission media.
  • Non-limiting examples of non-volatile media include optical disks, solid state drives, magnetic disks, and magneto-optical disks, such as magnetic hard disk 641 or removable media drive 642.
  • Non-limiting examples of volatile media include dynamic memory, such as system memory 630.
  • Non-limiting examples of transmission media include coaxial cables, copper wire, and fiber optics, including the wires that make up the system bus 621.
  • Transmission media may also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications.
  • Computer readable medium instructions for carrying out operations of the present disclosure may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages.
  • the computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server.
  • the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
  • electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.
  • the computing environment 600 may further include the computer system 610 operating in a networked environment using logical connections to one or more remote computers, such as remote computing device 680.
  • the network interface 670 may enable communication, for example, with other remote devices 680 or systems and/or the storage devices 641 , 642 via the network 671.
  • Remote computing device 680 may be a personal computer (laptop or desktop), a mobile device, a server, a router, a network PC, a peer device or other common network node, and typically includes many or all of the elements described above relative to computer system 610.
  • computer system 610 may include modem 672 for establishing communications over a network 671 , such as the Internet. Modem 672 may be connected to system bus 621 via user network interface 670, or via another appropriate mechanism.
  • Network 671 may be any network or system generally known in the art, including the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), a direct connection or series of connections, a cellular telephone network, or any other network or medium capable of facilitating communication between computer system 610 and other computers (e.g., remote computing device 680).
  • the network 671 may be wired, wireless or a combination thereof. Wired connections may be implemented using Ethernet, Universal Serial Bus (USB), RJ-6, or any other wired connection generally known in the art.
  • Wireless connections may be implemented using Wi-Fi, WiMAX, and Bluetooth, infrared, cellular networks, satellite or any other wireless connection methodology generally known in the art. Additionally, several networks may work alone or in communication with each other to facilitate communication in the network 671.
  • program modules, applications, computer- executable instructions, code, or the like depicted in FIG. 6 as being stored in the system memory 630 are merely illustrative and not exhaustive and that processing described as being supported by any particular module may alternatively be distributed across multiple modules or performed by a different module.
  • various program module(s), script(s), plug-in(s), Application Programming Interface(s) (API(s)), or any other suitable computer-executable code hosted locally on the computer system 610, the remote device 680, and/or hosted on other computing device(s) accessible via one or more of the network(s) 671 may be provided to support functionality provided by the program modules, applications, or computer-executable code depicted in FIG.
  • functionality may be modularized differently such that processing described as being supported collectively by the collection of program modules depicted in FIG. 6 may be performed by a fewer or greater number of modules, or functionality described as being supported by any particular module may be supported, at least in part, by another module.
  • program modules that support the functionality described herein may form part of one or more applications executable across any number of systems or devices in accordance with any suitable computing model such as, for example, a client-server model, a peer- to-peer model, and so forth.
  • any of the functionality described as being supported by any of the program modules depicted in FIG. 6 may be implemented, at least partially, in hardware and/or firmware across any number of devices.
  • the computer system 610 may include alternate and/or additional hardware, software, or firmware components beyond those described or depicted without departing from the scope of the disclosure. More particularly, it should be appreciated that software, firmware, or hardware components depicted as forming part of the computer system 610 are merely illustrative and that some components may not be present or additional components may be provided in various embodiments. While various illustrative program modules have been depicted and described as software modules stored in system memory 630, it should be appreciated that functionality described as being supported by the program modules may be enabled by any combination of hardware, software, and/or firmware. It should further be appreciated that each of the above-mentioned modules may, in various embodiments, represent a logical partitioning of supported functionality.
  • This logical partitioning is depicted for ease of explanation of the functionality and may not be representative of the structure of software, hardware, and/or firmware for implementing the functionality. Accordingly, it should be appreciated that functionality described as being provided by a particular module may, in various embodiments, be provided at least in part by one or more other modules. Further, one or more depicted modules may not be present in certain embodiments, while in other embodiments, additional modules not depicted may be present and may support at least a portion of the described functionality and/or additional functionality. Moreover, while certain modules may be depicted and described as sub-modules of another module, in certain embodiments, such modules may be provided as independent modules or as sub-modules of other modules.
  • any operation, element, component, data, or the like described herein as being based on another operation, element, component, data, or the like can be additionally based on one or more other operations, elements, components, data, or the like. Accordingly, the phrase“based on,” or variants thereof, should be interpreted as“based at least in part on.”
  • each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s).
  • the functions noted in the block may occur out of the order noted in the Figures.
  • two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

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Abstract

L'invention concerne des procédés et des systèmes, destinés à un système de conception assistée par ordinateur qui crée et analyse une représentation basée sur un programme d'une structure en treillis complexe utilisant un moteur de modélisation, un moteur de synthèse et un moteur d'analyse. Le moteur de modélisation génère un programme de construction qui définit une structure en treillis comme un ensemble de codes descriptifs comprenant un noyau initial, un point de départ dans l'espace, et une série de transformations pour une reproduction répétitive du noyau initial dans une structure en treillis virtuel. Le moteur de modélisation édite un programme de construction par l'intermédiaire d'une interface utilisateur graphique tridimensionnelle et d'un éditeur d'hypertexte. Le moteur de synthèse effectue une exploration d'espace de conception pour générer une conception optimisée en optimisant la conception initiale, par l'intermédiaire de requêtes d'évaluation paresseuse par rapport à divers algorithmes d'analyse, et envoie la conception optimisée au moteur de modélisation pour une itération suivante d'édition.
PCT/US2019/048696 2018-09-10 2019-08-29 Système de conception assistée par ordinateur pour la représentation basée sur un programme de structures en treillis WO2020055595A1 (fr)

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CN112926241A (zh) * 2021-02-02 2021-06-08 重庆交通大学绿色航空技术研究院 构造轻量化晶格结构单元的方法
US20210216683A1 (en) * 2020-01-03 2021-07-15 The Research Foundation For The State University Of New York Periodic Cellular Structure Based Design for Additive Manufacturing Approach for Light Weighting and Optimizing Strong Functional Parts
WO2023033801A1 (fr) * 2021-08-31 2023-03-09 Siemens Corporation Système et procédé d'exploration de conception à l'aide de simulations dynamiques d'environnement et de physique

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Publication number Priority date Publication date Assignee Title
US20210216683A1 (en) * 2020-01-03 2021-07-15 The Research Foundation For The State University Of New York Periodic Cellular Structure Based Design for Additive Manufacturing Approach for Light Weighting and Optimizing Strong Functional Parts
CN112926241A (zh) * 2021-02-02 2021-06-08 重庆交通大学绿色航空技术研究院 构造轻量化晶格结构单元的方法
CN112926241B (zh) * 2021-02-02 2023-02-24 重庆交通大学绿色航空技术研究院 构造轻量化晶格结构单元的方法
WO2023033801A1 (fr) * 2021-08-31 2023-03-09 Siemens Corporation Système et procédé d'exploration de conception à l'aide de simulations dynamiques d'environnement et de physique

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