WO2020005274A1 - Suivi d'une optimisation de topologie pour construire une topologie modifiable - Google Patents

Suivi d'une optimisation de topologie pour construire une topologie modifiable Download PDF

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Publication number
WO2020005274A1
WO2020005274A1 PCT/US2018/040272 US2018040272W WO2020005274A1 WO 2020005274 A1 WO2020005274 A1 WO 2020005274A1 US 2018040272 W US2018040272 W US 2018040272W WO 2020005274 A1 WO2020005274 A1 WO 2020005274A1
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WIPO (PCT)
Prior art keywords
topology
parametric
primitives
cad
geometry
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PCT/US2018/040272
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English (en)
Inventor
Erhan Arisoy
Ashley ECKHOFF
Suraj Ravi MUSUVATHY
Nicholas DICKENS
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Siemens Industry Software Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Siemens Industry Software Inc. filed Critical Siemens Industry Software Inc.
Priority to PCT/US2018/040272 priority Critical patent/WO2020005274A1/fr
Publication of WO2020005274A1 publication Critical patent/WO2020005274A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T17/00—Three dimensional [3D] modelling, e.g. data description of 3D objects
    • G06T17/30—Polynomial surface description
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C64/00—Additive manufacturing, i.e. manufacturing of three-dimensional [3D] objects by additive deposition, additive agglomeration or additive layering, e.g. by 3D printing, stereolithography or selective laser sintering
    • B29C64/30—Auxiliary operations or equipment
    • B29C64/386—Data acquisition or data processing for additive manufacturing
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B33—ADDITIVE MANUFACTURING TECHNOLOGY
    • B33Y—ADDITIVE MANUFACTURING, i.e. MANUFACTURING OF THREE-DIMENSIONAL [3-D] OBJECTS BY ADDITIVE DEPOSITION, ADDITIVE AGGLOMERATION OR ADDITIVE LAYERING, e.g. BY 3-D PRINTING, STEREOLITHOGRAPHY OR SELECTIVE LASER SINTERING
    • B33Y50/00—Data acquisition or data processing for additive manufacturing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/17—Mechanical parametric or variational design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T19/00—Manipulating 3D models or images for computer graphics
    • G06T19/20—Editing of 3D images, e.g. changing shapes or colours, aligning objects or positioning parts
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/06—Multi-objective optimisation, e.g. Pareto optimisation using simulated annealing [SA], ant colony algorithms or genetic algorithms [GA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/18—Manufacturability analysis or optimisation for manufacturability
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2219/00—Indexing scheme for manipulating 3D models or images for computer graphics
    • G06T2219/20—Indexing scheme for editing of 3D models
    • G06T2219/2021—Shape modification
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Definitions

  • This application relates to additive manufacturing. More particularly, this application relates to computer aided design methodology for additive manufacturing.
  • Additive manufacturing such as 3D printing, faces challenges when the product to be made has complex contours.
  • topology optimization is an available technique as a concept exploration tool for computer aided design (CAD) systems.
  • CAD computer aided design
  • Such a tool may indicate the major physical load paths in a model, thus enabling the creation of designs that satisfy structural requirements while enabling removal of material in areas that do not contribute towards structural strength to reduce excess weight.
  • Topology optimization algorithms typically operate on discretized versions of CAD solid models, such as voxels or finite element meshes. From the initial set of discrete elements, a subset of them is removed from the model based on the result of numerical optimization techniques that simulate removal of excess material. Over the course of several optimization steps, additional holes/voids with various shapes and sizes are created in the model, contributing to the topological complexity of the model. Furthermore, the boundaries of the model (i.e., the set of discrete elements that are adjacent to the exterior of the optimized model) can form complex freeform shapes that are not easily represented with modeling primitives available in conventional CAD systems.
  • aspects of the invention include methods and systems for constructing an editable computer aided design (CAD) model in parallel with a topology optimization process by a CAD system.
  • a topology optimization program of the CAD system may generate a plurality of serial modifications to topology of a design space having an initial CAD geometry, until an optimized topology is derived according to initial design criteria.
  • the editable CAD model corresponding to the optimized topology may be constructed by accumulating incremental changes in a set of parametric primitives derived by a tracking process executed, by a tracking agent of the CAD system, in parallel with the topology optimization program.
  • the tracking agent may store parameters associated with observed geometry changes of the topology, and may instantiate, in response to the stored parameters, a set of one or more parametric primitives to represent the geometry changes.
  • the CAD system may receive, upon a final modification, a final set of parametric primitives corresponding to the editable CAD model associated with the optimized topology.
  • FIG. 1 illustrates an example of a topology tracking process according to embodiments of the present disclosure
  • FIG. 2 shows an example of a model created by topology optimization according to embodiments of this disclosure
  • FIG. 3 shows a block diagram of an example of a computer aided design (CAD) system according to embodiments of this disclosure
  • FIG. 4 shows a flow diagram of an example process for building an editable topology in parallel with a topology optimization process according to embodiments of this disclosure
  • FIG. 5 shows an example of a computing environment within which embodiments of the disclosure may be implemented.
  • Methods and systems are disclosed for CAD modeling of designs, such as additive manufacturing designs, which include constructing a composite solid model that approximates a topology optimized discrete model on the fly in parallel with a running topology optimization algorithm, the approximate model being easily editable in a CAD system.
  • the disclosed methods and systems present an improvement to the functionality of the computer used to perform such a computer based task. While currently available topology optimization tools can generate an optimized design model, editing that design model requires post processing by a manual reverse modelling that is tedious, time consuming, and imprecise. Due to the complexity of the topology optimization results, (e.g., a topology having complex internal void regions) it is very difficult to re-create CAD geometry using the tools available today.
  • An automatic topology recovery of an optimized design may include instantiating parametric primitive shapes, such as 3D solids, in a step-wise manner to represent geometry changes in parallel with each stage of a topology optimization process.
  • the primitive shapes may represent discrete sections of voids within the model as each change to the topology occurs during the optimization.
  • FIG. 1 illustrates an example of a topology tracking process according to embodiments of the present disclosure.
  • the process includes a design workflow 1 10, topology optimization stages 120 for a series of iterations of the optimization, and topology tracking stages 130.
  • a design space 1 1 1 having an initial CAD model geometry along with the region in space around which the geometry can grow or shrink may be defined in a CAD system and submitted to a topology optimization algorithm.
  • the topology optimization algorithm may be initiated to develop a topology on the initial geometry of the design space 1 1 1.
  • the topology optimization algorithm may operate based on a set of design parameters, such as physical load paths for an object.
  • a first void region 141 is generated.
  • each void region such as void region 141
  • each void region may be extracted from the design space based on the algorithm determining that no physical load support is required for the design space occupied by the void region.
  • a topology tracking agent may observe the modification at topology tracking stage 131 and store parameters associated with the geometry change. For example, a location of the void region 141 , such as coordinates or relative coordinates, may be stored in memory. Other parameters may include an array of 2D or 3D dimensions related to the void region 141.
  • the topology tracking agent at topology tracking stage 131 may instantiate a primitive 151 , such as a 3D shape that may be spherical, conical, cylindrical, prismic, toroidal, for example or any such shape that is readily available among common CAD tool applications.
  • the parameters stored by the topology tracking agent may be used to derive the primitive 151.
  • the primitive may be stored as a set of parameters associated with the shape of the primitive, such as shape type, dimensions, including radius and/or length, width, depth, and center point location.
  • primitive 151 may be instantiated as a sphere having parameters of [sphere, center point location, radius] based on a rule set that requires a primitive to circumscribe the detected geometry change, such as a created void region 141.
  • the primitives may be stored as parametric features in a feature tree.
  • a topology tracking agent may apply feature based modeling and generate a shape according to surface and edge features of the detected geometry changes, accompanied by the stored parameters.
  • the CAD model geometry of the design space may change by growing, shrinking, or by the creation of new voids.
  • void regions 142 are produced, which is a geometry change to the void region 141.
  • the topology tracking agent observes the new void regions 142, stores the size and location information and modifies the primitive 151 to generate primitive set 152, which includes a circumscribing primitive for each of void regions 142.
  • the parameters for the primitive set may be stored by the topology tracking agent for step-wise management of a cumulative geometry representation of the topology optimization.
  • void regions 143 at topology optimization stage 123 are larger versions of void regions 142.
  • primitive set 153 may include a splitting of a primitive of the primitive set 152.
  • the primitive set 153 generation may include a splitting of one sphere into two spheres, and an enlargement to the remaining sphere.
  • the splitting may be into different shapes, such as a sphere and a cylinder, depending on the analysis of the void regions 143.
  • void regions may merge or split.
  • a primitive set such as primitive set 153 may include multiple primitive sets.
  • the topology tracking agent may combine the primitive sets 153 into a single set of primitives 154 to represent the void regions 144.
  • the final primitive set 154 is received by the design workflow process 1 10 as an editable topology representation of the optimized topology in stage 124. While FIG. 1 shows four stages of the topology optimization process for simplicity, an actual optimization process may involve hundreds or thousands of stages.
  • a user such as a CAD designer, may apply CAD tools to view the final primitive set (e.g., a graphical representation of the primitive set) and to parametrically modify the final primitive set 154.
  • the user may make adjustments to radii of the spherical primitives to comply with new design constraints or to address conditions not considered by the topology optimization algorithm or the topology tracking agent, such as enlargement of a hole to accept a larger diameter shaft, or adding more thickness to certain regions to enhance structure strength, etc..
  • the CAD system may employ an enveloping algorithm to generate a smooth surface envelope 1 13 of the edited primitive set 1 12. The CAD system may then perform a Boolean combination of the envelope 1 13 with the initial CAD model geometry of design space 1 1 1 to produce a final CAD model geometry 1 14.
  • the design space may be larger than the original CAD geometry, new regions may be created.
  • the topology tracker agent may instantiate new parametric primitives in order to represent these regions as well. While FIG. 1 shows void regions as being tracked and modeled by the topology tracking process, geometry changes to solid regions may also be tracked and modeled as parametric primitives accordingly in combination with the void region modeling.
  • FIG. 2 shows an example of a model created by topology optimization according to embodiments of this disclosure.
  • a design space 201 having an initial geometry represents a 3D space from which a complex model 202 may be derived by a topology optimization program.
  • the initial geometry may be a crude 3D block-like shape as shown in FIG. 2, or may have one or more edges or corners removed to more closely envelope the geometry of the object design for the initial steps of topology optimization.
  • the optimized model geometry may include various complex void regions, including regions 204, 205 and 206.
  • the topology tracking agent may instantiate parametric primitive sets to circumscribe such void regions as described herein.
  • topology optimization is shown by the enlargement region 203, which shows a typical polygonal mesh-based composition of the produced topologies constructed with thousands of triangular shapes in a curved web formation. Due to the complexity of this optimized topology construction, recreation of a CAD model geometry using conventional CAD tools is extremely difficult. For instance, editing a geometry made of primitives which model the optimized topology according to the embodiments disclosed herein is much simpler than attempting to directly edit the triangular mesh of the optimized topology. Another advantage of the tracking topology process according to the embodiments of this disclosure is that a CAD model object 202 may have interior void regions invisible from the exterior, which can be manufactured as a physical object using an additive manufacturing process.
  • topology tracking process allows modeling to keep pace with each iteration of the model generation during the topology optimization process, including any interior void regions such as void region 144 shown in FIG. 1.
  • FIG. 3 shows a block diagram of an example of a computer aided design (CAD) system according to embodiments of this disclosure.
  • a CAD system 301 may include one or more processors 31 1 and a memory 321 having stored applications, agents and computer program modules to implement the embodiments of this disclosure including design tools application 322, a topology optimization program 323, a tracking agent 331 , and a design space module 341.
  • Design tools application 322 may be implemented as a CAD product modeling or drawing application such as Siemens NX, AutoCAD, or the like, which provides an interface for a user, such as a designer, to develop 3D rendering of objects.
  • a user may apply the design tools application 322 to the final geometry once it is received from the topology tracking agent.
  • the final primitive set(s) may include several editable parametric shapes representing void regions and several editable parametric shapes representing solid regions.
  • GUI graphical user interface
  • the topology optimization program 323 may receive one or more initial design criteria from a user, such as the size for the design space, physical load information, material, weight, and density information, or any other relevant property needed for the optimization, as well as any design constraints.
  • the topology optimization program may execute an objective function that represents a quantity to be minimized for best performance, such as minimal compliance for maximum stiffness after material removal or distribution.
  • the program 323 may solve for the remaining unknown variables, such as material distribution, by applying differential equations for example.
  • the topology optimization program 323 may operate using discrete or continuous variables. Discrete modifications to the topology geometry may occur as a series of operations. For example, as shown in FIG. 1 , each of several stages 121 , 122, 123, 124 of the topology optimization program 323 may remove material or add material to the design space. Each stage may represent an iteration of the topology optimization operation.
  • the tracking agent 331 may include a tracking module 332, a shape modeling module 333, a merge and split module 334 and a shape conversion module 336.
  • the tracking module 332 may store observed geometry changes of the topology on a periodic basis to capture the series of modifications generated by the topology optimization process.
  • the periodicity of the tracking may be based on a regular time duration, or at every n th iteration of the optimization program, where n>1.
  • the shape modeling module 333 may instantiate a set of one or more parametric primitives to represent the geometry changes generated by one or more iterations of the topology optimization program 323, as recorded by the tracking module 332.
  • the tracking module 332 may record geometry changes at every n th iteration of the topology optimization program 323, and the shape modeling module 333 may instantiate a primitive set for each recorded geometry change.
  • the shape modeling module 333 may determine a primitive shape based on a minimal circumscribing of a void region that was created by the detected geometry change.
  • the shape modeling module 333 may determine that the void region is best approximated by a cylindrical shape because a cylindrical shape can circumscribe the void region in less space than a spherical shape, or other primitive shape. With successive geometry changes made by the topology optimization program 323, the shape modeling module 333 may modify the sets of one or more parametric primitives to represent the geometry changes, instantiate one or more new sets of primitives, or both modify and instantiate primitive sets.
  • the primitives may be stored as parametric features in a feature tree.
  • the shape modeling module 333 may generate the final primitive set representing a solid model based on accumulated incremental changes to the set of parametric primitives. The solid model approximates the optimized model generated by the topology optimization module 323.
  • the merge and split module 335 may be implemented as a subroutine for the shape modeling module 333 for analyzing current primitive sets and determining whether to modify a particular primitive shape by merging two or more primitives (e.g., merging two spheres into one) or by splitting a primitive into two or more primitives, in response to an evaluation of the recorded geometry changes and solving for a circumscription of the geometry changes according to the current primitive sets.
  • the shape conversion module 336 may be implemented as a subroutine for the shape modeling module 333 for analyzing current primitive sets and determining whether to convert one or more parametric primitives into a different shape (e.g., a sphere to a cylinder) in response to stored geometry changes.
  • a design space agent 341 may include an envelope module 342 and a Boolean module 343.
  • the design space agent 341 may execute an algorithm that tracks the size and shape of the design space from the initial CAD model geometry to the final primitive set.
  • the envelope module 342 may execute an algorithm that receives an edited primitive set from the design tools application 322, and in response, generates a smooth surface envelope of the edited primitive set.
  • Algorithms to generate a smooth surface envelope may include square-root parametrizations of curves and surfaces based on elliptic or hyper-elliptic curves, or rational envelopes in 3D by skinning and blending.
  • the envelope represents a model of an edited version of the optimized topology.
  • the Boolean module 343 may execute a Boolean operation to combine the envelope received from the envelope module 342 with the initial CAD model geometry as the final step for the design workflow 1 10 shown in FIG. 1.
  • the end result of the Boolean operation is a final CAD model design, constructed by a parallel tracking of the topology optimization and edited by CAD design tools.
  • the Boolean operation may be addition for regions added to the design space during the optimization, subtraction for regions removed from the design space (i.e. , void regions), or a combination of both.
  • FIG. 4 shows a flow diagram of an example process 400 for building an editable topology in parallel with a topology optimization process according to embodiments of this disclosure.
  • a topology optimization algorithm may iteratively generate one or more modifications to a design space topology to ultimately produce a complex geometric model optimized according to various parameters.
  • the tracking agent may store geometry changes at each iterative modification in parallel with the topology optimization algorithm. Alternatively, at 402, the tracking agent may operate at regular periodic rate to store detected geometry changes in parallel with the optimization algorithm.
  • the topology tracking agent may instantiate a primitive shape set to represent geometry changes stored at 402. The primitive shape set may refresh at a periodic rate or may be triggered upon detecting a newly stored geometry change at 402.
  • the primitive shape set may include modification to a previous primitive shape set, including shape merging, shape splitting, shape conversion, or a combination thereof.
  • the final primitive set at 406 may be received as an editable topology for a user to apply parametric edits using a CAD tool.
  • the final primitive set may be stored as a feature tree and received by a CAD application ready for editing of shape parameters.
  • the CAD system may receive the parametric edits to the topology from the CAD tool to produce an edited primitive set.
  • an envelope module of the CAD system may generate a smooth surface envelope of the edited primitive set.
  • a Boolean module of the CAD system may perform a Boolean combination of the initial CAD model geometry and the envelope to produce an edited CAD model geometry.
  • steps 407-409 may be repeated until a final CAD model 41 1 is obtained.
  • FIG. 5 illustrates an example of a computing environment within which embodiments of the present disclosure may be implemented.
  • a computing environment 500 includes a computer system 510 that may include a communication mechanism such as a system bus 521 or other communication mechanism for communicating information within the computer system 510.
  • the computer system 510 further includes one or more processors 520 coupled with the system bus 521 for processing the information.
  • the processors 520 may include one or more central processing units (CPUs), graphical processing units (GPUs), or any other processor known in the art. More generally, a processor as described herein is a device for executing machine- readable instructions stored on a computer readable medium, for performing tasks and may comprise any one or combination of, hardware and firmware. A processor may also comprise memory storing machine-readable instructions executable for performing tasks. A processor acts upon information by manipulating, analyzing, modifying, converting or transmitting information for use by an executable procedure or an information device, and/or by routing the information to an output device.
  • CPUs central processing units
  • GPUs graphical processing units
  • a processor may use or comprise the capabilities of a computer, controller or microprocessor, for example, and be conditioned using executable instructions to perform special purpose functions not performed by a general purpose computer.
  • a processor may include any type of suitable processing unit including, but not limited to, a central processing unit, a microprocessor, a Reduced Instruction Set Computer (RISC) microprocessor, a Complex Instruction Set Computer (CISC) microprocessor, a microcontroller, an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), a System-on-a-Chip (SoC), a digital signal processor (DSP), and so forth.
  • RISC Reduced Instruction Set Computer
  • CISC Complex Instruction Set Computer
  • ASIC Application Specific Integrated Circuit
  • FPGA Field-Programmable Gate Array
  • SoC System-on-a-Chip
  • DSP digital signal processor
  • processor(s) 520 may have any suitable microarchitecture design that includes any number of constituent components such as, for example, registers, multiplexers, arithmetic logic units, cache controllers for controlling read/write operations to cache memory, branch predictors, or the like.
  • the microarchitecture design of the processor may be capable of supporting any of a variety of instruction sets.
  • a processor may be coupled (electrically and/or as comprising executable components) with any other processor enabling interaction and/or communication there-between.
  • a user interface processor or generator is a known element comprising electronic circuitry or software or a combination of both for generating display images or portions thereof.
  • a user interface comprises one or more display images enabling user interaction with a processor or other device.
  • the system bus 521 may include at least one of a system bus, a memory bus, an address bus, or a message bus, and may permit exchange of information (e.g., data (including computer-executable code), signaling, etc.) between various components of the computer system 510.
  • the system bus 521 may include, without limitation, a memory bus or a memory controller, a peripheral bus, an accelerated graphics port, and so forth.
  • the system bus 521 may be associated with any suitable bus architecture including, without limitation, an Industry Standard Architecture (ISA), a Micro Channel Architecture (MCA), an Enhanced ISA (EISA), a Video Electronics Standards Association (VESA) architecture, an Accelerated Graphics Port (AGP) architecture, a Peripheral Component Interconnects (PCI) architecture, a PCI-Express architecture, a Personal Computer Memory Card International Association (PCMCIA) architecture, a Universal Serial Bus (USB) architecture, and so forth.
  • ISA Industry Standard Architecture
  • MCA Micro Channel Architecture
  • EISA Enhanced ISA
  • VESA Video Electronics Standards Association
  • AGP Accelerated Graphics Port
  • PCI Peripheral Component Interconnects
  • PCMCIA Personal Computer Memory Card International Association
  • USB Universal Serial Bus
  • the computer system 510 may also include a system memory 530 coupled to the system bus 521 for storing information and instructions to be executed by processors 520.
  • the system memory 530 may include computer readable storage media in the form of volatile and/or nonvolatile memory, such as read only memory (ROM) 531 and/or random access memory (RAM) 532.
  • the RAM 532 may include other dynamic storage device(s) (e.g., dynamic RAM, static RAM, and synchronous DRAM).
  • the ROM 531 may include other static storage device(s) (e.g., programmable ROM, erasable PROM, and electrically erasable PROM).
  • system memory 530 may be used for storing temporary variables or other intermediate information during the execution of instructions by the processors 520.
  • a basic input/output system 533 (BIOS) containing the basic routines that help to transfer information between elements within computer system 510, such as during start-up, may be stored in the ROM 531.
  • RAM 532 may contain data and/or program modules that are immediately accessible to and/or presently being operated on by the processors 520.
  • System memory 530 may additionally include, for example, operating system 534, application programs 535, and other program modules 536.
  • Application programs 535 may also include a user portal for development of the application program, allowing input parameters to be entered and modified as necessary.
  • the operating system 534 may be loaded into the memory 530 and may provide an interface between other application software executing on the computer system 510 and hardware resources of the computer system 510. More specifically, the operating system 534 may include a set of computer-executable instructions for managing hardware resources of the computer system 510 and for providing common services to other application programs (e.g., managing memory allocation among various application programs). In certain example embodiments, the operating system 534 may control execution of one or more of the program modules depicted as being stored in the data storage 540.
  • the operating system 534 may include any operating system now known or which may be developed in the future including, but not limited to, any server operating system, any mainframe operating system, or any other proprietary or non-proprietary operating system.
  • the computer system 510 may also include a disk/media controller 543 coupled to the system bus 521 to control one or more storage devices for storing information and instructions, such as a magnetic hard disk 541 and/or a removable media drive 542 (e.g., floppy disk drive, compact disc drive, tape drive, flash drive, and/or solid state drive).
  • Storage devices 540 may be added to the computer system 510 using an appropriate device interface (e.g., a small computer system interface (SCSI), integrated device electronics (IDE), Universal Serial Bus (USB), or FireWire).
  • Storage devices 541 , 542 may be external to the computer system 510.
  • the computer system 510 may also include a field device interface 565 coupled to the system bus 521 to control a field device 566, such as a device used in a production line.
  • the computer system 510 may include a user input interface or GUI 561 , which may comprise one or more input devices, such as a keyboard, touchscreen, tablet and/or a pointing device, for interacting with a computer user and providing information to the processors 520.
  • the computer system 510 may perform a portion or all of the processing steps of embodiments of the invention in response to the processors 520 executing one or more sequences of one or more instructions contained in a memory, such as the system memory 530. Such instructions may be read into the system memory 530 from another computer readable medium of storage 540, such as the magnetic hard disk 541 or the removable media drive 542.
  • the magnetic hard disk 541 and/or removable media drive 542 may contain one or more data stores and data files used by embodiments of the present disclosure.
  • the data store 540 may include, but are not limited to, databases (e.g., relational, object-oriented, etc.), file systems, flat files, distributed data stores in which data is stored on more than one node of a computer network, peer-to-peer network data stores, or the like.
  • the data stores may store various types of data such as, for example, skill data, sensor data, or any other data generated in accordance with the embodiments of the disclosure.
  • Data store contents and data files may be encrypted to improve security.
  • the processors 520 may also be employed in a multi-processing arrangement to execute the one or more sequences of instructions contained in system memory 530.
  • hard-wired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.
  • the computer system 510 may include at least one computer readable medium or memory for holding instructions programmed according to embodiments of the invention and for containing data structures, tables, records, or other data described herein.
  • the term“computer readable medium” as used herein refers to any medium that participates in providing instructions to the processors 520 for execution.
  • a computer readable medium may take many forms including, but not limited to, non-transitory, non-volatile media, volatile media, and transmission media.
  • Non-limiting examples of non-volatile media include optical disks, solid state drives, magnetic disks, and magneto-optical disks, such as magnetic hard disk 541 or removable media drive 542.
  • Non-limiting examples of volatile media include dynamic memory, such as system memory 530.
  • Non-limiting examples of transmission media include coaxial cables, copper wire, and fiber optics, including the wires that make up the system bus 521.
  • Transmission media may also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications.
  • Computer readable medium instructions for carrying out operations of the present disclosure may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages.
  • the computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server.
  • the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
  • electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.
  • the computing environment 500 may further include the computer system 510 operating in a networked environment using logical connections to one or more remote computers, such as remote computing device 580.
  • the network interface 570 may enable communication, for example, with other remote devices 580 or systems and/or the storage devices 541 , 542 via the network 571.
  • Remote computing device 580 may be a personal computer (laptop or desktop), a mobile device, a server, a router, a network PC, a peer device or other common network node, and typically includes many or all of the elements described above relative to computer system 510.
  • computer system 510 may include modem 572 for establishing communications over a network 571 , such as the Internet. Modem 572 may be connected to system bus 521 via user network interface 570, or via another appropriate mechanism.
  • Network 571 may be any network or system generally known in the art, including the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), a direct connection or series of connections, a cellular telephone network, or any other network or medium capable of facilitating communication between computer system 510 and other computers (e.g., remote computing device 580).
  • the network 571 may be wired, wireless or a combination thereof. Wired connections may be implemented using Ethernet, Universal Serial Bus (USB), RJ-6, or any other wired connection generally known in the art.
  • Wireless connections may be implemented using Wi-Fi, WiMAX, and Bluetooth, infrared, cellular networks, satellite or any other wireless connection methodology generally known in the art. Additionally, several networks may work alone or in communication with each other to facilitate communication in the network 571.
  • program modules, applications, computer- executable instructions, code, or the like depicted in FIG. 5 as being stored in the system memory 530 are merely illustrative and not exhaustive and that processing described as being supported by any particular module may alternatively be distributed across multiple modules or performed by a different module.
  • various program module(s), script(s), plug-in(s), Application Programming Interface(s) (API(s)), or any other suitable computer-executable code hosted locally on the computer system 510, the remote device 580, and/or hosted on other computing device(s) accessible via one or more of the network(s) 571 may be provided to support functionality provided by the program modules, applications, or computer-executable code depicted in FIG.
  • functionality may be modularized differently such that processing described as being supported collectively by the collection of program modules depicted in FIG. 5 may be performed by a fewer or greater number of modules, or functionality described as being supported by any particular module may be supported, at least in part, by another module.
  • program modules that support the functionality described herein may form part of one or more applications executable across any number of systems or devices in accordance with any suitable computing model such as, for example, a client-server model, a peer- to-peer model, and so forth.
  • any of the functionality described as being supported by any of the program modules depicted in FIG. 5 may be implemented, at least partially, in hardware and/or firmware across any number of devices.
  • the computer system 510 may include alternate and/or additional hardware, software, or firmware components beyond those described or depicted without departing from the scope of the disclosure. More particularly, it should be appreciated that software, firmware, or hardware components depicted as forming part of the computer system 510 are merely illustrative and that some components may not be present or additional components may be provided in various embodiments. While various illustrative program modules have been depicted and described as software modules stored in system memory 530, it should be appreciated that functionality described as being supported by the program modules may be enabled by any combination of hardware, software, and/or firmware. It should further be appreciated that each of the above-mentioned modules may, in various embodiments, represent a logical partitioning of supported functionality.
  • This logical partitioning is depicted for ease of explanation of the functionality and may not be representative of the structure of software, hardware, and/or firmware for implementing the functionality. Accordingly, it should be appreciated that functionality described as being provided by a particular module may, in various embodiments, be provided at least in part by one or more other modules. Further, one or more depicted modules may not be present in certain embodiments, while in other embodiments, additional modules not depicted may be present and may support at least a portion of the described functionality and/or additional functionality. Moreover, while certain modules may be depicted and described as sub-modules of another module, in certain embodiments, such modules may be provided as independent modules or as sub-modules of other modules.
  • any operation, element, component, data, or the like described herein as being based on another operation, element, component, data, or the like can be additionally based on one or more other operations, elements, components, data, or the like. Accordingly, the phrase“based on,” or variants thereof, should be interpreted as“based at least in part on.”
  • each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s).
  • the functions noted in the block may occur out of the order noted in the Figures.
  • two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

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Abstract

L'invention concerne un système et un procédé permettant de construire une topologie modifiable parallèlement à un processus d'optimisation de topologie pour une conception assistée par ordinateur (CAO) d'un objet. Un programme d'optimisation de topologie d'un système de CAO génère une pluralité de modifications en série sur la topologie d'un espace de conception ayant une géométrie de CAO initiale. Un agent de suivi stocke, pendant chaque modification respective, des changements de géométrie observés de la topologie sur la base de la modification respective. L'agent de suivi instancie, en réponse à des changements de géométrie stockés, un ensemble d'une ou plusieurs primitives paramétriques pour représenter les changements de géométrie. Le système de CAO peut recevoir un ensemble final de primitives paramétriques correspondant à la topologie modifiable associée à un espace de conception optimisé déterminé par le programme d'optimisation de topologie.
PCT/US2018/040272 2018-06-29 2018-06-29 Suivi d'une optimisation de topologie pour construire une topologie modifiable WO2020005274A1 (fr)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113536491A (zh) * 2021-06-15 2021-10-22 五邑大学 点阵结构拓扑优化设计方法、装置及计算机可读存储介质
WO2024129231A1 (fr) * 2022-12-15 2024-06-20 X Development Llc Conception inverse de dispositifs photoniques paramétrés à l'aide de primitives géométriques

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JIKAI LIU: "Feature-based Level Set Topology Optimization and Its Multidisciplinary Applications (Thesis)", PHD THESIS, 1 January 2015 (2015-01-01), pages i - 181, XP055575110 *
SAUMITRA JOSHI ET AL: "CADO - Computer Aided Design Optimizer A Topology Optimization Tool", 1 January 2016 (2016-01-01), Bavaria, Germany, pages 1 - 4, XP055575086, Retrieved from the Internet <URL:http://www.bgce.de/curriculum/projects/SIEMENS_2016/projectDesc.html> [retrieved on 20190327] *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113536491A (zh) * 2021-06-15 2021-10-22 五邑大学 点阵结构拓扑优化设计方法、装置及计算机可读存储介质
CN113536491B (zh) * 2021-06-15 2023-10-17 五邑大学 点阵结构拓扑优化设计方法、装置及计算机可读存储介质
WO2024129231A1 (fr) * 2022-12-15 2024-06-20 X Development Llc Conception inverse de dispositifs photoniques paramétrés à l'aide de primitives géométriques

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